diff options
Diffstat (limited to 'arch/arm/mach-sunxi/sunxi.c')
| -rw-r--r-- | arch/arm/mach-sunxi/sunxi.c | 21 |
1 files changed, 15 insertions, 6 deletions
diff --git a/arch/arm/mach-sunxi/sunxi.c b/arch/arm/mach-sunxi/sunxi.c index 6980cfa646f9..23afb732cb40 100644 --- a/arch/arm/mach-sunxi/sunxi.c +++ b/arch/arm/mach-sunxi/sunxi.c @@ -21,15 +21,16 @@ #include <linux/irqchip/sunxi.h> -#include <asm/hardware/vic.h> - #include <asm/mach/arch.h> #include <asm/mach/map.h> #include "sunxi.h" #define WATCHDOG_CTRL_REG 0x00 +#define WATCHDOG_CTRL_RESTART (1 << 0) #define WATCHDOG_MODE_REG 0x04 +#define WATCHDOG_MODE_ENABLE (1 << 0) +#define WATCHDOG_MODE_RESET_ENABLE (1 << 1) static void __iomem *wdt_base; @@ -50,11 +51,19 @@ static void sunxi_restart(char mode, const char *cmd) return; /* Enable timer and set reset bit in the watchdog */ - writel(3, wdt_base + WATCHDOG_MODE_REG); - writel(0xa57 << 1 | 1, wdt_base + WATCHDOG_CTRL_REG); - while(1) { + writel(WATCHDOG_MODE_ENABLE | WATCHDOG_MODE_RESET_ENABLE, + wdt_base + WATCHDOG_MODE_REG); + + /* + * Restart the watchdog. The default (and lowest) interval + * value for the watchdog is 0.5s. + */ + writel(WATCHDOG_CTRL_RESTART, wdt_base + WATCHDOG_CTRL_REG); + + while (1) { mdelay(5); - writel(3, wdt_base + WATCHDOG_MODE_REG); + writel(WATCHDOG_MODE_ENABLE | WATCHDOG_MODE_RESET_ENABLE, + wdt_base + WATCHDOG_MODE_REG); } } |