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-rw-r--r--arch/arm64/boot/dts/broadcom/Makefile1
-rw-r--r--arch/arm64/boot/dts/broadcom/ns2-svk.dts38
-rw-r--r--arch/arm64/boot/dts/broadcom/ns2-xmc.dts20
-rw-r--r--arch/arm64/boot/dts/broadcom/ns2.dtsi24
-rw-r--r--arch/arm64/boot/dts/broadcom/vulcan-eval.dts33
-rw-r--r--arch/arm64/boot/dts/broadcom/vulcan.dtsi147
6 files changed, 53 insertions, 210 deletions
diff --git a/arch/arm64/boot/dts/broadcom/Makefile b/arch/arm64/boot/dts/broadcom/Makefile
index f1caece9d3a7..bfa8f8e4c5af 100644
--- a/arch/arm64/boot/dts/broadcom/Makefile
+++ b/arch/arm64/boot/dts/broadcom/Makefile
@@ -1,6 +1,5 @@
dtb-$(CONFIG_ARCH_BCM2835) += bcm2837-rpi-3-b.dtb
dtb-$(CONFIG_ARCH_BCM_IPROC) += ns2-svk.dtb ns2-xmc.dtb
-dtb-$(CONFIG_ARCH_VULCAN) += vulcan-eval.dtb
always := $(dtb-y)
subdir-y := $(dts-dirs)
diff --git a/arch/arm64/boot/dts/broadcom/ns2-svk.dts b/arch/arm64/boot/dts/broadcom/ns2-svk.dts
index 5ae08161649e..ec19fbf928a1 100644
--- a/arch/arm64/boot/dts/broadcom/ns2-svk.dts
+++ b/arch/arm64/boot/dts/broadcom/ns2-svk.dts
@@ -57,55 +57,55 @@
};
&enet {
- status = "ok";
+ status = "okay";
};
&pci_phy0 {
- status = "ok";
+ status = "okay";
};
&pci_phy1 {
- status = "ok";
+ status = "okay";
};
&pcie0 {
- status = "ok";
+ status = "okay";
};
&pcie4 {
- status = "ok";
+ status = "okay";
};
&pcie8 {
- status = "ok";
+ status = "okay";
};
&i2c0 {
- status = "ok";
+ status = "okay";
};
&i2c1 {
- status = "ok";
+ status = "okay";
};
&uart0 {
- status = "ok";
+ status = "okay";
};
&uart1 {
- status = "ok";
+ status = "okay";
};
&uart2 {
- status = "ok";
+ status = "okay";
};
&uart3 {
- status = "ok";
+ status = "okay";
};
&ssp0 {
- status = "ok";
+ status = "okay";
slic@0 {
compatible = "silabs,si3226x";
@@ -126,7 +126,7 @@
};
&ssp1 {
- status = "ok";
+ status = "okay";
at25@0 {
compatible = "atmel,at25";
@@ -150,23 +150,23 @@
};
&sata_phy0 {
- status = "ok";
+ status = "okay";
};
&sata_phy1 {
- status = "ok";
+ status = "okay";
};
&sata {
- status = "ok";
+ status = "okay";
};
&sdio0 {
- status = "ok";
+ status = "okay";
};
&sdio1 {
- status = "ok";
+ status = "okay";
};
&nand {
diff --git a/arch/arm64/boot/dts/broadcom/ns2-xmc.dts b/arch/arm64/boot/dts/broadcom/ns2-xmc.dts
index 99a2723cccd2..ab4ae1a32fab 100644
--- a/arch/arm64/boot/dts/broadcom/ns2-xmc.dts
+++ b/arch/arm64/boot/dts/broadcom/ns2-xmc.dts
@@ -54,15 +54,15 @@
};
&enet {
- status = "ok";
+ status = "okay";
};
&i2c0 {
- status = "ok";
+ status = "okay";
};
&i2c1 {
- status = "ok";
+ status = "okay";
};
&mdio_mux_iproc {
@@ -122,27 +122,27 @@
};
&pci_phy0 {
- status = "ok";
+ status = "okay";
};
&pcie0 {
- status = "ok";
+ status = "okay";
};
&pcie8 {
- status = "ok";
+ status = "okay";
};
&sata_phy0 {
- status = "ok";
+ status = "okay";
};
&sata_phy1 {
- status = "ok";
+ status = "okay";
};
&sata {
- status = "ok";
+ status = "okay";
};
&qspi {
@@ -187,5 +187,5 @@
};
&uart3 {
- status = "ok";
+ status = "okay";
};
diff --git a/arch/arm64/boot/dts/broadcom/ns2.dtsi b/arch/arm64/boot/dts/broadcom/ns2.dtsi
index bcb03fc32665..35a309ae3ed8 100644
--- a/arch/arm64/boot/dts/broadcom/ns2.dtsi
+++ b/arch/arm64/boot/dts/broadcom/ns2.dtsi
@@ -222,6 +222,12 @@
brcm,use-bcm-hdr;
};
+ crypto0: crypto@612d0000 {
+ compatible = "brcm,spum-crypto";
+ reg = <0x612d0000 0x900>;
+ mboxes = <&pdc0 0>;
+ };
+
pdc1: iproc-pdc1@612e0000 {
compatible = "brcm,iproc-pdc-mbox";
reg = <0x612e0000 0x445>; /* PDC FS1 regs */
@@ -232,6 +238,12 @@
brcm,use-bcm-hdr;
};
+ crypto1: crypto@612f0000 {
+ compatible = "brcm,spum-crypto";
+ reg = <0x612f0000 0x900>;
+ mboxes = <&pdc1 0>;
+ };
+
pdc2: iproc-pdc2@61300000 {
compatible = "brcm,iproc-pdc-mbox";
reg = <0x61300000 0x445>; /* PDC FS2 regs */
@@ -242,6 +254,12 @@
brcm,use-bcm-hdr;
};
+ crypto2: crypto@61310000 {
+ compatible = "brcm,spum-crypto";
+ reg = <0x61310000 0x900>;
+ mboxes = <&pdc2 0>;
+ };
+
pdc3: iproc-pdc3@61320000 {
compatible = "brcm,iproc-pdc-mbox";
reg = <0x61320000 0x445>; /* PDC FS3 regs */
@@ -252,6 +270,12 @@
brcm,use-bcm-hdr;
};
+ crypto3: crypto@61330000 {
+ compatible = "brcm,spum-crypto";
+ reg = <0x61330000 0x900>;
+ mboxes = <&pdc3 0>;
+ };
+
dma0: dma@61360000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x61360000 0x1000>;
diff --git a/arch/arm64/boot/dts/broadcom/vulcan-eval.dts b/arch/arm64/boot/dts/broadcom/vulcan-eval.dts
deleted file mode 100644
index 9ee8d3da0e3f..000000000000
--- a/arch/arm64/boot/dts/broadcom/vulcan-eval.dts
+++ /dev/null
@@ -1,33 +0,0 @@
-/*
- * dts file for Broadcom (BRCM) Vulcan Evaluation Platform
- *
- * Copyright (c) 2013-2016 Broadcom
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- */
-
-/dts-v1/;
-
-#include "vulcan.dtsi"
-
-/ {
- model = "Broadcom Vulcan Eval Platform";
- compatible = "brcm,vulcan-eval", "brcm,vulcan-soc";
-
- memory {
- device_type = "memory";
- reg = <0x00000000 0x80000000 0x0 0x80000000>, /* 2G @ 2G */
- <0x00000008 0x80000000 0x0 0x80000000>; /* 2G @ 34G */
- };
-
- aliases {
- serial0 = &uart0;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-};
diff --git a/arch/arm64/boot/dts/broadcom/vulcan.dtsi b/arch/arm64/boot/dts/broadcom/vulcan.dtsi
deleted file mode 100644
index 34e11a9db2a0..000000000000
--- a/arch/arm64/boot/dts/broadcom/vulcan.dtsi
+++ /dev/null
@@ -1,147 +0,0 @@
-/*
- * dtsi file for Broadcom (BRCM) Vulcan processor
- *
- * Copyright (c) 2013-2016 Broadcom
- * Author: Zi Shen Lim <zlim@broadcom.com>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- */
-
-#include <dt-bindings/interrupt-controller/arm-gic.h>
-
-/ {
- model = "Broadcom Vulcan";
- compatible = "brcm,vulcan-soc";
- interrupt-parent = <&gic>;
- #address-cells = <2>;
- #size-cells = <2>;
-
- /* just 4 cpus now, 128 needed in full config */
- cpus {
- #address-cells = <0x2>;
- #size-cells = <0x0>;
-
- cpu@0 {
- device_type = "cpu";
- compatible = "brcm,vulcan", "arm,armv8";
- reg = <0x0 0x0>;
- enable-method = "psci";
- };
-
- cpu@1 {
- device_type = "cpu";
- compatible = "brcm,vulcan", "arm,armv8";
- reg = <0x0 0x1>;
- enable-method = "psci";
- };
-
- cpu@2 {
- device_type = "cpu";
- compatible = "brcm,vulcan", "arm,armv8";
- reg = <0x0 0x2>;
- enable-method = "psci";
- };
-
- cpu@3 {
- device_type = "cpu";
- compatible = "brcm,vulcan", "arm,armv8";
- reg = <0x0 0x3>;
- enable-method = "psci";
- };
- };
-
- psci {
- compatible = "arm,psci-0.2";
- method = "smc";
- };
-
- gic: interrupt-controller@400080000 {
- compatible = "arm,gic-v3";
- #interrupt-cells = <3>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
- interrupt-controller;
- #redistributor-regions = <1>;
- reg = <0x04 0x00080000 0x0 0x20000>, /* GICD */
- <0x04 0x01000000 0x0 0x1000000>; /* GICR */
- interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
-
- gicits: gic-its@40010000 {
- compatible = "arm,gic-v3-its";
- msi-controller;
- reg = <0x04 0x00100000 0x0 0x20000>; /* GIC ITS */
- };
- };
-
- timer {
- compatible = "arm,armv8-timer";
- interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_PPI 14 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_PPI 10 IRQ_TYPE_LEVEL_HIGH>;
- };
-
- pmu {
- compatible = "brcm,vulcan-pmu", "arm,armv8-pmuv3";
- interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>; /* PMU overflow */
- };
-
- clk125mhz: uart_clk125mhz {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <125000000>;
- clock-output-names = "clk125mhz";
- };
-
- pci {
- compatible = "pci-host-ecam-generic";
- device_type = "pci";
- #interrupt-cells = <1>;
- #address-cells = <3>;
- #size-cells = <2>;
-
- /* ECAM at 0x3000_0000 - 0x4000_0000 */
- reg = <0x0 0x30000000 0x0 0x10000000>;
- reg-names = "PCI ECAM";
-
- /*
- * PCI ranges:
- * IO no supported
- * MEM 0x4000_0000 - 0x6000_0000
- * MEM64 pref 0x40_0000_0000 - 0x60_0000_0000
- */
- ranges =
- <0x02000000 0 0x40000000 0 0x40000000 0 0x20000000
- 0x43000000 0x40 0x00000000 0x40 0x00000000 0x20 0x00000000>;
- interrupt-map-mask = <0 0 0 7>;
- interrupt-map =
- /* addr pin ic icaddr icintr */
- <0 0 0 1 &gic 0 0 GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
- 0 0 0 2 &gic 0 0 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
- 0 0 0 3 &gic 0 0 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
- 0 0 0 4 &gic 0 0 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
- msi-parent = <&gicits>;
- dma-coherent;
- };
-
- soc {
- compatible = "simple-bus";
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- uart0: serial@402020000 {
- compatible = "arm,pl011", "arm,primecell";
- reg = <0x04 0x02020000 0x0 0x1000>;
- interrupt-parent = <&gic>;
- interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk125mhz>;
- clock-names = "apb_pclk";
- };
- };
-
-};
Copyright © 1996 – 2023 Jason A. Donenfeld. All Rights Reverse Engineered.