diff options
Diffstat (limited to '')
-rw-r--r-- | arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi | 152 |
1 files changed, 121 insertions, 31 deletions
diff --git a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi index ba75adedbf79..b0c29510a7da 100644 --- a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi +++ b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi @@ -7,6 +7,7 @@ #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/gpio/uniphier-gpio.h> +#include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/thermal/thermal.h> / { @@ -42,6 +43,7 @@ reg = <0 0x000>; clocks = <&sys_clk 33>; enable-method = "psci"; + next-level-cache = <&l2>; operating-points-v2 = <&cluster0_opp>; #cooling-cells = <2>; }; @@ -52,6 +54,7 @@ reg = <0 0x001>; clocks = <&sys_clk 33>; enable-method = "psci"; + next-level-cache = <&l2>; operating-points-v2 = <&cluster0_opp>; #cooling-cells = <2>; }; @@ -62,6 +65,7 @@ reg = <0 0x002>; clocks = <&sys_clk 33>; enable-method = "psci"; + next-level-cache = <&l2>; operating-points-v2 = <&cluster0_opp>; #cooling-cells = <2>; }; @@ -72,9 +76,14 @@ reg = <0 0x003>; clocks = <&sys_clk 33>; enable-method = "psci"; + next-level-cache = <&l2>; operating-points-v2 = <&cluster0_opp>; #cooling-cells = <2>; }; + + l2: l2-cache { + compatible = "cache"; + }; }; cluster0_opp: opp-table { @@ -135,10 +144,10 @@ timer { compatible = "arm,armv8-timer"; - interrupts = <1 13 4>, - <1 14 4>, - <1 11 4>, - <1 10 4>; + interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>, + <GIC_PPI 14 IRQ_TYPE_LEVEL_HIGH>, + <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>, + <GIC_PPI 10 IRQ_TYPE_LEVEL_HIGH>; }; thermal-zones { @@ -195,7 +204,7 @@ reg = <0x54006000 0x100>; #address-cells = <1>; #size-cells = <0>; - interrupts = <0 39 4>; + interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_spi0>; clocks = <&peri_clk 11>; @@ -208,7 +217,7 @@ reg = <0x54006100 0x100>; #address-cells = <1>; #size-cells = <0>; - interrupts = <0 216 4>; + interrupts = <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_spi1>; clocks = <&peri_clk 12>; @@ -219,7 +228,7 @@ compatible = "socionext,uniphier-uart"; status = "disabled"; reg = <0x54006800 0x40>; - interrupts = <0 33 4>; + interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart0>; clocks = <&peri_clk 0>; @@ -230,7 +239,7 @@ compatible = "socionext,uniphier-uart"; status = "disabled"; reg = <0x54006900 0x40>; - interrupts = <0 35 4>; + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart1>; clocks = <&peri_clk 1>; @@ -241,7 +250,7 @@ compatible = "socionext,uniphier-uart"; status = "disabled"; reg = <0x54006a00 0x40>; - interrupts = <0 37 4>; + interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart2>; clocks = <&peri_clk 2>; @@ -252,7 +261,7 @@ compatible = "socionext,uniphier-uart"; status = "disabled"; reg = <0x54006b00 0x40>; - interrupts = <0 177 4>; + interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart3>; clocks = <&peri_clk 3>; @@ -284,7 +293,7 @@ reg = <0x58780000 0x80>; #address-cells = <1>; #size-cells = <0>; - interrupts = <0 41 4>; + interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c0>; clocks = <&peri_clk 4>; @@ -298,7 +307,7 @@ reg = <0x58781000 0x80>; #address-cells = <1>; #size-cells = <0>; - interrupts = <0 42 4>; + interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c1>; clocks = <&peri_clk 5>; @@ -312,7 +321,7 @@ reg = <0x58782000 0x80>; #address-cells = <1>; #size-cells = <0>; - interrupts = <0 43 4>; + interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c2>; clocks = <&peri_clk 6>; @@ -326,7 +335,7 @@ reg = <0x58783000 0x80>; #address-cells = <1>; #size-cells = <0>; - interrupts = <0 44 4>; + interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c3>; clocks = <&peri_clk 7>; @@ -340,7 +349,7 @@ reg = <0x58786000 0x80>; #address-cells = <1>; #size-cells = <0>; - interrupts = <0 26 4>; + interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; clocks = <&peri_clk 10>; resets = <&peri_rst 10>; clock-frequency = <400000>; @@ -396,7 +405,7 @@ emmc: mmc@5a000000 { compatible = "socionext,uniphier-sd4hc", "cdns,sd4hc"; reg = <0x5a000000 0x400>; - interrupts = <0 78 4>; + interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_emmc>; clocks = <&sys_clk 4>; @@ -416,7 +425,7 @@ compatible = "socionext,uniphier-sd-v3.1.1"; status = "disabled"; reg = <0x5a400000 0x800>; - interrupts = <0 76 4>; + interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; pinctrl-names = "default", "uhs"; pinctrl-0 = <&pinctrl_sd>; pinctrl-1 = <&pinctrl_sd_uhs>; @@ -505,7 +514,7 @@ xdmac: dma-controller@5fc10000 { compatible = "socionext,uniphier-xdmac"; reg = <0x5fc10000 0x5300>; - interrupts = <0 188 4>; + interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; dma-channels = <16>; #dma-cells = <2>; }; @@ -523,7 +532,7 @@ <0x5fe80000 0x80000>; /* GICR */ interrupt-controller; #interrupt-cells = <3>; - interrupts = <1 9 4>; + interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; }; sysctrl@61840000 { @@ -545,9 +554,9 @@ compatible = "socionext,uniphier-wdt"; }; - pvtctl: pvtctl { + pvtctl: thermal-sensor { compatible = "socionext,uniphier-pxs3-thermal"; - interrupts = <0 3 4>; + interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; #thermal-sensor-cells = <0>; socionext,tmod-calibration = <0x0f22 0x68ee>; }; @@ -557,7 +566,7 @@ compatible = "socionext,uniphier-pxs3-ave4"; status = "disabled"; reg = <0x65000000 0x8500>; - interrupts = <0 66 4>; + interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ether_rgmii>; clock-names = "ether"; @@ -578,7 +587,7 @@ compatible = "socionext,uniphier-pxs3-ave4"; status = "disabled"; reg = <0x65200000 0x8500>; - interrupts = <0 67 4>; + interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ether1_rgmii>; clock-names = "ether"; @@ -595,12 +604,92 @@ }; }; + ahci0: sata@65600000 { + compatible = "socionext,uniphier-pxs3-ahci", + "generic-ahci"; + status = "disabled"; + reg = <0x65600000 0x10000>; + interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&sys_clk 28>; + resets = <&sys_rst 28>, <&ahci0_rst 0>; + ports-implemented = <1>; + phys = <&ahci0_phy>; + }; + + sata-controller@65700000 { + compatible = "socionext,uniphier-pxs3-ahci-glue", + "simple-mfd"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x65700000 0x100>; + + ahci0_rst: reset-controller@0 { + compatible = "socionext,uniphier-pxs3-ahci-reset"; + reg = <0x0 0x4>; + clock-names = "link"; + clocks = <&sys_clk 28>; + reset-names = "link"; + resets = <&sys_rst 28>; + #reset-cells = <1>; + }; + + ahci0_phy: sata-phy@10 { + compatible = "socionext,uniphier-pxs3-ahci-phy"; + reg = <0x10 0x10>; + clock-names = "link", "phy"; + clocks = <&sys_clk 28>, <&sys_clk 30>; + reset-names = "link", "phy"; + resets = <&sys_rst 28>, <&sys_rst 30>; + #phy-cells = <0>; + }; + }; + + ahci1: sata@65800000 { + compatible = "socionext,uniphier-pxs3-ahci", + "generic-ahci"; + status = "disabled"; + reg = <0x65800000 0x10000>; + interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&sys_clk 29>; + resets = <&sys_rst 29>, <&ahci1_rst 0>; + ports-implemented = <1>; + phys = <&ahci1_phy>; + }; + + sata-controller@65900000 { + compatible = "socionext,uniphier-pxs3-ahci-glue", + "simple-mfd"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x65900000 0x100>; + + ahci1_rst: reset-controller@0 { + compatible = "socionext,uniphier-pxs3-ahci-reset"; + reg = <0x0 0x4>; + clock-names = "link"; + clocks = <&sys_clk 29>; + reset-names = "link"; + resets = <&sys_rst 29>; + #reset-cells = <1>; + }; + + ahci1_phy: sata-phy@10 { + compatible = "socionext,uniphier-pxs3-ahci-phy"; + reg = <0x10 0x10>; + clock-names = "link", "phy"; + clocks = <&sys_clk 29>, <&sys_clk 30>; + reset-names = "link", "phy"; + resets = <&sys_rst 29>, <&sys_rst 30>; + #phy-cells = <0>; + }; + }; + usb0: usb@65a00000 { compatible = "socionext,uniphier-dwc3", "snps,dwc3"; status = "disabled"; reg = <0x65a00000 0xcd00>; interrupt-names = "dwc_usb3"; - interrupts = <0 134 4>; + interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usb0>, <&pinctrl_usb2>; clock-names = "ref", "bus_early", "suspend"; @@ -611,7 +700,7 @@ dr_mode = "host"; }; - usb-glue@65b00000 { + usb-controller@65b00000 { compatible = "socionext,uniphier-pxs3-dwc3-glue", "simple-mfd"; #address-cells = <1>; @@ -702,7 +791,7 @@ status = "disabled"; reg = <0x65c00000 0xcd00>; interrupt-names = "dwc_usb3"; - interrupts = <0 137 4>; + interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usb1>, <&pinctrl_usb3>; clock-names = "ref", "bus_early", "suspend"; @@ -713,7 +802,7 @@ dr_mode = "host"; }; - usb-glue@65d00000 { + usb-controller@65d00000 { compatible = "socionext,uniphier-pxs3-dwc3-glue", "simple-mfd"; #address-cells = <1>; @@ -792,7 +881,7 @@ }; pcie: pcie@66000000 { - compatible = "socionext,uniphier-pcie", "snps,dw-pcie"; + compatible = "socionext,uniphier-pcie"; status = "disabled"; reg-names = "dbi", "link", "config"; reg = <0x66000000 0x1000>, <0x66010000 0x10000>, @@ -812,7 +901,8 @@ <0x82000000 0 0x20000000 0x20000000 0 0x0ffe0000>; #interrupt-cells = <1>; interrupt-names = "dma", "msi"; - interrupts = <0 224 4>, <0 225 4>; + interrupts = <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>; interrupt-map-mask = <0 0 0 7>; interrupt-map = <0 0 0 1 &pcie_intc 0>, /* INTA */ <0 0 0 2 &pcie_intc 1>, /* INTB */ @@ -825,7 +915,7 @@ interrupt-controller; #interrupt-cells = <1>; interrupt-parent = <&gic>; - interrupts = <0 226 4>; + interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; }; }; @@ -847,7 +937,7 @@ reg = <0x68000000 0x20>, <0x68100000 0x1000>; #address-cells = <1>; #size-cells = <0>; - interrupts = <0 65 4>; + interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_nand>; clock-names = "nand", "nand_x", "ecc"; |