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-rw-r--r--arch/arm64/boot/dts/socionext/uniphier-ld11-ref.dts3
-rw-r--r--arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi6
-rw-r--r--arch/arm64/boot/dts/socionext/uniphier-ld20-ref.dts3
-rw-r--r--arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi3
-rw-r--r--arch/arm64/boot/dts/socionext/uniphier-pxs3-ref.dts19
-rw-r--r--arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi7
6 files changed, 30 insertions, 11 deletions
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld11-ref.dts b/arch/arm64/boot/dts/socionext/uniphier-ld11-ref.dts
index dd7193acc7df..54c53170699a 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-ld11-ref.dts
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld11-ref.dts
@@ -40,7 +40,6 @@
};
&ethsc {
- interrupt-parent = <&gpio>;
interrupts = <0 8>;
};
@@ -51,7 +50,7 @@
&gpio {
xirq0 {
gpio-hog;
- gpios = <120 0>;
+ gpios = <UNIPHIER_GPIO_IRQ(0) 0>;
input;
};
};
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
index 1c63d0ab8a58..cd7c2d0a1f64 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
@@ -8,6 +8,7 @@
*/
#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/gpio/uniphier-gpio.h>
/memreserve/ 0x80000000 0x02000000;
@@ -100,7 +101,7 @@
emmc_pwrseq: emmc-pwrseq {
compatible = "mmc-pwrseq-emmc";
- reset-gpios = <&gpio 26 GPIO_ACTIVE_LOW>;
+ reset-gpios = <&gpio UNIPHIER_GPIO_PORT(3, 2) GPIO_ACTIVE_LOW>;
};
timer {
@@ -347,6 +348,7 @@
<&mio_clk 12>;
resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 8>,
<&mio_rst 12>;
+ has-transaction-translator;
};
usb1: usb@5a810100 {
@@ -360,6 +362,7 @@
<&mio_clk 13>;
resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 9>,
<&mio_rst 13>;
+ has-transaction-translator;
};
usb2: usb@5a820100 {
@@ -373,6 +376,7 @@
<&mio_clk 14>;
resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 10>,
<&mio_rst 14>;
+ has-transaction-translator;
};
mioctrl@5b3e0000 {
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20-ref.dts b/arch/arm64/boot/dts/socionext/uniphier-ld20-ref.dts
index d99e3731358c..693371033c90 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-ld20-ref.dts
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld20-ref.dts
@@ -40,7 +40,6 @@
};
&ethsc {
- interrupt-parent = <&gpio>;
interrupts = <0 8>;
};
@@ -51,7 +50,7 @@
&gpio {
xirq0 {
gpio-hog;
- gpios = <120 0>;
+ gpios = <UNIPHIER_GPIO_IRQ(0) 0>;
input;
};
};
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
index 5c81070944cc..8a3276ba2da1 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
@@ -8,6 +8,7 @@
*/
#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/gpio/uniphier-gpio.h>
#include <dt-bindings/thermal/thermal.h>
/memreserve/ 0x80000000 0x02000000;
@@ -172,7 +173,7 @@
emmc_pwrseq: emmc-pwrseq {
compatible = "mmc-pwrseq-emmc";
- reset-gpios = <&gpio 26 GPIO_ACTIVE_LOW>;
+ reset-gpios = <&gpio UNIPHIER_GPIO_PORT(3, 2) GPIO_ACTIVE_LOW>;
};
timer {
diff --git a/arch/arm64/boot/dts/socionext/uniphier-pxs3-ref.dts b/arch/arm64/boot/dts/socionext/uniphier-pxs3-ref.dts
index 864feeb35180..3c7108729827 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-pxs3-ref.dts
+++ b/arch/arm64/boot/dts/socionext/uniphier-pxs3-ref.dts
@@ -38,14 +38,29 @@
};
&ethsc {
- interrupt-parent = <&gpio>;
- interrupts = <0 8>;
+ interrupts = <4 8>;
};
&serial0 {
status = "okay";
};
+&serial2 {
+ status = "okay";
+};
+
+&serial3 {
+ status = "okay";
+};
+
+&gpio {
+ xirq4 {
+ gpio-hog;
+ gpios = <UNIPHIER_GPIO_IRQ(4) 0>;
+ input;
+ };
+};
+
&i2c0 {
status = "okay";
};
diff --git a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
index 48e733136db4..234fc58cc599 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
@@ -8,6 +8,7 @@
*/
#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/gpio/uniphier-gpio.h>
/memreserve/ 0x80000000 0x02000000;
@@ -128,7 +129,7 @@
emmc_pwrseq: emmc-pwrseq {
compatible = "mmc-pwrseq-emmc";
- reset-gpios = <&gpio 47 GPIO_ACTIVE_LOW>;
+ reset-gpios = <&gpio UNIPHIER_GPIO_PORT(5, 7) GPIO_ACTIVE_LOW>;
};
timer {
@@ -198,8 +199,8 @@
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&pinctrl 0 0 0>,
- <&pinctrl 96 0 0>,
- <&pinctrl 160 0 0>;
+ <&pinctrl 104 0 0>,
+ <&pinctrl 168 0 0>;
gpio-ranges-group-names = "gpio_range0",
"gpio_range1",
"gpio_range2";