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Diffstat (limited to 'arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts')
-rw-r--r--arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts11
1 files changed, 6 insertions, 5 deletions
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts
index 8f456146409f..7a4614e3f5fa 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts
@@ -2,7 +2,7 @@
/*
* dts file for Xilinx ZynqMP ZCU104
*
- * (C) Copyright 2017 - 2018, Xilinx, Inc.
+ * (C) Copyright 2017 - 2019, Xilinx, Inc.
*
* Michal Simek <michal.simek@xilinx.com>
*/
@@ -10,7 +10,7 @@
/dts-v1/;
#include "zynqmp.dtsi"
-#include "zynqmp-clk.dtsi"
+#include "zynqmp-clk-ccf.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
@@ -50,7 +50,7 @@
status = "okay";
phy-handle = <&phy0>;
phy-mode = "rgmii-id";
- phy0: phy@c {
+ phy0: ethernet-phy@c {
reg = <0xc>;
ti,rx-internal-delay = <0x8>;
ti,tx-internal-delay = <0xa>;
@@ -118,9 +118,9 @@
#address-cells = <1>;
#size-cells = <0>;
reg = <4>;
- tca6416_u97: gpio@21 {
+ tca6416_u97: gpio@20 {
compatible = "ti,tca6416";
- reg = <0x21>;
+ reg = <0x20>;
gpio-controller;
#gpio-cells = <2>;
/*
@@ -189,6 +189,7 @@
/* ULPI SMSC USB3320 */
&usb0 {
status = "okay";
+ dr_mode = "host";
};
&watchdog0 {