diff options
Diffstat (limited to 'arch/arm64/boot/dts')
6 files changed, 116 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi index 3f39e020f74e..7ab71172cd3c 100644 --- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi @@ -95,6 +95,39 @@ #size-cells = <2>; ranges; + pcie: pcie@fc000000 { + compatible = "amlogic,g12a-pcie", "snps,dw-pcie"; + reg = <0x0 0xfc000000 0x0 0x400000 + 0x0 0xff648000 0x0 0x2000 + 0x0 0xfc400000 0x0 0x200000>; + reg-names = "elbi", "cfg", "config"; + interrupts = <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &gic GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>; + bus-range = <0x0 0xff>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + ranges = <0x81000000 0 0 0x0 0xfc600000 0 0x00100000 + 0x82000000 0 0xfc700000 0x0 0xfc700000 0 0x1900000>; + + clocks = <&clkc CLKID_PCIE_PHY + &clkc CLKID_PCIE_COMB + &clkc CLKID_PCIE_PLL>; + clock-names = "general", + "pclk", + "port"; + resets = <&reset RESET_PCIE_CTRL_A>, + <&reset RESET_PCIE_APB>; + reset-names = "port", + "apb"; + num-lanes = <1>; + phys = <&usb3_pcie_phy PHY_TYPE_PCIE>; + phy-names = "pcie"; + status = "disabled"; + }; + ethmac: ethernet@ff3f0000 { compatible = "amlogic,meson-axg-dwmac", "snps,dwmac-3.70a", diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-a311d-khadas-vim3.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-a311d-khadas-vim3.dts index 3a6a1e0c1e32..124a80901084 100644 --- a/arch/arm64/boot/dts/amlogic/meson-g12b-a311d-khadas-vim3.dts +++ b/arch/arm64/boot/dts/amlogic/meson-g12b-a311d-khadas-vim3.dts @@ -14,3 +14,28 @@ / { compatible = "khadas,vim3", "amlogic,a311d", "amlogic,g12b"; }; + +/* + * The VIM3 on-board MCU can mux the PCIe/USB3.0 shared differential + * lines using a FUSB340TMX USB 3.1 SuperSpeed Data Switch between + * an USB3.0 Type A connector and a M.2 Key M slot. + * The PHY driving these differential lines is shared between + * the USB3.0 controller and the PCIe Controller, thus only + * a single controller can use it. + * If the MCU is configured to mux the PCIe/USB3.0 differential lines + * to the M.2 Key M slot, uncomment the following block to disable + * USB3.0 from the USB Complex and enable the PCIe controller. + * The End User is not expected to uncomment the following except for + * testing purposes, but instead rely on the firmware/bootloader to + * update these nodes accordingly if PCIe mode is selected by the MCU. + */ +/* +&pcie { + status = "okay"; +}; + +&usb { + phys = <&usb2_phy0>, <&usb2_phy1>; + phy-names = "usb2-phy0", "usb2-phy1"; +}; + */ diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-s922x-khadas-vim3.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-s922x-khadas-vim3.dts index b73deb282120..bba98f982ad6 100644 --- a/arch/arm64/boot/dts/amlogic/meson-g12b-s922x-khadas-vim3.dts +++ b/arch/arm64/boot/dts/amlogic/meson-g12b-s922x-khadas-vim3.dts @@ -14,3 +14,28 @@ / { compatible = "khadas,vim3", "amlogic,s922x", "amlogic,g12b"; }; + +/* + * The VIM3 on-board MCU can mux the PCIe/USB3.0 shared differential + * lines using a FUSB340TMX USB 3.1 SuperSpeed Data Switch between + * an USB3.0 Type A connector and a M.2 Key M slot. + * The PHY driving these differential lines is shared between + * the USB3.0 controller and the PCIe Controller, thus only + * a single controller can use it. + * If the MCU is configured to mux the PCIe/USB3.0 differential lines + * to the M.2 Key M slot, uncomment the following block to disable + * USB3.0 from the USB Complex and enable the PCIe controller. + * The End User is not expected to uncomment the following except for + * testing purposes, but instead rely on the firmware/bootloader to + * update these nodes accordingly if PCIe mode is selected by the MCU. + */ +/* +&pcie { + status = "okay"; +}; + +&usb { + phys = <&usb2_phy0>, <&usb2_phy1>; + phy-names = "usb2-phy0", "usb2-phy1"; +}; + */ diff --git a/arch/arm64/boot/dts/amlogic/meson-khadas-vim3.dtsi b/arch/arm64/boot/dts/amlogic/meson-khadas-vim3.dtsi index 8647da7d6609..eac5720dc15f 100644 --- a/arch/arm64/boot/dts/amlogic/meson-khadas-vim3.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-khadas-vim3.dtsi @@ -246,6 +246,10 @@ linux,rc-map-name = "rc-khadas"; }; +&pcie { + reset-gpios = <&gpio GPIOA_8 GPIO_ACTIVE_LOW>; +}; + &pwm_ef { status = "okay"; pinctrl-0 = <&pwm_e_pins>; diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-khadas-vim3l.dts b/arch/arm64/boot/dts/amlogic/meson-sm1-khadas-vim3l.dts index 5233bd7cacfb..dbbf29a0dbf6 100644 --- a/arch/arm64/boot/dts/amlogic/meson-sm1-khadas-vim3l.dts +++ b/arch/arm64/boot/dts/amlogic/meson-sm1-khadas-vim3l.dts @@ -68,3 +68,28 @@ clock-names = "clkin1"; status = "okay"; }; + +/* + * The VIM3 on-board MCU can mux the PCIe/USB3.0 shared differential + * lines using a FUSB340TMX USB 3.1 SuperSpeed Data Switch between + * an USB3.0 Type A connector and a M.2 Key M slot. + * The PHY driving these differential lines is shared between + * the USB3.0 controller and the PCIe Controller, thus only + * a single controller can use it. + * If the MCU is configured to mux the PCIe/USB3.0 differential lines + * to the M.2 Key M slot, uncomment the following block to disable + * USB3.0 from the USB Complex and enable the PCIe controller. + * The End User is not expected to uncomment the following except for + * testing purposes, but instead rely on the firmware/bootloader to + * update these nodes accordingly if PCIe mode is selected by the MCU. + */ +/* +&pcie { + status = "okay"; +}; + +&usb { + phys = <&usb2_phy0>, <&usb2_phy1>; + phy-names = "usb2-phy0", "usb2-phy1"; +}; + */ diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi b/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi index 521573f3a5ba..256ea0349ffc 100644 --- a/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi @@ -134,6 +134,10 @@ power-domains = <&pwrc PWRC_SM1_ETH_ID>; }; +&pcie { + power-domains = <&pwrc PWRC_SM1_PCIE_ID>; +}; + &pwrc { compatible = "amlogic,meson-sm1-pwrc"; }; |