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-rw-r--r--arch/mips/pci/Makefile7
-rw-r--r--arch/mips/pci/fixup-atlas.c20
-rw-r--r--arch/mips/pci/fixup-ev96100.c48
-rw-r--r--arch/mips/pci/fixup-ite8172g.c80
-rw-r--r--arch/mips/pci/fixup-ivr.c75
-rw-r--r--arch/mips/pci/fixup-sb1250.c23
-rw-r--r--arch/mips/pci/fixup-vr4133.c2
-rw-r--r--arch/mips/pci/ops-au1000.c2
-rw-r--r--arch/mips/pci/ops-gt96100.c169
-rw-r--r--arch/mips/pci/ops-it8172.c213
-rw-r--r--arch/mips/pci/pci-ev96100.c63
-rw-r--r--arch/mips/pci/pci-ip27.c2
-rw-r--r--arch/mips/pci/pci-ip32.c2
13 files changed, 36 insertions, 670 deletions
diff --git a/arch/mips/pci/Makefile b/arch/mips/pci/Makefile
index 35d5927706ea..3cf0dd4ba548 100644
--- a/arch/mips/pci/Makefile
+++ b/arch/mips/pci/Makefile
@@ -7,11 +7,9 @@ obj-y += pci.o
#
# PCI bus host bridge specific code
#
-obj-$(CONFIG_ITE_BOARD_GEN) += ops-it8172.o
obj-$(CONFIG_MIPS_BONITO64) += ops-bonito64.o
obj-$(CONFIG_MIPS_GT64111) += ops-gt64111.o
obj-$(CONFIG_MIPS_GT64120) += ops-gt64120.o
-obj-$(CONFIG_MIPS_GT96100) += ops-gt96100.o
obj-$(CONFIG_PCI_MARVELL) += ops-marvell.o
obj-$(CONFIG_MIPS_MSC) += ops-msc.o
obj-$(CONFIG_MIPS_NILE4) += ops-nile4.o
@@ -28,10 +26,7 @@ obj-$(CONFIG_DDB5477) += fixup-ddb5477.o pci-ddb5477.o ops-ddb5477.o
obj-$(CONFIG_LASAT) += pci-lasat.o
obj-$(CONFIG_MIPS_ATLAS) += fixup-atlas.o
obj-$(CONFIG_MIPS_COBALT) += fixup-cobalt.o
-obj-$(CONFIG_MIPS_EV96100) += fixup-ev64120.o
-obj-$(CONFIG_MIPS_EV96100) += fixup-ev96100.o pci-ev96100.o
-obj-$(CONFIG_MIPS_ITE8172) += fixup-ite8172g.o
-obj-$(CONFIG_MIPS_IVR) += fixup-ivr.o
+obj-$(CONFIG_MIPS_EV64120) += fixup-ev64120.o
obj-$(CONFIG_SOC_AU1500) += fixup-au1000.o ops-au1000.o
obj-$(CONFIG_SOC_AU1550) += fixup-au1000.o ops-au1000.o
obj-$(CONFIG_SOC_PNX8550) += fixup-pnx8550.o ops-pnx8550.o
diff --git a/arch/mips/pci/fixup-atlas.c b/arch/mips/pci/fixup-atlas.c
index 439510af3037..c6cd6e9cdfbc 100644
--- a/arch/mips/pci/fixup-atlas.c
+++ b/arch/mips/pci/fixup-atlas.c
@@ -21,16 +21,16 @@
#include <asm/mips-boards/atlasint.h>
-#define PCIA ATLASINT_PCIA
-#define PCIB ATLASINT_PCIB
-#define PCIC ATLASINT_PCIC
-#define PCID ATLASINT_PCID
-#define INTA ATLASINT_INTA
-#define INTB ATLASINT_INTB
-#define ETH ATLASINT_ETH
-#define INTC ATLASINT_INTC
-#define SCSI ATLASINT_SCSI
-#define INTD ATLASINT_INTD
+#define PCIA ATLAS_INT_PCIA
+#define PCIB ATLAS_INT_PCIB
+#define PCIC ATLAS_INT_PCIC
+#define PCID ATLAS_INT_PCID
+#define INTA ATLAS_INT_INTA
+#define INTB ATLAS_INT_INTB
+#define ETH ATLAS_INT_ETH
+#define INTC ATLAS_INT_INTC
+#define SCSI ATLAS_INT_SCSI
+#define INTD ATLAS_INT_INTD
static char irq_tab[][5] __initdata = {
/* INTA INTB INTC INTD */
diff --git a/arch/mips/pci/fixup-ev96100.c b/arch/mips/pci/fixup-ev96100.c
deleted file mode 100644
index e2bc977b6d58..000000000000
--- a/arch/mips/pci/fixup-ev96100.c
+++ /dev/null
@@ -1,48 +0,0 @@
-/*
- *
- * BRIEF MODULE DESCRIPTION
- * EV96100 Board specific pci fixups.
- *
- * Copyright 2001 MontaVista Software Inc.
- * Author: MontaVista Software, Inc.
- * ppopov@mvista.com or source@mvista.com
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-#include <linux/init.h>
-#include <linux/types.h>
-#include <linux/pci.h>
-
-static char irq_tab_ev96100[][5] __initdata = {
- [8] = { 0, 5, 5, 5, 5 },
- [9] = { 0, 2, 2, 2, 2 }
-};
-
-int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
-{
- return irq_tab_ev96100[slot][pin];
-}
-
-/* Do platform specific device initialization at pci_enable_device() time */
-int pcibios_plat_dev_init(struct pci_dev *dev)
-{
- return 0;
-}
diff --git a/arch/mips/pci/fixup-ite8172g.c b/arch/mips/pci/fixup-ite8172g.c
deleted file mode 100644
index 2290ea4228dd..000000000000
--- a/arch/mips/pci/fixup-ite8172g.c
+++ /dev/null
@@ -1,80 +0,0 @@
-/*
- * BRIEF MODULE DESCRIPTION
- * Board specific pci fixups.
- *
- * Copyright 2000 MontaVista Software Inc.
- * Author: MontaVista Software, Inc.
- * ppopov@mvista.com or source@mvista.com
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-#include <linux/types.h>
-#include <linux/pci.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-
-#include <asm/it8172/it8172.h>
-#include <asm/it8172/it8172_pci.h>
-#include <asm/it8172/it8172_int.h>
-
-/*
- * Shortcuts
- */
-#define INTA IT8172_PCI_INTA_IRQ
-#define INTB IT8172_PCI_INTB_IRQ
-#define INTC IT8172_PCI_INTC_IRQ
-#define INTD IT8172_PCI_INTD_IRQ
-
-static const int internal_func_irqs[7] __initdata = {
- IT8172_AC97_IRQ,
- IT8172_DMA_IRQ,
- IT8172_CDMA_IRQ,
- IT8172_USB_IRQ,
- IT8172_BRIDGE_MASTER_IRQ,
- IT8172_IDE_IRQ,
- IT8172_MC68K_IRQ
-};
-
-static char irq_tab_ite8172g[][5] __initdata = {
- [0x10] = { 0, INTA, INTB, INTC, INTD },
- [0x11] = { 0, INTA, INTB, INTC, INTD },
- [0x12] = { 0, INTB, INTC, INTD, INTA },
- [0x13] = { 0, INTC, INTD, INTA, INTB },
- [0x14] = { 0, INTD, INTA, INTB, INTC },
-};
-
-int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
-{
- /*
- * Internal device 1 is actually 7 different internal devices on the
- * IT8172G (a multifunction device).
- */
- if (slot == 1)
- return internal_func_irqs[PCI_FUNC(dev->devfn)];
-
- return irq_tab_ite8172g[slot][pin];
-}
-
-/* Do platform specific device initialization at pci_enable_device() time */
-int pcibios_plat_dev_init(struct pci_dev *dev)
-{
- return 0;
-}
diff --git a/arch/mips/pci/fixup-ivr.c b/arch/mips/pci/fixup-ivr.c
deleted file mode 100644
index 0c7c16464c11..000000000000
--- a/arch/mips/pci/fixup-ivr.c
+++ /dev/null
@@ -1,75 +0,0 @@
-/*
- *
- * BRIEF MODULE DESCRIPTION
- * Globespan IVR board-specific pci fixups.
- *
- * Copyright 2000 MontaVista Software Inc.
- * Author: MontaVista Software, Inc.
- * ppopov@mvista.com or source@mvista.com
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-#include <linux/types.h>
-#include <linux/pci.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-
-#include <asm/it8172/it8172.h>
-#include <asm/it8172/it8172_pci.h>
-#include <asm/it8172/it8172_int.h>
-
-/*
- * Shortcuts
- */
-#define INTA IT8172_PCI_INTA_IRQ
-#define INTB IT8172_PCI_INTB_IRQ
-#define INTC IT8172_PCI_INTC_IRQ
-#define INTD IT8172_PCI_INTD_IRQ
-
-static const int internal_func_irqs[7] __initdata = {
- IT8172_AC97_IRQ,
- IT8172_DMA_IRQ,
- IT8172_CDMA_IRQ,
- IT8172_USB_IRQ,
- IT8172_BRIDGE_MASTER_IRQ,
- IT8172_IDE_IRQ,
- IT8172_MC68K_IRQ
-};
-
-static char irq_tab_ivr[][5] __initdata = {
- [0x11] = { INTC, INTC, INTD, INTA, INTB }, /* Realtek RTL-8139 */
- [0x12] = { INTB, INTB, INTB, INTC, INTC }, /* IVR slot */
- [0x13] = { INTA, INTA, INTB, INTC, INTD } /* Expansion slot */
-};
-
-int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
-{
- if (slot == 1)
- return internal_func_irqs[PCI_FUNC(dev->devfn)];
-
- return irq_tab_ivr[slot][pin];
-}
-
-/* Do platform specific device initialization at pci_enable_device() time */
-int pcibios_plat_dev_init(struct pci_dev *dev)
-{
- return 0;
-}
diff --git a/arch/mips/pci/fixup-sb1250.c b/arch/mips/pci/fixup-sb1250.c
index 13791b78e598..7a7444874e80 100644
--- a/arch/mips/pci/fixup-sb1250.c
+++ b/arch/mips/pci/fixup-sb1250.c
@@ -1,7 +1,7 @@
/*
* arch/mips/pci/fixup-sb1250.c
*
- * Copyright (C) 2004 MIPS Technologies, Inc. All rights reserved.
+ * Copyright (C) 2004, 2006 MIPS Technologies, Inc. All rights reserved.
* Author: Maciej W. Rozycki <macro@mips.com>
*
* This program is free software; you can redistribute it and/or
@@ -14,6 +14,17 @@
#include <linux/pci.h>
/*
+ * Set the the BCM1250, etc. PCI host bridge's TRDY timeout
+ * to the finite max.
+ */
+static void __init quirk_sb1250_pci(struct pci_dev *dev)
+{
+ pci_write_config_byte(dev, 0x40, 0xff);
+}
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_SIBYTE, PCI_DEVICE_ID_BCM1250_PCI,
+ quirk_sb1250_pci);
+
+/*
* The BCM1250, etc. PCI/HT bridge reports as a host bridge.
*/
static void __init quirk_sb1250_ht(struct pci_dev *dev)
@@ -22,3 +33,13 @@ static void __init quirk_sb1250_ht(struct pci_dev *dev)
}
DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_SIBYTE, PCI_DEVICE_ID_BCM1250_HT,
quirk_sb1250_ht);
+
+/*
+ * Set the the SP1011 HT/PCI bridge's TRDY timeout to the finite max.
+ */
+static void __init quirk_sp1011(struct pci_dev *dev)
+{
+ pci_write_config_byte(dev, 0x64, 0xff);
+}
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_SIPACKETS, PCI_DEVICE_ID_SP1011,
+ quirk_sp1011);
diff --git a/arch/mips/pci/fixup-vr4133.c b/arch/mips/pci/fixup-vr4133.c
index 8e01d0c1b76b..597b89764ba1 100644
--- a/arch/mips/pci/fixup-vr4133.c
+++ b/arch/mips/pci/fixup-vr4133.c
@@ -1,5 +1,5 @@
/*
- * arch/mips/vr41xx/nec-cmbvr4133/pci_fixup.c
+ * arch/mips/pci/fixup-vr4133.c
*
* The NEC CMB-VR4133 Board specific PCI fixups.
*
diff --git a/arch/mips/pci/ops-au1000.c b/arch/mips/pci/ops-au1000.c
index 0c0c1e6519f9..8ae46481fcb7 100644
--- a/arch/mips/pci/ops-au1000.c
+++ b/arch/mips/pci/ops-au1000.c
@@ -110,7 +110,7 @@ static int config_access(unsigned char access_type, struct pci_bus *bus,
if (first_cfg) {
/* reserve a wired entry for pci config accesses */
first_cfg = 0;
- pci_cfg_vm = get_vm_area(0x2000, 0);
+ pci_cfg_vm = get_vm_area(0x2000, VM_IOREMAP);
if (!pci_cfg_vm)
panic (KERN_ERR "PCI unable to get vm area\n");
pci_cfg_wired_entry = read_c0_wired();
diff --git a/arch/mips/pci/ops-gt96100.c b/arch/mips/pci/ops-gt96100.c
deleted file mode 100644
index 9e4ea6627e21..000000000000
--- a/arch/mips/pci/ops-gt96100.c
+++ /dev/null
@@ -1,169 +0,0 @@
-/*
- *
- * BRIEF MODULE DESCRIPTION
- * Galileo EV96100 board specific pci support.
- *
- * Copyright 2000 MontaVista Software Inc.
- * Author: MontaVista Software, Inc.
- * ppopov@mvista.com or source@mvista.com
- *
- * This file was derived from Carsten Langgaard's
- * arch/mips/mips-boards/generic/pci.c
- *
- * Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-#include <linux/types.h>
-#include <linux/pci.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-
-#include <asm/delay.h>
-#include <asm/gt64120.h>
-#include <asm/galileo-boards/ev96100.h>
-
-#define PCI_ACCESS_READ 0
-#define PCI_ACCESS_WRITE 1
-
-static int static gt96100_config_access(unsigned char access_type,
- struct pci_bus *bus, unsigned int devfn, int where, u32 * data)
-{
- unsigned char bus = bus->number;
- u32 intr;
-
- /*
- * Because of a bug in the galileo (for slot 31).
- */
- if (bus == 0 && devfn >= PCI_DEVFN(31, 0))
- return PCIBIOS_DEVICE_NOT_FOUND;
-
- /* Clear cause register bits */
- GT_WRITE(GT_INTRCAUSE_OFS, ~(GT_INTRCAUSE_MASABORT0_BIT |
- GT_INTRCAUSE_TARABORT0_BIT));
-
- /* Setup address */
- GT_WRITE(GT_PCI0_CFGADDR_OFS,
- (bus << GT_PCI0_CFGADDR_BUSNUM_SHF) |
- (devfn << GT_PCI0_CFGADDR_FUNCTNUM_SHF) |
- ((where / 4) << GT_PCI0_CFGADDR_REGNUM_SHF) |
- GT_PCI0_CFGADDR_CONFIGEN_BIT);
- udelay(2);
-
-
- if (access_type == PCI_ACCESS_WRITE) {
- if (devfn != 0)
- *data = le32_to_cpu(*data);
- GT_WRITE(GT_PCI0_CFGDATA_OFS, *data);
- } else {
- *data = GT_READ(GT_PCI0_CFGDATA_OFS);
- if (devfn != 0)
- *data = le32_to_cpu(*data);
- }
-
- udelay(2);
-
- /* Check for master or target abort */
- intr = GT_READ(GT_INTRCAUSE_OFS);
-
- if (intr & (GT_INTRCAUSE_MASABORT0_BIT | GT_INTRCAUSE_TARABORT0_BIT)) {
- /* Error occured */
-
- /* Clear bits */
- GT_WRITE(GT_INTRCAUSE_OFS, ~(GT_INTRCAUSE_MASABORT0_BIT |
- GT_INTRCAUSE_TARABORT0_BIT));
- return -1;
- }
- return 0;
-}
-
-/*
- * We can't address 8 and 16 bit words directly. Instead we have to
- * read/write a 32bit word and mask/modify the data we actually want.
- */
-static int gt96100_pcibios_read(struct pci_bus *bus, unsigned int devfn,
- int where, int size, u32 * val)
-{
- u32 data = 0;
-
- if (gt96100_config_access(PCI_ACCESS_READ, bus, devfn, where, &data))
- return PCIBIOS_DEVICE_NOT_FOUND;
-
- switch (size) {
- case 1:
- *val = (data >> ((where & 3) << 3)) & 0xff;
- break;
-
- case 2:
- *val = (data >> ((where & 3) << 3)) & 0xffff;
- break;
-
- case 4:
- *val = data;
- break;
- }
- return PCIBIOS_SUCCESSFUL;
-}
-
-static int gt96100_pcibios_write(struct pci_bus *bus, unsigned int devfn,
- int where, int size, u32 val)
-{
- u32 data = 0;
-
- switch (size) {
- case 1:
- if (gt96100_config_access(PCI_ACCESS_READ, bus, devfn, where, &data))
- return -1;
-
- data = (data & ~(0xff << ((where & 3) << 3))) |
- (val << ((where & 3) << 3));
-
- if (gt96100_config_access(PCI_ACCESS_WRITE, bus, devfn, where, &data))
- return -1;
-
- return PCIBIOS_SUCCESSFUL;
-
- case 2:
- if (gt96100_config_access(PCI_ACCESS_READ, bus, devfn, where, &data))
- return -1;
-
- data = (data & ~(0xffff << ((where & 3) << 3))) |
- (val << ((where & 3) << 3));
-
- if (gt96100_config_access(PCI_ACCESS_WRITE, dev, where, &data))
- return -1;
-
-
- return PCIBIOS_SUCCESSFUL;
-
- case 4:
- if (gt96100_config_access(PCI_ACCESS_WRITE, dev, where, &val))
- return -1;
-
- return PCIBIOS_SUCCESSFUL;
- }
-}
-
-struct pci_ops gt96100_pci_ops = {
- .read = gt96100_pcibios_read,
- .write = gt96100_pcibios_write
-};
diff --git a/arch/mips/pci/ops-it8172.c b/arch/mips/pci/ops-it8172.c
deleted file mode 100644
index ba8328505a0a..000000000000
--- a/arch/mips/pci/ops-it8172.c
+++ /dev/null
@@ -1,213 +0,0 @@
-/*
- *
- * BRIEF MODULE DESCRIPTION
- * IT8172 system controller specific pci support.
- *
- * Copyright 2000 MontaVista Software Inc.
- * Author: MontaVista Software, Inc.
- * ppopov@mvista.com or source@mvista.com
- *
- * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-#include <linux/types.h>
-#include <linux/pci.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-
-#include <asm/it8172/it8172.h>
-#include <asm/it8172/it8172_pci.h>
-
-#define PCI_ACCESS_READ 0
-#define PCI_ACCESS_WRITE 1
-
-#undef DEBUG
-#ifdef DEBUG
-#define DBG(x...) printk(x)
-#else
-#define DBG(x...)
-#endif
-
-static struct resource pci_mem_resource_1;
-
-static struct resource pci_io_resource = {
- .start = 0x14018000,
- .end = 0x17FFFFFF,
- .name = "io pci IO space",
- .flags = IORESOURCE_IO
-};
-
-static struct resource pci_mem_resource_0 = {
- .start = 0x10101000,
- .end = 0x13FFFFFF,
- .name = "ext pci memory space 0/1",
- .flags = IORESOURCE_MEM,
- .parent = &pci_mem_resource_0,
- .sibling = NULL,
- .child = &pci_mem_resource_1
-};
-
-static struct resource pci_mem_resource_1 = {
- .start = 0x1A000000,
- .end = 0x1FBFFFFF,
- .name = "ext pci memory space 2/3",
- .flags = IORESOURCE_MEM,
- .parent = &pci_mem_resource_0
-};
-
-extern struct pci_ops it8172_pci_ops;
-
-struct pci_controller it8172_controller = {
- .pci_ops = &it8172_pci_ops,
- .io_resource = &pci_io_resource,
- .mem_resource = &pci_mem_resource_0,
-};
-
-static int it8172_pcibios_config_access(unsigned char access_type,
- struct pci_bus *bus,
- unsigned int devfn, int where,
- u32 * data)
-{
- /*
- * config cycles are on 4 byte boundary only
- */
-
- /* Setup address */
- IT_WRITE(IT_CONFADDR, (bus->number << IT_BUSNUM_SHF) |
- (devfn << IT_FUNCNUM_SHF) | (where & ~0x3));
-
- if (access_type == PCI_ACCESS_WRITE) {
- IT_WRITE(IT_CONFDATA, *data);
- } else {
- IT_READ(IT_CONFDATA, *data);
- }
-
- /*
- * Revisit: check for master or target abort.
- */
- return 0;
-}
-
-
-/*
- * We can't address 8 and 16 bit words directly. Instead we have to
- * read/write a 32bit word and mask/modify the data we actually want.
- */
-static write_config(struct pci_bus *bus, unsigned int devfn, int where,
- int size, u32 val)
-{
- u32 data = 0;
-
- switch (size) {
- case 1:
- if (it8172_pcibios_config_access
- (PCI_ACCESS_READ, dev, where, &data))
- return -1;
-
- *val = (data >> ((where & 3) << 3)) & 0xff;
-
- return PCIBIOS_SUCCESSFUL;
-
- case 2:
-
- if (where & 1)
- return PCIBIOS_BAD_REGISTER_NUMBER;
-
- if (it8172_pcibios_config_access
- (PCI_ACCESS_READ, dev, where, &data))
- return -1;
-
- *val = (data >> ((where & 3) << 3)) & 0xffff;
- DBG("cfg read word: bus %d dev_fn %x where %x: val %x\n",
- dev->bus->number, dev->devfn, where, *val);
-
- return PCIBIOS_SUCCESSFUL;
-
- case 4:
-
- if (where & 3)
- return PCIBIOS_BAD_REGISTER_NUMBER;
-
- if (it8172_pcibios_config_access
- (PCI_ACCESS_READ, dev, where, &data))
- return -1;
-
- *val = data;
-
- return PCIBIOS_SUCCESSFUL;
- }
-}
-
-
-static write_config(struct pci_bus *bus, unsigned int devfn, int where,
- int size, u32 val)
-{
- u32 data = 0;
-
- switch (size) {
- case 1:
- if (it8172_pcibios_config_access
- (PCI_ACCESS_READ, dev, where, &data))
- return -1;
-
- data = (data & ~(0xff << ((where & 3) << 3))) |
- (val << ((where & 3) << 3));
-
- if (it8172_pcibios_config_access
- (PCI_ACCESS_WRITE, dev, where, &data))
- return -1;
-
- return PCIBIOS_SUCCESSFUL;
-
- case 2:
- if (where & 1)
- return PCIBIOS_BAD_REGISTER_NUMBER;
-
- if (it8172_pcibios_config_access
- (PCI_ACCESS_READ, dev, where, &data))
- eturn - 1;
-
- data = (data & ~(0xffff << ((where & 3) << 3))) |
- (val << ((where & 3) << 3));
-
- if (it8172_pcibios_config_access
- (PCI_ACCESS_WRITE, dev, where, &data))
- return -1;
-
- return PCIBIOS_SUCCESSFUL;
-
- case 4:
- if (where & 3)
- return PCIBIOS_BAD_REGISTER_NUMBER;
-
- if (it8172_pcibios_config_access
- (PCI_ACCESS_WRITE, dev, where, &val))
- return -1;
-
- return PCIBIOS_SUCCESSFUL;
- }
-}
-
-struct pci_ops it8172_pci_ops = {
- .read = read_config,
- .write = write_config,
-};
diff --git a/arch/mips/pci/pci-ev96100.c b/arch/mips/pci/pci-ev96100.c
deleted file mode 100644
index f9457ea00def..000000000000
--- a/arch/mips/pci/pci-ev96100.c
+++ /dev/null
@@ -1,63 +0,0 @@
-/*
- * Copyright 2000 MontaVista Software Inc.
- * Author: MontaVista Software, Inc.
- * ppopov@mvista.com or source@mvista.com
- *
- * Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
- *
- * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-#include <linux/types.h>
-#include <linux/pci.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-
-static struct resource pci_io_resource = {
- .name = "io pci IO space",
- .start = 0x10000000,
- .end = 0x11ffffff,
- .flags = IORESOURCE_IO
-};
-
-static struct resource pci_mem_resource = {
- .name = "ext pci memory space",
- .start = 0x12000000,
- .end = 0x13ffffff,
- .flags = IORESOURCE_MEM
-};
-
-extern struct pci_ops gt96100_pci_ops;
-
-struct pci_controller ev96100_controller = {
- .pci_ops = &gt96100_pci_ops,
- .io_resource = &pci_io_resource,
- .mem_resource = &pci_mem_resource,
-};
-
-static void ev96100_pci_init(void)
-{
- register_pci_controller(&ev96100_controller);
-}
-
-arch_initcall(ev96100_pci_init);
diff --git a/arch/mips/pci/pci-ip27.c b/arch/mips/pci/pci-ip27.c
index 80eb9af9ecdf..405ce0152739 100644
--- a/arch/mips/pci/pci-ip27.c
+++ b/arch/mips/pci/pci-ip27.c
@@ -16,8 +16,6 @@
#include <asm/sn/intr.h>
#include <asm/sn/sn0/hub.h>
-extern unsigned int allocate_irqno(void);
-
/*
* Max #PCI busses we can handle; ie, max #PCI bridges.
*/
diff --git a/arch/mips/pci/pci-ip32.c b/arch/mips/pci/pci-ip32.c
index 17c7932cf0ae..618ea7dbc474 100644
--- a/arch/mips/pci/pci-ip32.c
+++ b/arch/mips/pci/pci-ip32.c
@@ -22,7 +22,7 @@
* registered on the bridge error irq. It's conceivable that some of these
* conditions warrant a panic. Anybody care to say which ones?
*/
-static irqreturn_t macepci_error(int irq, void *dev, struct pt_regs *regs)
+static irqreturn_t macepci_error(int irq, void *dev)
{
char s;
unsigned int flags = mace->pci.error;
Copyright © 1996 – 2023 Jason A. Donenfeld. All Rights Reverse Engineered.