diff options
Diffstat (limited to 'arch/mips/txx9/generic')
| -rw-r--r-- | arch/mips/txx9/generic/Makefile | 2 | ||||
| -rw-r--r-- | arch/mips/txx9/generic/dbgio.c | 48 | ||||
| -rw-r--r-- | arch/mips/txx9/generic/irq_tx3927.c | 25 | ||||
| -rw-r--r-- | arch/mips/txx9/generic/pci.c | 36 | ||||
| -rw-r--r-- | arch/mips/txx9/generic/setup.c | 124 | ||||
| -rw-r--r-- | arch/mips/txx9/generic/setup_tx3927.c | 130 | ||||
| -rw-r--r-- | arch/mips/txx9/generic/setup_tx4927.c | 30 | ||||
| -rw-r--r-- | arch/mips/txx9/generic/setup_tx4938.c | 41 | ||||
| -rw-r--r-- | arch/mips/txx9/generic/smsc_fdc37m81x.c | 20 |
9 files changed, 364 insertions, 92 deletions
diff --git a/arch/mips/txx9/generic/Makefile b/arch/mips/txx9/generic/Makefile index 9c120771e65f..9bb34af26b73 100644 --- a/arch/mips/txx9/generic/Makefile +++ b/arch/mips/txx9/generic/Makefile @@ -4,9 +4,9 @@ obj-y += setup.o obj-$(CONFIG_PCI) += pci.o +obj-$(CONFIG_SOC_TX3927) += setup_tx3927.o irq_tx3927.o obj-$(CONFIG_SOC_TX4927) += mem_tx4927.o setup_tx4927.o irq_tx4927.o obj-$(CONFIG_SOC_TX4938) += mem_tx4927.o setup_tx4938.o irq_tx4938.o obj-$(CONFIG_TOSHIBA_FPCIB0) += smsc_fdc37m81x.o -obj-$(CONFIG_KGDB) += dbgio.o EXTRA_CFLAGS += -Werror diff --git a/arch/mips/txx9/generic/dbgio.c b/arch/mips/txx9/generic/dbgio.c deleted file mode 100644 index 33b9c672a322..000000000000 --- a/arch/mips/txx9/generic/dbgio.c +++ /dev/null @@ -1,48 +0,0 @@ -/* - * linux/arch/mips/tx4938/common/dbgio.c - * - * kgdb interface for gdb - * - * Author: MontaVista Software, Inc. - * source@mvista.com - * - * Copyright 2005 MontaVista Software Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR - * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE - * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. - * - * Support for TX4938 in 2.6 - Hiroshi DOYU <Hiroshi_DOYU@montavista.co.jp> - */ - -#include <linux/types> - -extern u8 txx9_sio_kdbg_rd(void); -extern int txx9_sio_kdbg_wr( u8 ch ); - -u8 getDebugChar(void) -{ - return (txx9_sio_kdbg_rd()); -} - -int putDebugChar(u8 byte) -{ - return (txx9_sio_kdbg_wr(byte)); -} - diff --git a/arch/mips/txx9/generic/irq_tx3927.c b/arch/mips/txx9/generic/irq_tx3927.c new file mode 100644 index 000000000000..c683f593eda2 --- /dev/null +++ b/arch/mips/txx9/generic/irq_tx3927.c @@ -0,0 +1,25 @@ +/* + * Common tx3927 irq handler + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright 2001 MontaVista Software Inc. + * Copyright (C) 2000-2001 Toshiba Corporation + */ +#include <linux/init.h> +#include <asm/txx9irq.h> +#include <asm/txx9/tx3927.h> + +void __init tx3927_irq_init(void) +{ + int i; + + txx9_irq_init(TX3927_IRC_REG); + /* raise priority for timers, sio */ + for (i = 0; i < TX3927_NR_TMR; i++) + txx9_irq_set_pri(TX3927_IR_TMR(i), 6); + for (i = 0; i < TX3927_NR_SIO; i++) + txx9_irq_set_pri(TX3927_IR_SIO(i), 7); +} diff --git a/arch/mips/txx9/generic/pci.c b/arch/mips/txx9/generic/pci.c index 0b92d8c13208..7b637a7c0e66 100644 --- a/arch/mips/txx9/generic/pci.c +++ b/arch/mips/txx9/generic/pci.c @@ -386,3 +386,39 @@ int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { return txx9_board_vec->pci_map_irq(dev, slot, pin); } + +char * (*txx9_board_pcibios_setup)(char *str) __devinitdata; + +char *__devinit txx9_pcibios_setup(char *str) +{ + if (txx9_board_pcibios_setup && !txx9_board_pcibios_setup(str)) + return NULL; + if (!strcmp(str, "picmg")) { + /* PICMG compliant backplane (TOSHIBA JMB-PICMG-ATX + (5V or 3.3V), JMB-PICMG-L2 (5V only), etc.) */ + txx9_pci_option |= TXX9_PCI_OPT_PICMG; + return NULL; + } else if (!strcmp(str, "nopicmg")) { + /* non-PICMG compliant backplane (TOSHIBA + RBHBK4100,RBHBK4200, Interface PCM-PCM05, etc.) */ + txx9_pci_option &= ~TXX9_PCI_OPT_PICMG; + return NULL; + } else if (!strncmp(str, "clk=", 4)) { + char *val = str + 4; + txx9_pci_option &= ~TXX9_PCI_OPT_CLK_MASK; + if (strcmp(val, "33") == 0) + txx9_pci_option |= TXX9_PCI_OPT_CLK_33; + else if (strcmp(val, "66") == 0) + txx9_pci_option |= TXX9_PCI_OPT_CLK_66; + else /* "auto" */ + txx9_pci_option |= TXX9_PCI_OPT_CLK_AUTO; + return NULL; + } else if (!strncmp(str, "err=", 4)) { + if (!strcmp(str + 4, "panic")) + txx9_pci_err_action = TXX9_PCI_ERR_PANIC; + else if (!strcmp(str + 4, "ignore")) + txx9_pci_err_action = TXX9_PCI_ERR_IGNORE; + return NULL; + } + return str; +} diff --git a/arch/mips/txx9/generic/setup.c b/arch/mips/txx9/generic/setup.c index 8c60c78b9a9e..1bc57d0f4c5c 100644 --- a/arch/mips/txx9/generic/setup.c +++ b/arch/mips/txx9/generic/setup.c @@ -20,9 +20,13 @@ #include <linux/clk.h> #include <linux/err.h> #include <linux/gpio.h> +#include <linux/platform_device.h> +#include <linux/serial_core.h> #include <asm/bootinfo.h> #include <asm/time.h> +#include <asm/reboot.h> #include <asm/txx9/generic.h> +#include <asm/txx9/pci.h> #ifdef CONFIG_CPU_TX49XX #include <asm/txx9/tx4938.h> #endif @@ -187,6 +191,117 @@ char * __init prom_getcmdline(void) return &(arcs_cmdline[0]); } +static void __noreturn txx9_machine_halt(void) +{ + local_irq_disable(); + clear_c0_status(ST0_IM); + while (1) { + if (cpu_wait) { + (*cpu_wait)(); + if (cpu_has_counter) { + /* + * Clear counter interrupt while it + * breaks WAIT instruction even if + * masked. + */ + write_c0_compare(0); + } + } + } +} + +/* Watchdog support */ +void __init txx9_wdt_init(unsigned long base) +{ + struct resource res = { + .start = base, + .end = base + 0x100 - 1, + .flags = IORESOURCE_MEM, + }; + platform_device_register_simple("txx9wdt", -1, &res, 1); +} + +/* SPI support */ +void __init txx9_spi_init(int busid, unsigned long base, int irq) +{ + struct resource res[] = { + { + .start = base, + .end = base + 0x20 - 1, + .flags = IORESOURCE_MEM, + }, { + .start = irq, + .flags = IORESOURCE_IRQ, + }, + }; + platform_device_register_simple("spi_txx9", busid, + res, ARRAY_SIZE(res)); +} + +void __init txx9_ethaddr_init(unsigned int id, unsigned char *ethaddr) +{ + struct platform_device *pdev = + platform_device_alloc("tc35815-mac", id); + if (!pdev || + platform_device_add_data(pdev, ethaddr, 6) || + platform_device_add(pdev)) + platform_device_put(pdev); +} + +void __init txx9_sio_init(unsigned long baseaddr, int irq, + unsigned int line, unsigned int sclk, int nocts) +{ +#ifdef CONFIG_SERIAL_TXX9 + struct uart_port req; + + memset(&req, 0, sizeof(req)); + req.line = line; + req.iotype = UPIO_MEM; + req.membase = ioremap(baseaddr, 0x24); + req.mapbase = baseaddr; + req.irq = irq; + if (!nocts) + req.flags |= UPF_BUGGY_UART /*HAVE_CTS_LINE*/; + if (sclk) { + req.flags |= UPF_MAGIC_MULTIPLIER /*USE_SCLK*/; + req.uartclk = sclk; + } else + req.uartclk = TXX9_IMCLK; + early_serial_txx9_setup(&req); +#endif /* CONFIG_SERIAL_TXX9 */ +} + +#ifdef CONFIG_EARLY_PRINTK +static void __init null_prom_putchar(char c) +{ +} +void (*txx9_prom_putchar)(char c) __initdata = null_prom_putchar; + +void __init prom_putchar(char c) +{ + txx9_prom_putchar(c); +} + +static void __iomem *early_txx9_sio_port; + +static void __init early_txx9_sio_putchar(char c) +{ +#define TXX9_SICISR 0x0c +#define TXX9_SITFIFO 0x1c +#define TXX9_SICISR_TXALS 0x00000002 + while (!(__raw_readl(early_txx9_sio_port + TXX9_SICISR) & + TXX9_SICISR_TXALS)) + ; + __raw_writel(c, early_txx9_sio_port + TXX9_SITFIFO); +} + +void __init txx9_sio_putchar_init(unsigned long baseaddr) +{ + early_txx9_sio_port = ioremap(baseaddr, 0x24); + txx9_prom_putchar = early_txx9_sio_putchar; +} +#endif /* CONFIG_EARLY_PRINTK */ + /* wrappers */ void __init plat_mem_setup(void) { @@ -194,6 +309,15 @@ void __init plat_mem_setup(void) ioport_resource.end = ~0UL; /* no limit */ iomem_resource.start = 0; iomem_resource.end = ~0UL; /* no limit */ + + /* fallback restart/halt routines */ + _machine_restart = (void (*)(char *))txx9_machine_halt; + _machine_halt = txx9_machine_halt; + pm_power_off = txx9_machine_halt; + +#ifdef CONFIG_PCI + pcibios_plat_setup = txx9_pcibios_setup; +#endif txx9_board_vec->mem_setup(); } diff --git a/arch/mips/txx9/generic/setup_tx3927.c b/arch/mips/txx9/generic/setup_tx3927.c new file mode 100644 index 000000000000..7bd963d37fc3 --- /dev/null +++ b/arch/mips/txx9/generic/setup_tx3927.c @@ -0,0 +1,130 @@ +/* + * TX3927 setup routines + * Based on linux/arch/mips/txx9/jmr3927/setup.c + * + * Copyright 2001 MontaVista Software Inc. + * Copyright (C) 2000-2001 Toshiba Corporation + * Copyright (C) 2007 Ralf Baechle (ralf@linux-mips.org) + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include <linux/init.h> +#include <linux/ioport.h> +#include <linux/delay.h> +#include <linux/param.h> +#include <linux/io.h> +#include <asm/mipsregs.h> +#include <asm/txx9irq.h> +#include <asm/txx9tmr.h> +#include <asm/txx9pio.h> +#include <asm/txx9/generic.h> +#include <asm/txx9/tx3927.h> + +void __init tx3927_wdt_init(void) +{ + txx9_wdt_init(TX3927_TMR_REG(2)); +} + +void __init tx3927_setup(void) +{ + int i; + unsigned int conf; + + /* don't enable - see errata */ + txx9_ccfg_toeon = 0; + if (strstr(prom_getcmdline(), "toeon") != NULL) + txx9_ccfg_toeon = 1; + + txx9_reg_res_init(TX3927_REV_PCODE(), TX3927_REG_BASE, + TX3927_REG_SIZE); + + /* SDRAMC,ROMC are configured by PROM */ + for (i = 0; i < 8; i++) { + if (!(tx3927_romcptr->cr[i] & 0x8)) + continue; /* disabled */ + txx9_ce_res[i].start = (unsigned long)TX3927_ROMC_BA(i); + txx9_ce_res[i].end = + txx9_ce_res[i].start + TX3927_ROMC_SIZE(i) - 1; + request_resource(&iomem_resource, &txx9_ce_res[i]); + } + + /* clocks */ + txx9_gbus_clock = txx9_cpu_clock / 2; + /* change default value to udelay/mdelay take reasonable time */ + loops_per_jiffy = txx9_cpu_clock / HZ / 2; + + /* CCFG */ + /* enable Timeout BusError */ + if (txx9_ccfg_toeon) + tx3927_ccfgptr->ccfg |= TX3927_CCFG_TOE; + + /* clear BusErrorOnWrite flag */ + tx3927_ccfgptr->ccfg &= ~TX3927_CCFG_BEOW; + if (read_c0_conf() & TX39_CONF_WBON) + /* Disable PCI snoop */ + tx3927_ccfgptr->ccfg &= ~TX3927_CCFG_PSNP; + else + /* Enable PCI SNOOP - with write through only */ + tx3927_ccfgptr->ccfg |= TX3927_CCFG_PSNP; + /* do reset on watchdog */ + tx3927_ccfgptr->ccfg |= TX3927_CCFG_WR; + + printk(KERN_INFO "TX3927 -- CRIR:%08lx CCFG:%08lx PCFG:%08lx\n", + tx3927_ccfgptr->crir, + tx3927_ccfgptr->ccfg, tx3927_ccfgptr->pcfg); + + /* TMR */ + for (i = 0; i < TX3927_NR_TMR; i++) + txx9_tmr_init(TX3927_TMR_REG(i)); + + /* DMA */ + tx3927_dmaptr->mcr = 0; + for (i = 0; i < ARRAY_SIZE(tx3927_dmaptr->ch); i++) { + /* reset channel */ + tx3927_dmaptr->ch[i].ccr = TX3927_DMA_CCR_CHRST; + tx3927_dmaptr->ch[i].ccr = 0; + } + /* enable DMA */ +#ifdef __BIG_ENDIAN + tx3927_dmaptr->mcr = TX3927_DMA_MCR_MSTEN; +#else + tx3927_dmaptr->mcr = TX3927_DMA_MCR_MSTEN | TX3927_DMA_MCR_LE; +#endif + + /* PIO */ + __raw_writel(0, &tx3927_pioptr->maskcpu); + __raw_writel(0, &tx3927_pioptr->maskext); + txx9_gpio_init(TX3927_PIO_REG, 0, 16); + + conf = read_c0_conf(); + if (!(conf & TX39_CONF_ICE)) + printk(KERN_INFO "TX3927 I-Cache disabled.\n"); + if (!(conf & TX39_CONF_DCE)) + printk(KERN_INFO "TX3927 D-Cache disabled.\n"); + else if (!(conf & TX39_CONF_WBON)) + printk(KERN_INFO "TX3927 D-Cache WriteThrough.\n"); + else if (!(conf & TX39_CONF_CWFON)) + printk(KERN_INFO "TX3927 D-Cache WriteBack.\n"); + else + printk(KERN_INFO "TX3927 D-Cache WriteBack (CWF) .\n"); +} + +void __init tx3927_time_init(unsigned int evt_tmrnr, unsigned int src_tmrnr) +{ + txx9_clockevent_init(TX3927_TMR_REG(evt_tmrnr), + TXX9_IRQ_BASE + TX3927_IR_TMR(evt_tmrnr), + TXX9_IMCLK); + txx9_clocksource_init(TX3927_TMR_REG(src_tmrnr), TXX9_IMCLK); +} + +void __init tx3927_sio_init(unsigned int sclk, unsigned int cts_mask) +{ + int i; + + for (i = 0; i < 2; i++) + txx9_sio_init(TX3927_SIO_REG(i), + TXX9_IRQ_BASE + TX3927_IR_SIO(i), + i, sclk, (1 << i) & cts_mask); +} diff --git a/arch/mips/txx9/generic/setup_tx4927.c b/arch/mips/txx9/generic/setup_tx4927.c index 89d6e28add93..f80d4b7a694d 100644 --- a/arch/mips/txx9/generic/setup_tx4927.c +++ b/arch/mips/txx9/generic/setup_tx4927.c @@ -13,7 +13,6 @@ #include <linux/init.h> #include <linux/ioport.h> #include <linux/delay.h> -#include <linux/serial_core.h> #include <linux/param.h> #include <asm/txx9irq.h> #include <asm/txx9tmr.h> @@ -21,7 +20,7 @@ #include <asm/txx9/generic.h> #include <asm/txx9/tx4927.h> -void __init tx4927_wdr_init(void) +static void __init tx4927_wdr_init(void) { /* clear WatchDogReset (W1C) */ tx4927_ccfg_set(TX4927_CCFG_WDRST); @@ -29,6 +28,11 @@ void __init tx4927_wdr_init(void) tx4927_ccfg_set(TX4927_CCFG_WR); } +void __init tx4927_wdt_init(void) +{ + txx9_wdt_init(TX4927_TMR_REG(2) & 0xfffffffffULL); +} + static struct resource tx4927_sdram_resource[4]; void __init tx4927_setup(void) @@ -173,22 +177,12 @@ void __init tx4927_time_init(unsigned int tmrnr) TXX9_IMCLK); } -void __init tx4927_setup_serial(void) +void __init tx4927_sio_init(unsigned int sclk, unsigned int cts_mask) { -#ifdef CONFIG_SERIAL_TXX9 int i; - struct uart_port req; - - for (i = 0; i < 2; i++) { - memset(&req, 0, sizeof(req)); - req.line = i; - req.iotype = UPIO_MEM; - req.membase = (unsigned char __iomem *)TX4927_SIO_REG(i); - req.mapbase = TX4927_SIO_REG(i) & 0xfffffffffULL; - req.irq = TXX9_IRQ_BASE + TX4927_IR_SIO(i); - req.flags |= UPF_BUGGY_UART /*HAVE_CTS_LINE*/; - req.uartclk = TXX9_IMCLK; - early_serial_txx9_setup(&req); - } -#endif /* CONFIG_SERIAL_TXX9 */ + + for (i = 0; i < 2; i++) + txx9_sio_init(TX4927_SIO_REG(i) & 0xfffffffffULL, + TXX9_IRQ_BASE + TX4927_IR_SIO(i), + i, sclk, (1 << i) & cts_mask); } diff --git a/arch/mips/txx9/generic/setup_tx4938.c b/arch/mips/txx9/generic/setup_tx4938.c index 317378d8579d..f3040b9ba059 100644 --- a/arch/mips/txx9/generic/setup_tx4938.c +++ b/arch/mips/txx9/generic/setup_tx4938.c @@ -13,7 +13,6 @@ #include <linux/init.h> #include <linux/ioport.h> #include <linux/delay.h> -#include <linux/serial_core.h> #include <linux/param.h> #include <asm/txx9irq.h> #include <asm/txx9tmr.h> @@ -21,7 +20,7 @@ #include <asm/txx9/generic.h> #include <asm/txx9/tx4938.h> -void __init tx4938_wdr_init(void) +static void __init tx4938_wdr_init(void) { /* clear WatchDogReset (W1C) */ tx4938_ccfg_set(TX4938_CCFG_WDRST); @@ -29,6 +28,11 @@ void __init tx4938_wdr_init(void) tx4938_ccfg_set(TX4938_CCFG_WR); } +void __init tx4938_wdt_init(void) +{ + txx9_wdt_init(TX4938_TMR_REG(2) & 0xfffffffffULL); +} + static struct resource tx4938_sdram_resource[4]; static struct resource tx4938_sram_resource; @@ -233,11 +237,9 @@ void __init tx4938_time_init(unsigned int tmrnr) TXX9_IMCLK); } -void __init tx4938_setup_serial(void) +void __init tx4938_sio_init(unsigned int sclk, unsigned int cts_mask) { -#ifdef CONFIG_SERIAL_TXX9 int i; - struct uart_port req; unsigned int ch_mask = 0; if (__raw_readq(&tx4938_ccfgptr->pcfg) & TX4938_PCFG_ETH0_SEL) @@ -245,15 +247,24 @@ void __init tx4938_setup_serial(void) for (i = 0; i < 2; i++) { if ((1 << i) & ch_mask) continue; - memset(&req, 0, sizeof(req)); - req.line = i; - req.iotype = UPIO_MEM; - req.membase = (unsigned char __iomem *)TX4938_SIO_REG(i); - req.mapbase = TX4938_SIO_REG(i) & 0xfffffffffULL; - req.irq = TXX9_IRQ_BASE + TX4938_IR_SIO(i); - req.flags |= UPF_BUGGY_UART /*HAVE_CTS_LINE*/; - req.uartclk = TXX9_IMCLK; - early_serial_txx9_setup(&req); + txx9_sio_init(TX4938_SIO_REG(i) & 0xfffffffffULL, + TXX9_IRQ_BASE + TX4938_IR_SIO(i), + i, sclk, (1 << i) & cts_mask); } -#endif /* CONFIG_SERIAL_TXX9 */ +} + +void __init tx4938_spi_init(int busid) +{ + txx9_spi_init(busid, TX4938_SPI_REG & 0xfffffffffULL, + TXX9_IRQ_BASE + TX4938_IR_SPI); +} + +void __init tx4938_ethaddr_init(unsigned char *addr0, unsigned char *addr1) +{ + u64 pcfg = __raw_readq(&tx4938_ccfgptr->pcfg); + + if (addr0 && (pcfg & TX4938_PCFG_ETH0_SEL)) + txx9_ethaddr_init(TXX9_IRQ_BASE + TX4938_IR_ETH0, addr0); + if (addr1 && (pcfg & TX4938_PCFG_ETH1_SEL)) + txx9_ethaddr_init(TXX9_IRQ_BASE + TX4938_IR_ETH1, addr1); } diff --git a/arch/mips/txx9/generic/smsc_fdc37m81x.c b/arch/mips/txx9/generic/smsc_fdc37m81x.c index 69e487467fa5..a2b2d62d88e3 100644 --- a/arch/mips/txx9/generic/smsc_fdc37m81x.c +++ b/arch/mips/txx9/generic/smsc_fdc37m81x.c @@ -15,8 +15,6 @@ #include <asm/io.h> #include <asm/txx9/smsc_fdc37m81x.h> -#define DEBUG - /* Common Registers */ #define SMSC_FDC37M81X_CONFIG_INDEX 0x00 #define SMSC_FDC37M81X_CONFIG_DATA 0x01 @@ -55,7 +53,7 @@ #define SMSC_FDC37M81X_CONFIG_EXIT 0xaa #define SMSC_FDC37M81X_CHIP_ID 0x4d -static unsigned long g_smsc_fdc37m81x_base = 0; +static unsigned long g_smsc_fdc37m81x_base; static inline unsigned char smsc_fdc37m81x_rd(unsigned char index) { @@ -107,7 +105,8 @@ unsigned long __init smsc_fdc37m81x_init(unsigned long port) u8 chip_id; if (g_smsc_fdc37m81x_base) - printk("smsc_fdc37m81x_init() stepping on old base=0x%0*lx\n", + printk(KERN_WARNING "%s: stepping on old base=0x%0*lx\n", + __func__, field, g_smsc_fdc37m81x_base); g_smsc_fdc37m81x_base = port; @@ -118,7 +117,7 @@ unsigned long __init smsc_fdc37m81x_init(unsigned long port) if (chip_id == SMSC_FDC37M81X_CHIP_ID) smsc_fdc37m81x_config_end(); else { - printk("smsc_fdc37m81x_init() unknow chip id 0x%02x\n", + printk(KERN_WARNING "%s: unknow chip id 0x%02x\n", __func__, chip_id); g_smsc_fdc37m81x_base = 0; } @@ -127,22 +126,23 @@ unsigned long __init smsc_fdc37m81x_init(unsigned long port) } #ifdef DEBUG -void smsc_fdc37m81x_config_dump_one(char *key, u8 dev, u8 reg) +static void smsc_fdc37m81x_config_dump_one(const char *key, u8 dev, u8 reg) { - printk("%s: dev=0x%02x reg=0x%02x val=0x%02x\n", key, dev, reg, + printk(KERN_INFO "%s: dev=0x%02x reg=0x%02x val=0x%02x\n", + key, dev, reg, smsc_fdc37m81x_rd(reg)); } void smsc_fdc37m81x_config_dump(void) { u8 orig; - char *fname = "smsc_fdc37m81x_config_dump()"; + const char *fname = __func__; smsc_fdc37m81x_config_beg(); orig = smsc_fdc37m81x_rd(SMSC_FDC37M81X_DNUM); - printk("%s: common\n", fname); + printk(KERN_INFO "%s: common\n", fname); smsc_fdc37m81x_config_dump_one(fname, SMSC_FDC37M81X_NONE, SMSC_FDC37M81X_DNUM); smsc_fdc37m81x_config_dump_one(fname, SMSC_FDC37M81X_NONE, @@ -154,7 +154,7 @@ void smsc_fdc37m81x_config_dump(void) smsc_fdc37m81x_config_dump_one(fname, SMSC_FDC37M81X_NONE, SMSC_FDC37M81X_PMGT); - printk("%s: keyboard\n", fname); + printk(KERN_INFO "%s: keyboard\n", fname); smsc_dc37m81x_wr(SMSC_FDC37M81X_DNUM, SMSC_FDC37M81X_KBD); smsc_fdc37m81x_config_dump_one(fname, SMSC_FDC37M81X_KBD, SMSC_FDC37M81X_ACTIVE); |