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-rw-r--r--arch/powerpc/platforms/chrp/pci.c16
1 files changed, 4 insertions, 12 deletions
diff --git a/arch/powerpc/platforms/chrp/pci.c b/arch/powerpc/platforms/chrp/pci.c
index ac224876ce59..6802cdc3168a 100644
--- a/arch/powerpc/platforms/chrp/pci.c
+++ b/arch/powerpc/platforms/chrp/pci.c
@@ -2,7 +2,6 @@
* CHRP pci routines.
*/
-#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/pci.h>
#include <linux/delay.h>
@@ -19,7 +18,6 @@
#include <asm/machdep.h>
#include <asm/sections.h>
#include <asm/pci-bridge.h>
-#include <asm/open_pic.h>
#include <asm/grackle.h>
#include <asm/rtas.h>
@@ -143,7 +141,7 @@ hydra_init(void)
if (np == NULL || of_address_to_resource(np, 0, &r))
return 0;
Hydra = ioremap(r.start, r.end-r.start);
- printk("Hydra Mac I/O at %lx\n", r.start);
+ printk("Hydra Mac I/O at %llx\n", (unsigned long long)r.start);
printk("Hydra Feature_Control was %x",
in_le32(&Hydra->Feature_Control));
out_le32(&Hydra->Feature_Control, (HYDRA_FC_SCC_CELL_EN |
@@ -162,15 +160,9 @@ void __init
chrp_pcibios_fixup(void)
{
struct pci_dev *dev = NULL;
- struct device_node *np;
- /* PCI interrupts are controlled by the OpenPIC */
- for_each_pci_dev(dev) {
- np = pci_device_to_OF_node(dev);
- if ((np != 0) && (np->n_intrs > 0) && (np->intrs[0].line != 0))
- dev->irq = np->intrs[0].line;
- pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
- }
+ for_each_pci_dev(dev)
+ pci_read_irq_line(dev);
}
#define PRG_CL_RESET_VALID 0x00010000
@@ -267,7 +259,7 @@ chrp_find_bridges(void)
bus_range[0], bus_range[1]);
printk(" controlled by %s", dev->type);
if (!is_longtrail)
- printk(" at %lx", r.start);
+ printk(" at %llx", (unsigned long long)r.start);
printk("\n");
hose = pcibios_alloc_controller();