diff options
Diffstat (limited to '')
| -rw-r--r-- | arch/ppc64/kernel/bpa_iommu.c | 6 | ||||
| -rw-r--r-- | arch/ppc64/kernel/machine_kexec.c | 1 | ||||
| -rw-r--r-- | arch/ppc64/mm/hash_native.c | 5 | ||||
| -rw-r--r-- | arch/ppc64/mm/tlb.c | 4 |
4 files changed, 11 insertions, 5 deletions
diff --git a/arch/ppc64/kernel/bpa_iommu.c b/arch/ppc64/kernel/bpa_iommu.c index f33a7bccb0d7..507eb9d0223f 100644 --- a/arch/ppc64/kernel/bpa_iommu.c +++ b/arch/ppc64/kernel/bpa_iommu.c @@ -99,7 +99,11 @@ get_iost_entry(unsigned long iopt_base, unsigned long io_address, unsigned page_ break; default: /* not a known compile time constant */ - BUILD_BUG_ON(1); + { + /* BUILD_BUG_ON() is not usable here */ + extern void __get_iost_entry_bad_page_size(void); + __get_iost_entry_bad_page_size(); + } break; } diff --git a/arch/ppc64/kernel/machine_kexec.c b/arch/ppc64/kernel/machine_kexec.c index 4775f12a013c..bf7cc4f8210f 100644 --- a/arch/ppc64/kernel/machine_kexec.c +++ b/arch/ppc64/kernel/machine_kexec.c @@ -205,6 +205,7 @@ static void kexec_prepare_cpus(void) continue; while (paca[i].hw_cpu_id != -1) { + barrier(); if (!cpu_possible(i)) { printk("kexec: cpu %d hw_cpu_id %d is not" " possible, ignoring\n", diff --git a/arch/ppc64/mm/hash_native.c b/arch/ppc64/mm/hash_native.c index eb1bbb5b6c16..bfd385b7713c 100644 --- a/arch/ppc64/mm/hash_native.c +++ b/arch/ppc64/mm/hash_native.c @@ -343,7 +343,7 @@ static void native_flush_hash_range(unsigned long context, hpte_t *hptep; unsigned long hpte_v; struct ppc64_tlb_batch *batch = &__get_cpu_var(ppc64_tlb_batch); - unsigned long large; + unsigned long large = batch->large; local_irq_save(flags); @@ -356,7 +356,6 @@ static void native_flush_hash_range(unsigned long context, va = (vsid << 28) | (batch->addr[i] & 0x0fffffff); batch->vaddr[j] = va; - large = pte_huge(batch->pte[i]); if (large) vpn = va >> HPAGE_SHIFT; else @@ -406,7 +405,7 @@ static void native_flush_hash_range(unsigned long context, asm volatile("ptesync":::"memory"); for (i = 0; i < j; i++) - __tlbie(batch->vaddr[i], 0); + __tlbie(batch->vaddr[i], large); asm volatile("eieio; tlbsync; ptesync":::"memory"); diff --git a/arch/ppc64/mm/tlb.c b/arch/ppc64/mm/tlb.c index d8a6593a13f0..21fbffb23a43 100644 --- a/arch/ppc64/mm/tlb.c +++ b/arch/ppc64/mm/tlb.c @@ -143,7 +143,8 @@ void hpte_update(struct mm_struct *mm, unsigned long addr, * up scanning and resetting referenced bits then our batch context * will change mid stream. */ - if (unlikely(i != 0 && context != batch->context)) { + if (i != 0 && (context != batch->context || + batch->large != pte_huge(pte))) { flush_tlb_pending(); i = 0; } @@ -151,6 +152,7 @@ void hpte_update(struct mm_struct *mm, unsigned long addr, if (i == 0) { batch->context = context; batch->mm = mm; + batch->large = pte_huge(pte); } batch->pte[i] = __pte(pte); batch->addr[i] = addr; |