diff options
Diffstat (limited to 'arch/sh/kernel/cpu/sh4a')
| -rw-r--r-- | arch/sh/kernel/cpu/sh4a/Makefile | 6 | ||||
| -rw-r--r-- | arch/sh/kernel/cpu/sh4a/clock-sh7722.c | 77 | ||||
| -rw-r--r-- | arch/sh/kernel/cpu/sh4a/clock-sh7723.c | 209 | ||||
| -rw-r--r-- | arch/sh/kernel/cpu/sh4a/clock-sh7724.c | 201 | ||||
| -rw-r--r-- | arch/sh/kernel/cpu/sh4a/clock-sh7757.c | 2 | ||||
| -rw-r--r-- | arch/sh/kernel/cpu/sh4a/hwblk-sh7722.c | 106 | ||||
| -rw-r--r-- | arch/sh/kernel/cpu/sh4a/hwblk-sh7723.c | 117 | ||||
| -rw-r--r-- | arch/sh/kernel/cpu/sh4a/hwblk-sh7724.c | 121 | ||||
| -rw-r--r-- | arch/sh/kernel/cpu/sh4a/setup-sh7722.c | 38 | ||||
| -rw-r--r-- | arch/sh/kernel/cpu/sh4a/setup-sh7723.c | 39 | ||||
| -rw-r--r-- | arch/sh/kernel/cpu/sh4a/setup-sh7724.c | 64 | ||||
| -rw-r--r-- | arch/sh/kernel/cpu/sh4a/setup-sh7757.c | 7 | ||||
| -rw-r--r-- | arch/sh/kernel/cpu/sh4a/setup-sh7780.c | 2 | ||||
| -rw-r--r-- | arch/sh/kernel/cpu/sh4a/setup-sh7785.c | 2 | ||||
| -rw-r--r-- | arch/sh/kernel/cpu/sh4a/setup-sh7786.c | 2 |
15 files changed, 245 insertions, 748 deletions
diff --git a/arch/sh/kernel/cpu/sh4a/Makefile b/arch/sh/kernel/cpu/sh4a/Makefile index c57fb287011e..0b22d108f4c5 100644 --- a/arch/sh/kernel/cpu/sh4a/Makefile +++ b/arch/sh/kernel/cpu/sh4a/Makefile @@ -27,9 +27,9 @@ clock-$(CONFIG_CPU_SUBTYPE_SH7780) := clock-sh7780.o clock-$(CONFIG_CPU_SUBTYPE_SH7785) := clock-sh7785.o clock-$(CONFIG_CPU_SUBTYPE_SH7786) := clock-sh7786.o clock-$(CONFIG_CPU_SUBTYPE_SH7343) := clock-sh7343.o -clock-$(CONFIG_CPU_SUBTYPE_SH7722) := clock-sh7722.o hwblk-sh7722.o -clock-$(CONFIG_CPU_SUBTYPE_SH7723) := clock-sh7723.o hwblk-sh7723.o -clock-$(CONFIG_CPU_SUBTYPE_SH7724) := clock-sh7724.o hwblk-sh7724.o +clock-$(CONFIG_CPU_SUBTYPE_SH7722) := clock-sh7722.o +clock-$(CONFIG_CPU_SUBTYPE_SH7723) := clock-sh7723.o +clock-$(CONFIG_CPU_SUBTYPE_SH7724) := clock-sh7724.o clock-$(CONFIG_CPU_SUBTYPE_SH7366) := clock-sh7366.o clock-$(CONFIG_CPU_SUBTYPE_SHX3) := clock-shx3.o diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7722.c b/arch/sh/kernel/cpu/sh4a/clock-sh7722.c index c9a48088ad47..212c72ef959c 100644 --- a/arch/sh/kernel/cpu/sh4a/clock-sh7722.c +++ b/arch/sh/kernel/cpu/sh4a/clock-sh7722.c @@ -22,8 +22,8 @@ #include <linux/kernel.h> #include <linux/io.h> #include <linux/clkdev.h> +#include <linux/sh_clk.h> #include <asm/clock.h> -#include <asm/hwblk.h> #include <cpu/sh7722.h> /* SH7722 registers */ @@ -33,6 +33,9 @@ #define SCLKBCR 0xa415000c #define IRDACLKCR 0xa4150018 #define PLLCR 0xa4150024 +#define MSTPCR0 0xa4150030 +#define MSTPCR1 0xa4150034 +#define MSTPCR2 0xa4150038 #define DLLFRQ 0xa4150050 /* Fixed 32 KHz root clock for RTC and Power Management purposes */ @@ -148,31 +151,31 @@ struct clk div6_clks[DIV6_NR] = { }; static struct clk mstp_clks[HWBLK_NR] = { - SH_HWBLK_CLK(HWBLK_URAM, &div4_clks[DIV4_U], CLK_ENABLE_ON_INIT), - SH_HWBLK_CLK(HWBLK_XYMEM, &div4_clks[DIV4_B], CLK_ENABLE_ON_INIT), - SH_HWBLK_CLK(HWBLK_TMU, &div4_clks[DIV4_P], 0), - SH_HWBLK_CLK(HWBLK_CMT, &r_clk, 0), - SH_HWBLK_CLK(HWBLK_RWDT, &r_clk, 0), - SH_HWBLK_CLK(HWBLK_FLCTL, &div4_clks[DIV4_P], 0), - SH_HWBLK_CLK(HWBLK_SCIF0, &div4_clks[DIV4_P], 0), - SH_HWBLK_CLK(HWBLK_SCIF1, &div4_clks[DIV4_P], 0), - SH_HWBLK_CLK(HWBLK_SCIF2, &div4_clks[DIV4_P], 0), - - SH_HWBLK_CLK(HWBLK_IIC, &div4_clks[DIV4_P], 0), - SH_HWBLK_CLK(HWBLK_RTC, &r_clk, 0), - - SH_HWBLK_CLK(HWBLK_SDHI, &div4_clks[DIV4_P], 0), - SH_HWBLK_CLK(HWBLK_KEYSC, &r_clk, 0), - SH_HWBLK_CLK(HWBLK_USBF, &div4_clks[DIV4_P], 0), - SH_HWBLK_CLK(HWBLK_2DG, &div4_clks[DIV4_B], 0), - SH_HWBLK_CLK(HWBLK_SIU, &div4_clks[DIV4_B], 0), - SH_HWBLK_CLK(HWBLK_VOU, &div4_clks[DIV4_B], 0), - SH_HWBLK_CLK(HWBLK_JPU, &div4_clks[DIV4_B], 0), - SH_HWBLK_CLK(HWBLK_BEU, &div4_clks[DIV4_B], 0), - SH_HWBLK_CLK(HWBLK_CEU, &div4_clks[DIV4_B], 0), - SH_HWBLK_CLK(HWBLK_VEU, &div4_clks[DIV4_B], 0), - SH_HWBLK_CLK(HWBLK_VPU, &div4_clks[DIV4_B], 0), - SH_HWBLK_CLK(HWBLK_LCDC, &div4_clks[DIV4_P], 0), + [HWBLK_URAM] = SH_CLK_MSTP32(&div4_clks[DIV4_U], MSTPCR0, 28, CLK_ENABLE_ON_INIT), + [HWBLK_XYMEM] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR0, 26, CLK_ENABLE_ON_INIT), + [HWBLK_TMU] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 15, 0), + [HWBLK_CMT] = SH_CLK_MSTP32(&r_clk, MSTPCR0, 14, 0), + [HWBLK_RWDT] = SH_CLK_MSTP32(&r_clk, MSTPCR0, 13, 0), + [HWBLK_FLCTL] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 10, 0), + [HWBLK_SCIF0] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 7, 0), + [HWBLK_SCIF1] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 6, 0), + [HWBLK_SCIF2] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 5, 0), + + [HWBLK_IIC] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 9, 0), + [HWBLK_RTC] = SH_CLK_MSTP32(&r_clk, MSTPCR1, 8, 0), + + [HWBLK_SDHI] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR2, 18, 0), + [HWBLK_KEYSC] = SH_CLK_MSTP32(&r_clk, MSTPCR2, 14, 0), + [HWBLK_USBF] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR2, 11, 0), + [HWBLK_2DG] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 9, 0), + [HWBLK_SIU] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 8, 0), + [HWBLK_JPU] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 6, 0), + [HWBLK_VOU] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 5, 0), + [HWBLK_BEU] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 4, 0), + [HWBLK_CEU] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 3, 0), + [HWBLK_VEU] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 2, 0), + [HWBLK_VPU] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 1, 0), + [HWBLK_LCDC] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR2, 0, 0), }; static struct clk_lookup lookups[] = { @@ -205,27 +208,27 @@ static struct clk_lookup lookups[] = { CLKDEV_ICK_ID("tmu_fck", "sh_tmu.2", &mstp_clks[HWBLK_TMU]), CLKDEV_CON_ID("cmt_fck", &mstp_clks[HWBLK_CMT]), - CLKDEV_CON_ID("rwdt0", &mstp_clks[HWBLK_RWDT]), + CLKDEV_DEV_ID("sh-wdt.0", &mstp_clks[HWBLK_RWDT]), CLKDEV_CON_ID("flctl0", &mstp_clks[HWBLK_FLCTL]), - CLKDEV_ICK_ID("sci_fck", "sh-sci.0", &mstp_clks[HWBLK_SCIF0]), - CLKDEV_ICK_ID("sci_fck", "sh-sci.1", &mstp_clks[HWBLK_SCIF1]), - CLKDEV_ICK_ID("sci_fck", "sh-sci.2", &mstp_clks[HWBLK_SCIF2]), + CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[HWBLK_SCIF0]), + CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[HWBLK_SCIF1]), + CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[HWBLK_SCIF2]), CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[HWBLK_IIC]), CLKDEV_CON_ID("rtc0", &mstp_clks[HWBLK_RTC]), - CLKDEV_CON_ID("sdhi0", &mstp_clks[HWBLK_SDHI]), - CLKDEV_CON_ID("keysc0", &mstp_clks[HWBLK_KEYSC]), + CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[HWBLK_SDHI]), + CLKDEV_DEV_ID("sh_keysc.0", &mstp_clks[HWBLK_KEYSC]), CLKDEV_CON_ID("usbf0", &mstp_clks[HWBLK_USBF]), CLKDEV_CON_ID("2dg0", &mstp_clks[HWBLK_2DG]), - CLKDEV_CON_ID("siu0", &mstp_clks[HWBLK_SIU]), - CLKDEV_CON_ID("vou0", &mstp_clks[HWBLK_VOU]), + CLKDEV_DEV_ID("siu-pcm-audio", &mstp_clks[HWBLK_SIU]), + CLKDEV_DEV_ID("sh-vou.0", &mstp_clks[HWBLK_VOU]), CLKDEV_CON_ID("jpu0", &mstp_clks[HWBLK_JPU]), CLKDEV_CON_ID("beu0", &mstp_clks[HWBLK_BEU]), - CLKDEV_CON_ID("ceu0", &mstp_clks[HWBLK_CEU]), + CLKDEV_DEV_ID("sh_mobile_ceu.0", &mstp_clks[HWBLK_CEU]), CLKDEV_CON_ID("veu0", &mstp_clks[HWBLK_VEU]), CLKDEV_CON_ID("vpu0", &mstp_clks[HWBLK_VPU]), - CLKDEV_CON_ID("lcdc0", &mstp_clks[HWBLK_LCDC]), + CLKDEV_DEV_ID("sh_mobile_lcdc_fb.0", &mstp_clks[HWBLK_LCDC]), }; int __init arch_clk_init(void) @@ -258,7 +261,7 @@ int __init arch_clk_init(void) ret = sh_clk_div6_register(div6_clks, DIV6_NR); if (!ret) - ret = sh_hwblk_clk_register(mstp_clks, HWBLK_NR); + ret = sh_clk_mstp32_register(mstp_clks, HWBLK_NR); return ret; } diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7723.c b/arch/sh/kernel/cpu/sh4a/clock-sh7723.c index 3cc3827380e3..2f8c9179da47 100644 --- a/arch/sh/kernel/cpu/sh4a/clock-sh7723.c +++ b/arch/sh/kernel/cpu/sh4a/clock-sh7723.c @@ -23,8 +23,8 @@ #include <linux/io.h> #include <linux/clk.h> #include <linux/clkdev.h> +#include <linux/sh_clk.h> #include <asm/clock.h> -#include <asm/hwblk.h> #include <cpu/sh7723.h> /* SH7723 registers */ @@ -34,6 +34,9 @@ #define SCLKBCR 0xa415000c #define IRDACLKCR 0xa4150018 #define PLLCR 0xa4150024 +#define MSTPCR0 0xa4150030 +#define MSTPCR1 0xa4150034 +#define MSTPCR2 0xa4150038 #define DLLFRQ 0xa4150050 /* Fixed 32 KHz root clock for RTC and Power Management purposes */ @@ -149,55 +152,55 @@ struct clk div6_clks[DIV6_NR] = { static struct clk mstp_clks[] = { /* See page 60 of Datasheet V1.0: Overview -> Block Diagram */ - SH_HWBLK_CLK(HWBLK_TLB, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT), - SH_HWBLK_CLK(HWBLK_IC, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT), - SH_HWBLK_CLK(HWBLK_OC, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT), - SH_HWBLK_CLK(HWBLK_L2C, &div4_clks[DIV4_SH], CLK_ENABLE_ON_INIT), - SH_HWBLK_CLK(HWBLK_ILMEM, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT), - SH_HWBLK_CLK(HWBLK_FPU, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT), - SH_HWBLK_CLK(HWBLK_INTC, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT), - SH_HWBLK_CLK(HWBLK_DMAC0, &div4_clks[DIV4_B], 0), - SH_HWBLK_CLK(HWBLK_SHYWAY, &div4_clks[DIV4_SH], CLK_ENABLE_ON_INIT), - SH_HWBLK_CLK(HWBLK_HUDI, &div4_clks[DIV4_P], 0), - SH_HWBLK_CLK(HWBLK_UBC, &div4_clks[DIV4_I], 0), - SH_HWBLK_CLK(HWBLK_TMU0, &div4_clks[DIV4_P], 0), - SH_HWBLK_CLK(HWBLK_CMT, &r_clk, 0), - SH_HWBLK_CLK(HWBLK_RWDT, &r_clk, 0), - SH_HWBLK_CLK(HWBLK_DMAC1, &div4_clks[DIV4_B], 0), - SH_HWBLK_CLK(HWBLK_TMU1, &div4_clks[DIV4_P], 0), - SH_HWBLK_CLK(HWBLK_FLCTL, &div4_clks[DIV4_P], 0), - SH_HWBLK_CLK(HWBLK_SCIF0, &div4_clks[DIV4_P], 0), - SH_HWBLK_CLK(HWBLK_SCIF1, &div4_clks[DIV4_P], 0), - SH_HWBLK_CLK(HWBLK_SCIF2, &div4_clks[DIV4_P], 0), - SH_HWBLK_CLK(HWBLK_SCIF3, &div4_clks[DIV4_B], 0), - SH_HWBLK_CLK(HWBLK_SCIF4, &div4_clks[DIV4_B], 0), - SH_HWBLK_CLK(HWBLK_SCIF5, &div4_clks[DIV4_B], 0), - SH_HWBLK_CLK(HWBLK_MSIOF0, &div4_clks[DIV4_B], 0), - SH_HWBLK_CLK(HWBLK_MSIOF1, &div4_clks[DIV4_B], 0), - SH_HWBLK_CLK(HWBLK_MERAM, &div4_clks[DIV4_SH], 0), - - SH_HWBLK_CLK(HWBLK_IIC, &div4_clks[DIV4_P], 0), - SH_HWBLK_CLK(HWBLK_RTC, &r_clk, 0), - - SH_HWBLK_CLK(HWBLK_ATAPI, &div4_clks[DIV4_SH], 0), - SH_HWBLK_CLK(HWBLK_ADC, &div4_clks[DIV4_P], 0), - SH_HWBLK_CLK(HWBLK_TPU, &div4_clks[DIV4_B], 0), - SH_HWBLK_CLK(HWBLK_IRDA, &div4_clks[DIV4_P], 0), - SH_HWBLK_CLK(HWBLK_TSIF, &div4_clks[DIV4_B], 0), - SH_HWBLK_CLK(HWBLK_ICB, &div4_clks[DIV4_B], CLK_ENABLE_ON_INIT), - SH_HWBLK_CLK(HWBLK_SDHI0, &div4_clks[DIV4_B], 0), - SH_HWBLK_CLK(HWBLK_SDHI1, &div4_clks[DIV4_B], 0), - SH_HWBLK_CLK(HWBLK_KEYSC, &r_clk, 0), - SH_HWBLK_CLK(HWBLK_USB, &div4_clks[DIV4_B], 0), - SH_HWBLK_CLK(HWBLK_2DG, &div4_clks[DIV4_B], 0), - SH_HWBLK_CLK(HWBLK_SIU, &div4_clks[DIV4_B], 0), - SH_HWBLK_CLK(HWBLK_VEU2H1, &div4_clks[DIV4_B], 0), - SH_HWBLK_CLK(HWBLK_VOU, &div4_clks[DIV4_B], 0), - SH_HWBLK_CLK(HWBLK_BEU, &div4_clks[DIV4_B], 0), - SH_HWBLK_CLK(HWBLK_CEU, &div4_clks[DIV4_B], 0), - SH_HWBLK_CLK(HWBLK_VEU2H0, &div4_clks[DIV4_B], 0), - SH_HWBLK_CLK(HWBLK_VPU, &div4_clks[DIV4_B], 0), - SH_HWBLK_CLK(HWBLK_LCDC, &div4_clks[DIV4_B], 0), + [HWBLK_TLB] = SH_CLK_MSTP32(&div4_clks[DIV4_I], MSTPCR0, 31, CLK_ENABLE_ON_INIT), + [HWBLK_IC] = SH_CLK_MSTP32(&div4_clks[DIV4_I], MSTPCR0, 30, CLK_ENABLE_ON_INIT), + [HWBLK_OC] = SH_CLK_MSTP32(&div4_clks[DIV4_I], MSTPCR0, 29, CLK_ENABLE_ON_INIT), + [HWBLK_L2C] = SH_CLK_MSTP32(&div4_clks[DIV4_SH], MSTPCR0, 28, CLK_ENABLE_ON_INIT), + [HWBLK_ILMEM] = SH_CLK_MSTP32(&div4_clks[DIV4_I], MSTPCR0, 27, CLK_ENABLE_ON_INIT), + [HWBLK_FPU] = SH_CLK_MSTP32(&div4_clks[DIV4_I], MSTPCR0, 24, CLK_ENABLE_ON_INIT), + [HWBLK_INTC] = SH_CLK_MSTP32(&div4_clks[DIV4_I], MSTPCR0, 22, CLK_ENABLE_ON_INIT), + [HWBLK_DMAC0] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR0, 21, 0), + [HWBLK_SHYWAY] = SH_CLK_MSTP32(&div4_clks[DIV4_SH], MSTPCR0, 20, CLK_ENABLE_ON_INIT), + [HWBLK_HUDI] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 19, 0), + [HWBLK_UBC] = SH_CLK_MSTP32(&div4_clks[DIV4_I], MSTPCR0, 17, 0), + [HWBLK_TMU0] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 15, 0), + [HWBLK_CMT] = SH_CLK_MSTP32(&r_clk, MSTPCR0, 14, 0), + [HWBLK_RWDT] = SH_CLK_MSTP32(&r_clk, MSTPCR0, 13, 0), + [HWBLK_DMAC1] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR0, 12, 0), + [HWBLK_TMU1] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 11, 0), + [HWBLK_FLCTL] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 10, 0), + [HWBLK_SCIF0] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 9, 0), + [HWBLK_SCIF1] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 8, 0), + [HWBLK_SCIF2] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 7, 0), + [HWBLK_SCIF3] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR0, 6, 0), + [HWBLK_SCIF4] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR0, 5, 0), + [HWBLK_SCIF5] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR0, 4, 0), + [HWBLK_MSIOF0] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR0, 2, 0), + [HWBLK_MSIOF1] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR0, 1, 0), + [HWBLK_MERAM] = SH_CLK_MSTP32(&div4_clks[DIV4_SH], MSTPCR0, 0, 0), + + [HWBLK_IIC] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 9, 0), + [HWBLK_RTC] = SH_CLK_MSTP32(&r_clk, MSTPCR1, 8, 0), + + [HWBLK_ATAPI] = SH_CLK_MSTP32(&div4_clks[DIV4_SH], MSTPCR2, 28, 0), + [HWBLK_ADC] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR2, 27, 0), + [HWBLK_TPU] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 25, 0), + [HWBLK_IRDA] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR2, 24, 0), + [HWBLK_TSIF] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 22, 0), + [HWBLK_ICB] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 21, CLK_ENABLE_ON_INIT), + [HWBLK_SDHI0] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 18, 0), + [HWBLK_SDHI1] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 17, 0), + [HWBLK_KEYSC] = SH_CLK_MSTP32(&r_clk, MSTPCR2, 14, 0), + [HWBLK_USB] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 11, 0), + [HWBLK_2DG] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 10, 0), + [HWBLK_SIU] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 8, 0), + [HWBLK_VEU2H1] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 6, 0), + [HWBLK_VOU] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 5, 0), + [HWBLK_BEU] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 4, 0), + [HWBLK_CEU] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 3, 0), + [HWBLK_VEU2H0] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 2, 0), + [HWBLK_VPU] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 1, 0), + [HWBLK_LCDC] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 0, 0), }; static struct clk_lookup lookups[] = { @@ -229,80 +232,17 @@ static struct clk_lookup lookups[] = { CLKDEV_CON_ID("ilmem0", &mstp_clks[HWBLK_ILMEM]), CLKDEV_CON_ID("fpu0", &mstp_clks[HWBLK_FPU]), CLKDEV_CON_ID("intc0", &mstp_clks[HWBLK_INTC]), - CLKDEV_CON_ID("dmac0", &mstp_clks[HWBLK_DMAC0]), + CLKDEV_DEV_ID("sh-dma-engine.0", &mstp_clks[HWBLK_DMAC0]), CLKDEV_CON_ID("sh0", &mstp_clks[HWBLK_SHYWAY]), CLKDEV_CON_ID("hudi0", &mstp_clks[HWBLK_HUDI]), CLKDEV_CON_ID("ubc0", &mstp_clks[HWBLK_UBC]), - { - /* TMU0 */ - .dev_id = "sh_tmu.0", - .con_id = "tmu_fck", - .clk = &mstp_clks[HWBLK_TMU0], - }, { - /* TMU1 */ - .dev_id = "sh_tmu.1", - .con_id = "tmu_fck", - .clk = &mstp_clks[HWBLK_TMU0], - }, { - /* TMU2 */ - .dev_id = "sh_tmu.2", - .con_id = "tmu_fck", - .clk = &mstp_clks[HWBLK_TMU0], - }, CLKDEV_CON_ID("cmt_fck", &mstp_clks[HWBLK_CMT]), - CLKDEV_CON_ID("rwdt0", &mstp_clks[HWBLK_RWDT]), - CLKDEV_CON_ID("dmac1", &mstp_clks[HWBLK_DMAC1]), - { - /* TMU3 */ - .dev_id = "sh_tmu.3", - .con_id = "tmu_fck", - .clk = &mstp_clks[HWBLK_TMU1], - }, { - /* TMU4 */ - .dev_id = "sh_tmu.4", - .con_id = "tmu_fck", - .clk = &mstp_clks[HWBLK_TMU1], - }, { - /* TMU5 */ - .dev_id = "sh_tmu.5", - .con_id = "tmu_fck", - .clk = &mstp_clks[HWBLK_TMU1], - }, + CLKDEV_DEV_ID("sh-wdt.0", &mstp_clks[HWBLK_RWDT]), + CLKDEV_DEV_ID("sh-dma-engine.1", &mstp_clks[HWBLK_DMAC1]), CLKDEV_CON_ID("flctl0", &mstp_clks[HWBLK_FLCTL]), - { - /* SCIF0 */ - .dev_id = "sh-sci.0", - .con_id = "sci_fck", - .clk = &mstp_clks[HWBLK_SCIF0], - }, { - /* SCIF1 */ - .dev_id = "sh-sci.1", - .con_id = "sci_fck", - .clk = &mstp_clks[HWBLK_SCIF1], - }, { - /* SCIF2 */ - .dev_id = "sh-sci.2", - .con_id = "sci_fck", - .clk = &mstp_clks[HWBLK_SCIF2], - }, { - /* SCIF3 */ - .dev_id = "sh-sci.3", - .con_id = "sci_fck", - .clk = &mstp_clks[HWBLK_SCIF3], - }, { - /* SCIF4 */ - .dev_id = "sh-sci.4", - .con_id = "sci_fck", - .clk = &mstp_clks[HWBLK_SCIF4], - }, { - /* SCIF5 */ - .dev_id = "sh-sci.5", - .con_id = "sci_fck", - .clk = &mstp_clks[HWBLK_SCIF5], - }, - CLKDEV_CON_ID("msiof0", &mstp_clks[HWBLK_MSIOF0]), - CLKDEV_CON_ID("msiof1", &mstp_clks[HWBLK_MSIOF1]), - CLKDEV_CON_ID("meram0", &mstp_clks[HWBLK_MERAM]), + CLKDEV_DEV_ID("spi_sh_msiof.0", &mstp_clks[HWBLK_MSIOF0]), + CLKDEV_DEV_ID("spi_sh_msiof.1", &mstp_clks[HWBLK_MSIOF1]), + CLKDEV_DEV_ID("sh_mobile_meram.0", &mstp_clks[HWBLK_MERAM]), CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[HWBLK_IIC]), CLKDEV_CON_ID("rtc0", &mstp_clks[HWBLK_RTC]), CLKDEV_CON_ID("atapi0", &mstp_clks[HWBLK_ATAPI]), @@ -311,19 +251,34 @@ static struct clk_lookup lookups[] = { CLKDEV_CON_ID("irda0", &mstp_clks[HWBLK_IRDA]), CLKDEV_CON_ID("tsif0", &mstp_clks[HWBLK_TSIF]), CLKDEV_CON_ID("icb0", &mstp_clks[HWBLK_ICB]), - CLKDEV_CON_ID("sdhi0", &mstp_clks[HWBLK_SDHI0]), - CLKDEV_CON_ID("sdhi1", &mstp_clks[HWBLK_SDHI1]), - CLKDEV_CON_ID("keysc0", &mstp_clks[HWBLK_KEYSC]), + CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[HWBLK_SDHI0]), + CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[HWBLK_SDHI1]), + CLKDEV_DEV_ID("sh_keysc.0", &mstp_clks[HWBLK_KEYSC]), CLKDEV_CON_ID("usb0", &mstp_clks[HWBLK_USB]), CLKDEV_CON_ID("2dg0", &mstp_clks[HWBLK_2DG]), - CLKDEV_CON_ID("siu0", &mstp_clks[HWBLK_SIU]), + CLKDEV_DEV_ID("siu-pcm-audio", &mstp_clks[HWBLK_SIU]), CLKDEV_CON_ID("veu1", &mstp_clks[HWBLK_VEU2H1]), - CLKDEV_CON_ID("vou0", &mstp_clks[HWBLK_VOU]), + CLKDEV_DEV_ID("sh-vou.0", &mstp_clks[HWBLK_VOU]), CLKDEV_CON_ID("beu0", &mstp_clks[HWBLK_BEU]), - CLKDEV_CON_ID("ceu0", &mstp_clks[HWBLK_CEU]), + CLKDEV_DEV_ID("sh_mobile_ceu.0", &mstp_clks[HWBLK_CEU]), CLKDEV_CON_ID("veu0", &mstp_clks[HWBLK_VEU2H0]), CLKDEV_CON_ID("vpu0", &mstp_clks[HWBLK_VPU]), - CLKDEV_CON_ID("lcdc0", &mstp_clks[HWBLK_LCDC]), + + CLKDEV_ICK_ID("tmu_fck", "sh_tmu.0", &mstp_clks[HWBLK_TMU0]), + CLKDEV_ICK_ID("tmu_fck", "sh_tmu.1", &mstp_clks[HWBLK_TMU0]), + CLKDEV_ICK_ID("tmu_fck", "sh_tmu.2", &mstp_clks[HWBLK_TMU0]), + CLKDEV_ICK_ID("tmu_fck", "sh_tmu.3", &mstp_clks[HWBLK_TMU1]), + CLKDEV_ICK_ID("tmu_fck", "sh_tmu.4", &mstp_clks[HWBLK_TMU1]), + CLKDEV_ICK_ID("tmu_fck", "sh_tmu.5", &mstp_clks[HWBLK_TMU1]), + + CLKDEV_ICK_ID("sci_fck", "sh-sci.0", &mstp_clks[HWBLK_SCIF0]), + CLKDEV_ICK_ID("sci_fck", "sh-sci.1", &mstp_clks[HWBLK_SCIF1]), + CLKDEV_ICK_ID("sci_fck", "sh-sci.2", &mstp_clks[HWBLK_SCIF2]), + CLKDEV_ICK_ID("sci_fck", "sh-sci.3", &mstp_clks[HWBLK_SCIF3]), + CLKDEV_ICK_ID("sci_fck", "sh-sci.4", &mstp_clks[HWBLK_SCIF4]), + CLKDEV_ICK_ID("sci_fck", "sh-sci.5", &mstp_clks[HWBLK_SCIF5]), + + CLKDEV_DEV_ID("sh_mobile_lcdc_fb.0", &mstp_clks[HWBLK_LCDC]), }; int __init arch_clk_init(void) @@ -356,7 +311,7 @@ int __init arch_clk_init(void) ret = sh_clk_div6_register(div6_clks, DIV6_NR); if (!ret) - ret = sh_hwblk_clk_register(mstp_clks, HWBLK_NR); + ret = sh_clk_mstp32_register(mstp_clks, HWBLK_NR); return ret; } diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c index 8668f557e0ac..b3c039a5064a 100644 --- a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c +++ b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c @@ -23,8 +23,8 @@ #include <linux/io.h> #include <linux/clk.h> #include <linux/clkdev.h> +#include <linux/sh_clk.h> #include <asm/clock.h> -#include <asm/hwblk.h> #include <cpu/sh7724.h> /* SH7724 registers */ @@ -35,6 +35,9 @@ #define FCLKBCR 0xa415000c #define IRDACLKCR 0xa4150018 #define PLLCR 0xa4150024 +#define MSTPCR0 0xa4150030 +#define MSTPCR1 0xa4150034 +#define MSTPCR2 0xa4150038 #define SPUCLKCR 0xa415003c #define FLLFRQ 0xa4150050 #define LSTATS 0xa4150060 @@ -111,13 +114,16 @@ static struct clk div3_clk = { .parent = &pll_clk, }; -/* External input clock (pin name: FSIMCKA/FSIMCKB ) */ +/* External input clock (pin name: FSIMCKA/FSIMCKB/DV_CLKI ) */ struct clk sh7724_fsimcka_clk = { }; struct clk sh7724_fsimckb_clk = { }; +struct clk sh7724_dv_clki = { +}; + static struct clk *main_clks[] = { &r_clk, &extal_clk, @@ -126,6 +132,7 @@ static struct clk *main_clks[] = { &div3_clk, &sh7724_fsimcka_clk, &sh7724_fsimckb_clk, + &sh7724_dv_clki, }; static void div4_kick(struct clk *clk) @@ -163,17 +170,20 @@ struct clk div4_clks[DIV4_NR] = { [DIV4_M1] = DIV4(FRQCRB, 4, 0x2f7c, CLK_ENABLE_ON_INIT), }; -enum { DIV6_V, DIV6_I, DIV6_S, DIV6_NR }; +enum { DIV6_V, DIV6_I, DIV6_S, DIV6_FA, DIV6_FB, DIV6_NR }; -static struct clk div6_clks[DIV6_NR] = { - [DIV6_V] = SH_CLK_DIV6(&div3_clk, VCLKCR, 0), - [DIV6_I] = SH_CLK_DIV6(&div3_clk, IRDACLKCR, 0), - [DIV6_S] = SH_CLK_DIV6(&div3_clk, SPUCLKCR, CLK_ENABLE_ON_INIT), +/* Indices are important - they are the actual src selecting values */ +static struct clk *common_parent[] = { + [0] = &div3_clk, + [1] = NULL, }; -enum { DIV6_FA, DIV6_FB, DIV6_REPARENT_NR }; +static struct clk *vclkcr_parent[8] = { + [0] = &div3_clk, + [2] = &sh7724_dv_clki, + [4] = &extal_clk, +}; -/* Indices are important - they are the actual src selecting values */ static struct clk *fclkacr_parent[] = { [0] = &div3_clk, [1] = NULL, @@ -188,68 +198,74 @@ static struct clk *fclkbcr_parent[] = { [3] = NULL, }; -static struct clk div6_reparent_clks[DIV6_REPARENT_NR] = { - [DIV6_FA] = SH_CLK_DIV6_EXT(&div3_clk, FCLKACR, 0, +static struct clk div6_clks[DIV6_NR] = { + [DIV6_V] = SH_CLK_DIV6_EXT(VCLKCR, 0, + vclkcr_parent, ARRAY_SIZE(vclkcr_parent), 12, 3), + [DIV6_I] = SH_CLK_DIV6_EXT(IRDACLKCR, 0, + common_parent, ARRAY_SIZE(common_parent), 6, 1), + [DIV6_S] = SH_CLK_DIV6_EXT(SPUCLKCR, CLK_ENABLE_ON_INIT, + common_parent, ARRAY_SIZE(common_parent), 6, 1), + [DIV6_FA] = SH_CLK_DIV6_EXT(FCLKACR, 0, fclkacr_parent, ARRAY_SIZE(fclkacr_parent), 6, 2), - [DIV6_FB] = SH_CLK_DIV6_EXT(&div3_clk, FCLKBCR, 0, + [DIV6_FB] = SH_CLK_DIV6_EXT(FCLKBCR, 0, fclkbcr_parent, ARRAY_SIZE(fclkbcr_parent), 6, 2), }; static struct clk mstp_clks[HWBLK_NR] = { - SH_HWBLK_CLK(HWBLK_TLB, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT), - SH_HWBLK_CLK(HWBLK_IC, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT), - SH_HWBLK_CLK(HWBLK_OC, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT), - SH_HWBLK_CLK(HWBLK_RSMEM, &div4_clks[DIV4_B], CLK_ENABLE_ON_INIT), - SH_HWBLK_CLK(HWBLK_ILMEM, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT), - SH_HWBLK_CLK(HWBLK_L2C, &div4_clks[DIV4_SH], CLK_ENABLE_ON_INIT), - SH_HWBLK_CLK(HWBLK_FPU, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT), - SH_HWBLK_CLK(HWBLK_INTC, &div4_clks[DIV4_P], CLK_ENABLE_ON_INIT), - SH_HWBLK_CLK(HWBLK_DMAC0, &div4_clks[DIV4_B], 0), - SH_HWBLK_CLK(HWBLK_SHYWAY, &div4_clks[DIV4_SH], CLK_ENABLE_ON_INIT), - SH_HWBLK_CLK(HWBLK_HUDI, &div4_clks[DIV4_P], 0), - SH_HWBLK_CLK(HWBLK_UBC, &div4_clks[DIV4_I], 0), - SH_HWBLK_CLK(HWBLK_TMU0, &div4_clks[DIV4_P], 0), - SH_HWBLK_CLK(HWBLK_CMT, &r_clk, 0), - SH_HWBLK_CLK(HWBLK_RWDT, &r_clk, 0), - SH_HWBLK_CLK(HWBLK_DMAC1, &div4_clks[DIV4_B], 0), - SH_HWBLK_CLK(HWBLK_TMU1, &div4_clks[DIV4_P], 0), - SH_HWBLK_CLK(HWBLK_SCIF0, &div4_clks[DIV4_P], 0), - SH_HWBLK_CLK(HWBLK_SCIF1, &div4_clks[DIV4_P], 0), - SH_HWBLK_CLK(HWBLK_SCIF2, &div4_clks[DIV4_P], 0), - SH_HWBLK_CLK(HWBLK_SCIF3, &div4_clks[DIV4_B], 0), - SH_HWBLK_CLK(HWBLK_SCIF4, &div4_clks[DIV4_B], 0), - SH_HWBLK_CLK(HWBLK_SCIF5, &div4_clks[DIV4_B], 0), - SH_HWBLK_CLK(HWBLK_MSIOF0, &div4_clks[DIV4_B], 0), - SH_HWBLK_CLK(HWBLK_MSIOF1, &div4_clks[DIV4_B], 0), - - SH_HWBLK_CLK(HWBLK_KEYSC, &r_clk, 0), - SH_HWBLK_CLK(HWBLK_RTC, &r_clk, 0), - SH_HWBLK_CLK(HWBLK_IIC0, &div4_clks[DIV4_P], 0), - SH_HWBLK_CLK(HWBLK_IIC1, &div4_clks[DIV4_P], 0), - - SH_HWBLK_CLK(HWBLK_MMC, &div4_clks[DIV4_B], 0), - SH_HWBLK_CLK(HWBLK_ETHER, &div4_clks[DIV4_B], 0), - SH_HWBLK_CLK(HWBLK_ATAPI, &div4_clks[DIV4_B], 0), - SH_HWBLK_CLK(HWBLK_TPU, &div4_clks[DIV4_B], 0), - SH_HWBLK_CLK(HWBLK_IRDA, &div4_clks[DIV4_P], 0), - SH_HWBLK_CLK(HWBLK_TSIF, &div4_clks[DIV4_B], 0), - SH_HWBLK_CLK(HWBLK_USB1, &div4_clks[DIV4_B], 0), - SH_HWBLK_CLK(HWBLK_USB0, &div4_clks[DIV4_B], 0), - SH_HWBLK_CLK(HWBLK_2DG, &div4_clks[DIV4_B], 0), - SH_HWBLK_CLK(HWBLK_SDHI0, &div4_clks[DIV4_B], 0), - SH_HWBLK_CLK(HWBLK_SDHI1, &div4_clks[DIV4_B], 0), - SH_HWBLK_CLK(HWBLK_VEU1, &div4_clks[DIV4_B], 0), - SH_HWBLK_CLK(HWBLK_CEU1, &div4_clks[DIV4_B], 0), - SH_HWBLK_CLK(HWBLK_BEU1, &div4_clks[DIV4_B], 0), - SH_HWBLK_CLK(HWBLK_2DDMAC, &div4_clks[DIV4_SH], 0), - SH_HWBLK_CLK(HWBLK_SPU, &div4_clks[DIV4_B], 0), - SH_HWBLK_CLK(HWBLK_JPU, &div4_clks[DIV4_B], 0), - SH_HWBLK_CLK(HWBLK_VOU, &div4_clks[DIV4_B], 0), - SH_HWBLK_CLK(HWBLK_BEU0, &div4_clks[DIV4_B], 0), - SH_HWBLK_CLK(HWBLK_CEU0, &div4_clks[DIV4_B], 0), - SH_HWBLK_CLK(HWBLK_VEU0, &div4_clks[DIV4_B], 0), - SH_HWBLK_CLK(HWBLK_VPU, &div4_clks[DIV4_B], 0), - SH_HWBLK_CLK(HWBLK_LCDC, &div4_clks[DIV4_B], 0), + [HWBLK_TLB] = SH_CLK_MSTP32(&div4_clks[DIV4_I], MSTPCR0, 31, CLK_ENABLE_ON_INIT), + [HWBLK_IC] = SH_CLK_MSTP32(&div4_clks[DIV4_I], MSTPCR0, 30, CLK_ENABLE_ON_INIT), + [HWBLK_OC] = SH_CLK_MSTP32(&div4_clks[DIV4_I], MSTPCR0, 29, CLK_ENABLE_ON_INIT), + [HWBLK_RSMEM] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR0, 28, CLK_ENABLE_ON_INIT), + [HWBLK_ILMEM] = SH_CLK_MSTP32(&div4_clks[DIV4_I], MSTPCR0, 27, CLK_ENABLE_ON_INIT), + [HWBLK_L2C] = SH_CLK_MSTP32(&div4_clks[DIV4_SH], MSTPCR0, 26, CLK_ENABLE_ON_INIT), + [HWBLK_FPU] = SH_CLK_MSTP32(&div4_clks[DIV4_I], MSTPCR0, 24, CLK_ENABLE_ON_INIT), + [HWBLK_INTC] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 22, CLK_ENABLE_ON_INIT), + [HWBLK_DMAC0] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR0, 21, 0), + [HWBLK_SHYWAY] = SH_CLK_MSTP32(&div4_clks[DIV4_SH], MSTPCR0, 20, CLK_ENABLE_ON_INIT), + [HWBLK_HUDI] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 19, 0), + [HWBLK_UBC] = SH_CLK_MSTP32(&div4_clks[DIV4_I], MSTPCR0, 17, 0), + [HWBLK_TMU0] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 15, 0), + [HWBLK_CMT] = SH_CLK_MSTP32(&r_clk, MSTPCR0, 14, 0), + [HWBLK_RWDT] = SH_CLK_MSTP32(&r_clk, MSTPCR0, 13, 0), + [HWBLK_DMAC1] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR0, 12, 0), + [HWBLK_TMU1] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 10, 0), + [HWBLK_SCIF0] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 9, 0), + [HWBLK_SCIF1] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 8, 0), + [HWBLK_SCIF2] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 7, 0), + [HWBLK_SCIF3] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR0, 6, 0), + [HWBLK_SCIF4] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR0, 5, 0), + [HWBLK_SCIF5] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR0, 4, 0), + [HWBLK_MSIOF0] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR0, 2, 0), + [HWBLK_MSIOF1] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR0, 1, 0), + + [HWBLK_KEYSC] = SH_CLK_MSTP32(&r_clk, MSTPCR1, 12, 0), + [HWBLK_RTC] = SH_CLK_MSTP32(&r_clk, MSTPCR1, 11, 0), + [HWBLK_IIC0] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 9, 0), + [HWBLK_IIC1] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 8, 0), + + [HWBLK_MMC] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 29, 0), + [HWBLK_ETHER] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 28, 0), + [HWBLK_ATAPI] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 26, 0), + [HWBLK_TPU] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 25, 0), + [HWBLK_IRDA] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR2, 24, 0), + [HWBLK_TSIF] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 22, 0), + [HWBLK_USB1] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 21, 0), + [HWBLK_USB0] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 20, 0), + [HWBLK_2DG] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 19, 0), + [HWBLK_SDHI0] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 18, 0), + [HWBLK_SDHI1] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 17, 0), + [HWBLK_VEU1] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 15, 0), + [HWBLK_CEU1] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 13, 0), + [HWBLK_BEU1] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 12, 0), + [HWBLK_2DDMAC] = SH_CLK_MSTP32(&div4_clks[DIV4_SH], MSTPCR2, 10, 0), + [HWBLK_SPU] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 9, 0), + [HWBLK_JPU] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 6, 0), + [HWBLK_VOU] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 5, 0), + [HWBLK_BEU0] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 4, 0), + [HWBLK_CEU0] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 3, 0), + [HWBLK_VEU0] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 2, 0), + [HWBLK_VPU] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 1, 0), + [HWBLK_LCDC] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 0, 0), }; static struct clk_lookup lookups[] = { @@ -269,8 +285,8 @@ static struct clk_lookup lookups[] = { /* DIV6 clocks */ CLKDEV_CON_ID("video_clk", &div6_clks[DIV6_V]), - CLKDEV_CON_ID("fsia_clk", &div6_reparent_clks[DIV6_FA]), - CLKDEV_CON_ID("fsib_clk", &div6_reparent_clks[DIV6_FB]), + CLKDEV_CON_ID("fsia_clk", &div6_clks[DIV6_FA]), + CLKDEV_CON_ID("fsib_clk", &div6_clks[DIV6_FB]), CLKDEV_CON_ID("irda_clk", &div6_clks[DIV6_I]), CLKDEV_CON_ID("spu_clk", &div6_clks[DIV6_S]), @@ -283,7 +299,7 @@ static struct clk_lookup lookups[] = { CLKDEV_CON_ID("l2c0", &mstp_clks[HWBLK_L2C]), CLKDEV_CON_ID("fpu0", &mstp_clks[HWBLK_FPU]), CLKDEV_CON_ID("intc0", &mstp_clks[HWBLK_INTC]), - CLKDEV_CON_ID("dmac0", &mstp_clks[HWBLK_DMAC0]), + CLKDEV_DEV_ID("sh-dma-engine.0", &mstp_clks[HWBLK_DMAC0]), CLKDEV_CON_ID("sh0", &mstp_clks[HWBLK_SHYWAY]), CLKDEV_CON_ID("hudi0", &mstp_clks[HWBLK_HUDI]), CLKDEV_CON_ID("ubc0", &mstp_clks[HWBLK_UBC]), @@ -294,26 +310,26 @@ static struct clk_lookup lookups[] = { CLKDEV_ICK_ID("tmu_fck", "sh_tmu.3", &mstp_clks[HWBLK_TMU1]), CLKDEV_CON_ID("cmt_fck", &mstp_clks[HWBLK_CMT]), - CLKDEV_CON_ID("rwdt0", &mstp_clks[HWBLK_RWDT]), - CLKDEV_CON_ID("dmac1", &mstp_clks[HWBLK_DMAC1]), + CLKDEV_DEV_ID("sh-wdt.0", &mstp_clks[HWBLK_RWDT]), + CLKDEV_DEV_ID("sh-dma-engine.1", &mstp_clks[HWBLK_DMAC1]), CLKDEV_ICK_ID("tmu_fck", "sh_tmu.4", &mstp_clks[HWBLK_TMU1]), CLKDEV_ICK_ID("tmu_fck", "sh_tmu.5", &mstp_clks[HWBLK_TMU1]), - CLKDEV_ICK_ID("sci_fck", "sh-sci.0", &mstp_clks[HWBLK_SCIF0]), - CLKDEV_ICK_ID("sci_fck", "sh-sci.1", &mstp_clks[HWBLK_SCIF1]), - CLKDEV_ICK_ID("sci_fck", "sh-sci.2", &mstp_clks[HWBLK_SCIF2]), - CLKDEV_ICK_ID("sci_fck", "sh-sci.3", &mstp_clks[HWBLK_SCIF3]), - CLKDEV_ICK_ID("sci_fck", "sh-sci.4", &mstp_clks[HWBLK_SCIF4]), - CLKDEV_ICK_ID("sci_fck", "sh-sci.5", &mstp_clks[HWBLK_SCIF5]), - - CLKDEV_CON_ID("msiof0", &mstp_clks[HWBLK_MSIOF0]), - CLKDEV_CON_ID("msiof1", &mstp_clks[HWBLK_MSIOF1]), - CLKDEV_CON_ID("keysc0", &mstp_clks[HWBLK_KEYSC]), + CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[HWBLK_SCIF0]), + CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[HWBLK_SCIF1]), + CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[HWBLK_SCIF2]), + CLKDEV_DEV_ID("sh-sci.3", &mstp_clks[HWBLK_SCIF3]), + CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[HWBLK_SCIF4]), + CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[HWBLK_SCIF5]), + + CLKDEV_DEV_ID("spi_sh_msiof.0", &mstp_clks[HWBLK_MSIOF0]), + CLKDEV_DEV_ID("spi_sh_msiof.1", &mstp_clks[HWBLK_MSIOF1]), + CLKDEV_DEV_ID("sh_keysc.0", &mstp_clks[HWBLK_KEYSC]), CLKDEV_CON_ID("rtc0", &mstp_clks[HWBLK_RTC]), CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[HWBLK_IIC0]), CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[HWBLK_IIC1]), - CLKDEV_CON_ID("mmc0", &mstp_clks[HWBLK_MMC]), - CLKDEV_CON_ID("eth0", &mstp_clks[HWBLK_ETHER]), + CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[HWBLK_MMC]), + CLKDEV_DEV_ID("sh-eth.0", &mstp_clks[HWBLK_ETHER]), CLKDEV_CON_ID("atapi0", &mstp_clks[HWBLK_ATAPI]), CLKDEV_CON_ID("tpu0", &mstp_clks[HWBLK_TPU]), CLKDEV_CON_ID("irda0", &mstp_clks[HWBLK_IRDA]), @@ -321,20 +337,20 @@ static struct clk_lookup lookups[] = { CLKDEV_CON_ID("usb1", &mstp_clks[HWBLK_USB1]), CLKDEV_CON_ID("usb0", &mstp_clks[HWBLK_USB0]), CLKDEV_CON_ID("2dg0", &mstp_clks[HWBLK_2DG]), - CLKDEV_CON_ID("sdhi0", &mstp_clks[HWBLK_SDHI0]), - CLKDEV_CON_ID("sdhi1", &mstp_clks[HWBLK_SDHI1]), + CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[HWBLK_SDHI0]), + CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[HWBLK_SDHI1]), CLKDEV_CON_ID("veu1", &mstp_clks[HWBLK_VEU1]), - CLKDEV_CON_ID("ceu1", &mstp_clks[HWBLK_CEU1]), + CLKDEV_DEV_ID("sh_mobile_ceu.1", &mstp_clks[HWBLK_CEU1]), CLKDEV_CON_ID("beu1", &mstp_clks[HWBLK_BEU1]), CLKDEV_CON_ID("2ddmac0", &mstp_clks[HWBLK_2DDMAC]), CLKDEV_CON_ID("spu0", &mstp_clks[HWBLK_SPU]), CLKDEV_CON_ID("jpu0", &mstp_clks[HWBLK_JPU]), - CLKDEV_CON_ID("vou0", &mstp_clks[HWBLK_VOU]), + CLKDEV_DEV_ID("sh-vou.0", &mstp_clks[HWBLK_VOU]), CLKDEV_CON_ID("beu0", &mstp_clks[HWBLK_BEU0]), - CLKDEV_CON_ID("ceu0", &mstp_clks[HWBLK_CEU0]), + CLKDEV_DEV_ID("sh_mobile_ceu.0", &mstp_clks[HWBLK_CEU0]), CLKDEV_CON_ID("veu0", &mstp_clks[HWBLK_VEU0]), CLKDEV_CON_ID("vpu0", &mstp_clks[HWBLK_VPU]), - CLKDEV_CON_ID("lcdc0", &mstp_clks[HWBLK_LCDC]), + CLKDEV_DEV_ID("sh_mobile_lcdc_fb.0", &mstp_clks[HWBLK_LCDC]), }; int __init arch_clk_init(void) @@ -356,13 +372,10 @@ int __init arch_clk_init(void) ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table); if (!ret) - ret = sh_clk_div6_register(div6_clks, DIV6_NR); - - if (!ret) - ret = sh_clk_div6_reparent_register(div6_reparent_clks, DIV6_REPARENT_NR); + ret = sh_clk_div6_reparent_register(div6_clks, DIV6_NR); if (!ret) - ret = sh_hwblk_clk_register(mstp_clks, HWBLK_NR); + ret = sh_clk_mstp32_register(mstp_clks, HWBLK_NR); return ret; } diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7757.c b/arch/sh/kernel/cpu/sh4a/clock-sh7757.c index 19222dae8233..0fbff1422f54 100644 --- a/arch/sh/kernel/cpu/sh4a/clock-sh7757.c +++ b/arch/sh/kernel/cpu/sh4a/clock-sh7757.c @@ -129,7 +129,7 @@ static struct clk_lookup lookups[] = { CLKDEV_ICK_ID("sci_fck", "sh-sci.0", &mstp_clks[MSTP110]), CLKDEV_CON_ID("usb_fck", &mstp_clks[MSTP103]), - CLKDEV_CON_ID("usb0", &mstp_clks[MSTP102]), + CLKDEV_DEV_ID("renesas_usbhs.0", &mstp_clks[MSTP102]), CLKDEV_CON_ID("mmc0", &mstp_clks[MSTP220]), }; diff --git a/arch/sh/kernel/cpu/sh4a/hwblk-sh7722.c b/arch/sh/kernel/cpu/sh4a/hwblk-sh7722.c deleted file mode 100644 index a288b5d92341..000000000000 --- a/arch/sh/kernel/cpu/sh4a/hwblk-sh7722.c +++ /dev/null @@ -1,106 +0,0 @@ -/* - * arch/sh/kernel/cpu/sh4a/hwblk-sh7722.c - * - * SH7722 hardware block support - * - * Copyright (C) 2009 Magnus Damm - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#include <linux/init.h> -#include <linux/kernel.h> -#include <linux/io.h> -#include <asm/suspend.h> -#include <asm/hwblk.h> -#include <cpu/sh7722.h> - -/* SH7722 registers */ -#define MSTPCR0 0xa4150030 -#define MSTPCR1 0xa4150034 -#define MSTPCR2 0xa4150038 - -/* SH7722 Power Domains */ -enum { CORE_AREA, SUB_AREA, CORE_AREA_BM }; -static struct hwblk_area sh7722_hwblk_area[] = { - [CORE_AREA] = HWBLK_AREA(0, 0), - [CORE_AREA_BM] = HWBLK_AREA(HWBLK_AREA_FLAG_PARENT, CORE_AREA), - [SUB_AREA] = HWBLK_AREA(0, 0), -}; - -/* Table mapping HWBLK to Module Stop Bit and Power Domain */ -static struct hwblk sh7722_hwblk[HWBLK_NR] = { - [HWBLK_TLB] = HWBLK(MSTPCR0, 31, CORE_AREA), - [HWBLK_IC] = HWBLK(MSTPCR0, 30, CORE_AREA), - [HWBLK_OC] = HWBLK(MSTPCR0, 29, CORE_AREA), - [HWBLK_URAM] = HWBLK(MSTPCR0, 28, CORE_AREA), - [HWBLK_XYMEM] = HWBLK(MSTPCR0, 26, CORE_AREA), - [HWBLK_INTC] = HWBLK(MSTPCR0, 22, CORE_AREA), - [HWBLK_DMAC] = HWBLK(MSTPCR0, 21, CORE_AREA_BM), - [HWBLK_SHYWAY] = HWBLK(MSTPCR0, 20, CORE_AREA), - [HWBLK_HUDI] = HWBLK(MSTPCR0, 19, CORE_AREA), - [HWBLK_UBC] = HWBLK(MSTPCR0, 17, CORE_AREA), - [HWBLK_TMU] = HWBLK(MSTPCR0, 15, CORE_AREA), - [HWBLK_CMT] = HWBLK(MSTPCR0, 14, SUB_AREA), - [HWBLK_RWDT] = HWBLK(MSTPCR0, 13, SUB_AREA), - [HWBLK_FLCTL] = HWBLK(MSTPCR0, 10, CORE_AREA), - [HWBLK_SCIF0] = HWBLK(MSTPCR0, 7, CORE_AREA), - [HWBLK_SCIF1] = HWBLK(MSTPCR0, 6, CORE_AREA), - [HWBLK_SCIF2] = HWBLK(MSTPCR0, 5, CORE_AREA), - [HWBLK_SIO] = HWBLK(MSTPCR0, 3, CORE_AREA), - [HWBLK_SIOF0] = HWBLK(MSTPCR0, 2, CORE_AREA), - [HWBLK_SIOF1] = HWBLK(MSTPCR0, 1, CORE_AREA), - - [HWBLK_IIC] = HWBLK(MSTPCR1, 9, CORE_AREA), - [HWBLK_RTC] = HWBLK(MSTPCR1, 8, SUB_AREA), - - [HWBLK_TPU] = HWBLK(MSTPCR2, 25, CORE_AREA), - [HWBLK_IRDA] = HWBLK(MSTPCR2, 24, CORE_AREA), - [HWBLK_SDHI] = HWBLK(MSTPCR2, 18, CORE_AREA), - [HWBLK_SIM] = HWBLK(MSTPCR2, 16, CORE_AREA), - [HWBLK_KEYSC] = HWBLK(MSTPCR2, 14, SUB_AREA), - [HWBLK_TSIF] = HWBLK(MSTPCR2, 13, SUB_AREA), - [HWBLK_USBF] = HWBLK(MSTPCR2, 11, CORE_AREA), - [HWBLK_2DG] = HWBLK(MSTPCR2, 9, CORE_AREA_BM), - [HWBLK_SIU] = HWBLK(MSTPCR2, 8, CORE_AREA), - [HWBLK_JPU] = HWBLK(MSTPCR2, 6, CORE_AREA_BM), - [HWBLK_VOU] = HWBLK(MSTPCR2, 5, CORE_AREA_BM), - [HWBLK_BEU] = HWBLK(MSTPCR2, 4, CORE_AREA_BM), - [HWBLK_CEU] = HWBLK(MSTPCR2, 3, CORE_AREA_BM), - [HWBLK_VEU] = HWBLK(MSTPCR2, 2, CORE_AREA_BM), - [HWBLK_VPU] = HWBLK(MSTPCR2, 1, CORE_AREA_BM), - [HWBLK_LCDC] = HWBLK(MSTPCR2, 0, CORE_AREA_BM), -}; - -static struct hwblk_info sh7722_hwblk_info = { - .areas = sh7722_hwblk_area, - .nr_areas = ARRAY_SIZE(sh7722_hwblk_area), - .hwblks = sh7722_hwblk, - .nr_hwblks = ARRAY_SIZE(sh7722_hwblk), -}; - -int arch_hwblk_sleep_mode(void) -{ - if (!sh7722_hwblk_area[CORE_AREA].cnt[HWBLK_CNT_USAGE]) - return SUSP_SH_STANDBY | SUSP_SH_SF; - - if (!sh7722_hwblk_area[CORE_AREA_BM].cnt[HWBLK_CNT_USAGE]) - return SUSP_SH_SLEEP | SUSP_SH_SF; - - return SUSP_SH_SLEEP; -} - -int __init arch_hwblk_init(void) -{ - return hwblk_register(&sh7722_hwblk_info); -} diff --git a/arch/sh/kernel/cpu/sh4a/hwblk-sh7723.c b/arch/sh/kernel/cpu/sh4a/hwblk-sh7723.c deleted file mode 100644 index a7f4684d2032..000000000000 --- a/arch/sh/kernel/cpu/sh4a/hwblk-sh7723.c +++ /dev/null @@ -1,117 +0,0 @@ -/* - * arch/sh/kernel/cpu/sh4a/hwblk-sh7723.c - * - * SH7723 hardware block support - * - * Copyright (C) 2009 Magnus Damm - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#include <linux/init.h> -#include <linux/kernel.h> -#include <linux/io.h> -#include <asm/suspend.h> -#include <asm/hwblk.h> -#include <cpu/sh7723.h> - -/* SH7723 registers */ -#define MSTPCR0 0xa4150030 -#define MSTPCR1 0xa4150034 -#define MSTPCR2 0xa4150038 - -/* SH7723 Power Domains */ -enum { CORE_AREA, SUB_AREA, CORE_AREA_BM }; -static struct hwblk_area sh7723_hwblk_area[] = { - [CORE_AREA] = HWBLK_AREA(0, 0), - [CORE_AREA_BM] = HWBLK_AREA(HWBLK_AREA_FLAG_PARENT, CORE_AREA), - [SUB_AREA] = HWBLK_AREA(0, 0), -}; - -/* Table mapping HWBLK to Module Stop Bit and Power Domain */ -static struct hwblk sh7723_hwblk[HWBLK_NR] = { - [HWBLK_TLB] = HWBLK(MSTPCR0, 31, CORE_AREA), - [HWBLK_IC] = HWBLK(MSTPCR0, 30, CORE_AREA), - [HWBLK_OC] = HWBLK(MSTPCR0, 29, CORE_AREA), - [HWBLK_L2C] = HWBLK(MSTPCR0, 28, CORE_AREA), - [HWBLK_ILMEM] = HWBLK(MSTPCR0, 27, CORE_AREA), - [HWBLK_FPU] = HWBLK(MSTPCR0, 24, CORE_AREA), - [HWBLK_INTC] = HWBLK(MSTPCR0, 22, CORE_AREA), - [HWBLK_DMAC0] = HWBLK(MSTPCR0, 21, CORE_AREA_BM), - [HWBLK_SHYWAY] = HWBLK(MSTPCR0, 20, CORE_AREA), - [HWBLK_HUDI] = HWBLK(MSTPCR0, 19, CORE_AREA), - [HWBLK_DBG] = HWBLK(MSTPCR0, 18, CORE_AREA), - [HWBLK_UBC] = HWBLK(MSTPCR0, 17, CORE_AREA), - [HWBLK_SUBC] = HWBLK(MSTPCR0, 16, CORE_AREA), - [HWBLK_TMU0] = HWBLK(MSTPCR0, 15, CORE_AREA), - [HWBLK_CMT] = HWBLK(MSTPCR0, 14, SUB_AREA), - [HWBLK_RWDT] = HWBLK(MSTPCR0, 13, SUB_AREA), - [HWBLK_DMAC1] = HWBLK(MSTPCR0, 12, CORE_AREA_BM), - [HWBLK_TMU1] = HWBLK(MSTPCR0, 11, CORE_AREA), - [HWBLK_FLCTL] = HWBLK(MSTPCR0, 10, CORE_AREA), - [HWBLK_SCIF0] = HWBLK(MSTPCR0, 9, CORE_AREA), - [HWBLK_SCIF1] = HWBLK(MSTPCR0, 8, CORE_AREA), - [HWBLK_SCIF2] = HWBLK(MSTPCR0, 7, CORE_AREA), - [HWBLK_SCIF3] = HWBLK(MSTPCR0, 6, CORE_AREA), - [HWBLK_SCIF4] = HWBLK(MSTPCR0, 5, CORE_AREA), - [HWBLK_SCIF5] = HWBLK(MSTPCR0, 4, CORE_AREA), - [HWBLK_MSIOF0] = HWBLK(MSTPCR0, 2, CORE_AREA), - [HWBLK_MSIOF1] = HWBLK(MSTPCR0, 1, CORE_AREA), - [HWBLK_MERAM] = HWBLK(MSTPCR0, 0, CORE_AREA), - - [HWBLK_IIC] = HWBLK(MSTPCR1, 9, CORE_AREA), - [HWBLK_RTC] = HWBLK(MSTPCR1, 8, SUB_AREA), - - [HWBLK_ATAPI] = HWBLK(MSTPCR2, 28, CORE_AREA_BM), - [HWBLK_ADC] = HWBLK(MSTPCR2, 27, CORE_AREA), - [HWBLK_TPU] = HWBLK(MSTPCR2, 25, CORE_AREA), - [HWBLK_IRDA] = HWBLK(MSTPCR2, 24, CORE_AREA), - [HWBLK_TSIF] = HWBLK(MSTPCR2, 22, CORE_AREA), - [HWBLK_ICB] = HWBLK(MSTPCR2, 21, CORE_AREA_BM), - [HWBLK_SDHI0] = HWBLK(MSTPCR2, 18, CORE_AREA), - [HWBLK_SDHI1] = HWBLK(MSTPCR2, 17, CORE_AREA), - [HWBLK_KEYSC] = HWBLK(MSTPCR2, 14, SUB_AREA), - [HWBLK_USB] = HWBLK(MSTPCR2, 11, CORE_AREA), - [HWBLK_2DG] = HWBLK(MSTPCR2, 10, CORE_AREA_BM), - [HWBLK_SIU] = HWBLK(MSTPCR2, 8, CORE_AREA), - [HWBLK_VEU2H1] = HWBLK(MSTPCR2, 6, CORE_AREA_BM), - [HWBLK_VOU] = HWBLK(MSTPCR2, 5, CORE_AREA_BM), - [HWBLK_BEU] = HWBLK(MSTPCR2, 4, CORE_AREA_BM), - [HWBLK_CEU] = HWBLK(MSTPCR2, 3, CORE_AREA_BM), - [HWBLK_VEU2H0] = HWBLK(MSTPCR2, 2, CORE_AREA_BM), - [HWBLK_VPU] = HWBLK(MSTPCR2, 1, CORE_AREA_BM), - [HWBLK_LCDC] = HWBLK(MSTPCR2, 0, CORE_AREA_BM), -}; - -static struct hwblk_info sh7723_hwblk_info = { - .areas = sh7723_hwblk_area, - .nr_areas = ARRAY_SIZE(sh7723_hwblk_area), - .hwblks = sh7723_hwblk, - .nr_hwblks = ARRAY_SIZE(sh7723_hwblk), -}; - -int arch_hwblk_sleep_mode(void) -{ - if (!sh7723_hwblk_area[CORE_AREA].cnt[HWBLK_CNT_USAGE]) - return SUSP_SH_STANDBY | SUSP_SH_SF; - - if (!sh7723_hwblk_area[CORE_AREA_BM].cnt[HWBLK_CNT_USAGE]) - return SUSP_SH_SLEEP | SUSP_SH_SF; - - return SUSP_SH_SLEEP; -} - -int __init arch_hwblk_init(void) -{ - return hwblk_register(&sh7723_hwblk_info); -} diff --git a/arch/sh/kernel/cpu/sh4a/hwblk-sh7724.c b/arch/sh/kernel/cpu/sh4a/hwblk-sh7724.c deleted file mode 100644 index 1613ad6013c3..000000000000 --- a/arch/sh/kernel/cpu/sh4a/hwblk-sh7724.c +++ /dev/null @@ -1,121 +0,0 @@ -/* - * arch/sh/kernel/cpu/sh4a/hwblk-sh7724.c - * - * SH7724 hardware block support - * - * Copyright (C) 2009 Magnus Damm - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#include <linux/init.h> -#include <linux/kernel.h> -#include <linux/io.h> -#include <asm/suspend.h> -#include <asm/hwblk.h> -#include <cpu/sh7724.h> - -/* SH7724 registers */ -#define MSTPCR0 0xa4150030 -#define MSTPCR1 0xa4150034 -#define MSTPCR2 0xa4150038 - -/* SH7724 Power Domains */ -enum { CORE_AREA, SUB_AREA, CORE_AREA_BM }; -static struct hwblk_area sh7724_hwblk_area[] = { - [CORE_AREA] = HWBLK_AREA(0, 0), - [CORE_AREA_BM] = HWBLK_AREA(HWBLK_AREA_FLAG_PARENT, CORE_AREA), - [SUB_AREA] = HWBLK_AREA(0, 0), -}; - -/* Table mapping HWBLK to Module Stop Bit and Power Domain */ -static struct hwblk sh7724_hwblk[HWBLK_NR] = { - [HWBLK_TLB] = HWBLK(MSTPCR0, 31, CORE_AREA), - [HWBLK_IC] = HWBLK(MSTPCR0, 30, CORE_AREA), - [HWBLK_OC] = HWBLK(MSTPCR0, 29, CORE_AREA), - [HWBLK_RSMEM] = HWBLK(MSTPCR0, 28, CORE_AREA), - [HWBLK_ILMEM] = HWBLK(MSTPCR0, 27, CORE_AREA), - [HWBLK_L2C] = HWBLK(MSTPCR0, 26, CORE_AREA), - [HWBLK_FPU] = HWBLK(MSTPCR0, 24, CORE_AREA), - [HWBLK_INTC] = HWBLK(MSTPCR0, 22, CORE_AREA), - [HWBLK_DMAC0] = HWBLK(MSTPCR0, 21, CORE_AREA_BM), - [HWBLK_SHYWAY] = HWBLK(MSTPCR0, 20, CORE_AREA), - [HWBLK_HUDI] = HWBLK(MSTPCR0, 19, CORE_AREA), - [HWBLK_DBG] = HWBLK(MSTPCR0, 18, CORE_AREA), - [HWBLK_UBC] = HWBLK(MSTPCR0, 17, CORE_AREA), - [HWBLK_TMU0] = HWBLK(MSTPCR0, 15, CORE_AREA), - [HWBLK_CMT] = HWBLK(MSTPCR0, 14, SUB_AREA), - [HWBLK_RWDT] = HWBLK(MSTPCR0, 13, SUB_AREA), - [HWBLK_DMAC1] = HWBLK(MSTPCR0, 12, CORE_AREA_BM), - [HWBLK_TMU1] = HWBLK(MSTPCR0, 10, CORE_AREA), - [HWBLK_SCIF0] = HWBLK(MSTPCR0, 9, CORE_AREA), - [HWBLK_SCIF1] = HWBLK(MSTPCR0, 8, CORE_AREA), - [HWBLK_SCIF2] = HWBLK(MSTPCR0, 7, CORE_AREA), - [HWBLK_SCIF3] = HWBLK(MSTPCR0, 6, CORE_AREA), - [HWBLK_SCIF4] = HWBLK(MSTPCR0, 5, CORE_AREA), - [HWBLK_SCIF5] = HWBLK(MSTPCR0, 4, CORE_AREA), - [HWBLK_MSIOF0] = HWBLK(MSTPCR0, 2, CORE_AREA), - [HWBLK_MSIOF1] = HWBLK(MSTPCR0, 1, CORE_AREA), - - [HWBLK_KEYSC] = HWBLK(MSTPCR1, 12, SUB_AREA), - [HWBLK_RTC] = HWBLK(MSTPCR1, 11, SUB_AREA), - [HWBLK_IIC0] = HWBLK(MSTPCR1, 9, CORE_AREA), - [HWBLK_IIC1] = HWBLK(MSTPCR1, 8, CORE_AREA), - - [HWBLK_MMC] = HWBLK(MSTPCR2, 29, CORE_AREA), - [HWBLK_ETHER] = HWBLK(MSTPCR2, 28, CORE_AREA_BM), - [HWBLK_ATAPI] = HWBLK(MSTPCR2, 26, CORE_AREA_BM), - [HWBLK_TPU] = HWBLK(MSTPCR2, 25, CORE_AREA), - [HWBLK_IRDA] = HWBLK(MSTPCR2, 24, CORE_AREA), - [HWBLK_TSIF] = HWBLK(MSTPCR2, 22, CORE_AREA), - [HWBLK_USB1] = HWBLK(MSTPCR2, 21, CORE_AREA), - [HWBLK_USB0] = HWBLK(MSTPCR2, 20, CORE_AREA), - [HWBLK_2DG] = HWBLK(MSTPCR2, 19, CORE_AREA_BM), - [HWBLK_SDHI0] = HWBLK(MSTPCR2, 18, CORE_AREA), - [HWBLK_SDHI1] = HWBLK(MSTPCR2, 17, CORE_AREA), - [HWBLK_VEU1] = HWBLK(MSTPCR2, 15, CORE_AREA_BM), - [HWBLK_CEU1] = HWBLK(MSTPCR2, 13, CORE_AREA_BM), - [HWBLK_BEU1] = HWBLK(MSTPCR2, 12, CORE_AREA_BM), - [HWBLK_2DDMAC] = HWBLK(MSTPCR2, 10, CORE_AREA_BM), - [HWBLK_SPU] = HWBLK(MSTPCR2, 9, CORE_AREA_BM), - [HWBLK_JPU] = HWBLK(MSTPCR2, 6, CORE_AREA_BM), - [HWBLK_VOU] = HWBLK(MSTPCR2, 5, CORE_AREA_BM), - [HWBLK_BEU0] = HWBLK(MSTPCR2, 4, CORE_AREA_BM), - [HWBLK_CEU0] = HWBLK(MSTPCR2, 3, CORE_AREA_BM), - [HWBLK_VEU0] = HWBLK(MSTPCR2, 2, CORE_AREA_BM), - [HWBLK_VPU] = HWBLK(MSTPCR2, 1, CORE_AREA_BM), - [HWBLK_LCDC] = HWBLK(MSTPCR2, 0, CORE_AREA_BM), -}; - -static struct hwblk_info sh7724_hwblk_info = { - .areas = sh7724_hwblk_area, - .nr_areas = ARRAY_SIZE(sh7724_hwblk_area), - .hwblks = sh7724_hwblk, - .nr_hwblks = ARRAY_SIZE(sh7724_hwblk), -}; - -int arch_hwblk_sleep_mode(void) -{ - if (!sh7724_hwblk_area[CORE_AREA].cnt[HWBLK_CNT_USAGE]) - return SUSP_SH_STANDBY | SUSP_SH_SF; - - if (!sh7724_hwblk_area[CORE_AREA_BM].cnt[HWBLK_CNT_USAGE]) - return SUSP_SH_SLEEP | SUSP_SH_SF; - - return SUSP_SH_SLEEP; -} - -int __init arch_hwblk_init(void) -{ - return hwblk_register(&sh7724_hwblk_info); -} diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c index 278a0e572158..8420d4bc8bfc 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c @@ -146,7 +146,7 @@ static struct resource sh7722_dmae_resources[] = { .flags = IORESOURCE_MEM, }, { - /* DMA error IRQ */ + .name = "error_irq", .start = 78, .end = 78, .flags = IORESOURCE_IRQ, @@ -173,9 +173,6 @@ struct platform_device dma_device = { .dev = { .platform_data = &dma_platform_data, }, - .archdata = { - .hwblk_id = HWBLK_DMAC, - }, }; /* Serial */ @@ -264,9 +261,6 @@ static struct platform_device rtc_device = { .id = -1, .num_resources = ARRAY_SIZE(rtc_resources), .resource = rtc_resources, - .archdata = { - .hwblk_id = HWBLK_RTC, - }, }; static struct m66592_platdata usbf_platdata = { @@ -297,9 +291,6 @@ static struct platform_device usbf_device = { }, .num_resources = ARRAY_SIZE(usbf_resources), .resource = usbf_resources, - .archdata = { - .hwblk_id = HWBLK_USBF, - }, }; static struct resource iic_resources[] = { @@ -321,9 +312,6 @@ static struct platform_device iic_device = { .id = 0, /* "i2c0" clock */ .num_resources = ARRAY_SIZE(iic_resources), .resource = iic_resources, - .archdata = { - .hwblk_id = HWBLK_IIC, - }, }; static struct uio_info vpu_platform_data = { @@ -352,9 +340,6 @@ static struct platform_device vpu_device = { }, .resource = vpu_resources, .num_resources = ARRAY_SIZE(vpu_resources), - .archdata = { - .hwblk_id = HWBLK_VPU, - }, }; static struct uio_info veu_platform_data = { @@ -383,9 +368,6 @@ static struct platform_device veu_device = { }, .resource = veu_resources, .num_resources = ARRAY_SIZE(veu_resources), - .archdata = { - .hwblk_id = HWBLK_VEU, - }, }; static struct uio_info jpu_platform_data = { @@ -414,9 +396,6 @@ static struct platform_device jpu_device = { }, .resource = jpu_resources, .num_resources = ARRAY_SIZE(jpu_resources), - .archdata = { - .hwblk_id = HWBLK_JPU, - }, }; static struct sh_timer_config cmt_platform_data = { @@ -446,9 +425,6 @@ static struct platform_device cmt_device = { }, .resource = cmt_resources, .num_resources = ARRAY_SIZE(cmt_resources), - .archdata = { - .hwblk_id = HWBLK_CMT, - }, }; static struct sh_timer_config tmu0_platform_data = { @@ -477,9 +453,6 @@ static struct platform_device tmu0_device = { }, .resource = tmu0_resources, .num_resources = ARRAY_SIZE(tmu0_resources), - .archdata = { - .hwblk_id = HWBLK_TMU, - }, }; static struct sh_timer_config tmu1_platform_data = { @@ -508,9 +481,6 @@ static struct platform_device tmu1_device = { }, .resource = tmu1_resources, .num_resources = ARRAY_SIZE(tmu1_resources), - .archdata = { - .hwblk_id = HWBLK_TMU, - }, }; static struct sh_timer_config tmu2_platform_data = { @@ -538,9 +508,6 @@ static struct platform_device tmu2_device = { }, .resource = tmu2_resources, .num_resources = ARRAY_SIZE(tmu2_resources), - .archdata = { - .hwblk_id = HWBLK_TMU, - }, }; static struct siu_platform siu_platform_data = { @@ -571,9 +538,6 @@ static struct platform_device siu_device = { }, .resource = siu_resources, .num_resources = ARRAY_SIZE(siu_resources), - .archdata = { - .hwblk_id = HWBLK_SIU, - }, }; static struct platform_device *sh7722_devices[] __initdata = { diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c index 3c2810d8f72e..a188c9ea4393 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c @@ -158,9 +158,6 @@ static struct platform_device vpu_device = { }, .resource = vpu_resources, .num_resources = ARRAY_SIZE(vpu_resources), - .archdata = { - .hwblk_id = HWBLK_VPU, - }, }; static struct uio_info veu0_platform_data = { @@ -189,9 +186,6 @@ static struct platform_device veu0_device = { }, .resource = veu0_resources, .num_resources = ARRAY_SIZE(veu0_resources), - .archdata = { - .hwblk_id = HWBLK_VEU2H0, - }, }; static struct uio_info veu1_platform_data = { @@ -220,9 +214,6 @@ static struct platform_device veu1_device = { }, .resource = veu1_resources, .num_resources = ARRAY_SIZE(veu1_resources), - .archdata = { - .hwblk_id = HWBLK_VEU2H1, - }, }; static struct sh_timer_config cmt_platform_data = { @@ -252,9 +243,6 @@ static struct platform_device cmt_device = { }, .resource = cmt_resources, .num_resources = ARRAY_SIZE(cmt_resources), - .archdata = { - .hwblk_id = HWBLK_CMT, - }, }; static struct sh_timer_config tmu0_platform_data = { @@ -283,9 +271,6 @@ static struct platform_device tmu0_device = { }, .resource = tmu0_resources, .num_resources = ARRAY_SIZE(tmu0_resources), - .archdata = { - .hwblk_id = HWBLK_TMU0, - }, }; static struct sh_timer_config tmu1_platform_data = { @@ -314,9 +299,6 @@ static struct platform_device tmu1_device = { }, .resource = tmu1_resources, .num_resources = ARRAY_SIZE(tmu1_resources), - .archdata = { - .hwblk_id = HWBLK_TMU0, - }, }; static struct sh_timer_config tmu2_platform_data = { @@ -344,9 +326,6 @@ static struct platform_device tmu2_device = { }, .resource = tmu2_resources, .num_resources = ARRAY_SIZE(tmu2_resources), - .archdata = { - .hwblk_id = HWBLK_TMU0, - }, }; static struct sh_timer_config tmu3_platform_data = { @@ -374,9 +353,6 @@ static struct platform_device tmu3_device = { }, .resource = tmu3_resources, .num_resources = ARRAY_SIZE(tmu3_resources), - .archdata = { - .hwblk_id = HWBLK_TMU1, - }, }; static struct sh_timer_config tmu4_platform_data = { @@ -404,9 +380,6 @@ static struct platform_device tmu4_device = { }, .resource = tmu4_resources, .num_resources = ARRAY_SIZE(tmu4_resources), - .archdata = { - .hwblk_id = HWBLK_TMU1, - }, }; static struct sh_timer_config tmu5_platform_data = { @@ -434,9 +407,6 @@ static struct platform_device tmu5_device = { }, .resource = tmu5_resources, .num_resources = ARRAY_SIZE(tmu5_resources), - .archdata = { - .hwblk_id = HWBLK_TMU1, - }, }; static struct resource rtc_resources[] = { @@ -467,9 +437,6 @@ static struct platform_device rtc_device = { .id = -1, .num_resources = ARRAY_SIZE(rtc_resources), .resource = rtc_resources, - .archdata = { - .hwblk_id = HWBLK_RTC, - }, }; static struct r8a66597_platdata r8a66597_data = { @@ -499,9 +466,6 @@ static struct platform_device sh7723_usb_host_device = { }, .num_resources = ARRAY_SIZE(sh7723_usb_host_resources), .resource = sh7723_usb_host_resources, - .archdata = { - .hwblk_id = HWBLK_USB, - }, }; static struct resource iic_resources[] = { @@ -523,9 +487,6 @@ static struct platform_device iic_device = { .id = 0, /* "i2c0" clock */ .num_resources = ARRAY_SIZE(iic_resources), .resource = iic_resources, - .archdata = { - .hwblk_id = HWBLK_IIC, - }, }; static struct platform_device *sh7723_devices[] __initdata = { diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c index a37dd72c3671..4c671cfe68aa 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c @@ -214,7 +214,7 @@ static struct resource sh7724_dmae0_resources[] = { .flags = IORESOURCE_MEM, }, { - /* DMA error IRQ */ + .name = "error_irq", .start = 78, .end = 78, .flags = IORESOURCE_IRQ, @@ -248,7 +248,7 @@ static struct resource sh7724_dmae1_resources[] = { .flags = IORESOURCE_MEM, }, { - /* DMA error IRQ */ + .name = "error_irq", .start = 74, .end = 74, .flags = IORESOURCE_IRQ, @@ -275,9 +275,6 @@ static struct platform_device dma0_device = { .dev = { .platform_data = &dma_platform_data, }, - .archdata = { - .hwblk_id = HWBLK_DMAC0, - }, }; static struct platform_device dma1_device = { @@ -288,9 +285,6 @@ static struct platform_device dma1_device = { .dev = { .platform_data = &dma_platform_data, }, - .archdata = { - .hwblk_id = HWBLK_DMAC1, - }, }; /* Serial */ @@ -434,9 +428,6 @@ static struct platform_device rtc_device = { .id = -1, .num_resources = ARRAY_SIZE(rtc_resources), .resource = rtc_resources, - .archdata = { - .hwblk_id = HWBLK_RTC, - }, }; /* I2C0 */ @@ -459,9 +450,6 @@ static struct platform_device iic0_device = { .id = 0, /* "i2c0" clock */ .num_resources = ARRAY_SIZE(iic0_resources), .resource = iic0_resources, - .archdata = { - .hwblk_id = HWBLK_IIC0, - }, }; /* I2C1 */ @@ -484,9 +472,6 @@ static struct platform_device iic1_device = { .id = 1, /* "i2c1" clock */ .num_resources = ARRAY_SIZE(iic1_resources), .resource = iic1_resources, - .archdata = { - .hwblk_id = HWBLK_IIC1, - }, }; /* VPU */ @@ -516,9 +501,6 @@ static struct platform_device vpu_device = { }, .resource = vpu_resources, .num_resources = ARRAY_SIZE(vpu_resources), - .archdata = { - .hwblk_id = HWBLK_VPU, - }, }; /* VEU0 */ @@ -548,9 +530,6 @@ static struct platform_device veu0_device = { }, .resource = veu0_resources, .num_resources = ARRAY_SIZE(veu0_resources), - .archdata = { - .hwblk_id = HWBLK_VEU0, - }, }; /* VEU1 */ @@ -580,9 +559,6 @@ static struct platform_device veu1_device = { }, .resource = veu1_resources, .num_resources = ARRAY_SIZE(veu1_resources), - .archdata = { - .hwblk_id = HWBLK_VEU1, - }, }; /* BEU0 */ @@ -612,9 +588,6 @@ static struct platform_device beu0_device = { }, .resource = beu0_resources, .num_resources = ARRAY_SIZE(beu0_resources), - .archdata = { - .hwblk_id = HWBLK_BEU0, - }, }; /* BEU1 */ @@ -644,9 +617,6 @@ static struct platform_device beu1_device = { }, .resource = beu1_resources, .num_resources = ARRAY_SIZE(beu1_resources), - .archdata = { - .hwblk_id = HWBLK_BEU1, - }, }; static struct sh_timer_config cmt_platform_data = { @@ -676,9 +646,6 @@ static struct platform_device cmt_device = { }, .resource = cmt_resources, .num_resources = ARRAY_SIZE(cmt_resources), - .archdata = { - .hwblk_id = HWBLK_CMT, - }, }; static struct sh_timer_config tmu0_platform_data = { @@ -707,9 +674,6 @@ static struct platform_device tmu0_device = { }, .resource = tmu0_resources, .num_resources = ARRAY_SIZE(tmu0_resources), - .archdata = { - .hwblk_id = HWBLK_TMU0, - }, }; static struct sh_timer_config tmu1_platform_data = { @@ -738,9 +702,6 @@ static struct platform_device tmu1_device = { }, .resource = tmu1_resources, .num_resources = ARRAY_SIZE(tmu1_resources), - .archdata = { - .hwblk_id = HWBLK_TMU0, - }, }; static struct sh_timer_config tmu2_platform_data = { @@ -768,9 +729,6 @@ static struct platform_device tmu2_device = { }, .resource = tmu2_resources, .num_resources = ARRAY_SIZE(tmu2_resources), - .archdata = { - .hwblk_id = HWBLK_TMU0, - }, }; @@ -799,9 +757,6 @@ static struct platform_device tmu3_device = { }, .resource = tmu3_resources, .num_resources = ARRAY_SIZE(tmu3_resources), - .archdata = { - .hwblk_id = HWBLK_TMU1, - }, }; static struct sh_timer_config tmu4_platform_data = { @@ -829,9 +784,6 @@ static struct platform_device tmu4_device = { }, .resource = tmu4_resources, .num_resources = ARRAY_SIZE(tmu4_resources), - .archdata = { - .hwblk_id = HWBLK_TMU1, - }, }; static struct sh_timer_config tmu5_platform_data = { @@ -859,9 +811,6 @@ static struct platform_device tmu5_device = { }, .resource = tmu5_resources, .num_resources = ARRAY_SIZE(tmu5_resources), - .archdata = { - .hwblk_id = HWBLK_TMU1, - }, }; /* JPU */ @@ -891,9 +840,6 @@ static struct platform_device jpu_device = { }, .resource = jpu_resources, .num_resources = ARRAY_SIZE(jpu_resources), - .archdata = { - .hwblk_id = HWBLK_JPU, - }, }; /* SPU2DSP0 */ @@ -923,9 +869,6 @@ static struct platform_device spu0_device = { }, .resource = spu0_resources, .num_resources = ARRAY_SIZE(spu0_resources), - .archdata = { - .hwblk_id = HWBLK_SPU, - }, }; /* SPU2DSP1 */ @@ -955,9 +898,6 @@ static struct platform_device spu1_device = { }, .resource = spu1_resources, .num_resources = ARRAY_SIZE(spu1_resources), - .archdata = { - .hwblk_id = HWBLK_SPU, - }, }; static struct platform_device *sh7724_devices[] __initdata = { diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7757.c b/arch/sh/kernel/cpu/sh4a/setup-sh7757.c index 05559295d2ca..a7b2da6b3a1a 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7757.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7757.c @@ -465,6 +465,7 @@ static struct resource sh7757_dmae0_resources[] = { .flags = IORESOURCE_MEM, }, { + .name = "error_irq", .start = 34, .end = 34, .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE, @@ -486,7 +487,7 @@ static struct resource sh7757_dmae1_resources[] = { .flags = IORESOURCE_MEM, }, { - /* DMA error */ + .name = "error_irq", .start = 34, .end = 34, .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE, @@ -556,7 +557,7 @@ static struct resource sh7757_dmae2_resources[] = { .flags = IORESOURCE_MEM, }, { - /* DMA error */ + .name = "error_irq", .start = 323, .end = 323, .flags = IORESOURCE_IRQ, @@ -590,7 +591,7 @@ static struct resource sh7757_dmae3_resources[] = { .flags = IORESOURCE_MEM, }, { - /* DMA error */ + .name = "error_irq", .start = 324, .end = 324, .flags = IORESOURCE_IRQ, diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c index 3d4d2075c19a..d431b0052d0c 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c @@ -322,6 +322,7 @@ static struct resource sh7780_dmae0_resources[] = { }, { /* Real DMA error IRQ is 38, and channel IRQs are 34-37, 44-45 */ + .name = "error_irq", .start = 34, .end = 34, .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE, @@ -338,6 +339,7 @@ static struct resource sh7780_dmae1_resources[] = { /* DMAC1 has no DMARS */ { /* Real DMA error IRQ is 38, and channel IRQs are 46-47, 92-95 */ + .name = "error_irq", .start = 46, .end = 46, .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE, diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c index b29e6340414a..81588ef15a6c 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c @@ -376,6 +376,7 @@ static struct resource sh7785_dmae0_resources[] = { }, { /* Real DMA error IRQ is 39, and channel IRQs are 33-38 */ + .name = "error_irq", .start = 33, .end = 33, .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE, @@ -392,6 +393,7 @@ static struct resource sh7785_dmae1_resources[] = { /* DMAC1 has no DMARS */ { /* Real DMA error IRQ is 58, and channel IRQs are 52-57 */ + .name = "error_irq", .start = 52, .end = 52, .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE, diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7786.c b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c index dd5e709f9821..599022d73b28 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7786.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c @@ -518,7 +518,7 @@ static struct resource dmac0_resources[] = { .end = 0xfe00900b, .flags = IORESOURCE_MEM, }, { - /* DMA error IRQ */ + .name = "error_irq", .start = evt2irq(0x5c0), .end = evt2irq(0x5c0), .flags = IORESOURCE_IRQ, |