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-rw-r--r--arch/sh/mm/cache-sh4.c2
-rw-r--r--arch/sh/mm/cache-sh5.c2
-rw-r--r--arch/sh/mm/cache.c11
-rw-r--r--arch/sh/mm/init.c2
4 files changed, 14 insertions, 3 deletions
diff --git a/arch/sh/mm/cache-sh4.c b/arch/sh/mm/cache-sh4.c
index 92f87a460a81..df2eb87f1524 100644
--- a/arch/sh/mm/cache-sh4.c
+++ b/arch/sh/mm/cache-sh4.c
@@ -94,7 +94,7 @@ static void __init emit_cache_params(void)
/*
* SH-4 has virtually indexed and physically tagged cache.
*/
-void __init p3_cache_init(void)
+void __init sh4_cache_init(void)
{
compute_alias(&boot_cpu_data.icache);
compute_alias(&boot_cpu_data.dcache);
diff --git a/arch/sh/mm/cache-sh5.c b/arch/sh/mm/cache-sh5.c
index 28f3c8fb1b99..576cad04b11b 100644
--- a/arch/sh/mm/cache-sh5.c
+++ b/arch/sh/mm/cache-sh5.c
@@ -23,7 +23,7 @@
/* Wired TLB entry for the D-cache */
static unsigned long long dtlb_cache_slot;
-void __init p3_cache_init(void)
+void __init cpu_cache_init(void)
{
/* Reserve a slot for dcache colouring in the DTLB */
dtlb_cache_slot = sh64_get_wired_dtlb_entry();
diff --git a/arch/sh/mm/cache.c b/arch/sh/mm/cache.c
index f51d0a4eb3ba..659981ffae24 100644
--- a/arch/sh/mm/cache.c
+++ b/arch/sh/mm/cache.c
@@ -127,3 +127,14 @@ void __flush_anon_page(struct page *page, unsigned long vmaddr)
__flush_wback_region((void *)addr, PAGE_SIZE);
}
}
+
+void __init cpu_cache_init(void)
+{
+ if ((boot_cpu_data.family == CPU_FAMILY_SH4) ||
+ (boot_cpu_data.family == CPU_FAMILY_SH4A) ||
+ (boot_cpu_data.family == CPU_FAMILY_SH4AL_DSP)) {
+ extern void __weak sh4_cache_init(void);
+
+ sh4_cache_init();
+ }
+}
diff --git a/arch/sh/mm/init.c b/arch/sh/mm/init.c
index fe532aeaa16d..cf0e9c5146b1 100644
--- a/arch/sh/mm/init.c
+++ b/arch/sh/mm/init.c
@@ -230,7 +230,7 @@ void __init mem_init(void)
datasize >> 10,
initsize >> 10);
- p3_cache_init();
+ cpu_cache_init();
/* Initialize the vDSO */
vsyscall_init();