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-rw-r--r--arch/Kconfig30
-rw-r--r--arch/alpha/include/asm/machvec.h2
-rw-r--r--arch/alpha/include/asm/mman.h4
-rw-r--r--arch/alpha/include/asm/pci.h7
-rw-r--r--arch/alpha/include/asm/socket.h4
-rw-r--r--arch/alpha/kernel/binfmt_loader.c3
-rw-r--r--arch/alpha/kernel/pci.c86
-rw-r--r--arch/alpha/kernel/pci_impl.h3
-rw-r--r--arch/alpha/kernel/perf_event.c4
-rw-r--r--arch/alpha/kernel/srmcons.c78
-rw-r--r--arch/alpha/kernel/sys_dp264.c2
-rw-r--r--arch/alpha/kernel/sys_marvel.c3
-rw-r--r--arch/alpha/kernel/sys_titan.c3
-rw-r--r--arch/arm/Kconfig36
-rw-r--r--arch/arm/Makefile2
-rw-r--r--arch/arm/boot/compressed/head.S2
-rw-r--r--arch/arm/boot/dts/highbank.dts8
-rw-r--r--arch/arm/boot/dts/imx6q.dtsi6
-rw-r--r--arch/arm/boot/dts/testcases/tests-phandle.dtsi2
-rw-r--r--arch/arm/common/gic.c95
-rw-r--r--arch/arm/common/it8152.c4
-rw-r--r--arch/arm/common/vic.c16
-rw-r--r--arch/arm/configs/imx_v4_v5_defconfig1
-rw-r--r--arch/arm/configs/lpc32xx_defconfig145
-rw-r--r--arch/arm/configs/mini2440_defconfig2
-rw-r--r--arch/arm/configs/s3c2410_defconfig57
-rw-r--r--arch/arm/configs/tct_hammer_defconfig2
-rw-r--r--arch/arm/include/asm/hardware/arm_timer.h5
-rw-r--r--arch/arm/include/asm/hardware/entry-macro-iomd.S8
-rw-r--r--arch/arm/include/asm/hardware/gic.h4
-rw-r--r--arch/arm/include/asm/hardware/vic.h2
-rw-r--r--arch/arm/include/asm/highmem.h2
-rw-r--r--arch/arm/include/asm/localtimer.h37
-rw-r--r--arch/arm/include/asm/pci.h8
-rw-r--r--arch/arm/include/asm/perf_event.h4
-rw-r--r--arch/arm/include/asm/pgtable-nommu.h1
-rw-r--r--arch/arm/include/asm/smp_twd.h25
-rw-r--r--arch/arm/include/asm/socket.h4
-rw-r--r--arch/arm/kernel/Makefile3
-rw-r--r--arch/arm/kernel/bios32.c75
-rw-r--r--arch/arm/kernel/entry-armv.S3
-rw-r--r--arch/arm/kernel/entry-common.S8
-rw-r--r--arch/arm/kernel/perf_event.c4
-rw-r--r--arch/arm/kernel/process.c7
-rw-r--r--arch/arm/kernel/smp.c29
-rw-r--r--arch/arm/kernel/smp_twd.c123
-rw-r--r--arch/arm/mach-at91/cpuidle.c11
-rw-r--r--arch/arm/mach-at91/include/mach/entry-macro.S6
-rw-r--r--arch/arm/mach-at91/pm.c12
-rw-r--r--arch/arm/mach-at91/pm.h73
-rw-r--r--arch/arm/mach-bcmring/dma.c1
-rw-r--r--arch/arm/mach-bcmring/include/mach/entry-macro.S6
-rw-r--r--arch/arm/mach-clps711x/include/mach/entry-macro.S6
-rw-r--r--arch/arm/mach-cns3xxx/include/mach/entry-macro.S15
-rw-r--r--arch/arm/mach-cns3xxx/pcie.c4
-rw-r--r--arch/arm/mach-davinci/board-dm355-evm.c3
-rw-r--r--arch/arm/mach-davinci/board-dm355-leopard.c3
-rw-r--r--arch/arm/mach-davinci/board-dm365-evm.c3
-rw-r--r--arch/arm/mach-davinci/board-dm644x-evm.c28
-rw-r--r--arch/arm/mach-davinci/board-dm646x-evm.c32
-rw-r--r--arch/arm/mach-davinci/board-neuros-osd2.c3
-rw-r--r--arch/arm/mach-davinci/board-sffsdr.c3
-rw-r--r--arch/arm/mach-davinci/cpufreq.c2
-rw-r--r--arch/arm/mach-davinci/da850.c2
-rw-r--r--arch/arm/mach-davinci/davinci.h96
-rw-r--r--arch/arm/mach-davinci/devices.c32
-rw-r--r--arch/arm/mach-davinci/dm355.c3
-rw-r--r--arch/arm/mach-davinci/dm365.c19
-rw-r--r--arch/arm/mach-davinci/dm644x.c53
-rw-r--r--arch/arm/mach-davinci/dm646x.c21
-rw-r--r--arch/arm/mach-davinci/dma.c6
-rw-r--r--arch/arm/mach-davinci/include/mach/dm355.h32
-rw-r--r--arch/arm/mach-davinci/include/mach/dm365.h53
-rw-r--r--arch/arm/mach-davinci/include/mach/dm644x.h47
-rw-r--r--arch/arm/mach-davinci/include/mach/dm646x.h42
-rw-r--r--arch/arm/mach-davinci/include/mach/edma.h5
-rw-r--r--arch/arm/mach-davinci/include/mach/entry-macro.S6
-rw-r--r--arch/arm/mach-davinci/include/mach/hardware.h2
-rw-r--r--arch/arm/mach-dove/include/mach/entry-macro.S6
-rw-r--r--arch/arm/mach-dove/pcie.c4
-rw-r--r--arch/arm/mach-ebsa110/include/mach/entry-macro.S6
-rw-r--r--arch/arm/mach-ep93xx/Makefile3
-rw-r--r--arch/arm/mach-ep93xx/adssphere.c1
-rw-r--r--arch/arm/mach-ep93xx/clock.c1
-rw-r--r--arch/arm/mach-ep93xx/core.c54
-rw-r--r--arch/arm/mach-ep93xx/crunch-bits.S (renamed from arch/arm/kernel/crunch-bits.S)0
-rw-r--r--arch/arm/mach-ep93xx/crunch.c (renamed from arch/arm/kernel/crunch.c)4
-rw-r--r--arch/arm/mach-ep93xx/dma.c2
-rw-r--r--arch/arm/mach-ep93xx/edb93xx.c1
-rw-r--r--arch/arm/mach-ep93xx/gesbc9312.c1
-rw-r--r--arch/arm/mach-ep93xx/include/mach/entry-macro.S17
-rw-r--r--arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h191
-rw-r--r--arch/arm/mach-ep93xx/include/mach/gpio-ep93xx.h10
-rw-r--r--arch/arm/mach-ep93xx/include/mach/hardware.h1
-rw-r--r--arch/arm/mach-ep93xx/include/mach/platform.h16
-rw-r--r--arch/arm/mach-ep93xx/micro9.c1
-rw-r--r--arch/arm/mach-ep93xx/simone.c2
-rw-r--r--arch/arm/mach-ep93xx/snappercl15.c2
-rw-r--r--arch/arm/mach-ep93xx/soc.h213
-rw-r--r--arch/arm/mach-ep93xx/ts72xx.c1
-rw-r--r--arch/arm/mach-ep93xx/vision_ep9307.c2
-rw-r--r--arch/arm/mach-exynos/Kconfig10
-rw-r--r--arch/arm/mach-exynos/Makefile2
-rw-r--r--arch/arm/mach-exynos/common.c2
-rw-r--r--arch/arm/mach-exynos/dev-pd.c139
-rw-r--r--arch/arm/mach-exynos/include/mach/cpufreq.h2
-rw-r--r--arch/arm/mach-exynos/include/mach/entry-macro.S16
-rw-r--r--arch/arm/mach-exynos/mach-nuri.c11
-rw-r--r--arch/arm/mach-exynos/mach-origen.c14
-rw-r--r--arch/arm/mach-exynos/mach-smdkv310.c12
-rw-r--r--arch/arm/mach-exynos/mach-universal_c210.c17
-rw-r--r--arch/arm/mach-exynos/mct.c18
-rw-r--r--arch/arm/mach-exynos/pm_domains.c195
-rw-r--r--arch/arm/mach-footbridge/dc21285.c8
-rw-r--r--arch/arm/mach-footbridge/include/mach/entry-macro.S6
-rw-r--r--arch/arm/mach-gemini/include/mach/entry-macro.S6
-rw-r--r--arch/arm/mach-h720x/include/mach/entry-macro.S6
-rw-r--r--arch/arm/mach-highbank/Makefile1
-rw-r--r--arch/arm/mach-highbank/highbank.c3
-rw-r--r--arch/arm/mach-highbank/include/mach/entry-macro.S5
-rw-r--r--arch/arm/mach-highbank/localtimer.c40
-rw-r--r--arch/arm/mach-imx/Kconfig6
-rw-r--r--arch/arm/mach-imx/Makefile1
-rw-r--r--arch/arm/mach-imx/clock-imx27.c2
-rw-r--r--arch/arm/mach-imx/clock-imx31.c2
-rw-r--r--arch/arm/mach-imx/clock-imx35.c166
-rw-r--r--arch/arm/mach-imx/cpu_op-mx51.c1
-rw-r--r--arch/arm/mach-imx/crmregs-imx3.h (renamed from arch/arm/mach-imx/crmregs-imx31.h)15
-rw-r--r--arch/arm/mach-imx/devices-imx27.h2
-rw-r--r--arch/arm/mach-imx/eukrea_mbimx27-baseboard.c20
-rw-r--r--arch/arm/mach-imx/eukrea_mbimxsd-baseboard.c1
-rw-r--r--arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c17
-rw-r--r--arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c17
-rw-r--r--arch/arm/mach-imx/imx51-dt.c4
-rw-r--r--arch/arm/mach-imx/imx53-dt.c4
-rw-r--r--arch/arm/mach-imx/localtimer.c35
-rw-r--r--arch/arm/mach-imx/mach-armadillo5x0.c2
-rw-r--r--arch/arm/mach-imx/mach-imx27_visstrim_m10.c1
-rw-r--r--arch/arm/mach-imx/mach-imx6q.c5
-rw-r--r--arch/arm/mach-imx/mach-pca100.c13
-rw-r--r--arch/arm/mach-imx/mach-pcm037.c9
-rw-r--r--arch/arm/mach-imx/mach-pcm038.c2
-rw-r--r--arch/arm/mach-imx/mach-pcm043.c13
-rw-r--r--arch/arm/mach-imx/mm-imx21.c6
-rw-r--r--arch/arm/mach-imx/mm-imx25.c7
-rw-r--r--arch/arm/mach-imx/mm-imx27.c7
-rw-r--r--arch/arm/mach-imx/mm-imx3.c17
-rw-r--r--arch/arm/mach-imx/mm-imx5.c24
-rw-r--r--arch/arm/mach-imx/mx31moboard-devboard.c24
-rw-r--r--arch/arm/mach-imx/mx31moboard-marxbot.c24
-rw-r--r--arch/arm/mach-integrator/include/mach/entry-macro.S6
-rw-r--r--arch/arm/mach-integrator/pci_v3.c7
-rw-r--r--arch/arm/mach-iop13xx/include/mach/entry-macro.S3
-rw-r--r--arch/arm/mach-iop13xx/pci.c4
-rw-r--r--arch/arm/mach-iop32x/include/mach/entry-macro.S3
-rw-r--r--arch/arm/mach-iop33x/include/mach/entry-macro.S3
-rw-r--r--arch/arm/mach-ixp2000/include/mach/entry-macro.S6
-rw-r--r--arch/arm/mach-ixp2000/ixdp2400.c4
-rw-r--r--arch/arm/mach-ixp2000/ixdp2800.c4
-rw-r--r--arch/arm/mach-ixp2000/ixdp2x00.c4
-rw-r--r--arch/arm/mach-ixp2000/pci.c6
-rw-r--r--arch/arm/mach-ixp23xx/include/mach/entry-macro.S6
-rw-r--r--arch/arm/mach-ixp23xx/pci.c6
-rw-r--r--arch/arm/mach-ixp4xx/common-pci.c4
-rw-r--r--arch/arm/mach-ixp4xx/include/mach/entry-macro.S6
-rw-r--r--arch/arm/mach-kirkwood/include/mach/entry-macro.S6
-rw-r--r--arch/arm/mach-kirkwood/openrd-setup.c6
-rw-r--r--arch/arm/mach-kirkwood/pcie.c4
-rw-r--r--arch/arm/mach-kirkwood/t5325-setup.c6
-rw-r--r--arch/arm/mach-ks8695/include/mach/entry-macro.S6
-rw-r--r--arch/arm/mach-ks8695/leds.c1
-rw-r--r--arch/arm/mach-ks8695/pci.c4
-rw-r--r--arch/arm/mach-lpc32xx/clock.c62
-rw-r--r--arch/arm/mach-lpc32xx/common.h1
-rw-r--r--arch/arm/mach-lpc32xx/include/mach/entry-macro.S6
-rw-r--r--arch/arm/mach-lpc32xx/include/mach/platform.h51
-rw-r--r--arch/arm/mach-lpc32xx/phy3250.c2
-rw-r--r--arch/arm/mach-lpc32xx/pm.c2
-rw-r--r--arch/arm/mach-lpc32xx/timer.c48
-rw-r--r--arch/arm/mach-mmp/include/mach/entry-macro.S6
-rw-r--r--arch/arm/mach-msm/board-msm8x60.c8
-rw-r--r--arch/arm/mach-msm/include/mach/entry-macro.S6
-rw-r--r--arch/arm/mach-msm/timer.c79
-rw-r--r--arch/arm/mach-mv78xx0/include/mach/entry-macro.S6
-rw-r--r--arch/arm/mach-mv78xx0/pcie.c4
-rw-r--r--arch/arm/mach-mxs/include/mach/entry-macro.S6
-rw-r--r--arch/arm/mach-netx/include/mach/entry-macro.S26
-rw-r--r--arch/arm/mach-nomadik/include/mach/entry-macro.S13
-rw-r--r--arch/arm/mach-omap1/Kconfig3
-rw-r--r--arch/arm/mach-omap1/Makefile4
-rw-r--r--arch/arm/mach-omap1/ams-delta-fiq-handler.S3
-rw-r--r--arch/arm/mach-omap1/ams-delta-fiq.c1
-rw-r--r--arch/arm/mach-omap1/board-ams-delta.c19
-rw-r--r--arch/arm/mach-omap1/board-fsample.c22
-rw-r--r--arch/arm/mach-omap1/board-h2.c21
-rw-r--r--arch/arm/mach-omap1/board-h3.c17
-rw-r--r--arch/arm/mach-omap1/board-htcherald.c14
-rw-r--r--arch/arm/mach-omap1/board-innovator.c18
-rw-r--r--arch/arm/mach-omap1/board-nokia770.c25
-rw-r--r--arch/arm/mach-omap1/board-osk.c21
-rw-r--r--arch/arm/mach-omap1/board-palmte.c14
-rw-r--r--arch/arm/mach-omap1/board-palmtt.c19
-rw-r--r--arch/arm/mach-omap1/board-palmz71.c19
-rw-r--r--arch/arm/mach-omap1/board-perseus2.c22
-rw-r--r--arch/arm/mach-omap1/board-sx1.c22
-rw-r--r--arch/arm/mach-omap1/board-voiceblue.c6
-rw-r--r--arch/arm/mach-omap1/clock.c5
-rw-r--r--arch/arm/mach-omap1/clock_data.c5
-rw-r--r--arch/arm/mach-omap1/common.h1
-rw-r--r--arch/arm/mach-omap1/devices.c17
-rw-r--r--arch/arm/mach-omap1/dma.c2
-rw-r--r--arch/arm/mach-omap1/flash.c4
-rw-r--r--arch/arm/mach-omap1/fpga.c5
-rw-r--r--arch/arm/mach-omap1/gpio15xx.c7
-rw-r--r--arch/arm/mach-omap1/gpio16xx.c47
-rw-r--r--arch/arm/mach-omap1/gpio7xx.c14
-rw-r--r--arch/arm/mach-omap1/id.c3
-rw-r--r--arch/arm/mach-omap1/include/mach/entry-macro.S8
-rw-r--r--arch/arm/mach-omap1/include/mach/hardware.h36
-rw-r--r--arch/arm/mach-omap1/include/mach/io.h43
-rw-r--r--arch/arm/mach-omap1/include/mach/memory.h3
-rw-r--r--arch/arm/mach-omap1/io.c5
-rw-r--r--arch/arm/mach-omap1/iomap.h42
-rw-r--r--arch/arm/mach-omap1/irq.c4
-rw-r--r--arch/arm/mach-omap1/lcd_dma.c5
-rw-r--r--arch/arm/mach-omap1/mcbsp.c19
-rw-r--r--arch/arm/mach-omap1/pm.c4
-rw-r--r--arch/arm/mach-omap1/reset.c3
-rw-r--r--arch/arm/mach-omap1/sleep.S4
-rw-r--r--arch/arm/mach-omap1/sram.S4
-rw-r--r--arch/arm/mach-omap1/time.c3
-rw-r--r--arch/arm/mach-omap1/timer32k.c7
-rw-r--r--arch/arm/mach-omap2/Kconfig4
-rw-r--r--arch/arm/mach-omap2/Makefile14
-rw-r--r--arch/arm/mach-omap2/board-2430sdp.c2
-rw-r--r--arch/arm/mach-omap2/board-3430sdp.c5
-rw-r--r--arch/arm/mach-omap2/board-4430sdp.c34
-rw-r--r--arch/arm/mach-omap2/board-am3517evm.c2
-rw-r--r--arch/arm/mach-omap2/board-cm-t35.c6
-rw-r--r--arch/arm/mach-omap2/board-devkit8000.c4
-rw-r--r--arch/arm/mach-omap2/board-flash.c2
-rw-r--r--arch/arm/mach-omap2/board-generic.c2
-rw-r--r--arch/arm/mach-omap2/board-igep0020.c6
-rw-r--r--arch/arm/mach-omap2/board-ldp.c3
-rw-r--r--arch/arm/mach-omap2/board-n8x0.c9
-rw-r--r--arch/arm/mach-omap2/board-omap3beagle.c10
-rw-r--r--arch/arm/mach-omap2/board-omap3evm.c7
-rw-r--r--arch/arm/mach-omap2/board-omap3logic.c2
-rw-r--r--arch/arm/mach-omap2/board-omap3pandora.c15
-rw-r--r--arch/arm/mach-omap2/board-omap3stalker.c15
-rw-r--r--arch/arm/mach-omap2/board-omap3touchbook.c17
-rw-r--r--arch/arm/mach-omap2/board-omap4panda.c66
-rw-r--r--arch/arm/mach-omap2/board-overo.c3
-rw-r--r--arch/arm/mach-omap2/board-rm680.c2
-rw-r--r--arch/arm/mach-omap2/board-rx51-peripherals.c5
-rw-r--r--arch/arm/mach-omap2/board-zoom-display.c5
-rw-r--r--arch/arm/mach-omap2/board-zoom-peripherals.c4
-rw-r--r--arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c1
-rw-r--r--arch/arm/mach-omap2/clkt_clksel.c1
-rw-r--r--arch/arm/mach-omap2/clkt_dpll.c1
-rw-r--r--arch/arm/mach-omap2/clock2420_data.c3
-rw-r--r--arch/arm/mach-omap2/clock2430.c2
-rw-r--r--arch/arm/mach-omap2/clock2430_data.c2
-rw-r--r--arch/arm/mach-omap2/clock2xxx.c1
-rw-r--r--arch/arm/mach-omap2/clock3xxx.c1
-rw-r--r--arch/arm/mach-omap2/clock3xxx_data.c3
-rw-r--r--arch/arm/mach-omap2/clock44xx_data.c3
-rw-r--r--arch/arm/mach-omap2/cm2xxx_3xxx.c4
-rw-r--r--arch/arm/mach-omap2/cm44xx.c2
-rw-r--r--arch/arm/mach-omap2/cminst44xx.c2
-rw-r--r--arch/arm/mach-omap2/common-board-devices.c9
-rw-r--r--arch/arm/mach-omap2/common.c5
-rw-r--r--arch/arm/mach-omap2/common.h7
-rw-r--r--arch/arm/mach-omap2/control.c4
-rw-r--r--arch/arm/mach-omap2/control.h6
-rw-r--r--arch/arm/mach-omap2/devices.c40
-rw-r--r--arch/arm/mach-omap2/display.c9
-rw-r--r--arch/arm/mach-omap2/dma.c2
-rw-r--r--arch/arm/mach-omap2/emu.c4
-rw-r--r--arch/arm/mach-omap2/gpio.c38
-rw-r--r--arch/arm/mach-omap2/gpmc-nand.c1
-rw-r--r--arch/arm/mach-omap2/gpmc-onenand.c1
-rw-r--r--arch/arm/mach-omap2/gpmc-smsc911x.c11
-rw-r--r--arch/arm/mach-omap2/gpmc.c2
-rw-r--r--arch/arm/mach-omap2/hsmmc.c123
-rw-r--r--arch/arm/mach-omap2/hsmmc.h12
-rw-r--r--arch/arm/mach-omap2/id.c2
-rw-r--r--arch/arm/mach-omap2/include/mach/entry-macro.S18
-rw-r--r--arch/arm/mach-omap2/include/mach/io.h46
-rw-r--r--arch/arm/mach-omap2/io.c60
-rw-r--r--arch/arm/mach-omap2/iomap.h (renamed from arch/arm/plat-omap/include/plat/io.h)80
-rw-r--r--arch/arm/mach-omap2/irq.c5
-rw-r--r--arch/arm/mach-omap2/mcbsp.c56
-rw-r--r--arch/arm/mach-omap2/mux.c16
-rw-r--r--arch/arm/mach-omap2/mux.h2
-rw-r--r--arch/arm/mach-omap2/omap-hotplug.c2
-rw-r--r--arch/arm/mach-omap2/omap-mpuss-lowpower.c4
-rw-r--r--arch/arm/mach-omap2/omap-smp.c3
-rw-r--r--arch/arm/mach-omap2/omap-wakeupgen.c53
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_44xx_data.c1
-rw-r--r--arch/arm/mach-omap2/opp2420_data.c2
-rw-r--r--arch/arm/mach-omap2/opp2430_data.c2
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-rw-r--r--arch/x86/lib/atomic64_32.c59
-rw-r--r--arch/x86/lib/atomic64_386_32.S6
-rw-r--r--arch/x86/lib/atomic64_cx8_32.S29
-rw-r--r--arch/x86/lib/copy_page_64.S12
-rw-r--r--arch/x86/lib/inat.c36
-rw-r--r--arch/x86/lib/insn.c13
-rw-r--r--arch/x86/lib/memcpy_64.S44
-rw-r--r--arch/x86/lib/memset_64.S33
-rw-r--r--arch/x86/lib/usercopy_32.c4
-rw-r--r--arch/x86/mm/highmem_32.c4
-rw-r--r--arch/x86/mm/hugetlbpage.c28
-rw-r--r--arch/x86/mm/kmemcheck/selftest.c1
-rw-r--r--arch/x86/mm/numa_emulation.c4
-rw-r--r--arch/x86/net/bpf_jit_comp.c14
-rw-r--r--arch/x86/pci/acpi.c7
-rw-r--r--arch/x86/pci/fixup.c12
-rw-r--r--arch/x86/pci/i386.c85
-rw-r--r--arch/x86/pci/mrst.c40
-rw-r--r--arch/x86/pci/xen.c27
-rw-r--r--arch/x86/platform/efi/efi.c377
-rw-r--r--arch/x86/platform/geode/Makefile1
-rw-r--r--arch/x86/platform/geode/alix.c76
-rw-r--r--arch/x86/platform/geode/net5501.c154
-rw-r--r--arch/x86/platform/mrst/Makefile1
-rw-r--r--arch/x86/platform/mrst/mrst.c86
-rw-r--r--arch/x86/platform/mrst/pmu.c817
-rw-r--r--arch/x86/platform/mrst/pmu.h234
-rw-r--r--arch/x86/platform/olpc/olpc-xo15-sci.c72
-rw-r--r--arch/x86/platform/scx200/scx200_32.c24
-rw-r--r--arch/x86/platform/uv/uv_time.c6
-rw-r--r--arch/x86/power/cpu.c1
-rw-r--r--arch/x86/syscalls/syscall_32.tbl2
-rw-r--r--arch/x86/um/mem_32.c8
-rw-r--r--arch/x86/um/vdso/vma.c3
-rw-r--r--arch/x86/vdso/vdso32-setup.c17
-rw-r--r--arch/x86/vdso/vma.c3
-rw-r--r--arch/x86/xen/enlighten.c99
-rw-r--r--arch/x86/xen/irq.c8
-rw-r--r--arch/x86/xen/mmu.c20
-rw-r--r--arch/x86/xen/multicalls.h2
-rw-r--r--arch/x86/xen/setup.c3
-rw-r--r--arch/x86/xen/smp.c8
-rw-r--r--arch/xtensa/include/asm/mman.h4
-rw-r--r--arch/xtensa/include/asm/socket.h4
-rw-r--r--arch/xtensa/kernel/pci.c17
-rw-r--r--arch/xtensa/kernel/process.c4
-rw-r--r--arch/xtensa/kernel/signal.c35
-rw-r--r--arch/xtensa/platforms/iss/console.c22
1485 files changed, 27435 insertions, 37529 deletions
diff --git a/arch/Kconfig b/arch/Kconfig
index 4f55c736be11..a6f14f622d13 100644
--- a/arch/Kconfig
+++ b/arch/Kconfig
@@ -47,18 +47,29 @@ config KPROBES
If in doubt, say "N".
config JUMP_LABEL
- bool "Optimize trace point call sites"
+ bool "Optimize very unlikely/likely branches"
depends on HAVE_ARCH_JUMP_LABEL
help
+ This option enables a transparent branch optimization that
+ makes certain almost-always-true or almost-always-false branch
+ conditions even cheaper to execute within the kernel.
+
+ Certain performance-sensitive kernel code, such as trace points,
+ scheduler functionality, networking code and KVM have such
+ branches and include support for this optimization technique.
+
If it is detected that the compiler has support for "asm goto",
- the kernel will compile trace point locations with just a
- nop instruction. When trace points are enabled, the nop will
- be converted to a jump to the trace function. This technique
- lowers overhead and stress on the branch prediction of the
- processor.
+ the kernel will compile such branches with just a nop
+ instruction. When the condition flag is toggled to true, the
+ nop will be converted to a jump instruction to execute the
+ conditional block of instructions.
+
+ This technique lowers overhead and stress on the branch prediction
+ of the processor and generally makes the kernel faster. The update
+ of the condition is slower, but those are always very rare.
- On i386, options added to the compiler flags may increase
- the size of the kernel slightly.
+ ( On 32-bit x86, the necessary options added to the compiler
+ flags may increase the size of the kernel slightly. )
config OPTPROBES
def_bool y
@@ -109,6 +120,9 @@ config HAVE_KRETPROBES
config HAVE_OPTPROBES
bool
+
+config HAVE_NMI_WATCHDOG
+ bool
#
# An arch should select this if it provides all these things:
#
diff --git a/arch/alpha/include/asm/machvec.h b/arch/alpha/include/asm/machvec.h
index 13cd42743810..72dbf2359270 100644
--- a/arch/alpha/include/asm/machvec.h
+++ b/arch/alpha/include/asm/machvec.h
@@ -90,7 +90,7 @@ struct alpha_machine_vector
void (*kill_arch)(int);
u8 (*pci_swizzle)(struct pci_dev *, u8 *);
- int (*pci_map_irq)(struct pci_dev *, u8, u8);
+ int (*pci_map_irq)(const struct pci_dev *, u8, u8);
struct pci_ops *pci_ops;
struct _alpha_agp_info *(*agp_info)(void);
diff --git a/arch/alpha/include/asm/mman.h b/arch/alpha/include/asm/mman.h
index 72db984f8781..cbeb3616a28e 100644
--- a/arch/alpha/include/asm/mman.h
+++ b/arch/alpha/include/asm/mman.h
@@ -56,6 +56,10 @@
#define MADV_HUGEPAGE 14 /* Worth backing with hugepages */
#define MADV_NOHUGEPAGE 15 /* Not worth backing with hugepages */
+#define MADV_DONTDUMP 16 /* Explicity exclude from the core dump,
+ overrides the coredump filter bits */
+#define MADV_DODUMP 17 /* Clear the MADV_NODUMP flag */
+
/* compatibility flags */
#define MAP_FILE 0
diff --git a/arch/alpha/include/asm/pci.h b/arch/alpha/include/asm/pci.h
index 28d0497fd3c7..d01afb78919c 100644
--- a/arch/alpha/include/asm/pci.h
+++ b/arch/alpha/include/asm/pci.h
@@ -7,6 +7,7 @@
#include <linux/dma-mapping.h>
#include <asm/scatterlist.h>
#include <asm/machvec.h>
+#include <asm-generic/pci-bridge.h>
/*
* The following structure is used to manage multiple PCI busses.
@@ -99,12 +100,6 @@ static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
return channel ? 15 : 14;
}
-extern void pcibios_resource_to_bus(struct pci_dev *, struct pci_bus_region *,
- struct resource *);
-
-extern void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
- struct pci_bus_region *region);
-
#define pci_domain_nr(bus) ((struct pci_controller *)(bus)->sysdata)->index
static inline int pci_proc_domain(struct pci_bus *bus)
diff --git a/arch/alpha/include/asm/socket.h b/arch/alpha/include/asm/socket.h
index 082355f159e6..dcb221a4b5be 100644
--- a/arch/alpha/include/asm/socket.h
+++ b/arch/alpha/include/asm/socket.h
@@ -71,6 +71,10 @@
#define SO_WIFI_STATUS 41
#define SCM_WIFI_STATUS SO_WIFI_STATUS
+#define SO_PEEK_OFF 42
+
+/* Instruct lower device to use last 4-bytes of skb data as FCS */
+#define SO_NOFCS 43
/* O_NONBLOCK clashes with the bits used for socket types. Therefore we
* have to define SOCK_NONBLOCK to a different value here.
diff --git a/arch/alpha/kernel/binfmt_loader.c b/arch/alpha/kernel/binfmt_loader.c
index 3fcfad410130..d1f474d1d44d 100644
--- a/arch/alpha/kernel/binfmt_loader.c
+++ b/arch/alpha/kernel/binfmt_loader.c
@@ -46,6 +46,7 @@ static struct linux_binfmt loader_format = {
static int __init init_loader_binfmt(void)
{
- return insert_binfmt(&loader_format);
+ insert_binfmt(&loader_format);
+ return 0;
}
arch_initcall(init_loader_binfmt);
diff --git a/arch/alpha/kernel/pci.c b/arch/alpha/kernel/pci.c
index 8c723c1b086a..1a629636cc16 100644
--- a/arch/alpha/kernel/pci.c
+++ b/arch/alpha/kernel/pci.c
@@ -43,12 +43,10 @@ const char *const pci_mem_names[] = {
const char pci_hae0_name[] = "HAE0";
-/* Indicate whether we respect the PCI setup left by console. */
/*
- * Make this long-lived so that we know when shutting down
- * whether we probed only or not.
+ * If PCI_PROBE_ONLY in pci_flags is set, we don't change any PCI resource
+ * assignments.
*/
-int pci_probe_only;
/*
* The PCI controller list.
@@ -215,7 +213,7 @@ pdev_save_srm_config(struct pci_dev *dev)
struct pdev_srm_saved_conf *tmp;
static int printed = 0;
- if (!alpha_using_srm || pci_probe_only)
+ if (!alpha_using_srm || pci_has_flag(PCI_PROBE_ONLY))
return;
if (!printed) {
@@ -242,7 +240,7 @@ pci_restore_srm_config(void)
struct pdev_srm_saved_conf *tmp;
/* No need to restore if probed only. */
- if (pci_probe_only)
+ if (pci_has_flag(PCI_PROBE_ONLY))
return;
/* Restore SRM config. */
@@ -253,46 +251,17 @@ pci_restore_srm_config(void)
#endif
void __devinit
-pcibios_fixup_resource(struct resource *res, struct resource *root)
-{
- res->start += root->start;
- res->end += root->start;
-}
-
-void __devinit
-pcibios_fixup_device_resources(struct pci_dev *dev, struct pci_bus *bus)
-{
- /* Update device resources. */
- struct pci_controller *hose = (struct pci_controller *)bus->sysdata;
- int i;
-
- for (i = 0; i < PCI_NUM_RESOURCES; i++) {
- if (!dev->resource[i].start)
- continue;
- if (dev->resource[i].flags & IORESOURCE_IO)
- pcibios_fixup_resource(&dev->resource[i],
- hose->io_space);
- else if (dev->resource[i].flags & IORESOURCE_MEM)
- pcibios_fixup_resource(&dev->resource[i],
- hose->mem_space);
- }
-}
-
-void __devinit
pcibios_fixup_bus(struct pci_bus *bus)
{
struct pci_dev *dev = bus->self;
- if (pci_probe_only && dev &&
+ if (pci_has_flag(PCI_PROBE_ONLY) && dev &&
(dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) {
pci_read_bridge_bases(bus);
- pcibios_fixup_device_resources(dev, bus);
}
list_for_each_entry(dev, &bus->devices, bus_list) {
pdev_save_srm_config(dev);
- if ((dev->class >> 8) != PCI_CLASS_BRIDGE_PCI)
- pcibios_fixup_device_resources(dev, bus);
}
}
@@ -302,42 +271,6 @@ pcibios_update_irq(struct pci_dev *dev, int irq)
pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
}
-void
-pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
- struct resource *res)
-{
- struct pci_controller *hose = (struct pci_controller *)dev->sysdata;
- unsigned long offset = 0;
-
- if (res->flags & IORESOURCE_IO)
- offset = hose->io_space->start;
- else if (res->flags & IORESOURCE_MEM)
- offset = hose->mem_space->start;
-
- region->start = res->start - offset;
- region->end = res->end - offset;
-}
-
-void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
- struct pci_bus_region *region)
-{
- struct pci_controller *hose = (struct pci_controller *)dev->sysdata;
- unsigned long offset = 0;
-
- if (res->flags & IORESOURCE_IO)
- offset = hose->io_space->start;
- else if (res->flags & IORESOURCE_MEM)
- offset = hose->mem_space->start;
-
- res->start = region->start + offset;
- res->end = region->end + offset;
-}
-
-#ifdef CONFIG_HOTPLUG
-EXPORT_SYMBOL(pcibios_resource_to_bus);
-EXPORT_SYMBOL(pcibios_bus_to_resource);
-#endif
-
int
pcibios_enable_device(struct pci_dev *dev, int mask)
{
@@ -374,7 +307,8 @@ pcibios_claim_one_bus(struct pci_bus *b)
if (r->parent || !r->start || !r->flags)
continue;
- if (pci_probe_only || (r->flags & IORESOURCE_PCI_FIXED))
+ if (pci_has_flag(PCI_PROBE_ONLY) ||
+ (r->flags & IORESOURCE_PCI_FIXED))
pci_claim_resource(dev, i);
}
}
@@ -416,8 +350,10 @@ common_init_pci(void)
hose->mem_space->end = end;
INIT_LIST_HEAD(&resources);
- pci_add_resource(&resources, hose->io_space);
- pci_add_resource(&resources, hose->mem_space);
+ pci_add_resource_offset(&resources, hose->io_space,
+ hose->io_space->start);
+ pci_add_resource_offset(&resources, hose->mem_space,
+ hose->mem_space->start);
bus = pci_scan_root_bus(NULL, next_busno, alpha_mv.pci_ops,
hose, &resources);
diff --git a/arch/alpha/kernel/pci_impl.h b/arch/alpha/kernel/pci_impl.h
index 85457b2d4516..2b0ac429f5eb 100644
--- a/arch/alpha/kernel/pci_impl.h
+++ b/arch/alpha/kernel/pci_impl.h
@@ -173,9 +173,6 @@ extern void pci_restore_srm_config(void);
extern struct pci_controller *hose_head, **hose_tail;
extern struct pci_controller *pci_isa_hose;
-/* Indicate that we trust the console to configure things properly. */
-extern int pci_probe_only;
-
extern unsigned long alpha_agpgart_size;
extern void common_init_pci(void);
diff --git a/arch/alpha/kernel/perf_event.c b/arch/alpha/kernel/perf_event.c
index 8143cd7cdbfb..0dae252f7a33 100644
--- a/arch/alpha/kernel/perf_event.c
+++ b/arch/alpha/kernel/perf_event.c
@@ -685,6 +685,10 @@ static int alpha_pmu_event_init(struct perf_event *event)
{
int err;
+ /* does not support taken branch sampling */
+ if (has_branch_stack(event))
+ return -EOPNOTSUPP;
+
switch (event->attr.type) {
case PERF_TYPE_RAW:
case PERF_TYPE_HARDWARE:
diff --git a/arch/alpha/kernel/srmcons.c b/arch/alpha/kernel/srmcons.c
index 783f4e50c111..3ea809430eda 100644
--- a/arch/alpha/kernel/srmcons.c
+++ b/arch/alpha/kernel/srmcons.c
@@ -30,10 +30,9 @@ static int srm_is_registered_console = 0;
#define MAX_SRM_CONSOLE_DEVICES 1 /* only support 1 console device */
struct srmcons_private {
- struct tty_struct *tty;
+ struct tty_port port;
struct timer_list timer;
- spinlock_t lock;
-};
+} srmcons_singleton;
typedef union _srmcons_result {
struct {
@@ -68,22 +67,21 @@ static void
srmcons_receive_chars(unsigned long data)
{
struct srmcons_private *srmconsp = (struct srmcons_private *)data;
+ struct tty_port *port = &srmconsp->port;
unsigned long flags;
int incr = 10;
local_irq_save(flags);
if (spin_trylock(&srmcons_callback_lock)) {
- if (!srmcons_do_receive_chars(srmconsp->tty))
+ if (!srmcons_do_receive_chars(port->tty))
incr = 100;
spin_unlock(&srmcons_callback_lock);
}
- spin_lock(&srmconsp->lock);
- if (srmconsp->tty) {
- srmconsp->timer.expires = jiffies + incr;
- add_timer(&srmconsp->timer);
- }
- spin_unlock(&srmconsp->lock);
+ spin_lock(&port->lock);
+ if (port->tty)
+ mod_timer(&srmconsp->timer, jiffies + incr);
+ spin_unlock(&port->lock);
local_irq_restore(flags);
}
@@ -156,56 +154,22 @@ srmcons_chars_in_buffer(struct tty_struct *tty)
}
static int
-srmcons_get_private_struct(struct srmcons_private **ps)
-{
- static struct srmcons_private *srmconsp = NULL;
- static DEFINE_SPINLOCK(srmconsp_lock);
- unsigned long flags;
- int retval = 0;
-
- if (srmconsp == NULL) {
- srmconsp = kmalloc(sizeof(*srmconsp), GFP_KERNEL);
- spin_lock_irqsave(&srmconsp_lock, flags);
-
- if (srmconsp == NULL)
- retval = -ENOMEM;
- else {
- srmconsp->tty = NULL;
- spin_lock_init(&srmconsp->lock);
- init_timer(&srmconsp->timer);
- }
-
- spin_unlock_irqrestore(&srmconsp_lock, flags);
- }
-
- *ps = srmconsp;
- return retval;
-}
-
-static int
srmcons_open(struct tty_struct *tty, struct file *filp)
{
- struct srmcons_private *srmconsp;
+ struct srmcons_private *srmconsp = &srmcons_singleton;
+ struct tty_port *port = &srmconsp->port;
unsigned long flags;
- int retval;
-
- retval = srmcons_get_private_struct(&srmconsp);
- if (retval)
- return retval;
- spin_lock_irqsave(&srmconsp->lock, flags);
+ spin_lock_irqsave(&port->lock, flags);
- if (!srmconsp->tty) {
+ if (!port->tty) {
tty->driver_data = srmconsp;
-
- srmconsp->tty = tty;
- srmconsp->timer.function = srmcons_receive_chars;
- srmconsp->timer.data = (unsigned long)srmconsp;
- srmconsp->timer.expires = jiffies + 10;
- add_timer(&srmconsp->timer);
+ tty->port = port;
+ port->tty = tty; /* XXX proper refcounting */
+ mod_timer(&srmconsp->timer, jiffies + 10);
}
- spin_unlock_irqrestore(&srmconsp->lock, flags);
+ spin_unlock_irqrestore(&port->lock, flags);
return 0;
}
@@ -214,16 +178,17 @@ static void
srmcons_close(struct tty_struct *tty, struct file *filp)
{
struct srmcons_private *srmconsp = tty->driver_data;
+ struct tty_port *port = &srmconsp->port;
unsigned long flags;
- spin_lock_irqsave(&srmconsp->lock, flags);
+ spin_lock_irqsave(&port->lock, flags);
if (tty->count == 1) {
- srmconsp->tty = NULL;
+ port->tty = NULL;
del_timer(&srmconsp->timer);
}
- spin_unlock_irqrestore(&srmconsp->lock, flags);
+ spin_unlock_irqrestore(&port->lock, flags);
}
@@ -240,6 +205,9 @@ static const struct tty_operations srmcons_ops = {
static int __init
srmcons_init(void)
{
+ tty_port_init(&srmcons_singleton.port);
+ setup_timer(&srmcons_singleton.timer, srmcons_receive_chars,
+ (unsigned long)&srmcons_singleton);
if (srm_is_registered_console) {
struct tty_driver *driver;
int err;
diff --git a/arch/alpha/kernel/sys_dp264.c b/arch/alpha/kernel/sys_dp264.c
index bb7f0c7cb17a..13f0717fc7fe 100644
--- a/arch/alpha/kernel/sys_dp264.c
+++ b/arch/alpha/kernel/sys_dp264.c
@@ -366,7 +366,7 @@ clipper_init_irq(void)
*/
static int __init
-isa_irq_fixup(struct pci_dev *dev, int irq)
+isa_irq_fixup(const struct pci_dev *dev, int irq)
{
u8 irq8;
diff --git a/arch/alpha/kernel/sys_marvel.c b/arch/alpha/kernel/sys_marvel.c
index 95cfc83ece8f..fc8b12508611 100644
--- a/arch/alpha/kernel/sys_marvel.c
+++ b/arch/alpha/kernel/sys_marvel.c
@@ -384,7 +384,8 @@ marvel_init_pci(void)
marvel_register_error_handlers();
- pci_probe_only = 1;
+ /* Indicate that we trust the console to configure things properly */
+ pci_set_flags(PCI_PROBE_ONLY);
common_init_pci();
locate_and_init_vga(NULL);
diff --git a/arch/alpha/kernel/sys_titan.c b/arch/alpha/kernel/sys_titan.c
index f47b30a2a117..b8eafa053539 100644
--- a/arch/alpha/kernel/sys_titan.c
+++ b/arch/alpha/kernel/sys_titan.c
@@ -331,7 +331,8 @@ titan_init_pci(void)
*/
titan_late_init();
- pci_probe_only = 1;
+ /* Indicate that we trust the console to configure things properly */
+ pci_set_flags(PCI_PROBE_ONLY);
common_init_pci();
SMC669_Init(0);
locate_and_init_vga(NULL);
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 0937f427623b..dae718ab1d66 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -186,6 +186,9 @@ config GENERIC_ISA_DMA
config FIQ
bool
+config NEED_RET_TO_USER
+ bool
+
config ARCH_MTD_XIP
bool
@@ -479,6 +482,7 @@ config ARCH_IOP13XX
select ARCH_SUPPORTS_MSI
select VMSPLIT_1G
select NEED_MACH_MEMORY_H
+ select NEED_RET_TO_USER
help
Support for Intel's IOP13XX (XScale) family of processors.
@@ -486,6 +490,7 @@ config ARCH_IOP32X
bool "IOP32x-based"
depends on MMU
select CPU_XSCALE
+ select NEED_RET_TO_USER
select PLAT_IOP
select PCI
select ARCH_REQUIRE_GPIOLIB
@@ -497,6 +502,7 @@ config ARCH_IOP33X
bool "IOP33x-based"
depends on MMU
select CPU_XSCALE
+ select NEED_RET_TO_USER
select PLAT_IOP
select PCI
select ARCH_REQUIRE_GPIOLIB
@@ -763,22 +769,21 @@ config ARCH_SA1100
help
Support for StrongARM 11x0 based boards.
-config ARCH_S3C2410
- bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450"
+config ARCH_S3C24XX
+ bool "Samsung S3C24XX SoCs"
select GENERIC_GPIO
select ARCH_HAS_CPUFREQ
select HAVE_CLK
select CLKDEV_LOOKUP
select ARCH_USES_GETTIMEOFFSET
select HAVE_S3C2410_I2C if I2C
+ select HAVE_S3C_RTC if RTC_CLASS
+ select HAVE_S3C2410_WATCHDOG if WATCHDOG
help
- Samsung S3C2410X CPU based systems, such as the Simtec Electronics
- BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
- the Samsung SMDK2410 development board (and derivatives).
-
- Note, the S3C2416 and the S3C2450 are so close that they even share
- the same SoC ID code. This means that there is no separate machine
- directory (no arch/arm/mach-s3c2450) as the S3C2416 was first.
+ Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443
+ and S3C2450 SoCs based systems, such as the Simtec Electronics BAST
+ (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or the
+ Samsung SMDK2410 development board (and derivatives).
config ARCH_S3C64XX
bool "Samsung S3C64XX"
@@ -901,6 +906,7 @@ config ARCH_U300
config ARCH_U8500
bool "ST-Ericsson U8500 Series"
+ depends on MMU
select CPU_V7
select ARM_AMBA
select GENERIC_CLOCKEVENTS
@@ -1066,12 +1072,10 @@ source "arch/arm/plat-s5p/Kconfig"
source "arch/arm/plat-spear/Kconfig"
-if ARCH_S3C2410
-source "arch/arm/mach-s3c2410/Kconfig"
+source "arch/arm/mach-s3c24xx/Kconfig"
+if ARCH_S3C24XX
source "arch/arm/mach-s3c2412/Kconfig"
-source "arch/arm/mach-s3c2416/Kconfig"
source "arch/arm/mach-s3c2440/Kconfig"
-source "arch/arm/mach-s3c2443/Kconfig"
endif
if ARCH_S3C64XX
@@ -1578,7 +1582,7 @@ config LOCAL_TIMERS
config ARCH_NR_GPIO
int
default 1024 if ARCH_SHMOBILE || ARCH_TEGRA
- default 350 if ARCH_U8500
+ default 355 if ARCH_U8500
default 0
help
Maximum number of GPIOs in the system.
@@ -1589,7 +1593,7 @@ source kernel/Kconfig.preempt
config HZ
int
- default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \
+ default 200 if ARCH_EBSA110 || ARCH_S3C24XX || ARCH_S5P64X0 || \
ARCH_S5PV210 || ARCH_EXYNOS4
default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
default AT91_TIMER_HZ if ARCH_AT91
@@ -2115,7 +2119,7 @@ config CPU_FREQ_S3C
config CPU_FREQ_S3C24XX
bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)"
- depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL
+ depends on ARCH_S3C24XX && CPU_FREQ && EXPERIMENTAL
select CPU_FREQ_S3C
help
This enables the CPUfreq driver for the Samsung S3C24XX family
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 1683bfb9166f..0106f75530c0 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -174,7 +174,7 @@ machine-$(CONFIG_ARCH_PRIMA2) := prima2
machine-$(CONFIG_ARCH_PXA) := pxa
machine-$(CONFIG_ARCH_REALVIEW) := realview
machine-$(CONFIG_ARCH_RPC) := rpc
-machine-$(CONFIG_ARCH_S3C2410) := s3c2410 s3c2412 s3c2416 s3c2440 s3c2443
+machine-$(CONFIG_ARCH_S3C24XX) := s3c24xx s3c2412 s3c2440
machine-$(CONFIG_ARCH_S3C64XX) := s3c64xx
machine-$(CONFIG_ARCH_S5P64X0) := s5p64x0
machine-$(CONFIG_ARCH_S5PC100) := s5pc100
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index c5d60250d43d..5f6045f1766c 100644
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -58,7 +58,7 @@
add \rb, \rb, #0x00010000 @ Ser1
#endif
.endm
-#elif defined(CONFIG_ARCH_S3C2410)
+#elif defined(CONFIG_ARCH_S3C24XX)
.macro loadsp, rb, tmp
mov \rb, #0x50000000
add \rb, \rb, #0x4000 * CONFIG_S3C_LOWLEVEL_UART_PORT
diff --git a/arch/arm/boot/dts/highbank.dts b/arch/arm/boot/dts/highbank.dts
index 305635bd45c0..37c0ff9c8b90 100644
--- a/arch/arm/boot/dts/highbank.dts
+++ b/arch/arm/boot/dts/highbank.dts
@@ -72,15 +72,15 @@
ranges;
timer@fff10600 {
- compatible = "arm,smp-twd";
+ compatible = "arm,cortex-a9-twd-timer";
reg = <0xfff10600 0x20>;
- interrupts = <1 13 0xf04>;
+ interrupts = <1 13 0xf01>;
};
watchdog@fff10620 {
- compatible = "arm,cortex-a9-wdt";
+ compatible = "arm,cortex-a9-twd-wdt";
reg = <0xfff10620 0x20>;
- interrupts = <1 14 0xf04>;
+ interrupts = <1 14 0xf01>;
};
intc: interrupt-controller@fff11000 {
diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi
index 263e8f3664b5..4905f51a106f 100644
--- a/arch/arm/boot/dts/imx6q.dtsi
+++ b/arch/arm/boot/dts/imx6q.dtsi
@@ -88,9 +88,9 @@
ranges;
timer@00a00600 {
- compatible = "arm,smp-twd";
- reg = <0x00a00600 0x100>;
- interrupts = <1 13 0xf4>;
+ compatible = "arm,cortex-a9-twd-timer";
+ reg = <0x00a00600 0x20>;
+ interrupts = <1 13 0xf01>;
};
L2: l2-cache@00a02000 {
diff --git a/arch/arm/boot/dts/testcases/tests-phandle.dtsi b/arch/arm/boot/dts/testcases/tests-phandle.dtsi
index ec0c4e6212c9..0007d3cd7dc2 100644
--- a/arch/arm/boot/dts/testcases/tests-phandle.dtsi
+++ b/arch/arm/boot/dts/testcases/tests-phandle.dtsi
@@ -31,6 +31,8 @@
phandle-list-bad-phandle = <12345678 0 0>;
phandle-list-bad-args = <&provider2 1 0>,
<&provider3 0>;
+ empty-property;
+ unterminated-string = [40 41 42 43];
};
};
};
diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c
index c47d6199b784..f0783be17352 100644
--- a/arch/arm/common/gic.c
+++ b/arch/arm/common/gic.c
@@ -51,7 +51,6 @@ union gic_base {
};
struct gic_chip_data {
- unsigned int irq_offset;
union gic_base dist_base;
union gic_base cpu_base;
#ifdef CONFIG_CPU_PM
@@ -61,9 +60,7 @@ struct gic_chip_data {
u32 __percpu *saved_ppi_enable;
u32 __percpu *saved_ppi_conf;
#endif
-#ifdef CONFIG_IRQ_DOMAIN
- struct irq_domain domain;
-#endif
+ struct irq_domain *domain;
unsigned int gic_irqs;
#ifdef CONFIG_GIC_NON_BANKED
void __iomem *(*get_base)(union gic_base *);
@@ -282,7 +279,7 @@ asmlinkage void __exception_irq_entry gic_handle_irq(struct pt_regs *regs)
irqnr = irqstat & ~0x1c00;
if (likely(irqnr > 15 && irqnr < 1021)) {
- irqnr = irq_domain_to_irq(&gic->domain, irqnr);
+ irqnr = irq_find_mapping(gic->domain, irqnr);
handle_IRQ(irqnr, regs);
continue;
}
@@ -314,8 +311,8 @@ static void gic_handle_cascade_irq(unsigned int irq, struct irq_desc *desc)
if (gic_irq == 1023)
goto out;
- cascade_irq = irq_domain_to_irq(&chip_data->domain, gic_irq);
- if (unlikely(gic_irq < 32 || gic_irq > 1020 || cascade_irq >= NR_IRQS))
+ cascade_irq = irq_find_mapping(chip_data->domain, gic_irq);
+ if (unlikely(gic_irq < 32 || gic_irq > 1020))
do_bad_IRQ(cascade_irq, desc);
else
generic_handle_irq(cascade_irq);
@@ -348,10 +345,9 @@ void __init gic_cascade_irq(unsigned int gic_nr, unsigned int irq)
static void __init gic_dist_init(struct gic_chip_data *gic)
{
- unsigned int i, irq;
+ unsigned int i;
u32 cpumask;
unsigned int gic_irqs = gic->gic_irqs;
- struct irq_domain *domain = &gic->domain;
void __iomem *base = gic_data_dist_base(gic);
u32 cpu = cpu_logical_map(smp_processor_id());
@@ -386,23 +382,6 @@ static void __init gic_dist_init(struct gic_chip_data *gic)
for (i = 32; i < gic_irqs; i += 32)
writel_relaxed(0xffffffff, base + GIC_DIST_ENABLE_CLEAR + i * 4 / 32);
- /*
- * Setup the Linux IRQ subsystem.
- */
- irq_domain_for_each_irq(domain, i, irq) {
- if (i < 32) {
- irq_set_percpu_devid(irq);
- irq_set_chip_and_handler(irq, &gic_chip,
- handle_percpu_devid_irq);
- set_irq_flags(irq, IRQF_VALID | IRQF_NOAUTOEN);
- } else {
- irq_set_chip_and_handler(irq, &gic_chip,
- handle_fasteoi_irq);
- set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
- }
- irq_set_chip_data(irq, gic);
- }
-
writel_relaxed(1, base + GIC_DIST_CTRL);
}
@@ -618,11 +597,27 @@ static void __init gic_pm_init(struct gic_chip_data *gic)
}
#endif
-#ifdef CONFIG_OF
-static int gic_irq_domain_dt_translate(struct irq_domain *d,
- struct device_node *controller,
- const u32 *intspec, unsigned int intsize,
- unsigned long *out_hwirq, unsigned int *out_type)
+static int gic_irq_domain_map(struct irq_domain *d, unsigned int irq,
+ irq_hw_number_t hw)
+{
+ if (hw < 32) {
+ irq_set_percpu_devid(irq);
+ irq_set_chip_and_handler(irq, &gic_chip,
+ handle_percpu_devid_irq);
+ set_irq_flags(irq, IRQF_VALID | IRQF_NOAUTOEN);
+ } else {
+ irq_set_chip_and_handler(irq, &gic_chip,
+ handle_fasteoi_irq);
+ set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
+ }
+ irq_set_chip_data(irq, d->host_data);
+ return 0;
+}
+
+static int gic_irq_domain_xlate(struct irq_domain *d,
+ struct device_node *controller,
+ const u32 *intspec, unsigned int intsize,
+ unsigned long *out_hwirq, unsigned int *out_type)
{
if (d->of_node != controller)
return -EINVAL;
@@ -639,26 +634,23 @@ static int gic_irq_domain_dt_translate(struct irq_domain *d,
*out_type = intspec[2] & IRQ_TYPE_SENSE_MASK;
return 0;
}
-#endif
const struct irq_domain_ops gic_irq_domain_ops = {
-#ifdef CONFIG_OF
- .dt_translate = gic_irq_domain_dt_translate,
-#endif
+ .map = gic_irq_domain_map,
+ .xlate = gic_irq_domain_xlate,
};
void __init gic_init_bases(unsigned int gic_nr, int irq_start,
void __iomem *dist_base, void __iomem *cpu_base,
- u32 percpu_offset)
+ u32 percpu_offset, struct device_node *node)
{
+ irq_hw_number_t hwirq_base;
struct gic_chip_data *gic;
- struct irq_domain *domain;
- int gic_irqs;
+ int gic_irqs, irq_base;
BUG_ON(gic_nr >= MAX_GIC_NR);
gic = &gic_data[gic_nr];
- domain = &gic->domain;
#ifdef CONFIG_GIC_NON_BANKED
if (percpu_offset) { /* Frankein-GIC without banked registers... */
unsigned int cpu;
@@ -694,10 +686,10 @@ void __init gic_init_bases(unsigned int gic_nr, int irq_start,
* For primary GICs, skip over SGIs.
* For secondary GICs, skip over PPIs, too.
*/
- domain->hwirq_base = 32;
+ hwirq_base = 32;
if (gic_nr == 0) {
if ((irq_start & 31) > 0) {
- domain->hwirq_base = 16;
+ hwirq_base = 16;
if (irq_start != -1)
irq_start = (irq_start & ~31) + 16;
}
@@ -713,17 +705,17 @@ void __init gic_init_bases(unsigned int gic_nr, int irq_start,
gic_irqs = 1020;
gic->gic_irqs = gic_irqs;
- domain->nr_irq = gic_irqs - domain->hwirq_base;
- domain->irq_base = irq_alloc_descs(irq_start, 16, domain->nr_irq,
- numa_node_id());
- if (IS_ERR_VALUE(domain->irq_base)) {
+ gic_irqs -= hwirq_base; /* calculate # of irqs to allocate */
+ irq_base = irq_alloc_descs(irq_start, 16, gic_irqs, numa_node_id());
+ if (IS_ERR_VALUE(irq_base)) {
WARN(1, "Cannot allocate irq_descs @ IRQ%d, assuming pre-allocated\n",
irq_start);
- domain->irq_base = irq_start;
+ irq_base = irq_start;
}
- domain->priv = gic;
- domain->ops = &gic_irq_domain_ops;
- irq_domain_add(domain);
+ gic->domain = irq_domain_add_legacy(node, gic_irqs, irq_base,
+ hwirq_base, &gic_irq_domain_ops, gic);
+ if (WARN_ON(!gic->domain))
+ return;
gic_chip.flags |= gic_arch_extn.flags;
gic_dist_init(gic);
@@ -768,7 +760,6 @@ int __init gic_of_init(struct device_node *node, struct device_node *parent)
void __iomem *dist_base;
u32 percpu_offset;
int irq;
- struct irq_domain *domain = &gic_data[gic_cnt].domain;
if (WARN_ON(!node))
return -ENODEV;
@@ -782,9 +773,7 @@ int __init gic_of_init(struct device_node *node, struct device_node *parent)
if (of_property_read_u32(node, "cpu-offset", &percpu_offset))
percpu_offset = 0;
- domain->of_node = of_node_get(node);
-
- gic_init_bases(gic_cnt, -1, dist_base, cpu_base, percpu_offset);
+ gic_init_bases(gic_cnt, -1, dist_base, cpu_base, percpu_offset, node);
if (parent) {
irq = irq_of_parse_and_map(node, 0);
diff --git a/arch/arm/common/it8152.c b/arch/arm/common/it8152.c
index fb1f1cfce60c..dcb13494ca0d 100644
--- a/arch/arm/common/it8152.c
+++ b/arch/arm/common/it8152.c
@@ -299,8 +299,8 @@ int __init it8152_pci_setup(int nr, struct pci_sys_data *sys)
goto err1;
}
- pci_add_resource(&sys->resources, &it8152_io);
- pci_add_resource(&sys->resources, &it8152_mem);
+ pci_add_resource_offset(&sys->resources, &it8152_io, sys->io_offset);
+ pci_add_resource_offset(&sys->resources, &it8152_mem, sys->mem_offset);
if (platform_notify || platform_notify_remove) {
printk(KERN_ERR "PCI: Can't use platform_notify\n");
diff --git a/arch/arm/common/vic.c b/arch/arm/common/vic.c
index dcb004a804c7..7a66311f3066 100644
--- a/arch/arm/common/vic.c
+++ b/arch/arm/common/vic.c
@@ -56,7 +56,7 @@ struct vic_device {
u32 int_enable;
u32 soft_int;
u32 protect;
- struct irq_domain domain;
+ struct irq_domain *domain;
};
/* we cannot allocate memory when VICs are initially registered */
@@ -192,14 +192,8 @@ static void __init vic_register(void __iomem *base, unsigned int irq,
v->resume_sources = resume_sources;
v->irq = irq;
vic_id++;
-
- v->domain.irq_base = irq;
- v->domain.nr_irq = 32;
-#ifdef CONFIG_OF_IRQ
- v->domain.of_node = of_node_get(node);
-#endif /* CONFIG_OF */
- v->domain.ops = &irq_domain_simple_ops;
- irq_domain_add(&v->domain);
+ v->domain = irq_domain_add_legacy(node, 32, irq, 0,
+ &irq_domain_simple_ops, v);
}
static void vic_ack_irq(struct irq_data *d)
@@ -348,7 +342,7 @@ static void __init vic_init_st(void __iomem *base, unsigned int irq_start,
vic_register(base, irq_start, 0, node);
}
-static void __init __vic_init(void __iomem *base, unsigned int irq_start,
+void __init __vic_init(void __iomem *base, unsigned int irq_start,
u32 vic_sources, u32 resume_sources,
struct device_node *node)
{
@@ -444,7 +438,7 @@ static int handle_one_vic(struct vic_device *vic, struct pt_regs *regs)
stat = readl_relaxed(vic->base + VIC_IRQ_STATUS);
while (stat) {
irq = ffs(stat) - 1;
- handle_IRQ(irq_domain_to_irq(&vic->domain, irq), regs);
+ handle_IRQ(irq_find_mapping(vic->domain, irq), regs);
stat &= ~(1 << irq);
handled = 1;
}
diff --git a/arch/arm/configs/imx_v4_v5_defconfig b/arch/arm/configs/imx_v4_v5_defconfig
index a22e93079063..d88fb87b414d 100644
--- a/arch/arm/configs/imx_v4_v5_defconfig
+++ b/arch/arm/configs/imx_v4_v5_defconfig
@@ -68,6 +68,7 @@ CONFIG_MTD_CFI=y
CONFIG_MTD_CFI_ADV_OPTIONS=y
CONFIG_MTD_CFI_GEOMETRY=y
# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
# CONFIG_MTD_CFI_I2 is not set
CONFIG_MTD_CFI_INTELEXT=y
CONFIG_MTD_PHYSMAP=y
diff --git a/arch/arm/configs/lpc32xx_defconfig b/arch/arm/configs/lpc32xx_defconfig
new file mode 100644
index 000000000000..fb2088171ca9
--- /dev/null
+++ b/arch/arm/configs/lpc32xx_defconfig
@@ -0,0 +1,145 @@
+CONFIG_EXPERIMENTAL=y
+CONFIG_SYSVIPC=y
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_EMBEDDED=y
+CONFIG_SLAB=y
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_BLK_DEV_BSG is not set
+CONFIG_PARTITION_ADVANCED=y
+CONFIG_ARCH_LPC32XX=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_PREEMPT=y
+CONFIG_AEABI=y
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CMDLINE="console=ttyS0,115200n81 root=/dev/ram0"
+CONFIG_CPU_IDLE=y
+CONFIG_FPE_NWFPE=y
+CONFIG_VFP=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_BINFMT_AOUT=y
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+# CONFIG_INET_DIAG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_WIRELESS is not set
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+# CONFIG_FW_LOADER is not set
+CONFIG_MTD=y
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_NAND=y
+CONFIG_MTD_NAND_MUSEUM_IDS=y
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_BLK_DEV_CRYPTOLOOP=y
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=1
+CONFIG_BLK_DEV_RAM_SIZE=16384
+CONFIG_MISC_DEVICES=y
+CONFIG_EEPROM_AT25=y
+CONFIG_SCSI=y
+CONFIG_BLK_DEV_SD=y
+CONFIG_NETDEVICES=y
+CONFIG_MII=y
+CONFIG_PHYLIB=y
+CONFIG_SMSC_PHY=y
+# CONFIG_WLAN is not set
+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=240
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=320
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_MOUSE is not set
+CONFIG_INPUT_TOUCHSCREEN=y
+CONFIG_TOUCHSCREEN_LPC32XX=y
+# CONFIG_LEGACY_PTYS is not set
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+# CONFIG_HW_RANDOM is not set
+CONFIG_I2C=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_PNX=y
+CONFIG_SPI=y
+CONFIG_SPI_PL022=y
+CONFIG_GPIO_SYSFS=y
+# CONFIG_HWMON is not set
+CONFIG_WATCHDOG=y
+CONFIG_PNX4008_WATCHDOG=y
+CONFIG_FB=y
+CONFIG_FB_ARMCLCD=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
+CONFIG_LOGO=y
+# CONFIG_LOGO_LINUX_MONO is not set
+# CONFIG_LOGO_LINUX_VGA16 is not set
+CONFIG_SOUND=y
+CONFIG_SND=y
+CONFIG_SND_SEQUENCER=y
+CONFIG_SND_MIXER_OSS=y
+CONFIG_SND_PCM_OSS=y
+CONFIG_SND_SEQUENCER_OSS=y
+CONFIG_SND_DYNAMIC_MINORS=y
+# CONFIG_SND_VERBOSE_PROCFS is not set
+# CONFIG_SND_DRIVERS is not set
+# CONFIG_SND_ARM is not set
+# CONFIG_SND_SPI is not set
+CONFIG_SND_SOC=y
+# CONFIG_HID_SUPPORT is not set
+CONFIG_USB=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_LIBUSUAL=y
+CONFIG_MMC=y
+# CONFIG_MMC_BLOCK_BOUNCE is not set
+CONFIG_MMC_ARMMMCI=y
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+CONFIG_LEDS_GPIO=y
+CONFIG_LEDS_TRIGGERS=y
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_INTF_DEV_UIE_EMUL=y
+CONFIG_RTC_DRV_LPC32XX=y
+CONFIG_EXT2_FS=y
+CONFIG_AUTOFS4_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_TMPFS=y
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_WBUF_VERIFY=y
+CONFIG_CRAMFS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+CONFIG_ROOT_NFS=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_ASCII=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_NLS_UTF8=y
+# CONFIG_SCHED_DEBUG is not set
+# CONFIG_DEBUG_PREEMPT is not set
+CONFIG_DEBUG_INFO=y
+# CONFIG_FTRACE is not set
+# CONFIG_ARM_UNWIND is not set
+CONFIG_DEBUG_LL=y
+CONFIG_EARLY_PRINTK=y
+CONFIG_CRYPTO_ANSI_CPRNG=y
+# CONFIG_CRYPTO_HW is not set
+CONFIG_CRC_CCITT=y
diff --git a/arch/arm/configs/mini2440_defconfig b/arch/arm/configs/mini2440_defconfig
index 2472a9585834..42da9183acc8 100644
--- a/arch/arm/configs/mini2440_defconfig
+++ b/arch/arm/configs/mini2440_defconfig
@@ -13,7 +13,7 @@ CONFIG_MODULE_UNLOAD=y
CONFIG_MODULE_FORCE_UNLOAD=y
# CONFIG_BLK_DEV_BSG is not set
CONFIG_BLK_DEV_INTEGRITY=y
-CONFIG_ARCH_S3C2410=y
+CONFIG_ARCH_S3C24XX=y
CONFIG_S3C_ADC=y
CONFIG_S3C24XX_PWM=y
CONFIG_MACH_MINI2440=y
diff --git a/arch/arm/configs/s3c2410_defconfig b/arch/arm/configs/s3c2410_defconfig
index f9096c1b0a65..193448f31284 100644
--- a/arch/arm/configs/s3c2410_defconfig
+++ b/arch/arm/configs/s3c2410_defconfig
@@ -3,40 +3,47 @@ CONFIG_SYSVIPC=y
CONFIG_IKCONFIG=m
CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=16
-CONFIG_SYSFS_DEPRECATED_V2=y
CONFIG_BLK_DEV_INITRD=y
CONFIG_SLAB=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
# CONFIG_BLK_DEV_BSG is not set
-CONFIG_ARCH_S3C2410=y
+CONFIG_PARTITION_ADVANCED=y
+CONFIG_BSD_DISKLABEL=y
+CONFIG_SOLARIS_X86_PARTITION=y
+CONFIG_ARCH_S3C24XX=y
CONFIG_S3C_BOOT_ERROR_RESET=y
CONFIG_S3C_ADC=y
CONFIG_S3C24XX_PWM=y
-CONFIG_ARCH_SMDK2410=y
+CONFIG_CPU_S3C2412=y
+CONFIG_CPU_S3C2416=y
+CONFIG_CPU_S3C2440=y
+CONFIG_CPU_S3C2442=y
+CONFIG_CPU_S3C2443=y
+CONFIG_MACH_AML_M5900=y
+CONFIG_ARCH_BAST=y
CONFIG_ARCH_H1940=y
CONFIG_MACH_N30=y
-CONFIG_ARCH_BAST=y
CONFIG_MACH_OTOM=y
-CONFIG_MACH_AML_M5900=y
+CONFIG_MACH_QT2410=y
+CONFIG_ARCH_SMDK2410=y
CONFIG_MACH_TCT_HAMMER=y
CONFIG_MACH_VR1000=y
-CONFIG_MACH_QT2410=y
CONFIG_MACH_JIVE=y
CONFIG_MACH_SMDK2412=y
CONFIG_MACH_VSTMS=y
CONFIG_MACH_SMDK2416=y
CONFIG_MACH_ANUBIS=y
-CONFIG_MACH_NEO1973_GTA02=y
+CONFIG_MACH_AT2440EVB=y
+CONFIG_MACH_MINI2440=y
+CONFIG_MACH_NEXCODER_2440=y
CONFIG_MACH_OSIRIS=y
CONFIG_MACH_OSIRIS_DVS=m
CONFIG_MACH_RX3715=y
CONFIG_ARCH_S3C2440=y
-CONFIG_MACH_NEXCODER_2440=y
-CONFIG_SMDK2440_CPU2442=y
-CONFIG_MACH_AT2440EVB=y
-CONFIG_MACH_MINI2440=y
+CONFIG_MACH_NEO1973_GTA02=y
CONFIG_MACH_RX1950=y
+CONFIG_SMDK2440_CPU2442=y
CONFIG_MACH_SMDK2443=y
# CONFIG_ARM_THUMB is not set
CONFIG_ZBOOT_ROM_TEXT=0x0
@@ -45,7 +52,6 @@ CONFIG_CMDLINE="root=/dev/hda1 ro init=/bin/bash console=ttySAC0"
CONFIG_FPE_NWFPE=y
CONFIG_FPE_NWFPE_XP=y
CONFIG_BINFMT_AOUT=y
-CONFIG_PM=y
CONFIG_APM_EMULATION=m
CONFIG_NET=y
CONFIG_PACKET=y
@@ -58,7 +64,6 @@ CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
CONFIG_IP_PNP_BOOTP=y
CONFIG_NET_IPIP=m
-CONFIG_NET_IPGRE=m
CONFIG_INET_AH=m
CONFIG_INET_ESP=m
CONFIG_INET_IPCOMP=m
@@ -80,7 +85,6 @@ CONFIG_IPV6_MIP6=m
CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m
CONFIG_IPV6_TUNNEL=m
CONFIG_NETFILTER=y
-CONFIG_NETFILTER_NETLINK_QUEUE=m
CONFIG_NF_CONNTRACK=m
CONFIG_NF_CONNTRACK_EVENTS=y
CONFIG_NF_CT_PROTO_DCCP=m
@@ -138,7 +142,6 @@ CONFIG_IP_VS=m
CONFIG_NF_CONNTRACK_IPV4=m
CONFIG_IP_NF_QUEUE=m
CONFIG_IP_NF_IPTABLES=m
-CONFIG_IP_NF_MATCH_ADDRTYPE=m
CONFIG_IP_NF_MATCH_AH=m
CONFIG_IP_NF_MATCH_ECN=m
CONFIG_IP_NF_MATCH_TTL=m
@@ -150,7 +153,6 @@ CONFIG_NF_NAT=m
CONFIG_IP_NF_TARGET_MASQUERADE=m
CONFIG_IP_NF_TARGET_NETMAP=m
CONFIG_IP_NF_TARGET_REDIRECT=m
-CONFIG_NF_NAT_SNMP_BASIC=m
CONFIG_IP_NF_MANGLE=m
CONFIG_IP_NF_TARGET_CLUSTERIP=m
CONFIG_IP_NF_TARGET_ECN=m
@@ -177,8 +179,6 @@ CONFIG_IP6_NF_TARGET_REJECT=m
CONFIG_IP6_NF_MANGLE=m
CONFIG_IP6_NF_RAW=m
CONFIG_BT=m
-CONFIG_BT_L2CAP=m
-CONFIG_BT_SCO=m
CONFIG_BT_RFCOMM=m
CONFIG_BT_RFCOMM_TTY=y
CONFIG_BT_BNEP=m
@@ -199,7 +199,6 @@ CONFIG_MAC80211_MESH=y
CONFIG_MAC80211_LEDS=y
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_MTD=y
-CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_REDBOOT_PARTS=y
CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y
CONFIG_MTD_CMDLINE_PARTS=y
@@ -221,9 +220,6 @@ CONFIG_BLK_DEV_NBD=m
CONFIG_BLK_DEV_UB=m
CONFIG_BLK_DEV_RAM=y
CONFIG_ATA_OVER_ETH=m
-CONFIG_EEPROM_AT25=m
-CONFIG_EEPROM_LEGACY=m
-CONFIG_EEPROM_93CX6=m
CONFIG_IDE=y
CONFIG_BLK_DEV_IDECD=y
CONFIG_BLK_DEV_IDETAPE=m
@@ -240,7 +236,6 @@ CONFIG_SCSI_MULTI_LUN=y
CONFIG_SCSI_CONSTANTS=y
CONFIG_SCSI_SCAN_ASYNC=y
CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
CONFIG_DM9000=y
CONFIG_INPUT_EVDEV=y
CONFIG_MOUSE_APPLETOUCH=m
@@ -274,7 +269,6 @@ CONFIG_JOYSTICK_XPAD_LEDS=y
CONFIG_INPUT_TOUCHSCREEN=y
CONFIG_TOUCHSCREEN_USB_COMPOSITE=m
CONFIG_INPUT_MISC=y
-CONFIG_INPUT_ATI_REMOTE=m
CONFIG_INPUT_ATI_REMOTE2=m
CONFIG_INPUT_KEYSPAN_REMOTE=m
CONFIG_INPUT_POWERMATE=m
@@ -300,7 +294,6 @@ CONFIG_I2C_SIMTEC=y
CONFIG_SPI=y
CONFIG_SPI_GPIO=m
CONFIG_SPI_S3C24XX=m
-CONFIG_SPI_S3C24XX_GPIO=m
CONFIG_SPI_SPIDEV=m
CONFIG_SPI_TLE62X0=m
CONFIG_SENSORS_LM75=m
@@ -315,7 +308,6 @@ CONFIG_FB_MODE_HELPERS=y
CONFIG_FB_S3C2410=y
CONFIG_FB_SM501=y
CONFIG_BACKLIGHT_PWM=m
-# CONFIG_VGA_CONSOLE is not set
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_SOUND=y
CONFIG_SND=y
@@ -330,10 +322,6 @@ CONFIG_SND_VERBOSE_PRINTK=y
CONFIG_SND_USB_AUDIO=m
CONFIG_SND_USB_CAIAQ=m
CONFIG_SND_SOC=y
-CONFIG_SND_S3C24XX_SOC=y
-CONFIG_SND_S3C24XX_SOC_JIVE_WM8750=m
-CONFIG_SND_S3C24XX_SOC_SMDK2443_WM9710=m
-CONFIG_SND_S3C24XX_SOC_LN2440SBC_ALC650=m
# CONFIG_USB_HID is not set
CONFIG_USB=y
CONFIG_USB_DEVICEFS=y
@@ -387,9 +375,7 @@ CONFIG_MMC_TEST=m
CONFIG_MMC_SDHCI=m
CONFIG_MMC_SPI=m
CONFIG_MMC_S3C=y
-CONFIG_LEDS_CLASS=m
CONFIG_LEDS_S3C24XX=m
-CONFIG_LEDS_H1940=m
CONFIG_LEDS_PCA9532=m
CONFIG_LEDS_GPIO=m
CONFIG_LEDS_PCA955X=m
@@ -410,8 +396,6 @@ CONFIG_EXT3_FS=y
CONFIG_EXT3_FS_POSIX_ACL=y
CONFIG_EXT4_FS=m
CONFIG_EXT4_FS_POSIX_ACL=y
-CONFIG_INOTIFY=y
-CONFIG_AUTOFS_FS=m
CONFIG_AUTOFS4_FS=m
CONFIG_FUSE_FS=m
CONFIG_ISO9660_FS=y
@@ -436,9 +420,6 @@ CONFIG_NFSD=m
CONFIG_NFSD_V3_ACL=y
CONFIG_NFSD_V4=y
CONFIG_CIFS=m
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_BSD_DISKLABEL=y
-CONFIG_SOLARIS_X86_PARTITION=y
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_CODEPAGE_737=m
CONFIG_NLS_CODEPAGE_775=m
@@ -481,9 +462,7 @@ CONFIG_MAGIC_SYSRQ=y
CONFIG_DEBUG_KERNEL=y
CONFIG_DEBUG_MUTEXES=y
CONFIG_DEBUG_INFO=y
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
CONFIG_SYSCTL_SYSCALL_CHECK=y
CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_ERRORS=y
CONFIG_DEBUG_LL=y
# CONFIG_CRYPTO_ANSI_CPRNG is not set
diff --git a/arch/arm/configs/tct_hammer_defconfig b/arch/arm/configs/tct_hammer_defconfig
index 95c0f0d63db6..1d24f8458bef 100644
--- a/arch/arm/configs/tct_hammer_defconfig
+++ b/arch/arm/configs/tct_hammer_defconfig
@@ -14,7 +14,7 @@ CONFIG_SLOB=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
# CONFIG_BLK_DEV_BSG is not set
-CONFIG_ARCH_S3C2410=y
+CONFIG_ARCH_S3C24XX=y
CONFIG_MACH_TCT_HAMMER=y
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
diff --git a/arch/arm/include/asm/hardware/arm_timer.h b/arch/arm/include/asm/hardware/arm_timer.h
index c0f4e7bf22de..d6030ff599db 100644
--- a/arch/arm/include/asm/hardware/arm_timer.h
+++ b/arch/arm/include/asm/hardware/arm_timer.h
@@ -9,7 +9,12 @@
*
* Integrator AP has 16-bit timers, Integrator CP, Versatile and Realview
* can have 16-bit or 32-bit selectable via a bit in the control register.
+ *
+ * Every SP804 contains two identical timers.
*/
+#define TIMER_1_BASE 0x00
+#define TIMER_2_BASE 0x20
+
#define TIMER_LOAD 0x00 /* ACVR rw */
#define TIMER_VALUE 0x04 /* ACVR ro */
#define TIMER_CTRL 0x08 /* ACVR rw */
diff --git a/arch/arm/include/asm/hardware/entry-macro-iomd.S b/arch/arm/include/asm/hardware/entry-macro-iomd.S
index e0af4983723f..8c215acd9b57 100644
--- a/arch/arm/include/asm/hardware/entry-macro-iomd.S
+++ b/arch/arm/include/asm/hardware/entry-macro-iomd.S
@@ -11,14 +11,6 @@
/* IOC / IOMD based hardware */
#include <asm/hardware/iomd.h>
- .macro disable_fiq
- mov r12, #ioc_base_high
- .if ioc_base_low
- orr r12, r12, #ioc_base_low
- .endif
- strb r12, [r12, #0x38] @ Disable FIQ register
- .endm
-
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
ldrb \irqstat, [\base, #IOMD_IRQREQB] @ get high priority first
ldr \tmp, =irq_prio_h
diff --git a/arch/arm/include/asm/hardware/gic.h b/arch/arm/include/asm/hardware/gic.h
index 4bdfe0018696..4b1ce6cd477f 100644
--- a/arch/arm/include/asm/hardware/gic.h
+++ b/arch/arm/include/asm/hardware/gic.h
@@ -39,7 +39,7 @@ struct device_node;
extern struct irq_chip gic_arch_extn;
void gic_init_bases(unsigned int, int, void __iomem *, void __iomem *,
- u32 offset);
+ u32 offset, struct device_node *);
int gic_of_init(struct device_node *node, struct device_node *parent);
void gic_secondary_init(unsigned int);
void gic_handle_irq(struct pt_regs *regs);
@@ -49,7 +49,7 @@ void gic_raise_softirq(const struct cpumask *mask, unsigned int irq);
static inline void gic_init(unsigned int nr, int start,
void __iomem *dist , void __iomem *cpu)
{
- gic_init_bases(nr, start, dist, cpu, 0);
+ gic_init_bases(nr, start, dist, cpu, 0, NULL);
}
#endif
diff --git a/arch/arm/include/asm/hardware/vic.h b/arch/arm/include/asm/hardware/vic.h
index f42ebd619590..e14af1a1a320 100644
--- a/arch/arm/include/asm/hardware/vic.h
+++ b/arch/arm/include/asm/hardware/vic.h
@@ -47,6 +47,8 @@
struct device_node;
struct pt_regs;
+void __vic_init(void __iomem *base, unsigned int irq_start, u32 vic_sources,
+ u32 resume_sources, struct device_node *node);
void vic_init(void __iomem *base, unsigned int irq_start, u32 vic_sources, u32 resume_sources);
int vic_of_init(struct device_node *node, struct device_node *parent);
void vic_handle_irq(struct pt_regs *regs);
diff --git a/arch/arm/include/asm/highmem.h b/arch/arm/include/asm/highmem.h
index a4edd19dd3d6..8c5e828f484d 100644
--- a/arch/arm/include/asm/highmem.h
+++ b/arch/arm/include/asm/highmem.h
@@ -57,7 +57,7 @@ static inline void *kmap_high_get(struct page *page)
#ifdef CONFIG_HIGHMEM
extern void *kmap(struct page *page);
extern void kunmap(struct page *page);
-extern void *__kmap_atomic(struct page *page);
+extern void *kmap_atomic(struct page *page);
extern void __kunmap_atomic(void *kvaddr);
extern void *kmap_atomic_pfn(unsigned long pfn);
extern struct page *kmap_atomic_to_page(const void *ptr);
diff --git a/arch/arm/include/asm/localtimer.h b/arch/arm/include/asm/localtimer.h
index c6a18424888e..f77ffc1eb0c2 100644
--- a/arch/arm/include/asm/localtimer.h
+++ b/arch/arm/include/asm/localtimer.h
@@ -11,47 +11,24 @@
#define __ASM_ARM_LOCALTIMER_H
#include <linux/errno.h>
-#include <linux/interrupt.h>
struct clock_event_device;
-/*
- * Setup a per-cpu timer, whether it be a local timer or dummy broadcast
- */
-void percpu_timer_setup(void);
+struct local_timer_ops {
+ int (*setup)(struct clock_event_device *);
+ void (*stop)(struct clock_event_device *);
+};
#ifdef CONFIG_LOCAL_TIMERS
-
-#ifdef CONFIG_HAVE_ARM_TWD
-
-#include "smp_twd.h"
-
-#define local_timer_stop(c) twd_timer_stop((c))
-
-#else
-
-/*
- * Stop the local timer
- */
-void local_timer_stop(struct clock_event_device *);
-
-#endif
-
/*
- * Setup a local timer interrupt for a CPU.
+ * Register a local timer driver
*/
-int local_timer_setup(struct clock_event_device *);
-
+int local_timer_register(struct local_timer_ops *);
#else
-
-static inline int local_timer_setup(struct clock_event_device *evt)
+static inline int local_timer_register(struct local_timer_ops *ops)
{
return -ENXIO;
}
-
-static inline void local_timer_stop(struct clock_event_device *evt)
-{
-}
#endif
#endif
diff --git a/arch/arm/include/asm/pci.h b/arch/arm/include/asm/pci.h
index da337ba57ffd..a98a2e112fae 100644
--- a/arch/arm/include/asm/pci.h
+++ b/arch/arm/include/asm/pci.h
@@ -57,14 +57,6 @@ static inline void pci_dma_burst_advice(struct pci_dev *pdev,
extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
enum pci_mmap_state mmap_state, int write_combine);
-extern void
-pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
- struct resource *res);
-
-extern void
-pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
- struct pci_bus_region *region);
-
/*
* Dummy implementation; always return 0.
*/
diff --git a/arch/arm/include/asm/perf_event.h b/arch/arm/include/asm/perf_event.h
index 99cfe3607989..7523340afb8a 100644
--- a/arch/arm/include/asm/perf_event.h
+++ b/arch/arm/include/asm/perf_event.h
@@ -12,10 +12,6 @@
#ifndef __ARM_PERF_EVENT_H__
#define __ARM_PERF_EVENT_H__
-/* ARM performance counters start from 1 (in the cp15 accesses) so use the
- * same indexes here for consistency. */
-#define PERF_EVENT_INDEX_OFFSET 1
-
/* ARM perf PMU IDs for use by internal perf clients. */
enum arm_perf_pmu_ids {
ARM_PERF_PMU_ID_XSCALE1 = 0,
diff --git a/arch/arm/include/asm/pgtable-nommu.h b/arch/arm/include/asm/pgtable-nommu.h
index ffc0e85775b4..7ec60d6075bf 100644
--- a/arch/arm/include/asm/pgtable-nommu.h
+++ b/arch/arm/include/asm/pgtable-nommu.h
@@ -79,7 +79,6 @@ extern unsigned int kobjsize(const void *objp);
* No page table caches to initialise.
*/
#define pgtable_cache_init() do { } while (0)
-#define io_remap_page_range remap_page_range
#define io_remap_pfn_range remap_pfn_range
diff --git a/arch/arm/include/asm/smp_twd.h b/arch/arm/include/asm/smp_twd.h
index ef9ffba97ad8..0f01f4677bd2 100644
--- a/arch/arm/include/asm/smp_twd.h
+++ b/arch/arm/include/asm/smp_twd.h
@@ -18,11 +18,28 @@
#define TWD_TIMER_CONTROL_PERIODIC (1 << 1)
#define TWD_TIMER_CONTROL_IT_ENABLE (1 << 2)
-struct clock_event_device;
+#include <linux/ioport.h>
-extern void __iomem *twd_base;
+struct twd_local_timer {
+ struct resource res[2];
+};
-void twd_timer_setup(struct clock_event_device *);
-void twd_timer_stop(struct clock_event_device *);
+#define DEFINE_TWD_LOCAL_TIMER(name,base,irq) \
+struct twd_local_timer name __initdata = { \
+ .res = { \
+ DEFINE_RES_MEM(base, 0x10), \
+ DEFINE_RES_IRQ(irq), \
+ }, \
+};
+
+int twd_local_timer_register(struct twd_local_timer *);
+
+#ifdef CONFIG_HAVE_ARM_TWD
+void twd_local_timer_of_register(void);
+#else
+static inline void twd_local_timer_of_register(void)
+{
+}
+#endif
#endif
diff --git a/arch/arm/include/asm/socket.h b/arch/arm/include/asm/socket.h
index dec6f9afb3cf..6433cadb6ed4 100644
--- a/arch/arm/include/asm/socket.h
+++ b/arch/arm/include/asm/socket.h
@@ -64,5 +64,9 @@
#define SO_WIFI_STATUS 41
#define SCM_WIFI_STATUS SO_WIFI_STATUS
+#define SO_PEEK_OFF 42
+
+/* Instruct lower device to use last 4-bytes of skb data as FCS */
+#define SO_NOFCS 43
#endif /* _ASM_SOCKET_H */
diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile
index 43b740d0e374..f16d7652f34b 100644
--- a/arch/arm/kernel/Makefile
+++ b/arch/arm/kernel/Makefile
@@ -62,9 +62,6 @@ obj-$(CONFIG_SWP_EMULATE) += swp_emulate.o
CFLAGS_swp_emulate.o := -Wa,-march=armv7-a
obj-$(CONFIG_HAVE_HW_BREAKPOINT) += hw_breakpoint.o
-obj-$(CONFIG_CRUNCH) += crunch.o crunch-bits.o
-AFLAGS_crunch-bits.o := -Wa,-mcpu=ep9312
-
obj-$(CONFIG_CPU_XSCALE) += xscale-cp0.o
obj-$(CONFIG_CPU_XSC3) += xscale-cp0.o
obj-$(CONFIG_CPU_MOHAWK) += xscale-cp0.o
diff --git a/arch/arm/kernel/bios32.c b/arch/arm/kernel/bios32.c
index f58ba3589908..632df9a66f8c 100644
--- a/arch/arm/kernel/bios32.c
+++ b/arch/arm/kernel/bios32.c
@@ -16,7 +16,6 @@
#include <asm/mach/pci.h>
static int debug_pci;
-static int use_firmware;
/*
* We can't use pci_find_device() here since we are
@@ -295,28 +294,6 @@ static inline int pdev_bad_for_parity(struct pci_dev *dev)
}
/*
- * Adjust the device resources from bus-centric to Linux-centric.
- */
-static void __devinit
-pdev_fixup_device_resources(struct pci_sys_data *root, struct pci_dev *dev)
-{
- resource_size_t offset;
- int i;
-
- for (i = 0; i < PCI_NUM_RESOURCES; i++) {
- if (dev->resource[i].start == 0)
- continue;
- if (dev->resource[i].flags & IORESOURCE_MEM)
- offset = root->mem_offset;
- else
- offset = root->io_offset;
-
- dev->resource[i].start += offset;
- dev->resource[i].end += offset;
- }
-}
-
-/*
* pcibios_fixup_bus - Called after each bus is probed,
* but before its children are examined.
*/
@@ -333,8 +310,6 @@ void pcibios_fixup_bus(struct pci_bus *bus)
list_for_each_entry(dev, &bus->devices, bus_list) {
u16 status;
- pdev_fixup_device_resources(root, dev);
-
pci_read_config_word(dev, PCI_STATUS, &status);
/*
@@ -400,43 +375,6 @@ EXPORT_SYMBOL(pcibios_fixup_bus);
#endif
/*
- * Convert from Linux-centric to bus-centric addresses for bridge devices.
- */
-void
-pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
- struct resource *res)
-{
- struct pci_sys_data *root = dev->sysdata;
- unsigned long offset = 0;
-
- if (res->flags & IORESOURCE_IO)
- offset = root->io_offset;
- if (res->flags & IORESOURCE_MEM)
- offset = root->mem_offset;
-
- region->start = res->start - offset;
- region->end = res->end - offset;
-}
-EXPORT_SYMBOL(pcibios_resource_to_bus);
-
-void __devinit
-pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
- struct pci_bus_region *region)
-{
- struct pci_sys_data *root = dev->sysdata;
- unsigned long offset = 0;
-
- if (res->flags & IORESOURCE_IO)
- offset = root->io_offset;
- if (res->flags & IORESOURCE_MEM)
- offset = root->mem_offset;
-
- res->start = region->start + offset;
- res->end = region->end + offset;
-}
-EXPORT_SYMBOL(pcibios_bus_to_resource);
-
-/*
* Swizzle the device pin each time we cross a bridge.
* This might update pin and returns the slot number.
*/
@@ -497,10 +435,10 @@ static void __init pcibios_init_hw(struct hw_pci *hw)
if (ret > 0) {
if (list_empty(&sys->resources)) {
- pci_add_resource(&sys->resources,
- &ioport_resource);
- pci_add_resource(&sys->resources,
- &iomem_resource);
+ pci_add_resource_offset(&sys->resources,
+ &ioport_resource, sys->io_offset);
+ pci_add_resource_offset(&sys->resources,
+ &iomem_resource, sys->mem_offset);
}
sys->bus = hw->scan(nr, sys);
@@ -525,6 +463,7 @@ void __init pci_common_init(struct hw_pci *hw)
INIT_LIST_HEAD(&hw->buses);
+ pci_add_flags(PCI_REASSIGN_ALL_RSRC);
if (hw->preinit)
hw->preinit();
pcibios_init_hw(hw);
@@ -536,7 +475,7 @@ void __init pci_common_init(struct hw_pci *hw)
list_for_each_entry(sys, &hw->buses, node) {
struct pci_bus *bus = sys->bus;
- if (!use_firmware) {
+ if (!pci_has_flag(PCI_PROBE_ONLY)) {
/*
* Size the bridge windows.
*/
@@ -573,7 +512,7 @@ char * __init pcibios_setup(char *str)
debug_pci = 1;
return NULL;
} else if (!strcmp(str, "firmware")) {
- use_firmware = 1;
+ pci_add_flags(PCI_PROBE_ONLY);
return NULL;
}
return str;
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
index be16a48007b4..22f0ed324f37 100644
--- a/arch/arm/kernel/entry-armv.S
+++ b/arch/arm/kernel/entry-armv.S
@@ -19,7 +19,9 @@
#include <asm/glue-df.h>
#include <asm/glue-pf.h>
#include <asm/vfpmacros.h>
+#ifndef CONFIG_MULTI_IRQ_HANDLER
#include <mach/entry-macro.S>
+#endif
#include <asm/thread_notify.h>
#include <asm/unwind.h>
#include <asm/unistd.h>
@@ -1101,7 +1103,6 @@ __stubs_start:
* get out of that mode without clobbering one register.
*/
vector_fiq:
- disable_fiq
subs pc, lr, #4
/*=============================================================================
diff --git a/arch/arm/kernel/entry-common.S b/arch/arm/kernel/entry-common.S
index 9fd0ba90c1d2..54ee265dd819 100644
--- a/arch/arm/kernel/entry-common.S
+++ b/arch/arm/kernel/entry-common.S
@@ -10,9 +10,15 @@
#include <asm/unistd.h>
#include <asm/ftrace.h>
-#include <mach/entry-macro.S>
#include <asm/unwind.h>
+#ifdef CONFIG_NEED_RET_TO_USER
+#include <mach/entry-macro.S>
+#else
+ .macro arch_ret_to_user, tmp1, tmp2
+ .endm
+#endif
+
#include "entry-header.S"
diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c
index b2abfa18f137..8a89d3b7626b 100644
--- a/arch/arm/kernel/perf_event.c
+++ b/arch/arm/kernel/perf_event.c
@@ -539,6 +539,10 @@ static int armpmu_event_init(struct perf_event *event)
int err = 0;
atomic_t *active_events = &armpmu->active_events;
+ /* does not support taken branch sampling */
+ if (has_branch_stack(event))
+ return -EOPNOTSUPP;
+
if (armpmu->map_event(event) == -ENOENT)
return -ENOENT;
diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c
index 008e7ce766a7..d3eca4524533 100644
--- a/arch/arm/kernel/process.c
+++ b/arch/arm/kernel/process.c
@@ -244,9 +244,7 @@ void cpu_idle(void)
leds_event(led_idle_end);
rcu_idle_exit();
tick_nohz_idle_exit();
- preempt_enable_no_resched();
- schedule();
- preempt_disable();
+ schedule_preempt_disabled();
}
}
@@ -540,8 +538,7 @@ int vectors_user_mapping(void)
struct mm_struct *mm = current->mm;
return install_special_mapping(mm, 0xffff0000, PAGE_SIZE,
VM_READ | VM_EXEC |
- VM_MAYREAD | VM_MAYEXEC |
- VM_ALWAYSDUMP | VM_RESERVED,
+ VM_MAYREAD | VM_MAYEXEC | VM_RESERVED,
NULL);
}
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
index cdeb727527d3..8f8cce2c46c4 100644
--- a/arch/arm/kernel/smp.c
+++ b/arch/arm/kernel/smp.c
@@ -246,6 +246,8 @@ static void __cpuinit smp_store_cpu_info(unsigned int cpuid)
store_cpu_topology(cpuid);
}
+static void percpu_timer_setup(void);
+
/*
* This is the secondary CPU boot entry. We're using this CPUs
* idle thread stack, but a set of temporary page tables.
@@ -295,13 +297,6 @@ asmlinkage void __cpuinit secondary_start_kernel(void)
*/
percpu_timer_setup();
- while (!cpu_active(cpu))
- cpu_relax();
-
- /*
- * cpu_active bit is set, so it's safe to enalbe interrupts
- * now.
- */
local_irq_enable();
local_fiq_enable();
@@ -459,7 +454,20 @@ static void __cpuinit broadcast_timer_setup(struct clock_event_device *evt)
clockevents_register_device(evt);
}
-void __cpuinit percpu_timer_setup(void)
+static struct local_timer_ops *lt_ops;
+
+#ifdef CONFIG_LOCAL_TIMERS
+int local_timer_register(struct local_timer_ops *ops)
+{
+ if (lt_ops)
+ return -EBUSY;
+
+ lt_ops = ops;
+ return 0;
+}
+#endif
+
+static void __cpuinit percpu_timer_setup(void)
{
unsigned int cpu = smp_processor_id();
struct clock_event_device *evt = &per_cpu(percpu_clockevent, cpu);
@@ -467,7 +475,7 @@ void __cpuinit percpu_timer_setup(void)
evt->cpumask = cpumask_of(cpu);
evt->broadcast = smp_timer_broadcast;
- if (local_timer_setup(evt))
+ if (!lt_ops || lt_ops->setup(evt))
broadcast_timer_setup(evt);
}
@@ -482,7 +490,8 @@ static void percpu_timer_stop(void)
unsigned int cpu = smp_processor_id();
struct clock_event_device *evt = &per_cpu(percpu_clockevent, cpu);
- local_timer_stop(evt);
+ if (lt_ops)
+ lt_ops->stop(evt);
}
#endif
diff --git a/arch/arm/kernel/smp_twd.c b/arch/arm/kernel/smp_twd.c
index 7a79b24597b2..fef42b21cecb 100644
--- a/arch/arm/kernel/smp_twd.c
+++ b/arch/arm/kernel/smp_twd.c
@@ -18,20 +18,23 @@
#include <linux/smp.h>
#include <linux/jiffies.h>
#include <linux/clockchips.h>
-#include <linux/irq.h>
+#include <linux/interrupt.h>
#include <linux/io.h>
+#include <linux/of_irq.h>
+#include <linux/of_address.h>
#include <asm/smp_twd.h>
#include <asm/localtimer.h>
#include <asm/hardware/gic.h>
/* set up by the platform code */
-void __iomem *twd_base;
+static void __iomem *twd_base;
static struct clk *twd_clk;
static unsigned long twd_timer_rate;
static struct clock_event_device __percpu **twd_evt;
+static int twd_ppi;
static void twd_set_mode(enum clock_event_mode mode,
struct clock_event_device *clk)
@@ -77,7 +80,7 @@ static int twd_set_next_event(unsigned long evt,
* If a local timer interrupt has occurred, acknowledge and return 1.
* Otherwise, return 0.
*/
-int twd_timer_ack(void)
+static int twd_timer_ack(void)
{
if (__raw_readl(twd_base + TWD_TIMER_INTSTAT)) {
__raw_writel(1, twd_base + TWD_TIMER_INTSTAT);
@@ -87,7 +90,7 @@ int twd_timer_ack(void)
return 0;
}
-void twd_timer_stop(struct clock_event_device *clk)
+static void twd_timer_stop(struct clock_event_device *clk)
{
twd_set_mode(CLOCK_EVT_MODE_UNUSED, clk);
disable_percpu_irq(clk->irq);
@@ -222,28 +225,10 @@ static struct clk *twd_get_clock(void)
/*
* Setup the local clock events for a CPU.
*/
-void __cpuinit twd_timer_setup(struct clock_event_device *clk)
+static int __cpuinit twd_timer_setup(struct clock_event_device *clk)
{
struct clock_event_device **this_cpu_clk;
- if (!twd_evt) {
- int err;
-
- twd_evt = alloc_percpu(struct clock_event_device *);
- if (!twd_evt) {
- pr_err("twd: can't allocate memory\n");
- return;
- }
-
- err = request_percpu_irq(clk->irq, twd_handler,
- "twd", twd_evt);
- if (err) {
- pr_err("twd: can't register interrupt %d (%d)\n",
- clk->irq, err);
- return;
- }
- }
-
if (!twd_clk)
twd_clk = twd_get_clock();
@@ -260,6 +245,7 @@ void __cpuinit twd_timer_setup(struct clock_event_device *clk)
clk->rating = 350;
clk->set_mode = twd_set_mode;
clk->set_next_event = twd_set_next_event;
+ clk->irq = twd_ppi;
this_cpu_clk = __this_cpu_ptr(twd_evt);
*this_cpu_clk = clk;
@@ -267,4 +253,95 @@ void __cpuinit twd_timer_setup(struct clock_event_device *clk)
clockevents_config_and_register(clk, twd_timer_rate,
0xf, 0xffffffff);
enable_percpu_irq(clk->irq, 0);
+
+ return 0;
+}
+
+static struct local_timer_ops twd_lt_ops __cpuinitdata = {
+ .setup = twd_timer_setup,
+ .stop = twd_timer_stop,
+};
+
+static int __init twd_local_timer_common_register(void)
+{
+ int err;
+
+ twd_evt = alloc_percpu(struct clock_event_device *);
+ if (!twd_evt) {
+ err = -ENOMEM;
+ goto out_free;
+ }
+
+ err = request_percpu_irq(twd_ppi, twd_handler, "twd", twd_evt);
+ if (err) {
+ pr_err("twd: can't register interrupt %d (%d)\n", twd_ppi, err);
+ goto out_free;
+ }
+
+ err = local_timer_register(&twd_lt_ops);
+ if (err)
+ goto out_irq;
+
+ return 0;
+
+out_irq:
+ free_percpu_irq(twd_ppi, twd_evt);
+out_free:
+ iounmap(twd_base);
+ twd_base = NULL;
+ free_percpu(twd_evt);
+
+ return err;
}
+
+int __init twd_local_timer_register(struct twd_local_timer *tlt)
+{
+ if (twd_base || twd_evt)
+ return -EBUSY;
+
+ twd_ppi = tlt->res[1].start;
+
+ twd_base = ioremap(tlt->res[0].start, resource_size(&tlt->res[0]));
+ if (!twd_base)
+ return -ENOMEM;
+
+ return twd_local_timer_common_register();
+}
+
+#ifdef CONFIG_OF
+const static struct of_device_id twd_of_match[] __initconst = {
+ { .compatible = "arm,cortex-a9-twd-timer", },
+ { .compatible = "arm,cortex-a5-twd-timer", },
+ { .compatible = "arm,arm11mp-twd-timer", },
+ { },
+};
+
+void __init twd_local_timer_of_register(void)
+{
+ struct device_node *np;
+ int err;
+
+ np = of_find_matching_node(NULL, twd_of_match);
+ if (!np) {
+ err = -ENODEV;
+ goto out;
+ }
+
+ twd_ppi = irq_of_parse_and_map(np, 0);
+ if (!twd_ppi) {
+ err = -EINVAL;
+ goto out;
+ }
+
+ twd_base = of_iomap(np, 0);
+ if (!twd_base) {
+ err = -ENOMEM;
+ goto out;
+ }
+
+ err = twd_local_timer_common_register();
+
+out:
+ WARN(err, "twd_local_timer_of_register failed (%d)\n", err);
+}
+#endif
diff --git a/arch/arm/mach-at91/cpuidle.c b/arch/arm/mach-at91/cpuidle.c
index a851e6c98421..555d956b3a57 100644
--- a/arch/arm/mach-at91/cpuidle.c
+++ b/arch/arm/mach-at91/cpuidle.c
@@ -39,20 +39,15 @@ static int at91_enter_idle(struct cpuidle_device *dev,
{
struct timeval before, after;
int idle_time;
- u32 saved_lpr;
local_irq_disable();
do_gettimeofday(&before);
if (index == 0)
/* Wait for interrupt state */
cpu_do_idle();
- else if (index == 1) {
- asm("b 1f; .align 5; 1:");
- asm("mcr p15, 0, r0, c7, c10, 4"); /* drain write buffer */
- saved_lpr = sdram_selfrefresh_enable();
- cpu_do_idle();
- sdram_selfrefresh_disable(saved_lpr);
- }
+ else if (index == 1)
+ at91_standby();
+
do_gettimeofday(&after);
local_irq_enable();
idle_time = (after.tv_sec - before.tv_sec) * USEC_PER_SEC +
diff --git a/arch/arm/mach-at91/include/mach/entry-macro.S b/arch/arm/mach-at91/include/mach/entry-macro.S
index 423eea0ed74c..903bf205a333 100644
--- a/arch/arm/mach-at91/include/mach/entry-macro.S
+++ b/arch/arm/mach-at91/include/mach/entry-macro.S
@@ -13,17 +13,11 @@
#include <mach/hardware.h>
#include <mach/at91_aic.h>
- .macro disable_fiq
- .endm
-
.macro get_irqnr_preamble, base, tmp
ldr \base, =at91_aic_base @ base virtual address of AIC peripheral
ldr \base, [\base]
.endm
- .macro arch_ret_to_user, tmp1, tmp2
- .endm
-
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
ldr \irqnr, [\base, #AT91_AIC_IVR] @ read IRQ vector register: de-asserts nIRQ to processor (and clears interrupt)
ldr \irqstat, [\base, #AT91_AIC_ISR] @ read interrupt source number
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index 87be5aa18753..d554e6771b4e 100644
--- a/arch/arm/mach-at91/pm.c
+++ b/arch/arm/mach-at91/pm.c
@@ -198,7 +198,6 @@ extern u32 at91_slow_clock_sz;
static int at91_pm_enter(suspend_state_t state)
{
- u32 saved_lpr;
at91_gpio_suspend();
at91_irq_suspend();
@@ -254,16 +253,7 @@ static int at91_pm_enter(suspend_state_t state)
* For ARM 926 based chips, this requirement is weaker
* as at91sam9 can access a RAM in self-refresh mode.
*/
- asm volatile ( "mov r0, #0\n\t"
- "b 1f\n\t"
- ".align 5\n\t"
- "1: mcr p15, 0, r0, c7, c10, 4\n\t"
- : /* no output */
- : /* no input */
- : "r0");
- saved_lpr = sdram_selfrefresh_enable();
- wait_for_interrupt_enable();
- sdram_selfrefresh_disable(saved_lpr);
+ at91_standby();
break;
case PM_SUSPEND_ON:
diff --git a/arch/arm/mach-at91/pm.h b/arch/arm/mach-at91/pm.h
index 218d816427c0..bba9ce1aaaec 100644
--- a/arch/arm/mach-at91/pm.h
+++ b/arch/arm/mach-at91/pm.h
@@ -1,3 +1,16 @@
+/*
+ * AT91 Power Management
+ *
+ * Copyright (C) 2005 David Brownell
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+#ifndef __ARCH_ARM_MACH_AT91_PM
+#define __ARCH_ARM_MACH_AT91_PM
+
#ifdef CONFIG_ARCH_AT91RM9200
#include <mach/at91rm9200_mc.h>
@@ -11,18 +24,25 @@
* still in self-refresh is "not recommended", but seems to work.
*/
-static inline u32 sdram_selfrefresh_enable(void)
+static inline void at91rm9200_standby(void)
{
- u32 saved_lpr = at91_sys_read(AT91_SDRAMC_LPR);
-
- at91_sys_write(AT91_SDRAMC_LPR, 0);
- at91_sys_write(AT91_SDRAMC_SRR, 1);
- return saved_lpr;
+ u32 lpr = at91_sys_read(AT91_SDRAMC_LPR);
+
+ asm volatile(
+ "b 1f\n\t"
+ ".align 5\n\t"
+ "1: mcr p15, 0, %0, c7, c10, 4\n\t"
+ " str %0, [%1, %2]\n\t"
+ " str %3, [%1, %4]\n\t"
+ " mcr p15, 0, %0, c7, c0, 4\n\t"
+ " str %5, [%1, %2]"
+ :
+ : "r" (0), "r" (AT91_BASE_SYS), "r" (AT91_SDRAMC_LPR),
+ "r" (1), "r" (AT91_SDRAMC_SRR),
+ "r" (lpr));
}
-#define sdram_selfrefresh_disable(saved_lpr) at91_sys_write(AT91_SDRAMC_LPR, saved_lpr)
-#define wait_for_interrupt_enable() asm volatile ("mcr p15, 0, %0, c7, c0, 4" \
- : : "r" (0))
+#define at91_standby at91rm9200_standby
#elif defined(CONFIG_ARCH_AT91SAM9G45)
#include <mach/at91sam9_ddrsdr.h>
@@ -30,14 +50,12 @@ static inline u32 sdram_selfrefresh_enable(void)
/* We manage both DDRAM/SDRAM controllers, we need more than one value to
* remember.
*/
-static u32 saved_lpr1;
-
-static inline u32 sdram_selfrefresh_enable(void)
+static inline void at91sam9g45_standby(void)
{
- /* Those tow values allow us to delay self-refresh activation
+ /* Those two values allow us to delay self-refresh activation
* to the maximum. */
u32 lpr0, lpr1;
- u32 saved_lpr0;
+ u32 saved_lpr0, saved_lpr1;
saved_lpr1 = at91_ramc_read(1, AT91_DDRSDRC_LPR);
lpr1 = saved_lpr1 & ~AT91_DDRSDRC_LPCB;
@@ -51,15 +69,13 @@ static inline u32 sdram_selfrefresh_enable(void)
at91_ramc_write(0, AT91_DDRSDRC_LPR, lpr0);
at91_ramc_write(1, AT91_DDRSDRC_LPR, lpr1);
- return saved_lpr0;
+ cpu_do_idle();
+
+ at91_ramc_write(0, AT91_DDRSDRC_LPR, saved_lpr0);
+ at91_ramc_write(1, AT91_DDRSDRC_LPR, saved_lpr1);
}
-#define sdram_selfrefresh_disable(saved_lpr0) \
- do { \
- at91_ramc_write(0, AT91_DDRSDRC_LPR, saved_lpr0); \
- at91_ramc_write(1, AT91_DDRSDRC_LPR, saved_lpr1); \
- } while (0)
-#define wait_for_interrupt_enable() cpu_do_idle()
+#define at91_standby at91sam9g45_standby
#else
#include <mach/at91sam9_sdramc.h>
@@ -72,18 +88,23 @@ static inline u32 sdram_selfrefresh_enable(void)
#warning Assuming EB1 SDRAM controller is *NOT* used
#endif
-static inline u32 sdram_selfrefresh_enable(void)
+static inline void at91sam9_standby(void)
{
u32 saved_lpr, lpr;
saved_lpr = at91_ramc_read(0, AT91_SDRAMC_LPR);
lpr = saved_lpr & ~AT91_SDRAMC_LPCB;
- at91_ramc_write(0, AT91_SDRAMC_LPR, lpr | AT91_SDRAMC_LPCB_SELF_REFRESH);
- return saved_lpr;
+ at91_ramc_write(0, AT91_SDRAMC_LPR, lpr |
+ AT91_SDRAMC_LPCB_SELF_REFRESH);
+
+ cpu_do_idle();
+
+ at91_ramc_write(0, AT91_SDRAMC_LPR, saved_lpr);
}
-#define sdram_selfrefresh_disable(saved_lpr) at91_ramc_write(0, AT91_SDRAMC_LPR, saved_lpr)
-#define wait_for_interrupt_enable() cpu_do_idle()
+#define at91_standby at91sam9_standby
+
+#endif
#endif
diff --git a/arch/arm/mach-bcmring/dma.c b/arch/arm/mach-bcmring/dma.c
index 1024396797e1..e5fd241fccdc 100644
--- a/arch/arm/mach-bcmring/dma.c
+++ b/arch/arm/mach-bcmring/dma.c
@@ -35,7 +35,6 @@
#include <linux/pfn.h>
#include <linux/atomic.h>
-#include <linux/sched.h>
#include <mach/dma.h>
/* ---- Public Variables ------------------------------------------------- */
diff --git a/arch/arm/mach-bcmring/include/mach/entry-macro.S b/arch/arm/mach-bcmring/include/mach/entry-macro.S
index 94c950d783ba..2f316f0e6e69 100644
--- a/arch/arm/mach-bcmring/include/mach/entry-macro.S
+++ b/arch/arm/mach-bcmring/include/mach/entry-macro.S
@@ -21,9 +21,6 @@
#include <mach/hardware.h>
#include <mach/csp/mm_io.h>
- .macro disable_fiq
- .endm
-
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
ldr \base, =(MM_IO_BASE_INTC0)
ldr \irqstat, [\base, #0] @ get status
@@ -77,6 +74,3 @@
.macro get_irqnr_preamble, base, tmp
.endm
-
- .macro arch_ret_to_user, tmp1, tmp2
- .endm
diff --git a/arch/arm/mach-clps711x/include/mach/entry-macro.S b/arch/arm/mach-clps711x/include/mach/entry-macro.S
index 90fa2f70489f..125af59d7a29 100644
--- a/arch/arm/mach-clps711x/include/mach/entry-macro.S
+++ b/arch/arm/mach-clps711x/include/mach/entry-macro.S
@@ -10,15 +10,9 @@
#include <mach/hardware.h>
#include <asm/hardware/clps7111.h>
- .macro disable_fiq
- .endm
-
.macro get_irqnr_preamble, base, tmp
.endm
- .macro arch_ret_to_user, tmp1, tmp2
- .endm
-
#if (INTSR2 - INTSR1) != (INTMR2 - INTMR1)
#error INTSR stride != INTMR stride
#endif
diff --git a/arch/arm/mach-cns3xxx/include/mach/entry-macro.S b/arch/arm/mach-cns3xxx/include/mach/entry-macro.S
deleted file mode 100644
index 01c57df5f716..000000000000
--- a/arch/arm/mach-cns3xxx/include/mach/entry-macro.S
+++ /dev/null
@@ -1,15 +0,0 @@
-/*
- * Low-level IRQ helper macros for Cavium Networks platforms
- *
- * Copyright 2008 Cavium Networks
- *
- * This file is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License, Version 2, as
- * published by the Free Software Foundation.
- */
-
- .macro disable_fiq
- .endm
-
- .macro arch_ret_to_user, tmp1, tmp2
- .endm
diff --git a/arch/arm/mach-cns3xxx/pcie.c b/arch/arm/mach-cns3xxx/pcie.c
index e159d69967c9..79d001f831e0 100644
--- a/arch/arm/mach-cns3xxx/pcie.c
+++ b/arch/arm/mach-cns3xxx/pcie.c
@@ -155,8 +155,8 @@ static int cns3xxx_pci_setup(int nr, struct pci_sys_data *sys)
BUG_ON(request_resource(&iomem_resource, res_io) ||
request_resource(&iomem_resource, res_mem));
- pci_add_resource(&sys->resources, res_io);
- pci_add_resource(&sys->resources, res_mem);
+ pci_add_resource_offset(&sys->resources, res_io, sys->io_offset);
+ pci_add_resource_offset(&sys->resources, res_mem, sys->mem_offset);
return 1;
}
diff --git a/arch/arm/mach-davinci/board-dm355-evm.c b/arch/arm/mach-davinci/board-dm355-evm.c
index 275341f159fb..82ed753fb360 100644
--- a/arch/arm/mach-davinci/board-dm355-evm.c
+++ b/arch/arm/mach-davinci/board-dm355-evm.c
@@ -26,13 +26,14 @@
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
-#include <mach/dm355.h>
#include <mach/i2c.h>
#include <mach/serial.h>
#include <mach/nand.h>
#include <mach/mmc.h>
#include <mach/usb.h>
+#include "davinci.h"
+
/* NOTE: this is geared for the standard config, with a socketed
* 2 GByte Micron NAND (MT29F16G08FAA) using 128KB sectors. If you
* swap chips, maybe with a different block size, partitioning may
diff --git a/arch/arm/mach-davinci/board-dm355-leopard.c b/arch/arm/mach-davinci/board-dm355-leopard.c
index e99db28181ae..d74a8b3445fb 100644
--- a/arch/arm/mach-davinci/board-dm355-leopard.c
+++ b/arch/arm/mach-davinci/board-dm355-leopard.c
@@ -23,13 +23,14 @@
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
-#include <mach/dm355.h>
#include <mach/i2c.h>
#include <mach/serial.h>
#include <mach/nand.h>
#include <mach/mmc.h>
#include <mach/usb.h>
+#include "davinci.h"
+
/* NOTE: this is geared for the standard config, with a socketed
* 2 GByte Micron NAND (MT29F16G08FAA) using 128KB sectors. If you
* swap chips, maybe with a different block size, partitioning may
diff --git a/arch/arm/mach-davinci/board-dm365-evm.c b/arch/arm/mach-davinci/board-dm365-evm.c
index 849311d3cb7c..5bce2b83bb4f 100644
--- a/arch/arm/mach-davinci/board-dm365-evm.c
+++ b/arch/arm/mach-davinci/board-dm365-evm.c
@@ -32,7 +32,6 @@
#include <asm/mach/arch.h>
#include <mach/mux.h>
-#include <mach/dm365.h>
#include <mach/common.h>
#include <mach/i2c.h>
#include <mach/serial.h>
@@ -42,6 +41,8 @@
#include <media/tvp514x.h>
+#include "davinci.h"
+
static inline int have_imager(void)
{
/* REVISIT when it's supported, trigger via Kconfig */
diff --git a/arch/arm/mach-davinci/board-dm644x-evm.c b/arch/arm/mach-davinci/board-dm644x-evm.c
index 1247ecdcf752..864f676eccac 100644
--- a/arch/arm/mach-davinci/board-dm644x-evm.c
+++ b/arch/arm/mach-davinci/board-dm644x-evm.c
@@ -30,7 +30,6 @@
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
-#include <mach/dm644x.h>
#include <mach/common.h>
#include <mach/i2c.h>
#include <mach/serial.h>
@@ -40,6 +39,8 @@
#include <mach/usb.h>
#include <mach/aemif.h>
+#include "davinci.h"
+
#define DM644X_EVM_PHY_ID "davinci_mdio-0:01"
#define LXT971_PHY_ID (0x001378e2)
#define LXT971_PHY_MASK (0xfffffff0)
@@ -189,7 +190,7 @@ static struct platform_device davinci_fb_device = {
.num_resources = 0,
};
-static struct tvp514x_platform_data tvp5146_pdata = {
+static struct tvp514x_platform_data dm644xevm_tvp5146_pdata = {
.clk_polarity = 0,
.hs_polarity = 1,
.vs_polarity = 1
@@ -197,7 +198,7 @@ static struct tvp514x_platform_data tvp5146_pdata = {
#define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL)
/* Inputs available at the TVP5146 */
-static struct v4l2_input tvp5146_inputs[] = {
+static struct v4l2_input dm644xevm_tvp5146_inputs[] = {
{
.index = 0,
.name = "Composite",
@@ -217,7 +218,7 @@ static struct v4l2_input tvp5146_inputs[] = {
* ouput that goes to vpfe. There is a one to one correspondence
* with tvp5146_inputs
*/
-static struct vpfe_route tvp5146_routes[] = {
+static struct vpfe_route dm644xevm_tvp5146_routes[] = {
{
.input = INPUT_CVBS_VI2B,
.output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
@@ -228,13 +229,13 @@ static struct vpfe_route tvp5146_routes[] = {
},
};
-static struct vpfe_subdev_info vpfe_sub_devs[] = {
+static struct vpfe_subdev_info dm644xevm_vpfe_sub_devs[] = {
{
.name = "tvp5146",
.grp_id = 0,
- .num_inputs = ARRAY_SIZE(tvp5146_inputs),
- .inputs = tvp5146_inputs,
- .routes = tvp5146_routes,
+ .num_inputs = ARRAY_SIZE(dm644xevm_tvp5146_inputs),
+ .inputs = dm644xevm_tvp5146_inputs,
+ .routes = dm644xevm_tvp5146_routes,
.can_route = 1,
.ccdc_if_params = {
.if_type = VPFE_BT656,
@@ -243,15 +244,15 @@ static struct vpfe_subdev_info vpfe_sub_devs[] = {
},
.board_info = {
I2C_BOARD_INFO("tvp5146", 0x5d),
- .platform_data = &tvp5146_pdata,
+ .platform_data = &dm644xevm_tvp5146_pdata,
},
},
};
-static struct vpfe_config vpfe_cfg = {
- .num_subdevs = ARRAY_SIZE(vpfe_sub_devs),
+static struct vpfe_config dm644xevm_capture_cfg = {
+ .num_subdevs = ARRAY_SIZE(dm644xevm_vpfe_sub_devs),
.i2c_adapter_id = 1,
- .sub_devs = vpfe_sub_devs,
+ .sub_devs = dm644xevm_vpfe_sub_devs,
.card_name = "DM6446 EVM",
.ccdc = "DM6446 CCDC",
};
@@ -624,8 +625,6 @@ static struct davinci_uart_config uart_config __initdata = {
static void __init
davinci_evm_map_io(void)
{
- /* setup input configuration for VPFE input devices */
- dm644x_set_vpfe_config(&vpfe_cfg);
dm644x_init();
}
@@ -697,6 +696,7 @@ static __init void davinci_evm_init(void)
evm_init_i2c();
davinci_setup_mmc(0, &dm6446evm_mmc_config);
+ dm644x_init_video(&dm644xevm_capture_cfg);
davinci_serial_init(&uart_config);
dm644x_init_asp(&dm644x_evm_snd_data);
diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c b/arch/arm/mach-davinci/board-dm646x-evm.c
index 872ac69fa049..d72ab948d630 100644
--- a/arch/arm/mach-davinci/board-dm646x-evm.c
+++ b/arch/arm/mach-davinci/board-dm646x-evm.c
@@ -36,7 +36,6 @@
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
-#include <mach/dm646x.h>
#include <mach/common.h>
#include <mach/serial.h>
#include <mach/i2c.h>
@@ -45,6 +44,7 @@
#include <mach/cdce949.h>
#include <mach/aemif.h>
+#include "davinci.h"
#include "clock.h"
#define NAND_BLOCK_SIZE SZ_128K
@@ -410,8 +410,6 @@ static struct davinci_i2c_platform_data i2c_pdata = {
.bus_delay = 0 /* usec */,
};
-#define VIDCLKCTL_OFFSET (DAVINCI_SYSTEM_MODULE_BASE + 0x38)
-#define VSCLKDIS_OFFSET (DAVINCI_SYSTEM_MODULE_BASE + 0x6c)
#define VCH2CLK_MASK (BIT_MASK(10) | BIT_MASK(9) | BIT_MASK(8))
#define VCH2CLK_SYSCLK8 (BIT(9))
#define VCH2CLK_AUXCLK (BIT(9) | BIT(8))
@@ -429,8 +427,6 @@ static struct davinci_i2c_platform_data i2c_pdata = {
#define TVP5147_CH0 "tvp514x-0"
#define TVP5147_CH1 "tvp514x-1"
-static void __iomem *vpif_vidclkctl_reg;
-static void __iomem *vpif_vsclkdis_reg;
/* spin lock for updating above registers */
static spinlock_t vpif_reg_lock;
@@ -441,14 +437,14 @@ static int set_vpif_clock(int mux_mode, int hd)
int val = 0;
int err = 0;
- if (!vpif_vidclkctl_reg || !vpif_vsclkdis_reg || !cpld_client)
+ if (!cpld_client)
return -ENXIO;
/* disable the clock */
spin_lock_irqsave(&vpif_reg_lock, flags);
- value = __raw_readl(vpif_vsclkdis_reg);
+ value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
value |= (VIDCH3CLK | VIDCH2CLK);
- __raw_writel(value, vpif_vsclkdis_reg);
+ __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
spin_unlock_irqrestore(&vpif_reg_lock, flags);
val = i2c_smbus_read_byte(cpld_client);
@@ -464,7 +460,7 @@ static int set_vpif_clock(int mux_mode, int hd)
if (err)
return err;
- value = __raw_readl(vpif_vidclkctl_reg);
+ value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
value &= ~(VCH2CLK_MASK);
value &= ~(VCH3CLK_MASK);
@@ -473,13 +469,13 @@ static int set_vpif_clock(int mux_mode, int hd)
else
value |= (VCH2CLK_AUXCLK | VCH3CLK_AUXCLK);
- __raw_writel(value, vpif_vidclkctl_reg);
+ __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
spin_lock_irqsave(&vpif_reg_lock, flags);
- value = __raw_readl(vpif_vsclkdis_reg);
+ value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
/* enable the clock */
value &= ~(VIDCH3CLK | VIDCH2CLK);
- __raw_writel(value, vpif_vsclkdis_reg);
+ __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
spin_unlock_irqrestore(&vpif_reg_lock, flags);
return 0;
@@ -564,7 +560,7 @@ static int setup_vpif_input_channel_mode(int mux_mode)
int val;
u32 value;
- if (!vpif_vidclkctl_reg || !cpld_client)
+ if (!cpld_client)
return -ENXIO;
val = i2c_smbus_read_byte(cpld_client);
@@ -572,7 +568,7 @@ static int setup_vpif_input_channel_mode(int mux_mode)
return val;
spin_lock_irqsave(&vpif_reg_lock, flags);
- value = __raw_readl(vpif_vidclkctl_reg);
+ value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
if (mux_mode) {
val &= VPIF_INPUT_TWO_CHANNEL;
value |= VIDCH1CLK;
@@ -580,7 +576,7 @@ static int setup_vpif_input_channel_mode(int mux_mode)
val |= VPIF_INPUT_ONE_CHANNEL;
value &= ~VIDCH1CLK;
}
- __raw_writel(value, vpif_vidclkctl_reg);
+ __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
spin_unlock_irqrestore(&vpif_reg_lock, flags);
err = i2c_smbus_write_byte(cpld_client, val);
@@ -674,12 +670,6 @@ static struct vpif_capture_config dm646x_vpif_capture_cfg = {
static void __init evm_init_video(void)
{
- vpif_vidclkctl_reg = ioremap(VIDCLKCTL_OFFSET, 4);
- vpif_vsclkdis_reg = ioremap(VSCLKDIS_OFFSET, 4);
- if (!vpif_vidclkctl_reg || !vpif_vsclkdis_reg) {
- pr_err("Can't map VPIF VIDCLKCTL or VSCLKDIS registers\n");
- return;
- }
spin_lock_init(&vpif_reg_lock);
dm646x_setup_vpif(&dm646x_vpif_display_config,
diff --git a/arch/arm/mach-davinci/board-neuros-osd2.c b/arch/arm/mach-davinci/board-neuros-osd2.c
index 8d34f513d415..a772bb45570a 100644
--- a/arch/arm/mach-davinci/board-neuros-osd2.c
+++ b/arch/arm/mach-davinci/board-neuros-osd2.c
@@ -30,7 +30,6 @@
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
-#include <mach/dm644x.h>
#include <mach/common.h>
#include <mach/i2c.h>
#include <mach/serial.h>
@@ -39,6 +38,8 @@
#include <mach/mmc.h>
#include <mach/usb.h>
+#include "davinci.h"
+
#define NEUROS_OSD2_PHY_ID "davinci_mdio-0:01"
#define LXT971_PHY_ID 0x001378e2
#define LXT971_PHY_MASK 0xfffffff0
diff --git a/arch/arm/mach-davinci/board-sffsdr.c b/arch/arm/mach-davinci/board-sffsdr.c
index 31da3c5b2ba3..76e675096104 100644
--- a/arch/arm/mach-davinci/board-sffsdr.c
+++ b/arch/arm/mach-davinci/board-sffsdr.c
@@ -35,13 +35,14 @@
#include <asm/mach/arch.h>
#include <asm/mach/flash.h>
-#include <mach/dm644x.h>
#include <mach/common.h>
#include <mach/i2c.h>
#include <mach/serial.h>
#include <mach/mux.h>
#include <mach/usb.h>
+#include "davinci.h"
+
#define SFFSDR_PHY_ID "davinci_mdio-0:01"
static struct mtd_partition davinci_sffsdr_nandflash_partition[] = {
/* U-Boot Environment: Block 0
diff --git a/arch/arm/mach-davinci/cpufreq.c b/arch/arm/mach-davinci/cpufreq.c
index 5bba7070f271..031048fec9f5 100644
--- a/arch/arm/mach-davinci/cpufreq.c
+++ b/arch/arm/mach-davinci/cpufreq.c
@@ -95,7 +95,7 @@ static int davinci_target(struct cpufreq_policy *policy,
if (freqs.old == freqs.new)
return ret;
- dev_dbg(&cpufreq.dev, "transition: %u --> %u\n", freqs.old, freqs.new);
+ dev_dbg(cpufreq.dev, "transition: %u --> %u\n", freqs.old, freqs.new);
ret = cpufreq_frequency_table_target(policy, pdata->freq_table,
freqs.new, relation, &idx);
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index 992c4c410185..b44dc844e15e 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -1026,7 +1026,7 @@ static int da850_round_armrate(struct clk *clk, unsigned long rate)
}
#endif
-int da850_register_pm(struct platform_device *pdev)
+int __init da850_register_pm(struct platform_device *pdev)
{
int ret;
struct davinci_pm_config *pdata = pdev->dev.platform_data;
diff --git a/arch/arm/mach-davinci/davinci.h b/arch/arm/mach-davinci/davinci.h
new file mode 100644
index 000000000000..9d708034b57f
--- /dev/null
+++ b/arch/arm/mach-davinci/davinci.h
@@ -0,0 +1,96 @@
+/*
+ * This file contains the processor specific definitions
+ * of the TI DM644x, DM355, DM365, and DM646x.
+ *
+ * Copyright (C) 2011 Texas Instruments Incorporated
+ * Copyright (c) 2007 Deep Root Systems, LLC
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+#ifndef __DAVINCI_H
+#define __DAVINCI_H
+
+#include <linux/clk.h>
+#include <linux/videodev2.h>
+#include <linux/davinci_emac.h>
+#include <linux/platform_device.h>
+#include <linux/spi/spi.h>
+
+#include <mach/asp.h>
+#include <mach/keyscan.h>
+#include <mach/hardware.h>
+
+#include <media/davinci/vpfe_capture.h>
+#include <media/davinci/vpif_types.h>
+
+#define DAVINCI_SYSTEM_MODULE_BASE 0x01c40000
+#define SYSMOD_VIDCLKCTL 0x38
+#define SYSMOD_VDD3P3VPWDN 0x48
+#define SYSMOD_VSCLKDIS 0x6c
+#define SYSMOD_PUPDCTL1 0x7c
+
+extern void __iomem *davinci_sysmod_base;
+#define DAVINCI_SYSMOD_VIRT(x) (davinci_sysmod_base + (x))
+void davinci_map_sysmod(void);
+
+/* DM355 base addresses */
+#define DM355_ASYNC_EMIF_CONTROL_BASE 0x01e10000
+#define DM355_ASYNC_EMIF_DATA_CE0_BASE 0x02000000
+
+#define ASP1_TX_EVT_EN 1
+#define ASP1_RX_EVT_EN 2
+
+/* DM365 base addresses */
+#define DM365_ASYNC_EMIF_CONTROL_BASE 0x01d10000
+#define DM365_ASYNC_EMIF_DATA_CE0_BASE 0x02000000
+#define DM365_ASYNC_EMIF_DATA_CE1_BASE 0x04000000
+
+/* DM644x base addresses */
+#define DM644X_ASYNC_EMIF_CONTROL_BASE 0x01e00000
+#define DM644X_ASYNC_EMIF_DATA_CE0_BASE 0x02000000
+#define DM644X_ASYNC_EMIF_DATA_CE1_BASE 0x04000000
+#define DM644X_ASYNC_EMIF_DATA_CE2_BASE 0x06000000
+#define DM644X_ASYNC_EMIF_DATA_CE3_BASE 0x08000000
+
+/* DM646x base addresses */
+#define DM646X_ASYNC_EMIF_CONTROL_BASE 0x20008000
+#define DM646X_ASYNC_EMIF_CS2_SPACE_BASE 0x42000000
+
+/* DM355 function declarations */
+void __init dm355_init(void);
+void dm355_init_spi0(unsigned chipselect_mask,
+ struct spi_board_info *info, unsigned len);
+void __init dm355_init_asp1(u32 evt_enable, struct snd_platform_data *pdata);
+void dm355_set_vpfe_config(struct vpfe_config *cfg);
+
+/* DM365 function declarations */
+void __init dm365_init(void);
+void __init dm365_init_asp(struct snd_platform_data *pdata);
+void __init dm365_init_vc(struct snd_platform_data *pdata);
+void __init dm365_init_ks(struct davinci_ks_platform_data *pdata);
+void __init dm365_init_rtc(void);
+void dm365_init_spi0(unsigned chipselect_mask,
+ struct spi_board_info *info, unsigned len);
+void dm365_set_vpfe_config(struct vpfe_config *cfg);
+
+/* DM644x function declarations */
+void __init dm644x_init(void);
+void __init dm644x_init_asp(struct snd_platform_data *pdata);
+int __init dm644x_init_video(struct vpfe_config *);
+
+/* DM646x function declarations */
+void __init dm646x_init(void);
+void __init dm646x_init_mcasp0(struct snd_platform_data *pdata);
+void __init dm646x_init_mcasp1(struct snd_platform_data *pdata);
+int __init dm646x_init_edma(struct edma_rsv_info *rsv);
+void dm646x_video_init(void);
+void dm646x_setup_vpif(struct vpif_display_config *,
+ struct vpif_capture_config *);
+#endif /*__DAVINCI_H */
diff --git a/arch/arm/mach-davinci/devices.c b/arch/arm/mach-davinci/devices.c
index 50c0156b4262..d2f9666284a7 100644
--- a/arch/arm/mach-davinci/devices.c
+++ b/arch/arm/mach-davinci/devices.c
@@ -23,6 +23,7 @@
#include <mach/mmc.h>
#include <mach/time.h>
+#include "davinci.h"
#include "clock.h"
#define DAVINCI_I2C_BASE 0x01C21000
@@ -33,8 +34,19 @@
#define DM365_MMCSD0_BASE 0x01D11000
#define DM365_MMCSD1_BASE 0x01D00000
-/* System control register offsets */
-#define DM64XX_VDD3P3V_PWDN 0x48
+void __iomem *davinci_sysmod_base;
+
+void davinci_map_sysmod(void)
+{
+ davinci_sysmod_base = ioremap_nocache(DAVINCI_SYSTEM_MODULE_BASE,
+ 0x800);
+ /*
+ * Throw a bug since a lot of board initialization code depends
+ * on system module availability. ioremap() failing this early
+ * need careful looking into anyway.
+ */
+ BUG_ON(!davinci_sysmod_base);
+}
static struct resource i2c_resources[] = {
{
@@ -212,12 +224,12 @@ void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
davinci_cfg_reg(DM355_SD1_DATA2);
davinci_cfg_reg(DM355_SD1_DATA3);
} else if (cpu_is_davinci_dm365()) {
- void __iomem *pupdctl1 =
- IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE + 0x7c);
-
/* Configure pull down control */
- __raw_writel((__raw_readl(pupdctl1) & ~0xfc0),
- pupdctl1);
+ unsigned v;
+
+ v = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_PUPDCTL1));
+ __raw_writel(v & ~0xfc0,
+ DAVINCI_SYSMOD_VIRT(SYSMOD_PUPDCTL1));
mmcsd1_resources[0].start = DM365_MMCSD1_BASE;
mmcsd1_resources[0].end = DM365_MMCSD1_BASE +
@@ -246,11 +258,9 @@ void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
mmcsd0_resources[2].start = IRQ_DM365_SDIOINT0;
} else if (cpu_is_davinci_dm644x()) {
/* REVISIT: should this be in board-init code? */
- void __iomem *base =
- IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE);
-
/* Power-on 3.3V IO cells */
- __raw_writel(0, base + DM64XX_VDD3P3V_PWDN);
+ __raw_writel(0,
+ DAVINCI_SYSMOD_VIRT(SYSMOD_VDD3P3VPWDN));
/*Set up the pull regiter for MMC */
davinci_cfg_reg(DM644X_MSTK);
}
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index 19667cfc5de0..fd3d09aa6cde 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -18,7 +18,6 @@
#include <asm/mach/map.h>
-#include <mach/dm355.h>
#include <mach/cputype.h>
#include <mach/edma.h>
#include <mach/psc.h>
@@ -31,6 +30,7 @@
#include <mach/spi.h>
#include <mach/gpio-davinci.h>
+#include "davinci.h"
#include "clock.h"
#include "mux.h"
@@ -871,6 +871,7 @@ void __init dm355_init_asp1(u32 evt_enable, struct snd_platform_data *pdata)
void __init dm355_init(void)
{
davinci_common_init(&davinci_soc_info_dm355);
+ davinci_map_sysmod();
}
static int __init dm355_init_devices(void)
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index f15b435cc655..1a2e953082b3 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -21,7 +21,6 @@
#include <asm/mach/map.h>
-#include <mach/dm365.h>
#include <mach/cputype.h>
#include <mach/edma.h>
#include <mach/psc.h>
@@ -35,11 +34,28 @@
#include <mach/spi.h>
#include <mach/gpio-davinci.h>
+#include "davinci.h"
#include "clock.h"
#include "mux.h"
#define DM365_REF_FREQ 24000000 /* 24 MHz on the DM365 EVM */
+/* Base of key scan register bank */
+#define DM365_KEYSCAN_BASE 0x01c69400
+
+#define DM365_RTC_BASE 0x01c69000
+
+#define DAVINCI_DM365_VC_BASE 0x01d0c000
+#define DAVINCI_DMA_VC_TX 2
+#define DAVINCI_DMA_VC_RX 3
+
+#define DM365_EMAC_BASE 0x01d07000
+#define DM365_EMAC_MDIO_BASE (DM365_EMAC_BASE + 0x4000)
+#define DM365_EMAC_CNTRL_OFFSET 0x0000
+#define DM365_EMAC_CNTRL_MOD_OFFSET 0x3000
+#define DM365_EMAC_CNTRL_RAM_OFFSET 0x1000
+#define DM365_EMAC_CNTRL_RAM_SIZE 0x2000
+
static struct pll_data pll1_data = {
.num = 1,
.phys_base = DAVINCI_PLL1_BASE,
@@ -1122,6 +1138,7 @@ void __init dm365_init_rtc(void)
void __init dm365_init(void)
{
davinci_common_init(&davinci_soc_info_dm365);
+ davinci_map_sysmod();
}
static struct resource dm365_vpss_resources[] = {
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index 43a48ee1917b..23e81cafba8d 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -15,7 +15,6 @@
#include <asm/mach/map.h>
-#include <mach/dm644x.h>
#include <mach/cputype.h>
#include <mach/edma.h>
#include <mach/irqs.h>
@@ -27,6 +26,7 @@
#include <mach/asp.h>
#include <mach/gpio-davinci.h>
+#include "davinci.h"
#include "clock.h"
#include "mux.h"
@@ -35,6 +35,13 @@
*/
#define DM644X_REF_FREQ 27000000
+#define DM644X_EMAC_BASE 0x01c80000
+#define DM644X_EMAC_MDIO_BASE (DM644X_EMAC_BASE + 0x4000)
+#define DM644X_EMAC_CNTRL_OFFSET 0x0000
+#define DM644X_EMAC_CNTRL_MOD_OFFSET 0x1000
+#define DM644X_EMAC_CNTRL_RAM_OFFSET 0x2000
+#define DM644X_EMAC_CNTRL_RAM_SIZE 0x2000
+
static struct pll_data pll1_data = {
.num = 1,
.phys_base = DAVINCI_PLL1_BASE,
@@ -587,13 +594,15 @@ static struct platform_device dm644x_asp_device = {
.resource = dm644x_asp_resources,
};
+#define DM644X_VPSS_BASE 0x01c73400
+
static struct resource dm644x_vpss_resources[] = {
{
/* VPSS Base address */
.name = "vpss",
- .start = 0x01c73400,
- .end = 0x01c73400 + 0xff,
- .flags = IORESOURCE_MEM,
+ .start = DM644X_VPSS_BASE,
+ .end = DM644X_VPSS_BASE + 0xff,
+ .flags = IORESOURCE_MEM,
},
};
@@ -605,7 +614,7 @@ static struct platform_device dm644x_vpss_device = {
.resource = dm644x_vpss_resources,
};
-static struct resource vpfe_resources[] = {
+static struct resource dm644x_vpfe_resources[] = {
{
.start = IRQ_VDINT0,
.end = IRQ_VDINT0,
@@ -639,22 +648,17 @@ static struct platform_device dm644x_ccdc_dev = {
},
};
-static struct platform_device vpfe_capture_dev = {
+static struct platform_device dm644x_vpfe_dev = {
.name = CAPTURE_DRV_NAME,
.id = -1,
- .num_resources = ARRAY_SIZE(vpfe_resources),
- .resource = vpfe_resources,
+ .num_resources = ARRAY_SIZE(dm644x_vpfe_resources),
+ .resource = dm644x_vpfe_resources,
.dev = {
.dma_mask = &vpfe_capture_dma_mask,
.coherent_dma_mask = DMA_BIT_MASK(32),
},
};
-void dm644x_set_vpfe_config(struct vpfe_config *cfg)
-{
- vpfe_capture_dev.dev.platform_data = cfg;
-}
-
/*----------------------------------------------------------------------*/
static struct map_desc dm644x_io_desc[] = {
@@ -779,16 +783,29 @@ void __init dm644x_init_asp(struct snd_platform_data *pdata)
void __init dm644x_init(void)
{
davinci_common_init(&davinci_soc_info_dm644x);
+ davinci_map_sysmod();
}
-static int __init dm644x_init_devices(void)
+int __init dm644x_init_video(struct vpfe_config *vpfe_cfg)
{
- if (!cpu_is_davinci_dm644x())
- return 0;
+ dm644x_vpfe_dev.dev.platform_data = vpfe_cfg;
/* Add ccdc clock aliases */
clk_add_alias("master", dm644x_ccdc_dev.name, "vpss_master", NULL);
clk_add_alias("slave", dm644x_ccdc_dev.name, "vpss_slave", NULL);
+
+ platform_device_register(&dm644x_vpss_device);
+ platform_device_register(&dm644x_ccdc_dev);
+ platform_device_register(&dm644x_vpfe_dev);
+
+ return 0;
+}
+
+static int __init dm644x_init_devices(void)
+{
+ if (!cpu_is_davinci_dm644x())
+ return 0;
+
platform_device_register(&dm644x_edma_device);
platform_device_register(&dm644x_mdio_device);
@@ -796,10 +813,6 @@ static int __init dm644x_init_devices(void)
clk_add_alias(NULL, dev_name(&dm644x_mdio_device.dev),
NULL, &dm644x_emac_device.dev);
- platform_device_register(&dm644x_vpss_device);
- platform_device_register(&dm644x_ccdc_dev);
- platform_device_register(&vpfe_capture_dev);
-
return 0;
}
postcore_initcall(dm644x_init_devices);
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index 00f774394b16..9eb87c1d1edd 100644
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -16,7 +16,6 @@
#include <asm/mach/map.h>
-#include <mach/dm646x.h>
#include <mach/cputype.h>
#include <mach/edma.h>
#include <mach/irqs.h>
@@ -28,12 +27,11 @@
#include <mach/asp.h>
#include <mach/gpio-davinci.h>
+#include "davinci.h"
#include "clock.h"
#include "mux.h"
#define DAVINCI_VPIF_BASE (0x01C12000)
-#define VDD3P3V_PWDN_OFFSET (0x48)
-#define VSCLKDIS_OFFSET (0x6C)
#define VDD3P3V_VID_MASK (BIT_MASK(3) | BIT_MASK(2) | BIT_MASK(1) |\
BIT_MASK(0))
@@ -46,6 +44,13 @@
#define DM646X_REF_FREQ 27000000
#define DM646X_AUX_FREQ 24000000
+#define DM646X_EMAC_BASE 0x01c80000
+#define DM646X_EMAC_MDIO_BASE (DM646X_EMAC_BASE + 0x4000)
+#define DM646X_EMAC_CNTRL_OFFSET 0x0000
+#define DM646X_EMAC_CNTRL_MOD_OFFSET 0x1000
+#define DM646X_EMAC_CNTRL_RAM_OFFSET 0x2000
+#define DM646X_EMAC_CNTRL_RAM_SIZE 0x2000
+
static struct pll_data pll1_data = {
.num = 1,
.phys_base = DAVINCI_PLL1_BASE,
@@ -873,15 +878,14 @@ void dm646x_setup_vpif(struct vpif_display_config *display_config,
struct vpif_capture_config *capture_config)
{
unsigned int value;
- void __iomem *base = IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE);
- value = __raw_readl(base + VSCLKDIS_OFFSET);
+ value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
value &= ~VSCLKDIS_MASK;
- __raw_writel(value, base + VSCLKDIS_OFFSET);
+ __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
- value = __raw_readl(base + VDD3P3V_PWDN_OFFSET);
+ value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VDD3P3VPWDN));
value &= ~VDD3P3V_VID_MASK;
- __raw_writel(value, base + VDD3P3V_PWDN_OFFSET);
+ __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VDD3P3VPWDN));
davinci_cfg_reg(DM646X_STSOMUX_DISABLE);
davinci_cfg_reg(DM646X_STSIMUX_DISABLE);
@@ -905,6 +909,7 @@ int __init dm646x_init_edma(struct edma_rsv_info *rsv)
void __init dm646x_init(void)
{
davinci_common_init(&davinci_soc_info_dm646x);
+ davinci_map_sysmod();
}
static int __init dm646x_init_devices(void)
diff --git a/arch/arm/mach-davinci/dma.c b/arch/arm/mach-davinci/dma.c
index da90103a313d..fd33919c95d4 100644
--- a/arch/arm/mach-davinci/dma.c
+++ b/arch/arm/mach-davinci/dma.c
@@ -1508,12 +1508,8 @@ static int __init edma_probe(struct platform_device *pdev)
goto fail;
}
- /* Everything lives on transfer controller 1 until otherwise
- * specified. This way, long transfers on the low priority queue
- * started by the codec engine will not cause audio defects.
- */
for (i = 0; i < edma_cc[j]->num_channels; i++)
- map_dmach_queue(j, i, EVENTQ_1);
+ map_dmach_queue(j, i, info[j]->default_queue);
queue_tc_mapping = info[j]->queue_tc_mapping;
queue_priority_mapping = info[j]->queue_priority_mapping;
diff --git a/arch/arm/mach-davinci/include/mach/dm355.h b/arch/arm/mach-davinci/include/mach/dm355.h
deleted file mode 100644
index 36dff4a0ce3f..000000000000
--- a/arch/arm/mach-davinci/include/mach/dm355.h
+++ /dev/null
@@ -1,32 +0,0 @@
-/*
- * Chip specific defines for DM355 SoC
- *
- * Author: Kevin Hilman, Deep Root Systems, LLC
- *
- * 2007 (c) Deep Root Systems, LLC. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-#ifndef __ASM_ARCH_DM355_H
-#define __ASM_ARCH_DM355_H
-
-#include <mach/hardware.h>
-#include <mach/asp.h>
-#include <media/davinci/vpfe_capture.h>
-
-#define DM355_ASYNC_EMIF_CONTROL_BASE 0x01E10000
-#define DM355_ASYNC_EMIF_DATA_CE0_BASE 0x02000000
-
-#define ASP1_TX_EVT_EN 1
-#define ASP1_RX_EVT_EN 2
-
-struct spi_board_info;
-
-void __init dm355_init(void);
-void dm355_init_spi0(unsigned chipselect_mask,
- struct spi_board_info *info, unsigned len);
-void __init dm355_init_asp1(u32 evt_enable, struct snd_platform_data *pdata);
-void dm355_set_vpfe_config(struct vpfe_config *cfg);
-
-#endif /* __ASM_ARCH_DM355_H */
diff --git a/arch/arm/mach-davinci/include/mach/dm365.h b/arch/arm/mach-davinci/include/mach/dm365.h
index 2563bf4e93a1..b9bf3d6a4423 100644
--- a/arch/arm/mach-davinci/include/mach/dm365.h
+++ b/arch/arm/mach-davinci/include/mach/dm365.h
@@ -1,52 +1 @@
-/*
- * Copyright (C) 2009 Texas Instruments Incorporated
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation version 2.
- *
- * This program is distributed "as is" WITHOUT ANY WARRANTY of any
- * kind, whether express or implied; without even the implied warranty
- * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-#ifndef __ASM_ARCH_DM365_H
-#define __ASM_ARCH_DM665_H
-
-#include <linux/platform_device.h>
-#include <linux/davinci_emac.h>
-#include <mach/hardware.h>
-#include <mach/asp.h>
-#include <mach/keyscan.h>
-#include <media/davinci/vpfe_capture.h>
-
-#define DM365_EMAC_BASE (0x01D07000)
-#define DM365_EMAC_MDIO_BASE (DM365_EMAC_BASE + 0x4000)
-#define DM365_EMAC_CNTRL_OFFSET (0x0000)
-#define DM365_EMAC_CNTRL_MOD_OFFSET (0x3000)
-#define DM365_EMAC_CNTRL_RAM_OFFSET (0x1000)
-#define DM365_EMAC_CNTRL_RAM_SIZE (0x2000)
-
-/* Base of key scan register bank */
-#define DM365_KEYSCAN_BASE (0x01C69400)
-
-#define DM365_RTC_BASE (0x01C69000)
-
-#define DAVINCI_DM365_VC_BASE (0x01D0C000)
-#define DAVINCI_DMA_VC_TX 2
-#define DAVINCI_DMA_VC_RX 3
-
-#define DM365_ASYNC_EMIF_CONTROL_BASE 0x01D10000
-#define DM365_ASYNC_EMIF_DATA_CE0_BASE 0x02000000
-#define DM365_ASYNC_EMIF_DATA_CE1_BASE 0x04000000
-
-void __init dm365_init(void);
-void __init dm365_init_asp(struct snd_platform_data *pdata);
-void __init dm365_init_vc(struct snd_platform_data *pdata);
-void __init dm365_init_ks(struct davinci_ks_platform_data *pdata);
-void __init dm365_init_rtc(void);
-void dm365_init_spi0(unsigned chipselect_mask,
- struct spi_board_info *info, unsigned len);
-
-void dm365_set_vpfe_config(struct vpfe_config *cfg);
-#endif /* __ASM_ARCH_DM365_H */
+/* empty, remove once unused */
diff --git a/arch/arm/mach-davinci/include/mach/dm644x.h b/arch/arm/mach-davinci/include/mach/dm644x.h
deleted file mode 100644
index 5a1b26d4e68b..000000000000
--- a/arch/arm/mach-davinci/include/mach/dm644x.h
+++ /dev/null
@@ -1,47 +0,0 @@
-/*
- * This file contains the processor specific definitions
- * of the TI DM644x.
- *
- * Copyright (C) 2008 Texas Instruments.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- *
- */
-#ifndef __ASM_ARCH_DM644X_H
-#define __ASM_ARCH_DM644X_H
-
-#include <linux/davinci_emac.h>
-#include <mach/hardware.h>
-#include <mach/asp.h>
-#include <media/davinci/vpfe_capture.h>
-
-#define DM644X_EMAC_BASE (0x01C80000)
-#define DM644X_EMAC_MDIO_BASE (DM644X_EMAC_BASE + 0x4000)
-#define DM644X_EMAC_CNTRL_OFFSET (0x0000)
-#define DM644X_EMAC_CNTRL_MOD_OFFSET (0x1000)
-#define DM644X_EMAC_CNTRL_RAM_OFFSET (0x2000)
-#define DM644X_EMAC_CNTRL_RAM_SIZE (0x2000)
-
-#define DM644X_ASYNC_EMIF_CONTROL_BASE 0x01E00000
-#define DM644X_ASYNC_EMIF_DATA_CE0_BASE 0x02000000
-#define DM644X_ASYNC_EMIF_DATA_CE1_BASE 0x04000000
-#define DM644X_ASYNC_EMIF_DATA_CE2_BASE 0x06000000
-#define DM644X_ASYNC_EMIF_DATA_CE3_BASE 0x08000000
-
-void __init dm644x_init(void);
-void __init dm644x_init_asp(struct snd_platform_data *pdata);
-void dm644x_set_vpfe_config(struct vpfe_config *cfg);
-
-#endif /* __ASM_ARCH_DM644X_H */
diff --git a/arch/arm/mach-davinci/include/mach/dm646x.h b/arch/arm/mach-davinci/include/mach/dm646x.h
index a8ee6c9f0bb0..b9bf3d6a4423 100644
--- a/arch/arm/mach-davinci/include/mach/dm646x.h
+++ b/arch/arm/mach-davinci/include/mach/dm646x.h
@@ -1,41 +1 @@
-/*
- * Chip specific defines for DM646x SoC
- *
- * Author: Kevin Hilman, Deep Root Systems, LLC
- *
- * 2007 (c) Deep Root Systems, LLC. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-#ifndef __ASM_ARCH_DM646X_H
-#define __ASM_ARCH_DM646X_H
-
-#include <mach/hardware.h>
-#include <mach/asp.h>
-#include <linux/i2c.h>
-#include <linux/videodev2.h>
-#include <linux/davinci_emac.h>
-#include <media/davinci/vpif_types.h>
-
-#define DM646X_EMAC_BASE (0x01C80000)
-#define DM646X_EMAC_MDIO_BASE (DM646X_EMAC_BASE + 0x4000)
-#define DM646X_EMAC_CNTRL_OFFSET (0x0000)
-#define DM646X_EMAC_CNTRL_MOD_OFFSET (0x1000)
-#define DM646X_EMAC_CNTRL_RAM_OFFSET (0x2000)
-#define DM646X_EMAC_CNTRL_RAM_SIZE (0x2000)
-
-#define DM646X_ASYNC_EMIF_CONTROL_BASE 0x20008000
-#define DM646X_ASYNC_EMIF_CS2_SPACE_BASE 0x42000000
-
-void __init dm646x_init(void);
-void __init dm646x_init_mcasp0(struct snd_platform_data *pdata);
-void __init dm646x_init_mcasp1(struct snd_platform_data *pdata);
-int __init dm646x_init_edma(struct edma_rsv_info *rsv);
-
-void dm646x_video_init(void);
-
-void dm646x_setup_vpif(struct vpif_display_config *,
- struct vpif_capture_config *);
-
-#endif /* __ASM_ARCH_DM646X_H */
+/* empty, remove once unused */
diff --git a/arch/arm/mach-davinci/include/mach/edma.h b/arch/arm/mach-davinci/include/mach/edma.h
index 20c77f29bf0f..7e84c906ceff 100644
--- a/arch/arm/mach-davinci/include/mach/edma.h
+++ b/arch/arm/mach-davinci/include/mach/edma.h
@@ -250,6 +250,11 @@ struct edma_soc_info {
unsigned n_slot;
unsigned n_tc;
unsigned n_cc;
+ /*
+ * Default queue is expected to be a low-priority queue.
+ * This way, long transfers on the default queue started
+ * by the codec engine will not cause audio defects.
+ */
enum dma_event_q default_queue;
/* Resource reservation for other cores */
diff --git a/arch/arm/mach-davinci/include/mach/entry-macro.S b/arch/arm/mach-davinci/include/mach/entry-macro.S
index e14c0dc0e12c..c1661d2feca9 100644
--- a/arch/arm/mach-davinci/include/mach/entry-macro.S
+++ b/arch/arm/mach-davinci/include/mach/entry-macro.S
@@ -11,17 +11,11 @@
#include <mach/io.h>
#include <mach/irqs.h>
- .macro disable_fiq
- .endm
-
.macro get_irqnr_preamble, base, tmp
ldr \base, =davinci_intc_base
ldr \base, [\base]
.endm
- .macro arch_ret_to_user, tmp1, tmp2
- .endm
-
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
#if defined(CONFIG_AINTC) && defined(CONFIG_CP_INTC)
ldr \tmp, =davinci_intc_type
diff --git a/arch/arm/mach-davinci/include/mach/hardware.h b/arch/arm/mach-davinci/include/mach/hardware.h
index 414e0b93e741..0209b1fc22a1 100644
--- a/arch/arm/mach-davinci/include/mach/hardware.h
+++ b/arch/arm/mach-davinci/include/mach/hardware.h
@@ -19,8 +19,6 @@
* and the chip/board init code should then explicitly include
* <chipname>.h
*/
-#define DAVINCI_SYSTEM_MODULE_BASE 0x01C40000
-
/*
* I/O mapping
*/
diff --git a/arch/arm/mach-dove/include/mach/entry-macro.S b/arch/arm/mach-dove/include/mach/entry-macro.S
index e84c78c2a8b7..72d622baaad3 100644
--- a/arch/arm/mach-dove/include/mach/entry-macro.S
+++ b/arch/arm/mach-dove/include/mach/entry-macro.S
@@ -10,12 +10,6 @@
#include <mach/bridge-regs.h>
- .macro disable_fiq
- .endm
-
- .macro arch_ret_to_user, tmp1, tmp2
- .endm
-
.macro get_irqnr_preamble, base, tmp
ldr \base, =IRQ_VIRT_BASE
.endm
diff --git a/arch/arm/mach-dove/pcie.c b/arch/arm/mach-dove/pcie.c
index 52e96d397ba8..48a032005ea3 100644
--- a/arch/arm/mach-dove/pcie.c
+++ b/arch/arm/mach-dove/pcie.c
@@ -69,7 +69,7 @@ static int __init dove_pcie_setup(int nr, struct pci_sys_data *sys)
pp->res[0].flags = IORESOURCE_IO;
if (request_resource(&ioport_resource, &pp->res[0]))
panic("Request PCIe IO resource failed\n");
- pci_add_resource(&sys->resources, &pp->res[0]);
+ pci_add_resource_offset(&sys->resources, &pp->res[0], sys->io_offset);
/*
* IORESOURCE_MEM
@@ -88,7 +88,7 @@ static int __init dove_pcie_setup(int nr, struct pci_sys_data *sys)
pp->res[1].flags = IORESOURCE_MEM;
if (request_resource(&iomem_resource, &pp->res[1]))
panic("Request PCIe Memory resource failed\n");
- pci_add_resource(&sys->resources, &pp->res[1]);
+ pci_add_resource_offset(&sys->resources, &pp->res[1], sys->mem_offset);
return 1;
}
diff --git a/arch/arm/mach-ebsa110/include/mach/entry-macro.S b/arch/arm/mach-ebsa110/include/mach/entry-macro.S
index cc3e5992f6b3..14b110de78a9 100644
--- a/arch/arm/mach-ebsa110/include/mach/entry-macro.S
+++ b/arch/arm/mach-ebsa110/include/mach/entry-macro.S
@@ -12,16 +12,10 @@
#define IRQ_STAT 0xff000000 /* read */
- .macro disable_fiq
- .endm
-
.macro get_irqnr_preamble, base, tmp
mov \base, #IRQ_STAT
.endm
- .macro arch_ret_to_user, tmp1, tmp2
- .endm
-
.macro get_irqnr_and_base, irqnr, stat, base, tmp
ldrb \stat, [\base] @ get interrupts
mov \irqnr, #0
diff --git a/arch/arm/mach-ep93xx/Makefile b/arch/arm/mach-ep93xx/Makefile
index 574209d9e246..0dc51f9462de 100644
--- a/arch/arm/mach-ep93xx/Makefile
+++ b/arch/arm/mach-ep93xx/Makefile
@@ -8,6 +8,9 @@ obj- :=
obj-$(CONFIG_EP93XX_DMA) += dma.o
+obj-$(CONFIG_CRUNCH) += crunch.o crunch-bits.o
+AFLAGS_crunch-bits.o := -Wa,-mcpu=ep9312
+
obj-$(CONFIG_MACH_ADSSPHERE) += adssphere.o
obj-$(CONFIG_MACH_EDB93XX) += edb93xx.o
obj-$(CONFIG_MACH_GESBC9312) += gesbc9312.o
diff --git a/arch/arm/mach-ep93xx/adssphere.c b/arch/arm/mach-ep93xx/adssphere.c
index 681e939407d4..2d45947a3034 100644
--- a/arch/arm/mach-ep93xx/adssphere.c
+++ b/arch/arm/mach-ep93xx/adssphere.c
@@ -20,6 +20,7 @@
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
+#include "soc.h"
static struct ep93xx_eth_data __initdata adssphere_eth_data = {
.phy_id = 1,
diff --git a/arch/arm/mach-ep93xx/clock.c b/arch/arm/mach-ep93xx/clock.c
index ca4de7105097..c95dbce2468e 100644
--- a/arch/arm/mach-ep93xx/clock.c
+++ b/arch/arm/mach-ep93xx/clock.c
@@ -25,6 +25,7 @@
#include <asm/div64.h>
+#include "soc.h"
struct clk {
struct clk *parent;
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c
index 903edb02fe4f..8d2589588713 100644
--- a/arch/arm/mach-ep93xx/core.c
+++ b/arch/arm/mach-ep93xx/core.c
@@ -46,6 +46,7 @@
#include <asm/hardware/vic.h>
+#include "soc.h"
/*************************************************************************
* Static I/O mappings that are needed for all EP93xx platforms
@@ -204,7 +205,6 @@ void ep93xx_syscon_swlocked_write(unsigned int val, void __iomem *reg)
spin_unlock_irqrestore(&syscon_swlock, flags);
}
-EXPORT_SYMBOL(ep93xx_syscon_swlocked_write);
void ep93xx_devcfg_set_clear(unsigned int set_bits, unsigned int clear_bits)
{
@@ -221,7 +221,6 @@ void ep93xx_devcfg_set_clear(unsigned int set_bits, unsigned int clear_bits)
spin_unlock_irqrestore(&syscon_swlock, flags);
}
-EXPORT_SYMBOL(ep93xx_devcfg_set_clear);
/**
* ep93xx_chip_revision() - returns the EP93xx chip revision
@@ -648,9 +647,19 @@ static struct platform_device ep93xx_fb_device = {
.resource = ep93xx_fb_resource,
};
+/* The backlight use a single register in the framebuffer's register space */
+#define EP93XX_RASTER_REG_BRIGHTNESS 0x20
+
+static struct resource ep93xx_bl_resources[] = {
+ DEFINE_RES_MEM(EP93XX_RASTER_PHYS_BASE +
+ EP93XX_RASTER_REG_BRIGHTNESS, 0x04),
+};
+
static struct platform_device ep93xx_bl_device = {
.name = "ep93xx-bl",
.id = -1,
+ .num_resources = ARRAY_SIZE(ep93xx_bl_resources),
+ .resource = ep93xx_bl_resources,
};
/**
@@ -783,23 +792,12 @@ void __init ep93xx_register_i2s(void)
#define EP93XX_I2SCLKDIV_MASK (EP93XX_SYSCON_I2SCLKDIV_ORIDE | \
EP93XX_SYSCON_I2SCLKDIV_SPOL)
-int ep93xx_i2s_acquire(unsigned i2s_pins, unsigned i2s_config)
+int ep93xx_i2s_acquire(void)
{
unsigned val;
- /* Sanity check */
- if (i2s_pins & ~EP93XX_SYSCON_DEVCFG_I2S_MASK)
- return -EINVAL;
- if (i2s_config & ~EP93XX_I2SCLKDIV_MASK)
- return -EINVAL;
-
- /* Must have only one of I2SONSSP/I2SONAC97 set */
- if ((i2s_pins & EP93XX_SYSCON_DEVCFG_I2SONSSP) ==
- (i2s_pins & EP93XX_SYSCON_DEVCFG_I2SONAC97))
- return -EINVAL;
-
- ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2S_MASK);
- ep93xx_devcfg_set_bits(i2s_pins);
+ ep93xx_devcfg_set_clear(EP93XX_SYSCON_DEVCFG_I2SONAC97,
+ EP93XX_SYSCON_DEVCFG_I2S_MASK);
/*
* This is potentially racy with the clock api for i2s_mclk, sclk and
@@ -809,7 +807,7 @@ int ep93xx_i2s_acquire(unsigned i2s_pins, unsigned i2s_config)
*/
val = __raw_readl(EP93XX_SYSCON_I2SCLKDIV);
val &= ~EP93XX_I2SCLKDIV_MASK;
- val |= i2s_config;
+ val |= EP93XX_SYSCON_I2SCLKDIV_ORIDE | EP93XX_SYSCON_I2SCLKDIV_SPOL;
ep93xx_syscon_swlocked_write(val, EP93XX_SYSCON_I2SCLKDIV);
return 0;
@@ -856,11 +854,32 @@ void __init ep93xx_register_ac97(void)
platform_device_register(&ep93xx_pcm_device);
}
+/*************************************************************************
+ * EP93xx Watchdog
+ *************************************************************************/
+static struct resource ep93xx_wdt_resources[] = {
+ DEFINE_RES_MEM(EP93XX_WATCHDOG_PHYS_BASE, 0x08),
+};
+
+static struct platform_device ep93xx_wdt_device = {
+ .name = "ep93xx-wdt",
+ .id = -1,
+ .num_resources = ARRAY_SIZE(ep93xx_wdt_resources),
+ .resource = ep93xx_wdt_resources,
+};
+
void __init ep93xx_init_devices(void)
{
/* Disallow access to MaverickCrunch initially */
ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_CPENA);
+ /* Default all ports to GPIO */
+ ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_KEYS |
+ EP93XX_SYSCON_DEVCFG_GONK |
+ EP93XX_SYSCON_DEVCFG_EONIDE |
+ EP93XX_SYSCON_DEVCFG_GONIDE |
+ EP93XX_SYSCON_DEVCFG_HONIDE);
+
/* Get the GPIO working early, other devices need it */
platform_device_register(&ep93xx_gpio_device);
@@ -871,6 +890,7 @@ void __init ep93xx_init_devices(void)
platform_device_register(&ep93xx_rtc_device);
platform_device_register(&ep93xx_ohci_device);
platform_device_register(&ep93xx_leds);
+ platform_device_register(&ep93xx_wdt_device);
}
void ep93xx_restart(char mode, const char *cmd)
diff --git a/arch/arm/kernel/crunch-bits.S b/arch/arm/mach-ep93xx/crunch-bits.S
index 0ec9bb48fab9..0ec9bb48fab9 100644
--- a/arch/arm/kernel/crunch-bits.S
+++ b/arch/arm/mach-ep93xx/crunch-bits.S
diff --git a/arch/arm/kernel/crunch.c b/arch/arm/mach-ep93xx/crunch.c
index 25ef223ba7f3..74753e2df603 100644
--- a/arch/arm/kernel/crunch.c
+++ b/arch/arm/mach-ep93xx/crunch.c
@@ -16,9 +16,11 @@
#include <linux/sched.h>
#include <linux/init.h>
#include <linux/io.h>
-#include <mach/ep93xx-regs.h>
+
#include <asm/thread_notify.h>
+#include "soc.h"
+
struct crunch_state *crunch_owner;
void crunch_task_release(struct thread_info *thread)
diff --git a/arch/arm/mach-ep93xx/dma.c b/arch/arm/mach-ep93xx/dma.c
index 5a2570881255..16976d7bdc8a 100644
--- a/arch/arm/mach-ep93xx/dma.c
+++ b/arch/arm/mach-ep93xx/dma.c
@@ -28,6 +28,8 @@
#include <mach/dma.h>
#include <mach/hardware.h>
+#include "soc.h"
+
#define DMA_CHANNEL(_name, _base, _irq) \
{ .name = (_name), .base = (_base), .irq = (_irq) }
diff --git a/arch/arm/mach-ep93xx/edb93xx.c b/arch/arm/mach-ep93xx/edb93xx.c
index d115653edca3..da9047d726f0 100644
--- a/arch/arm/mach-ep93xx/edb93xx.c
+++ b/arch/arm/mach-ep93xx/edb93xx.c
@@ -43,6 +43,7 @@
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
+#include "soc.h"
static void __init edb93xx_register_flash(void)
{
diff --git a/arch/arm/mach-ep93xx/gesbc9312.c b/arch/arm/mach-ep93xx/gesbc9312.c
index af46970dc58e..fcdffbe49dcc 100644
--- a/arch/arm/mach-ep93xx/gesbc9312.c
+++ b/arch/arm/mach-ep93xx/gesbc9312.c
@@ -20,6 +20,7 @@
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
+#include "soc.h"
static struct ep93xx_eth_data __initdata gesbc9312_eth_data = {
.phy_id = 1,
diff --git a/arch/arm/mach-ep93xx/include/mach/entry-macro.S b/arch/arm/mach-ep93xx/include/mach/entry-macro.S
deleted file mode 100644
index 9be6edcf9045..000000000000
--- a/arch/arm/mach-ep93xx/include/mach/entry-macro.S
+++ /dev/null
@@ -1,17 +0,0 @@
-/*
- * arch/arm/mach-ep93xx/include/mach/entry-macro.S
- * IRQ demultiplexing for EP93xx
- *
- * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or (at
- * your option) any later version.
- */
-
- .macro disable_fiq
- .endm
-
- .macro arch_ret_to_user, tmp1, tmp2
- .endm
diff --git a/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h b/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h
index c4a7b84ef06d..c64d74246602 100644
--- a/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h
+++ b/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h
@@ -6,40 +6,6 @@
#define __ASM_ARCH_EP93XX_REGS_H
/*
- * EP93xx Physical Memory Map:
- *
- * The ASDO pin is sampled at system reset to select a synchronous or
- * asynchronous boot configuration. When ASDO is "1" (i.e. pulled-up)
- * the synchronous boot mode is selected. When ASDO is "0" (i.e
- * pulled-down) the asynchronous boot mode is selected.
- *
- * In synchronous boot mode nSDCE3 is decoded starting at physical address
- * 0x00000000 and nCS0 is decoded starting at 0xf0000000. For asynchronous
- * boot mode they are swapped with nCS0 decoded at 0x00000000 ann nSDCE3
- * decoded at 0xf0000000.
- *
- * There is known errata for the EP93xx dealing with External Memory
- * Configurations. Please refer to "AN273: EP93xx Silicon Rev E Design
- * Guidelines" for more information. This document can be found at:
- *
- * http://www.cirrus.com/en/pubs/appNote/AN273REV4.pdf
- */
-
-#define EP93XX_CS0_PHYS_BASE_ASYNC 0x00000000 /* ASDO Pin = 0 */
-#define EP93XX_SDCE3_PHYS_BASE_SYNC 0x00000000 /* ASDO Pin = 1 */
-#define EP93XX_CS1_PHYS_BASE 0x10000000
-#define EP93XX_CS2_PHYS_BASE 0x20000000
-#define EP93XX_CS3_PHYS_BASE 0x30000000
-#define EP93XX_PCMCIA_PHYS_BASE 0x40000000
-#define EP93XX_CS6_PHYS_BASE 0x60000000
-#define EP93XX_CS7_PHYS_BASE 0x70000000
-#define EP93XX_SDCE0_PHYS_BASE 0xc0000000
-#define EP93XX_SDCE1_PHYS_BASE 0xd0000000
-#define EP93XX_SDCE2_PHYS_BASE 0xe0000000
-#define EP93XX_SDCE3_PHYS_BASE_ASYNC 0xf0000000 /* ASDO Pin = 0 */
-#define EP93XX_CS0_PHYS_BASE_SYNC 0xf0000000 /* ASDO Pin = 1 */
-
-/*
* EP93xx linux memory map:
*
* virt phys size
@@ -62,58 +28,7 @@
#define EP93XX_APB_PHYS(x) (EP93XX_APB_PHYS_BASE + (x))
#define EP93XX_APB_IOMEM(x) IOMEM(EP93XX_APB_VIRT_BASE + (x))
-
-/* AHB peripherals */
-#define EP93XX_DMA_BASE EP93XX_AHB_IOMEM(0x00000000)
-
-#define EP93XX_ETHERNET_PHYS_BASE EP93XX_AHB_PHYS(0x00010000)
-#define EP93XX_ETHERNET_BASE EP93XX_AHB_IOMEM(0x00010000)
-
-#define EP93XX_USB_PHYS_BASE EP93XX_AHB_PHYS(0x00020000)
-#define EP93XX_USB_BASE EP93XX_AHB_IOMEM(0x00020000)
-
-#define EP93XX_RASTER_PHYS_BASE EP93XX_AHB_PHYS(0x00030000)
-#define EP93XX_RASTER_BASE EP93XX_AHB_IOMEM(0x00030000)
-
-#define EP93XX_GRAPHICS_ACCEL_BASE EP93XX_AHB_IOMEM(0x00040000)
-
-#define EP93XX_SDRAM_CONTROLLER_BASE EP93XX_AHB_IOMEM(0x00060000)
-
-#define EP93XX_PCMCIA_CONTROLLER_BASE EP93XX_AHB_IOMEM(0x00080000)
-
-#define EP93XX_BOOT_ROM_BASE EP93XX_AHB_IOMEM(0x00090000)
-
-#define EP93XX_IDE_BASE EP93XX_AHB_IOMEM(0x000a0000)
-
-#define EP93XX_VIC1_BASE EP93XX_AHB_IOMEM(0x000b0000)
-
-#define EP93XX_VIC2_BASE EP93XX_AHB_IOMEM(0x000c0000)
-
-
-/* APB peripherals */
-#define EP93XX_TIMER_BASE EP93XX_APB_IOMEM(0x00010000)
-
-#define EP93XX_I2S_PHYS_BASE EP93XX_APB_PHYS(0x00020000)
-#define EP93XX_I2S_BASE EP93XX_APB_IOMEM(0x00020000)
-
-#define EP93XX_SECURITY_BASE EP93XX_APB_IOMEM(0x00030000)
-
-#define EP93XX_GPIO_PHYS_BASE EP93XX_APB_PHYS(0x00040000)
-#define EP93XX_GPIO_BASE EP93XX_APB_IOMEM(0x00040000)
-#define EP93XX_GPIO_REG(x) (EP93XX_GPIO_BASE + (x))
-#define EP93XX_GPIO_F_INT_STATUS EP93XX_GPIO_REG(0x5c)
-#define EP93XX_GPIO_A_INT_STATUS EP93XX_GPIO_REG(0xa0)
-#define EP93XX_GPIO_B_INT_STATUS EP93XX_GPIO_REG(0xbc)
-#define EP93XX_GPIO_EEDRIVE EP93XX_GPIO_REG(0xc8)
-
-#define EP93XX_AAC_PHYS_BASE EP93XX_APB_PHYS(0x00080000)
-#define EP93XX_AAC_BASE EP93XX_APB_IOMEM(0x00080000)
-
-#define EP93XX_SPI_PHYS_BASE EP93XX_APB_PHYS(0x000a0000)
-#define EP93XX_SPI_BASE EP93XX_APB_IOMEM(0x000a0000)
-
-#define EP93XX_IRDA_BASE EP93XX_APB_IOMEM(0x000b0000)
-
+/* APB UARTs */
#define EP93XX_UART1_PHYS_BASE EP93XX_APB_PHYS(0x000c0000)
#define EP93XX_UART1_BASE EP93XX_APB_IOMEM(0x000c0000)
@@ -123,108 +38,4 @@
#define EP93XX_UART3_PHYS_BASE EP93XX_APB_PHYS(0x000e0000)
#define EP93XX_UART3_BASE EP93XX_APB_IOMEM(0x000e0000)
-#define EP93XX_KEY_MATRIX_PHYS_BASE EP93XX_APB_PHYS(0x000f0000)
-#define EP93XX_KEY_MATRIX_BASE EP93XX_APB_IOMEM(0x000f0000)
-
-#define EP93XX_ADC_BASE EP93XX_APB_IOMEM(0x00100000)
-#define EP93XX_TOUCHSCREEN_BASE EP93XX_APB_IOMEM(0x00100000)
-
-#define EP93XX_PWM_PHYS_BASE EP93XX_APB_PHYS(0x00110000)
-#define EP93XX_PWM_BASE EP93XX_APB_IOMEM(0x00110000)
-
-#define EP93XX_RTC_PHYS_BASE EP93XX_APB_PHYS(0x00120000)
-#define EP93XX_RTC_BASE EP93XX_APB_IOMEM(0x00120000)
-
-#define EP93XX_SYSCON_BASE EP93XX_APB_IOMEM(0x00130000)
-#define EP93XX_SYSCON_REG(x) (EP93XX_SYSCON_BASE + (x))
-#define EP93XX_SYSCON_POWER_STATE EP93XX_SYSCON_REG(0x00)
-#define EP93XX_SYSCON_PWRCNT EP93XX_SYSCON_REG(0x04)
-#define EP93XX_SYSCON_PWRCNT_FIR_EN (1<<31)
-#define EP93XX_SYSCON_PWRCNT_UARTBAUD (1<<29)
-#define EP93XX_SYSCON_PWRCNT_USH_EN (1<<28)
-#define EP93XX_SYSCON_PWRCNT_DMA_M2M1 (1<<27)
-#define EP93XX_SYSCON_PWRCNT_DMA_M2M0 (1<<26)
-#define EP93XX_SYSCON_PWRCNT_DMA_M2P8 (1<<25)
-#define EP93XX_SYSCON_PWRCNT_DMA_M2P9 (1<<24)
-#define EP93XX_SYSCON_PWRCNT_DMA_M2P6 (1<<23)
-#define EP93XX_SYSCON_PWRCNT_DMA_M2P7 (1<<22)
-#define EP93XX_SYSCON_PWRCNT_DMA_M2P4 (1<<21)
-#define EP93XX_SYSCON_PWRCNT_DMA_M2P5 (1<<20)
-#define EP93XX_SYSCON_PWRCNT_DMA_M2P2 (1<<19)
-#define EP93XX_SYSCON_PWRCNT_DMA_M2P3 (1<<18)
-#define EP93XX_SYSCON_PWRCNT_DMA_M2P0 (1<<17)
-#define EP93XX_SYSCON_PWRCNT_DMA_M2P1 (1<<16)
-#define EP93XX_SYSCON_HALT EP93XX_SYSCON_REG(0x08)
-#define EP93XX_SYSCON_STANDBY EP93XX_SYSCON_REG(0x0c)
-#define EP93XX_SYSCON_CLKSET1 EP93XX_SYSCON_REG(0x20)
-#define EP93XX_SYSCON_CLKSET1_NBYP1 (1<<23)
-#define EP93XX_SYSCON_CLKSET2 EP93XX_SYSCON_REG(0x24)
-#define EP93XX_SYSCON_CLKSET2_NBYP2 (1<<19)
-#define EP93XX_SYSCON_CLKSET2_PLL2_EN (1<<18)
-#define EP93XX_SYSCON_DEVCFG EP93XX_SYSCON_REG(0x80)
-#define EP93XX_SYSCON_DEVCFG_SWRST (1<<31)
-#define EP93XX_SYSCON_DEVCFG_D1ONG (1<<30)
-#define EP93XX_SYSCON_DEVCFG_D0ONG (1<<29)
-#define EP93XX_SYSCON_DEVCFG_IONU2 (1<<28)
-#define EP93XX_SYSCON_DEVCFG_GONK (1<<27)
-#define EP93XX_SYSCON_DEVCFG_TONG (1<<26)
-#define EP93XX_SYSCON_DEVCFG_MONG (1<<25)
-#define EP93XX_SYSCON_DEVCFG_U3EN (1<<24)
-#define EP93XX_SYSCON_DEVCFG_CPENA (1<<23)
-#define EP93XX_SYSCON_DEVCFG_A2ONG (1<<22)
-#define EP93XX_SYSCON_DEVCFG_A1ONG (1<<21)
-#define EP93XX_SYSCON_DEVCFG_U2EN (1<<20)
-#define EP93XX_SYSCON_DEVCFG_EXVC (1<<19)
-#define EP93XX_SYSCON_DEVCFG_U1EN (1<<18)
-#define EP93XX_SYSCON_DEVCFG_TIN (1<<17)
-#define EP93XX_SYSCON_DEVCFG_HC3IN (1<<15)
-#define EP93XX_SYSCON_DEVCFG_HC3EN (1<<14)
-#define EP93XX_SYSCON_DEVCFG_HC1IN (1<<13)
-#define EP93XX_SYSCON_DEVCFG_HC1EN (1<<12)
-#define EP93XX_SYSCON_DEVCFG_HONIDE (1<<11)
-#define EP93XX_SYSCON_DEVCFG_GONIDE (1<<10)
-#define EP93XX_SYSCON_DEVCFG_PONG (1<<9)
-#define EP93XX_SYSCON_DEVCFG_EONIDE (1<<8)
-#define EP93XX_SYSCON_DEVCFG_I2SONSSP (1<<7)
-#define EP93XX_SYSCON_DEVCFG_I2SONAC97 (1<<6)
-#define EP93XX_SYSCON_DEVCFG_RASONP3 (1<<4)
-#define EP93XX_SYSCON_DEVCFG_RAS (1<<3)
-#define EP93XX_SYSCON_DEVCFG_ADCPD (1<<2)
-#define EP93XX_SYSCON_DEVCFG_KEYS (1<<1)
-#define EP93XX_SYSCON_DEVCFG_SHENA (1<<0)
-#define EP93XX_SYSCON_VIDCLKDIV EP93XX_SYSCON_REG(0x84)
-#define EP93XX_SYSCON_CLKDIV_ENABLE (1<<15)
-#define EP93XX_SYSCON_CLKDIV_ESEL (1<<14)
-#define EP93XX_SYSCON_CLKDIV_PSEL (1<<13)
-#define EP93XX_SYSCON_CLKDIV_PDIV_SHIFT 8
-#define EP93XX_SYSCON_I2SCLKDIV EP93XX_SYSCON_REG(0x8c)
-#define EP93XX_SYSCON_I2SCLKDIV_SENA (1<<31)
-#define EP93XX_SYSCON_I2SCLKDIV_ORIDE (1<<29)
-#define EP93XX_SYSCON_I2SCLKDIV_SPOL (1<<19)
-#define EP93XX_I2SCLKDIV_SDIV (1 << 16)
-#define EP93XX_I2SCLKDIV_LRDIV32 (0 << 17)
-#define EP93XX_I2SCLKDIV_LRDIV64 (1 << 17)
-#define EP93XX_I2SCLKDIV_LRDIV128 (2 << 17)
-#define EP93XX_I2SCLKDIV_LRDIV_MASK (3 << 17)
-#define EP93XX_SYSCON_KEYTCHCLKDIV EP93XX_SYSCON_REG(0x90)
-#define EP93XX_SYSCON_KEYTCHCLKDIV_TSEN (1<<31)
-#define EP93XX_SYSCON_KEYTCHCLKDIV_ADIV (1<<16)
-#define EP93XX_SYSCON_KEYTCHCLKDIV_KEN (1<<15)
-#define EP93XX_SYSCON_KEYTCHCLKDIV_KDIV (1<<0)
-#define EP93XX_SYSCON_SYSCFG EP93XX_SYSCON_REG(0x9c)
-#define EP93XX_SYSCON_SYSCFG_REV_MASK (0xf0000000)
-#define EP93XX_SYSCON_SYSCFG_REV_SHIFT (28)
-#define EP93XX_SYSCON_SYSCFG_SBOOT (1<<8)
-#define EP93XX_SYSCON_SYSCFG_LCSN7 (1<<7)
-#define EP93XX_SYSCON_SYSCFG_LCSN6 (1<<6)
-#define EP93XX_SYSCON_SYSCFG_LASDO (1<<5)
-#define EP93XX_SYSCON_SYSCFG_LEEDA (1<<4)
-#define EP93XX_SYSCON_SYSCFG_LEECLK (1<<3)
-#define EP93XX_SYSCON_SYSCFG_LCSN2 (1<<1)
-#define EP93XX_SYSCON_SYSCFG_LCSN1 (1<<0)
-#define EP93XX_SYSCON_SWLOCK EP93XX_SYSCON_REG(0xc0)
-
-#define EP93XX_WATCHDOG_BASE EP93XX_APB_IOMEM(0x00140000)
-
-
#endif
diff --git a/arch/arm/mach-ep93xx/include/mach/gpio-ep93xx.h b/arch/arm/mach-ep93xx/include/mach/gpio-ep93xx.h
index 8aff2ea35877..6d7c571a519f 100644
--- a/arch/arm/mach-ep93xx/include/mach/gpio-ep93xx.h
+++ b/arch/arm/mach-ep93xx/include/mach/gpio-ep93xx.h
@@ -3,6 +3,16 @@
#ifndef __GPIO_EP93XX_H
#define __GPIO_EP93XX_H
+#include <mach/ep93xx-regs.h>
+
+#define EP93XX_GPIO_PHYS_BASE EP93XX_APB_PHYS(0x00040000)
+#define EP93XX_GPIO_BASE EP93XX_APB_IOMEM(0x00040000)
+#define EP93XX_GPIO_REG(x) (EP93XX_GPIO_BASE + (x))
+#define EP93XX_GPIO_F_INT_STATUS EP93XX_GPIO_REG(0x5c)
+#define EP93XX_GPIO_A_INT_STATUS EP93XX_GPIO_REG(0xa0)
+#define EP93XX_GPIO_B_INT_STATUS EP93XX_GPIO_REG(0xbc)
+#define EP93XX_GPIO_EEDRIVE EP93XX_GPIO_REG(0xc8)
+
/* GPIO port A. */
#define EP93XX_GPIO_LINE_A(x) ((x) + 0)
#define EP93XX_GPIO_LINE_EGPIO0 EP93XX_GPIO_LINE_A(0)
diff --git a/arch/arm/mach-ep93xx/include/mach/hardware.h b/arch/arm/mach-ep93xx/include/mach/hardware.h
index 4df842897eae..efcd47815a91 100644
--- a/arch/arm/mach-ep93xx/include/mach/hardware.h
+++ b/arch/arm/mach-ep93xx/include/mach/hardware.h
@@ -5,7 +5,6 @@
#ifndef __ASM_ARCH_HARDWARE_H
#define __ASM_ARCH_HARDWARE_H
-#include <mach/ep93xx-regs.h>
#include <mach/platform.h>
/*
diff --git a/arch/arm/mach-ep93xx/include/mach/platform.h b/arch/arm/mach-ep93xx/include/mach/platform.h
index d4c934931f9d..602bd87fd0ab 100644
--- a/arch/arm/mach-ep93xx/include/mach/platform.h
+++ b/arch/arm/mach-ep93xx/include/mach/platform.h
@@ -21,20 +21,6 @@ struct ep93xx_eth_data
void ep93xx_map_io(void);
void ep93xx_init_irq(void);
-/* EP93xx System Controller software locked register write */
-void ep93xx_syscon_swlocked_write(unsigned int val, void __iomem *reg);
-void ep93xx_devcfg_set_clear(unsigned int set_bits, unsigned int clear_bits);
-
-static inline void ep93xx_devcfg_set_bits(unsigned int bits)
-{
- ep93xx_devcfg_set_clear(bits, 0x00);
-}
-
-static inline void ep93xx_devcfg_clear_bits(unsigned int bits)
-{
- ep93xx_devcfg_set_clear(0x00, bits);
-}
-
#define EP93XX_CHIP_REV_D0 3
#define EP93XX_CHIP_REV_D1 4
#define EP93XX_CHIP_REV_E0 5
@@ -59,7 +45,7 @@ void ep93xx_register_keypad(struct ep93xx_keypad_platform_data *data);
int ep93xx_keypad_acquire_gpio(struct platform_device *pdev);
void ep93xx_keypad_release_gpio(struct platform_device *pdev);
void ep93xx_register_i2s(void);
-int ep93xx_i2s_acquire(unsigned i2s_pins, unsigned i2s_config);
+int ep93xx_i2s_acquire(void);
void ep93xx_i2s_release(void);
void ep93xx_register_ac97(void);
diff --git a/arch/arm/mach-ep93xx/micro9.c b/arch/arm/mach-ep93xx/micro9.c
index 7b98084f0c97..dc431c5f04ce 100644
--- a/arch/arm/mach-ep93xx/micro9.c
+++ b/arch/arm/mach-ep93xx/micro9.c
@@ -22,6 +22,7 @@
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
+#include "soc.h"
/*************************************************************************
* Micro9 NOR Flash
diff --git a/arch/arm/mach-ep93xx/simone.c b/arch/arm/mach-ep93xx/simone.c
index f4e553eca21c..f40c2987e545 100644
--- a/arch/arm/mach-ep93xx/simone.c
+++ b/arch/arm/mach-ep93xx/simone.c
@@ -29,6 +29,8 @@
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
+#include "soc.h"
+
static struct ep93xx_eth_data __initdata simone_eth_data = {
.phy_id = 1,
};
diff --git a/arch/arm/mach-ep93xx/snappercl15.c b/arch/arm/mach-ep93xx/snappercl15.c
index fd846331ddff..0c00852ef160 100644
--- a/arch/arm/mach-ep93xx/snappercl15.c
+++ b/arch/arm/mach-ep93xx/snappercl15.c
@@ -35,6 +35,8 @@
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
+#include "soc.h"
+
#define SNAPPERCL15_NAND_BASE (EP93XX_CS7_PHYS_BASE + SZ_16M)
#define SNAPPERCL15_NAND_WPN (1 << 8) /* Write protect (active low) */
diff --git a/arch/arm/mach-ep93xx/soc.h b/arch/arm/mach-ep93xx/soc.h
new file mode 100644
index 000000000000..979fba722926
--- /dev/null
+++ b/arch/arm/mach-ep93xx/soc.h
@@ -0,0 +1,213 @@
+/*
+ * arch/arm/mach-ep93xx/soc.h
+ *
+ * Copyright (C) 2012 Open Kernel Labs <www.ok-labs.com>
+ * Copyright (C) 2012 Ryan Mallon <rmallon@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or (at
+ * your option) any later version.
+ */
+
+#ifndef _EP93XX_SOC_H
+#define _EP93XX_SOC_H
+
+#include <mach/ep93xx-regs.h>
+
+/*
+ * EP93xx Physical Memory Map:
+ *
+ * The ASDO pin is sampled at system reset to select a synchronous or
+ * asynchronous boot configuration. When ASDO is "1" (i.e. pulled-up)
+ * the synchronous boot mode is selected. When ASDO is "0" (i.e
+ * pulled-down) the asynchronous boot mode is selected.
+ *
+ * In synchronous boot mode nSDCE3 is decoded starting at physical address
+ * 0x00000000 and nCS0 is decoded starting at 0xf0000000. For asynchronous
+ * boot mode they are swapped with nCS0 decoded at 0x00000000 ann nSDCE3
+ * decoded at 0xf0000000.
+ *
+ * There is known errata for the EP93xx dealing with External Memory
+ * Configurations. Please refer to "AN273: EP93xx Silicon Rev E Design
+ * Guidelines" for more information. This document can be found at:
+ *
+ * http://www.cirrus.com/en/pubs/appNote/AN273REV4.pdf
+ */
+
+#define EP93XX_CS0_PHYS_BASE_ASYNC 0x00000000 /* ASDO Pin = 0 */
+#define EP93XX_SDCE3_PHYS_BASE_SYNC 0x00000000 /* ASDO Pin = 1 */
+#define EP93XX_CS1_PHYS_BASE 0x10000000
+#define EP93XX_CS2_PHYS_BASE 0x20000000
+#define EP93XX_CS3_PHYS_BASE 0x30000000
+#define EP93XX_PCMCIA_PHYS_BASE 0x40000000
+#define EP93XX_CS6_PHYS_BASE 0x60000000
+#define EP93XX_CS7_PHYS_BASE 0x70000000
+#define EP93XX_SDCE0_PHYS_BASE 0xc0000000
+#define EP93XX_SDCE1_PHYS_BASE 0xd0000000
+#define EP93XX_SDCE2_PHYS_BASE 0xe0000000
+#define EP93XX_SDCE3_PHYS_BASE_ASYNC 0xf0000000 /* ASDO Pin = 0 */
+#define EP93XX_CS0_PHYS_BASE_SYNC 0xf0000000 /* ASDO Pin = 1 */
+
+/* AHB peripherals */
+#define EP93XX_DMA_BASE EP93XX_AHB_IOMEM(0x00000000)
+
+#define EP93XX_ETHERNET_PHYS_BASE EP93XX_AHB_PHYS(0x00010000)
+#define EP93XX_ETHERNET_BASE EP93XX_AHB_IOMEM(0x00010000)
+
+#define EP93XX_USB_PHYS_BASE EP93XX_AHB_PHYS(0x00020000)
+#define EP93XX_USB_BASE EP93XX_AHB_IOMEM(0x00020000)
+
+#define EP93XX_RASTER_PHYS_BASE EP93XX_AHB_PHYS(0x00030000)
+#define EP93XX_RASTER_BASE EP93XX_AHB_IOMEM(0x00030000)
+
+#define EP93XX_GRAPHICS_ACCEL_BASE EP93XX_AHB_IOMEM(0x00040000)
+
+#define EP93XX_SDRAM_CONTROLLER_BASE EP93XX_AHB_IOMEM(0x00060000)
+
+#define EP93XX_PCMCIA_CONTROLLER_BASE EP93XX_AHB_IOMEM(0x00080000)
+
+#define EP93XX_BOOT_ROM_BASE EP93XX_AHB_IOMEM(0x00090000)
+
+#define EP93XX_IDE_BASE EP93XX_AHB_IOMEM(0x000a0000)
+
+#define EP93XX_VIC1_BASE EP93XX_AHB_IOMEM(0x000b0000)
+
+#define EP93XX_VIC2_BASE EP93XX_AHB_IOMEM(0x000c0000)
+
+/* APB peripherals */
+#define EP93XX_TIMER_BASE EP93XX_APB_IOMEM(0x00010000)
+
+#define EP93XX_I2S_PHYS_BASE EP93XX_APB_PHYS(0x00020000)
+#define EP93XX_I2S_BASE EP93XX_APB_IOMEM(0x00020000)
+
+#define EP93XX_SECURITY_BASE EP93XX_APB_IOMEM(0x00030000)
+
+#define EP93XX_AAC_PHYS_BASE EP93XX_APB_PHYS(0x00080000)
+#define EP93XX_AAC_BASE EP93XX_APB_IOMEM(0x00080000)
+
+#define EP93XX_SPI_PHYS_BASE EP93XX_APB_PHYS(0x000a0000)
+#define EP93XX_SPI_BASE EP93XX_APB_IOMEM(0x000a0000)
+
+#define EP93XX_IRDA_BASE EP93XX_APB_IOMEM(0x000b0000)
+
+#define EP93XX_KEY_MATRIX_PHYS_BASE EP93XX_APB_PHYS(0x000f0000)
+#define EP93XX_KEY_MATRIX_BASE EP93XX_APB_IOMEM(0x000f0000)
+
+#define EP93XX_ADC_BASE EP93XX_APB_IOMEM(0x00100000)
+#define EP93XX_TOUCHSCREEN_BASE EP93XX_APB_IOMEM(0x00100000)
+
+#define EP93XX_PWM_PHYS_BASE EP93XX_APB_PHYS(0x00110000)
+#define EP93XX_PWM_BASE EP93XX_APB_IOMEM(0x00110000)
+
+#define EP93XX_RTC_PHYS_BASE EP93XX_APB_PHYS(0x00120000)
+#define EP93XX_RTC_BASE EP93XX_APB_IOMEM(0x00120000)
+
+#define EP93XX_WATCHDOG_PHYS_BASE EP93XX_APB_PHYS(0x00140000)
+#define EP93XX_WATCHDOG_BASE EP93XX_APB_IOMEM(0x00140000)
+
+/* System controller */
+#define EP93XX_SYSCON_BASE EP93XX_APB_IOMEM(0x00130000)
+#define EP93XX_SYSCON_REG(x) (EP93XX_SYSCON_BASE + (x))
+#define EP93XX_SYSCON_POWER_STATE EP93XX_SYSCON_REG(0x00)
+#define EP93XX_SYSCON_PWRCNT EP93XX_SYSCON_REG(0x04)
+#define EP93XX_SYSCON_PWRCNT_FIR_EN (1<<31)
+#define EP93XX_SYSCON_PWRCNT_UARTBAUD (1<<29)
+#define EP93XX_SYSCON_PWRCNT_USH_EN (1<<28)
+#define EP93XX_SYSCON_PWRCNT_DMA_M2M1 (1<<27)
+#define EP93XX_SYSCON_PWRCNT_DMA_M2M0 (1<<26)
+#define EP93XX_SYSCON_PWRCNT_DMA_M2P8 (1<<25)
+#define EP93XX_SYSCON_PWRCNT_DMA_M2P9 (1<<24)
+#define EP93XX_SYSCON_PWRCNT_DMA_M2P6 (1<<23)
+#define EP93XX_SYSCON_PWRCNT_DMA_M2P7 (1<<22)
+#define EP93XX_SYSCON_PWRCNT_DMA_M2P4 (1<<21)
+#define EP93XX_SYSCON_PWRCNT_DMA_M2P5 (1<<20)
+#define EP93XX_SYSCON_PWRCNT_DMA_M2P2 (1<<19)
+#define EP93XX_SYSCON_PWRCNT_DMA_M2P3 (1<<18)
+#define EP93XX_SYSCON_PWRCNT_DMA_M2P0 (1<<17)
+#define EP93XX_SYSCON_PWRCNT_DMA_M2P1 (1<<16)
+#define EP93XX_SYSCON_HALT EP93XX_SYSCON_REG(0x08)
+#define EP93XX_SYSCON_STANDBY EP93XX_SYSCON_REG(0x0c)
+#define EP93XX_SYSCON_CLKSET1 EP93XX_SYSCON_REG(0x20)
+#define EP93XX_SYSCON_CLKSET1_NBYP1 (1<<23)
+#define EP93XX_SYSCON_CLKSET2 EP93XX_SYSCON_REG(0x24)
+#define EP93XX_SYSCON_CLKSET2_NBYP2 (1<<19)
+#define EP93XX_SYSCON_CLKSET2_PLL2_EN (1<<18)
+#define EP93XX_SYSCON_DEVCFG EP93XX_SYSCON_REG(0x80)
+#define EP93XX_SYSCON_DEVCFG_SWRST (1<<31)
+#define EP93XX_SYSCON_DEVCFG_D1ONG (1<<30)
+#define EP93XX_SYSCON_DEVCFG_D0ONG (1<<29)
+#define EP93XX_SYSCON_DEVCFG_IONU2 (1<<28)
+#define EP93XX_SYSCON_DEVCFG_GONK (1<<27)
+#define EP93XX_SYSCON_DEVCFG_TONG (1<<26)
+#define EP93XX_SYSCON_DEVCFG_MONG (1<<25)
+#define EP93XX_SYSCON_DEVCFG_U3EN (1<<24)
+#define EP93XX_SYSCON_DEVCFG_CPENA (1<<23)
+#define EP93XX_SYSCON_DEVCFG_A2ONG (1<<22)
+#define EP93XX_SYSCON_DEVCFG_A1ONG (1<<21)
+#define EP93XX_SYSCON_DEVCFG_U2EN (1<<20)
+#define EP93XX_SYSCON_DEVCFG_EXVC (1<<19)
+#define EP93XX_SYSCON_DEVCFG_U1EN (1<<18)
+#define EP93XX_SYSCON_DEVCFG_TIN (1<<17)
+#define EP93XX_SYSCON_DEVCFG_HC3IN (1<<15)
+#define EP93XX_SYSCON_DEVCFG_HC3EN (1<<14)
+#define EP93XX_SYSCON_DEVCFG_HC1IN (1<<13)
+#define EP93XX_SYSCON_DEVCFG_HC1EN (1<<12)
+#define EP93XX_SYSCON_DEVCFG_HONIDE (1<<11)
+#define EP93XX_SYSCON_DEVCFG_GONIDE (1<<10)
+#define EP93XX_SYSCON_DEVCFG_PONG (1<<9)
+#define EP93XX_SYSCON_DEVCFG_EONIDE (1<<8)
+#define EP93XX_SYSCON_DEVCFG_I2SONSSP (1<<7)
+#define EP93XX_SYSCON_DEVCFG_I2SONAC97 (1<<6)
+#define EP93XX_SYSCON_DEVCFG_RASONP3 (1<<4)
+#define EP93XX_SYSCON_DEVCFG_RAS (1<<3)
+#define EP93XX_SYSCON_DEVCFG_ADCPD (1<<2)
+#define EP93XX_SYSCON_DEVCFG_KEYS (1<<1)
+#define EP93XX_SYSCON_DEVCFG_SHENA (1<<0)
+#define EP93XX_SYSCON_VIDCLKDIV EP93XX_SYSCON_REG(0x84)
+#define EP93XX_SYSCON_CLKDIV_ENABLE (1<<15)
+#define EP93XX_SYSCON_CLKDIV_ESEL (1<<14)
+#define EP93XX_SYSCON_CLKDIV_PSEL (1<<13)
+#define EP93XX_SYSCON_CLKDIV_PDIV_SHIFT 8
+#define EP93XX_SYSCON_I2SCLKDIV EP93XX_SYSCON_REG(0x8c)
+#define EP93XX_SYSCON_I2SCLKDIV_SENA (1<<31)
+#define EP93XX_SYSCON_I2SCLKDIV_ORIDE (1<<29)
+#define EP93XX_SYSCON_I2SCLKDIV_SPOL (1<<19)
+#define EP93XX_I2SCLKDIV_SDIV (1 << 16)
+#define EP93XX_I2SCLKDIV_LRDIV32 (0 << 17)
+#define EP93XX_I2SCLKDIV_LRDIV64 (1 << 17)
+#define EP93XX_I2SCLKDIV_LRDIV128 (2 << 17)
+#define EP93XX_I2SCLKDIV_LRDIV_MASK (3 << 17)
+#define EP93XX_SYSCON_KEYTCHCLKDIV EP93XX_SYSCON_REG(0x90)
+#define EP93XX_SYSCON_KEYTCHCLKDIV_TSEN (1<<31)
+#define EP93XX_SYSCON_KEYTCHCLKDIV_ADIV (1<<16)
+#define EP93XX_SYSCON_KEYTCHCLKDIV_KEN (1<<15)
+#define EP93XX_SYSCON_KEYTCHCLKDIV_KDIV (1<<0)
+#define EP93XX_SYSCON_SYSCFG EP93XX_SYSCON_REG(0x9c)
+#define EP93XX_SYSCON_SYSCFG_REV_MASK (0xf0000000)
+#define EP93XX_SYSCON_SYSCFG_REV_SHIFT (28)
+#define EP93XX_SYSCON_SYSCFG_SBOOT (1<<8)
+#define EP93XX_SYSCON_SYSCFG_LCSN7 (1<<7)
+#define EP93XX_SYSCON_SYSCFG_LCSN6 (1<<6)
+#define EP93XX_SYSCON_SYSCFG_LASDO (1<<5)
+#define EP93XX_SYSCON_SYSCFG_LEEDA (1<<4)
+#define EP93XX_SYSCON_SYSCFG_LEECLK (1<<3)
+#define EP93XX_SYSCON_SYSCFG_LCSN2 (1<<1)
+#define EP93XX_SYSCON_SYSCFG_LCSN1 (1<<0)
+#define EP93XX_SYSCON_SWLOCK EP93XX_SYSCON_REG(0xc0)
+
+/* EP93xx System Controller software locked register write */
+void ep93xx_syscon_swlocked_write(unsigned int val, void __iomem *reg);
+void ep93xx_devcfg_set_clear(unsigned int set_bits, unsigned int clear_bits);
+
+static inline void ep93xx_devcfg_set_bits(unsigned int bits)
+{
+ ep93xx_devcfg_set_clear(bits, 0x00);
+}
+
+static inline void ep93xx_devcfg_clear_bits(unsigned int bits)
+{
+ ep93xx_devcfg_set_clear(0x00, bits);
+}
+
+#endif /* _EP93XX_SOC_H */
diff --git a/arch/arm/mach-ep93xx/ts72xx.c b/arch/arm/mach-ep93xx/ts72xx.c
index 79f8ecf07a19..5ea790942e94 100644
--- a/arch/arm/mach-ep93xx/ts72xx.c
+++ b/arch/arm/mach-ep93xx/ts72xx.c
@@ -28,6 +28,7 @@
#include <asm/mach/map.h>
#include <asm/mach/arch.h>
+#include "soc.h"
static struct map_desc ts72xx_io_desc[] __initdata = {
{
diff --git a/arch/arm/mach-ep93xx/vision_ep9307.c b/arch/arm/mach-ep93xx/vision_ep9307.c
index d67d0b4feb6f..ba156eb225e8 100644
--- a/arch/arm/mach-ep93xx/vision_ep9307.c
+++ b/arch/arm/mach-ep93xx/vision_ep9307.c
@@ -39,6 +39,8 @@
#include <asm/mach/map.h>
#include <asm/mach/arch.h>
+#include "soc.h"
+
/*************************************************************************
* Static I/O mappings for the FPGA
*************************************************************************/
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index 5d602f68a0e8..dfad6538b273 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -34,6 +34,7 @@ config CPU_EXYNOS4210
select ARM_CPU_SUSPEND if PM
select S5P_PM if PM
select S5P_SLEEP if PM
+ select PM_GENERIC_DOMAINS
help
Enable EXYNOS4210 CPU support
@@ -74,11 +75,6 @@ config EXYNOS4_SETUP_FIMD0
help
Common setup code for FIMD0.
-config EXYNOS4_DEV_PD
- bool
- help
- Compile in platform device definitions for Power Domain
-
config EXYNOS4_DEV_SYSMMU
bool
help
@@ -195,7 +191,6 @@ config MACH_SMDKV310
select EXYNOS4_DEV_AHCI
select SAMSUNG_DEV_KEYPAD
select EXYNOS4_DEV_DMA
- select EXYNOS4_DEV_PD
select SAMSUNG_DEV_PWM
select EXYNOS4_DEV_USB_OHCI
select EXYNOS4_DEV_SYSMMU
@@ -243,7 +238,6 @@ config MACH_UNIVERSAL_C210
select S5P_DEV_ONENAND
select S5P_DEV_TV
select EXYNOS4_DEV_DMA
- select EXYNOS4_DEV_PD
select EXYNOS4_SETUP_FIMD0
select EXYNOS4_SETUP_I2C1
select EXYNOS4_SETUP_I2C3
@@ -277,7 +271,6 @@ config MACH_NURI
select S5P_DEV_USB_EHCI
select S5P_SETUP_MIPIPHY
select EXYNOS4_DEV_DMA
- select EXYNOS4_DEV_PD
select EXYNOS4_SETUP_FIMC
select EXYNOS4_SETUP_FIMD0
select EXYNOS4_SETUP_I2C1
@@ -310,7 +303,6 @@ config MACH_ORIGEN
select SAMSUNG_DEV_BACKLIGHT
select SAMSUNG_DEV_PWM
select EXYNOS4_DEV_DMA
- select EXYNOS4_DEV_PD
select EXYNOS4_DEV_USB_OHCI
select EXYNOS4_SETUP_FIMD0
select EXYNOS4_SETUP_SDHCI
diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile
index 995e7cc02bec..9a4c09896509 100644
--- a/arch/arm/mach-exynos/Makefile
+++ b/arch/arm/mach-exynos/Makefile
@@ -18,6 +18,7 @@ obj-$(CONFIG_CPU_EXYNOS4210) += clock-exynos4210.o
obj-$(CONFIG_SOC_EXYNOS4212) += clock-exynos4212.o
obj-$(CONFIG_PM) += pm.o
+obj-$(CONFIG_PM_GENERIC_DOMAINS) += pm_domains.o
obj-$(CONFIG_CPU_IDLE) += cpuidle.o
obj-$(CONFIG_ARCH_EXYNOS4) += pmu.o
@@ -46,7 +47,6 @@ obj-$(CONFIG_MACH_EXYNOS4_DT) += mach-exynos4-dt.o
obj-$(CONFIG_ARCH_EXYNOS4) += dev-audio.o
obj-$(CONFIG_EXYNOS4_DEV_AHCI) += dev-ahci.o
-obj-$(CONFIG_EXYNOS4_DEV_PD) += dev-pd.o
obj-$(CONFIG_EXYNOS4_DEV_SYSMMU) += dev-sysmmu.o
obj-$(CONFIG_EXYNOS4_DEV_DWMCI) += dev-dwmci.o
obj-$(CONFIG_EXYNOS4_DEV_DMA) += dma.o
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index 519ef0ecd0fa..97ca2592ce83 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -403,7 +403,7 @@ void __init exynos4_init_irq(void)
gic_bank_offset = soc_is_exynos4412() ? 0x4000 : 0x8000;
if (!of_have_populated_dt())
- gic_init_bases(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU, gic_bank_offset);
+ gic_init_bases(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU, gic_bank_offset, NULL);
#ifdef CONFIG_OF
else
of_irq_init(exynos4_dt_irq_match);
diff --git a/arch/arm/mach-exynos/dev-pd.c b/arch/arm/mach-exynos/dev-pd.c
deleted file mode 100644
index 3273f25d6a75..000000000000
--- a/arch/arm/mach-exynos/dev-pd.c
+++ /dev/null
@@ -1,139 +0,0 @@
-/* linux/arch/arm/mach-exynos4/dev-pd.c
- *
- * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
- * http://www.samsung.com
- *
- * EXYNOS4 - Power Domain support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#include <linux/io.h>
-#include <linux/kernel.h>
-#include <linux/platform_device.h>
-#include <linux/delay.h>
-
-#include <mach/regs-pmu.h>
-
-#include <plat/pd.h>
-
-static int exynos4_pd_enable(struct device *dev)
-{
- struct samsung_pd_info *pdata = dev->platform_data;
- u32 timeout;
-
- __raw_writel(S5P_INT_LOCAL_PWR_EN, pdata->base);
-
- /* Wait max 1ms */
- timeout = 10;
- while ((__raw_readl(pdata->base + 0x4) & S5P_INT_LOCAL_PWR_EN)
- != S5P_INT_LOCAL_PWR_EN) {
- if (timeout == 0) {
- printk(KERN_ERR "Power domain %s enable failed.\n",
- dev_name(dev));
- return -ETIMEDOUT;
- }
- timeout--;
- udelay(100);
- }
-
- return 0;
-}
-
-static int exynos4_pd_disable(struct device *dev)
-{
- struct samsung_pd_info *pdata = dev->platform_data;
- u32 timeout;
-
- __raw_writel(0, pdata->base);
-
- /* Wait max 1ms */
- timeout = 10;
- while (__raw_readl(pdata->base + 0x4) & S5P_INT_LOCAL_PWR_EN) {
- if (timeout == 0) {
- printk(KERN_ERR "Power domain %s disable failed.\n",
- dev_name(dev));
- return -ETIMEDOUT;
- }
- timeout--;
- udelay(100);
- }
-
- return 0;
-}
-
-struct platform_device exynos4_device_pd[] = {
- {
- .name = "samsung-pd",
- .id = 0,
- .dev = {
- .platform_data = &(struct samsung_pd_info) {
- .enable = exynos4_pd_enable,
- .disable = exynos4_pd_disable,
- .base = S5P_PMU_MFC_CONF,
- },
- },
- }, {
- .name = "samsung-pd",
- .id = 1,
- .dev = {
- .platform_data = &(struct samsung_pd_info) {
- .enable = exynos4_pd_enable,
- .disable = exynos4_pd_disable,
- .base = S5P_PMU_G3D_CONF,
- },
- },
- }, {
- .name = "samsung-pd",
- .id = 2,
- .dev = {
- .platform_data = &(struct samsung_pd_info) {
- .enable = exynos4_pd_enable,
- .disable = exynos4_pd_disable,
- .base = S5P_PMU_LCD0_CONF,
- },
- },
- }, {
- .name = "samsung-pd",
- .id = 3,
- .dev = {
- .platform_data = &(struct samsung_pd_info) {
- .enable = exynos4_pd_enable,
- .disable = exynos4_pd_disable,
- .base = S5P_PMU_LCD1_CONF,
- },
- },
- }, {
- .name = "samsung-pd",
- .id = 4,
- .dev = {
- .platform_data = &(struct samsung_pd_info) {
- .enable = exynos4_pd_enable,
- .disable = exynos4_pd_disable,
- .base = S5P_PMU_TV_CONF,
- },
- },
- }, {
- .name = "samsung-pd",
- .id = 5,
- .dev = {
- .platform_data = &(struct samsung_pd_info) {
- .enable = exynos4_pd_enable,
- .disable = exynos4_pd_disable,
- .base = S5P_PMU_CAM_CONF,
- },
- },
- }, {
- .name = "samsung-pd",
- .id = 6,
- .dev = {
- .platform_data = &(struct samsung_pd_info) {
- .enable = exynos4_pd_enable,
- .disable = exynos4_pd_disable,
- .base = S5P_PMU_GPS_CONF,
- },
- },
- },
-};
diff --git a/arch/arm/mach-exynos/include/mach/cpufreq.h b/arch/arm/mach-exynos/include/mach/cpufreq.h
index 3df27f2d5034..7517c3f417af 100644
--- a/arch/arm/mach-exynos/include/mach/cpufreq.h
+++ b/arch/arm/mach-exynos/include/mach/cpufreq.h
@@ -32,3 +32,5 @@ struct exynos_dvfs_info {
};
extern int exynos4210_cpufreq_init(struct exynos_dvfs_info *);
+extern int exynos4x12_cpufreq_init(struct exynos_dvfs_info *);
+extern int exynos5250_cpufreq_init(struct exynos_dvfs_info *);
diff --git a/arch/arm/mach-exynos/include/mach/entry-macro.S b/arch/arm/mach-exynos/include/mach/entry-macro.S
deleted file mode 100644
index 3ba4f547534b..000000000000
--- a/arch/arm/mach-exynos/include/mach/entry-macro.S
+++ /dev/null
@@ -1,16 +0,0 @@
-/* arch/arm/mach-exynos4/include/mach/entry-macro.S
- *
- * Cloned from arch/arm/mach-realview/include/mach/entry-macro.S
- *
- * Low-level IRQ helper macros for EXYNOS4 platforms
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
-*/
-
- .macro disable_fiq
- .endm
-
- .macro arch_ret_to_user, tmp1, tmp2
- .endm
diff --git a/arch/arm/mach-exynos/mach-nuri.c b/arch/arm/mach-exynos/mach-nuri.c
index 435261f83f46..aa37179d776c 100644
--- a/arch/arm/mach-exynos/mach-nuri.c
+++ b/arch/arm/mach-exynos/mach-nuri.c
@@ -1263,9 +1263,6 @@ static struct platform_device *nuri_devices[] __initdata = {
&s5p_device_mfc,
&s5p_device_mfc_l,
&s5p_device_mfc_r,
- &exynos4_device_pd[PD_MFC],
- &exynos4_device_pd[PD_LCD0],
- &exynos4_device_pd[PD_CAM],
&s5p_device_fimc_md,
/* NURI Devices */
@@ -1315,14 +1312,6 @@ static void __init nuri_machine_init(void)
/* Last */
platform_add_devices(nuri_devices, ARRAY_SIZE(nuri_devices));
- s5p_device_mfc.dev.parent = &exynos4_device_pd[PD_MFC].dev;
- s5p_device_fimd0.dev.parent = &exynos4_device_pd[PD_LCD0].dev;
-
- s5p_device_fimc0.dev.parent = &exynos4_device_pd[PD_CAM].dev;
- s5p_device_fimc1.dev.parent = &exynos4_device_pd[PD_CAM].dev;
- s5p_device_fimc2.dev.parent = &exynos4_device_pd[PD_CAM].dev;
- s5p_device_fimc3.dev.parent = &exynos4_device_pd[PD_CAM].dev;
- s5p_device_mipi_csis0.dev.parent = &exynos4_device_pd[PD_CAM].dev;
}
MACHINE_START(NURI, "NURI")
diff --git a/arch/arm/mach-exynos/mach-origen.c b/arch/arm/mach-exynos/mach-origen.c
index 3ec3ccf9f35c..b4d032d5c878 100644
--- a/arch/arm/mach-exynos/mach-origen.c
+++ b/arch/arm/mach-exynos/mach-origen.c
@@ -621,13 +621,6 @@ static struct platform_device *origen_devices[] __initdata = {
&s5p_device_mfc_r,
&s5p_device_mixer,
&exynos4_device_ohci,
- &exynos4_device_pd[PD_LCD0],
- &exynos4_device_pd[PD_TV],
- &exynos4_device_pd[PD_G3D],
- &exynos4_device_pd[PD_LCD1],
- &exynos4_device_pd[PD_CAM],
- &exynos4_device_pd[PD_GPS],
- &exynos4_device_pd[PD_MFC],
&origen_device_gpiokeys,
&origen_lcd_hv070wsa,
};
@@ -695,13 +688,6 @@ static void __init origen_machine_init(void)
platform_add_devices(origen_devices, ARRAY_SIZE(origen_devices));
- s5p_device_fimd0.dev.parent = &exynos4_device_pd[PD_LCD0].dev;
-
- s5p_device_hdmi.dev.parent = &exynos4_device_pd[PD_TV].dev;
- s5p_device_mixer.dev.parent = &exynos4_device_pd[PD_TV].dev;
-
- s5p_device_mfc.dev.parent = &exynos4_device_pd[PD_MFC].dev;
-
samsung_bl_set(&origen_bl_gpio_info, &origen_bl_data);
}
diff --git a/arch/arm/mach-exynos/mach-smdkv310.c b/arch/arm/mach-exynos/mach-smdkv310.c
index b2c5557f50e4..5258b8563676 100644
--- a/arch/arm/mach-exynos/mach-smdkv310.c
+++ b/arch/arm/mach-exynos/mach-smdkv310.c
@@ -277,13 +277,6 @@ static struct platform_device *smdkv310_devices[] __initdata = {
&s5p_device_mfc,
&s5p_device_mfc_l,
&s5p_device_mfc_r,
- &exynos4_device_pd[PD_MFC],
- &exynos4_device_pd[PD_G3D],
- &exynos4_device_pd[PD_LCD0],
- &exynos4_device_pd[PD_LCD1],
- &exynos4_device_pd[PD_CAM],
- &exynos4_device_pd[PD_TV],
- &exynos4_device_pd[PD_GPS],
&exynos4_device_spdif,
&exynos4_device_sysmmu,
&samsung_asoc_dma,
@@ -336,10 +329,6 @@ static void s5p_tv_setup(void)
WARN_ON(gpio_request_one(EXYNOS4_GPX3(7), GPIOF_IN, "hpd-plug"));
s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3));
s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE);
-
- /* setup dependencies between TV devices */
- s5p_device_hdmi.dev.parent = &exynos4_device_pd[PD_TV].dev;
- s5p_device_mixer.dev.parent = &exynos4_device_pd[PD_TV].dev;
}
static void __init smdkv310_map_io(void)
@@ -379,7 +368,6 @@ static void __init smdkv310_machine_init(void)
clk_xusbxti.rate = 24000000;
platform_add_devices(smdkv310_devices, ARRAY_SIZE(smdkv310_devices));
- s5p_device_mfc.dev.parent = &exynos4_device_pd[PD_MFC].dev;
}
MACHINE_START(SMDKV310, "SMDKV310")
diff --git a/arch/arm/mach-exynos/mach-universal_c210.c b/arch/arm/mach-exynos/mach-universal_c210.c
index 5ca91ec12642..4850700798d0 100644
--- a/arch/arm/mach-exynos/mach-universal_c210.c
+++ b/arch/arm/mach-exynos/mach-universal_c210.c
@@ -971,7 +971,6 @@ static struct platform_device *universal_devices[] __initdata = {
&s3c_device_i2c5,
&s5p_device_i2c_hdmiphy,
&hdmi_fixed_voltage,
- &exynos4_device_pd[PD_TV],
&s5p_device_hdmi,
&s5p_device_sdo,
&s5p_device_mixer,
@@ -984,9 +983,6 @@ static struct platform_device *universal_devices[] __initdata = {
&s5p_device_mfc,
&s5p_device_mfc_l,
&s5p_device_mfc_r,
- &exynos4_device_pd[PD_MFC],
- &exynos4_device_pd[PD_LCD0],
- &exynos4_device_pd[PD_CAM],
&cam_i_core_fixed_reg_dev,
&cam_s_if_fixed_reg_dev,
&s5p_device_fimc_md,
@@ -1005,10 +1001,6 @@ static void s5p_tv_setup(void)
gpio_request_one(EXYNOS4_GPX3(7), GPIOF_IN, "hpd-plug");
s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3));
s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE);
-
- /* setup dependencies between TV devices */
- s5p_device_hdmi.dev.parent = &exynos4_device_pd[PD_TV].dev;
- s5p_device_mixer.dev.parent = &exynos4_device_pd[PD_TV].dev;
}
static void __init universal_reserve(void)
@@ -1042,15 +1034,6 @@ static void __init universal_machine_init(void)
/* Last */
platform_add_devices(universal_devices, ARRAY_SIZE(universal_devices));
-
- s5p_device_mfc.dev.parent = &exynos4_device_pd[PD_MFC].dev;
- s5p_device_fimd0.dev.parent = &exynos4_device_pd[PD_LCD0].dev;
-
- s5p_device_fimc0.dev.parent = &exynos4_device_pd[PD_CAM].dev;
- s5p_device_fimc1.dev.parent = &exynos4_device_pd[PD_CAM].dev;
- s5p_device_fimc2.dev.parent = &exynos4_device_pd[PD_CAM].dev;
- s5p_device_fimc3.dev.parent = &exynos4_device_pd[PD_CAM].dev;
- s5p_device_mipi_csis0.dev.parent = &exynos4_device_pd[PD_CAM].dev;
}
MACHINE_START(UNIVERSAL_C210, "UNIVERSAL_C210")
diff --git a/arch/arm/mach-exynos/mct.c b/arch/arm/mach-exynos/mct.c
index 3e894ba25b01..e8a1caaf1902 100644
--- a/arch/arm/mach-exynos/mct.c
+++ b/arch/arm/mach-exynos/mct.c
@@ -21,6 +21,7 @@
#include <linux/percpu.h>
#include <asm/hardware/gic.h>
+#include <asm/localtimer.h>
#include <plat/cpu.h>
@@ -380,7 +381,7 @@ static struct irqaction mct_tick1_event_irq = {
.handler = exynos4_mct_tick_isr,
};
-static void exynos4_mct_tick_init(struct clock_event_device *evt)
+static int __cpuinit exynos4_local_timer_setup(struct clock_event_device *evt)
{
struct mct_clock_event_device *mevt;
unsigned int cpu = smp_processor_id();
@@ -422,17 +423,11 @@ static void exynos4_mct_tick_init(struct clock_event_device *evt)
} else {
enable_percpu_irq(IRQ_MCT_LOCALTIMER, 0);
}
-}
-
-/* Setup the local clock events for a CPU */
-int __cpuinit local_timer_setup(struct clock_event_device *evt)
-{
- exynos4_mct_tick_init(evt);
return 0;
}
-void local_timer_stop(struct clock_event_device *evt)
+static void exynos4_local_timer_stop(struct clock_event_device *evt)
{
unsigned int cpu = smp_processor_id();
evt->set_mode(CLOCK_EVT_MODE_UNUSED, evt);
@@ -444,6 +439,11 @@ void local_timer_stop(struct clock_event_device *evt)
else
disable_percpu_irq(IRQ_MCT_LOCALTIMER);
}
+
+static struct local_timer_ops exynos4_mct_tick_ops __cpuinitdata = {
+ .setup = exynos4_local_timer_setup,
+ .stop = exynos4_local_timer_stop,
+};
#endif /* CONFIG_LOCAL_TIMERS */
static void __init exynos4_timer_resources(void)
@@ -463,6 +463,8 @@ static void __init exynos4_timer_resources(void)
WARN(err, "MCT: can't request IRQ %d (%d)\n",
IRQ_MCT_LOCALTIMER, err);
}
+
+ local_timer_register(&exynos4_mct_tick_ops);
#endif /* CONFIG_LOCAL_TIMERS */
}
diff --git a/arch/arm/mach-exynos/pm_domains.c b/arch/arm/mach-exynos/pm_domains.c
new file mode 100644
index 000000000000..0b04af2b13cc
--- /dev/null
+++ b/arch/arm/mach-exynos/pm_domains.c
@@ -0,0 +1,195 @@
+/*
+ * Exynos Generic power domain support.
+ *
+ * Copyright (c) 2012 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * Implementation of Exynos specific power domain control which is used in
+ * conjunction with runtime-pm. Support for both device-tree and non-device-tree
+ * based power domain support is included.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/io.h>
+#include <linux/err.h>
+#include <linux/slab.h>
+#include <linux/pm_domain.h>
+#include <linux/delay.h>
+#include <linux/of_address.h>
+
+#include <mach/regs-pmu.h>
+#include <plat/devs.h>
+
+/*
+ * Exynos specific wrapper around the generic power domain
+ */
+struct exynos_pm_domain {
+ void __iomem *base;
+ char const *name;
+ bool is_off;
+ struct generic_pm_domain pd;
+};
+
+static int exynos_pd_power(struct generic_pm_domain *domain, bool power_on)
+{
+ struct exynos_pm_domain *pd;
+ void __iomem *base;
+ u32 timeout, pwr;
+ char *op;
+
+ pd = container_of(domain, struct exynos_pm_domain, pd);
+ base = pd->base;
+
+ pwr = power_on ? S5P_INT_LOCAL_PWR_EN : 0;
+ __raw_writel(pwr, base);
+
+ /* Wait max 1ms */
+ timeout = 10;
+
+ while ((__raw_readl(base + 0x4) & S5P_INT_LOCAL_PWR_EN) != pwr) {
+ if (!timeout) {
+ op = (power_on) ? "enable" : "disable";
+ pr_err("Power domain %s %s failed\n", domain->name, op);
+ return -ETIMEDOUT;
+ }
+ timeout--;
+ cpu_relax();
+ usleep_range(80, 100);
+ }
+ return 0;
+}
+
+static int exynos_pd_power_on(struct generic_pm_domain *domain)
+{
+ return exynos_pd_power(domain, true);
+}
+
+static int exynos_pd_power_off(struct generic_pm_domain *domain)
+{
+ return exynos_pd_power(domain, false);
+}
+
+#define EXYNOS_GPD(PD, BASE, NAME) \
+static struct exynos_pm_domain PD = { \
+ .base = (void __iomem *)BASE, \
+ .name = NAME, \
+ .pd = { \
+ .power_off = exynos_pd_power_off, \
+ .power_on = exynos_pd_power_on, \
+ }, \
+}
+
+#ifdef CONFIG_OF
+static __init int exynos_pm_dt_parse_domains(void)
+{
+ struct device_node *np;
+
+ for_each_compatible_node(np, NULL, "samsung,exynos4210-pd") {
+ struct exynos_pm_domain *pd;
+
+ pd = kzalloc(sizeof(*pd), GFP_KERNEL);
+ if (!pd) {
+ pr_err("%s: failed to allocate memory for domain\n",
+ __func__);
+ return -ENOMEM;
+ }
+
+ if (of_get_property(np, "samsung,exynos4210-pd-off", NULL))
+ pd->is_off = true;
+ pd->name = np->name;
+ pd->base = of_iomap(np, 0);
+ pd->pd.power_off = exynos_pd_power_off;
+ pd->pd.power_on = exynos_pd_power_on;
+ pd->pd.of_node = np;
+ pm_genpd_init(&pd->pd, NULL, false);
+ }
+ return 0;
+}
+#else
+static __init int exynos_pm_dt_parse_domains(void)
+{
+ return 0;
+}
+#endif /* CONFIG_OF */
+
+static __init void exynos_pm_add_dev_to_genpd(struct platform_device *pdev,
+ struct exynos_pm_domain *pd)
+{
+ if (pdev->dev.bus) {
+ if (pm_genpd_add_device(&pd->pd, &pdev->dev))
+ pr_info("%s: error in adding %s device to %s power"
+ "domain\n", __func__, dev_name(&pdev->dev),
+ pd->name);
+ }
+}
+
+EXYNOS_GPD(exynos4_pd_mfc, S5P_PMU_MFC_CONF, "pd-mfc");
+EXYNOS_GPD(exynos4_pd_g3d, S5P_PMU_G3D_CONF, "pd-g3d");
+EXYNOS_GPD(exynos4_pd_lcd0, S5P_PMU_LCD0_CONF, "pd-lcd0");
+EXYNOS_GPD(exynos4_pd_lcd1, S5P_PMU_LCD1_CONF, "pd-lcd1");
+EXYNOS_GPD(exynos4_pd_tv, S5P_PMU_TV_CONF, "pd-tv");
+EXYNOS_GPD(exynos4_pd_cam, S5P_PMU_CAM_CONF, "pd-cam");
+EXYNOS_GPD(exynos4_pd_gps, S5P_PMU_GPS_CONF, "pd-gps");
+
+static struct exynos_pm_domain *exynos4_pm_domains[] = {
+ &exynos4_pd_mfc,
+ &exynos4_pd_g3d,
+ &exynos4_pd_lcd0,
+ &exynos4_pd_lcd1,
+ &exynos4_pd_tv,
+ &exynos4_pd_cam,
+ &exynos4_pd_gps,
+};
+
+static __init int exynos4_pm_init_power_domain(void)
+{
+ int idx;
+
+ if (of_have_populated_dt())
+ return exynos_pm_dt_parse_domains();
+
+ for (idx = 0; idx < ARRAY_SIZE(exynos4_pm_domains); idx++)
+ pm_genpd_init(&exynos4_pm_domains[idx]->pd, NULL,
+ exynos4_pm_domains[idx]->is_off);
+
+#ifdef CONFIG_S5P_DEV_FIMD0
+ exynos_pm_add_dev_to_genpd(&s5p_device_fimd0, &exynos4_pd_lcd0);
+#endif
+#ifdef CONFIG_S5P_DEV_TV
+ exynos_pm_add_dev_to_genpd(&s5p_device_hdmi, &exynos4_pd_tv);
+ exynos_pm_add_dev_to_genpd(&s5p_device_mixer, &exynos4_pd_tv);
+#endif
+#ifdef CONFIG_S5P_DEV_MFC
+ exynos_pm_add_dev_to_genpd(&s5p_device_mfc, &exynos4_pd_mfc);
+#endif
+#ifdef CONFIG_S5P_DEV_FIMC0
+ exynos_pm_add_dev_to_genpd(&s5p_device_fimc0, &exynos4_pd_cam);
+#endif
+#ifdef CONFIG_S5P_DEV_FIMC1
+ exynos_pm_add_dev_to_genpd(&s5p_device_fimc1, &exynos4_pd_cam);
+#endif
+#ifdef CONFIG_S5P_DEV_FIMC2
+ exynos_pm_add_dev_to_genpd(&s5p_device_fimc2, &exynos4_pd_cam);
+#endif
+#ifdef CONFIG_S5P_DEV_FIMC3
+ exynos_pm_add_dev_to_genpd(&s5p_device_fimc3, &exynos4_pd_cam);
+#endif
+#ifdef CONFIG_S5P_DEV_CSIS0
+ exynos_pm_add_dev_to_genpd(&s5p_device_mipi_csis0, &exynos4_pd_cam);
+#endif
+#ifdef CONFIG_S5P_DEV_CSIS1
+ exynos_pm_add_dev_to_genpd(&s5p_device_mipi_csis1, &exynos4_pd_cam);
+#endif
+ return 0;
+}
+arch_initcall(exynos4_pm_init_power_domain);
+
+static __init int exynos_pm_late_initcall(void)
+{
+ pm_genpd_poweroff_unused();
+ return 0;
+}
+late_initcall(exynos_pm_late_initcall);
diff --git a/arch/arm/mach-footbridge/dc21285.c b/arch/arm/mach-footbridge/dc21285.c
index f685650c25d7..3194d3f73503 100644
--- a/arch/arm/mach-footbridge/dc21285.c
+++ b/arch/arm/mach-footbridge/dc21285.c
@@ -275,11 +275,13 @@ int __init dc21285_setup(int nr, struct pci_sys_data *sys)
allocate_resource(&iomem_resource, &res[0], 0x40000000,
0x80000000, 0xffffffff, 0x40000000, NULL, NULL);
- pci_add_resource(&sys->resources, &ioport_resource);
- pci_add_resource(&sys->resources, &res[0]);
- pci_add_resource(&sys->resources, &res[1]);
sys->mem_offset = DC21285_PCI_MEM;
+ pci_add_resource_offset(&sys->resources,
+ &ioport_resource, sys->io_offset);
+ pci_add_resource_offset(&sys->resources, &res[0], sys->mem_offset);
+ pci_add_resource_offset(&sys->resources, &res[1], sys->mem_offset);
+
return 1;
}
diff --git a/arch/arm/mach-footbridge/include/mach/entry-macro.S b/arch/arm/mach-footbridge/include/mach/entry-macro.S
index d3847be0c667..dabbd5c54a78 100644
--- a/arch/arm/mach-footbridge/include/mach/entry-macro.S
+++ b/arch/arm/mach-footbridge/include/mach/entry-macro.S
@@ -14,9 +14,6 @@
.equ dc21285_high, ARMCSR_BASE & 0xff000000
.equ dc21285_low, ARMCSR_BASE & 0x00ffffff
- .macro disable_fiq
- .endm
-
.macro get_irqnr_preamble, base, tmp
mov \base, #dc21285_high
.if dc21285_low
@@ -24,9 +21,6 @@
.endif
.endm
- .macro arch_ret_to_user, tmp1, tmp2
- .endm
-
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
ldr \irqstat, [\base, #0x180] @ get interrupts
diff --git a/arch/arm/mach-gemini/include/mach/entry-macro.S b/arch/arm/mach-gemini/include/mach/entry-macro.S
index 1624f91a2b8b..f044e430bfa4 100644
--- a/arch/arm/mach-gemini/include/mach/entry-macro.S
+++ b/arch/arm/mach-gemini/include/mach/entry-macro.S
@@ -12,15 +12,9 @@
#define IRQ_STATUS 0x14
- .macro disable_fiq
- .endm
-
.macro get_irqnr_preamble, base, tmp
.endm
- .macro arch_ret_to_user, tmp1, tmp2
- .endm
-
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
ldr \irqstat, =IO_ADDRESS(GEMINI_INTERRUPT_BASE + IRQ_STATUS)
ldr \irqnr, [\irqstat]
diff --git a/arch/arm/mach-h720x/include/mach/entry-macro.S b/arch/arm/mach-h720x/include/mach/entry-macro.S
index c3948e5ba4a0..75267fad7012 100644
--- a/arch/arm/mach-h720x/include/mach/entry-macro.S
+++ b/arch/arm/mach-h720x/include/mach/entry-macro.S
@@ -8,15 +8,9 @@
* warranty of any kind, whether express or implied.
*/
- .macro disable_fiq
- .endm
-
.macro get_irqnr_preamble, base, tmp
.endm
- .macro arch_ret_to_user, tmp1, tmp2
- .endm
-
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
#if defined (CONFIG_CPU_H7201) || defined (CONFIG_CPU_H7202)
@ we could use the id register on H7202, but this is not
diff --git a/arch/arm/mach-highbank/Makefile b/arch/arm/mach-highbank/Makefile
index 986958a5a720..f8437dd238c2 100644
--- a/arch/arm/mach-highbank/Makefile
+++ b/arch/arm/mach-highbank/Makefile
@@ -1,6 +1,5 @@
obj-y := clock.o highbank.o system.o
obj-$(CONFIG_DEBUG_HIGHBANK_UART) += lluart.o
obj-$(CONFIG_SMP) += platsmp.o
-obj-$(CONFIG_LOCAL_TIMERS) += localtimer.o
obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
obj-$(CONFIG_PM_SLEEP) += pm.o
diff --git a/arch/arm/mach-highbank/highbank.c b/arch/arm/mach-highbank/highbank.c
index a96183e73fad..808b055289b2 100644
--- a/arch/arm/mach-highbank/highbank.c
+++ b/arch/arm/mach-highbank/highbank.c
@@ -27,6 +27,7 @@
#include <asm/cacheflush.h>
#include <asm/smp_plat.h>
#include <asm/smp_scu.h>
+#include <asm/smp_twd.h>
#include <asm/hardware/arm_timer.h>
#include <asm/hardware/timer-sp.h>
#include <asm/hardware/gic.h>
@@ -111,6 +112,8 @@ static void __init highbank_timer_init(void)
sp804_clocksource_and_sched_clock_init(timer_base + 0x20, "timer1");
sp804_clockevents_init(timer_base, irq, "timer0");
+
+ twd_local_timer_of_register();
}
static struct sys_timer highbank_timer = {
diff --git a/arch/arm/mach-highbank/include/mach/entry-macro.S b/arch/arm/mach-highbank/include/mach/entry-macro.S
deleted file mode 100644
index a14f9e62ca92..000000000000
--- a/arch/arm/mach-highbank/include/mach/entry-macro.S
+++ /dev/null
@@ -1,5 +0,0 @@
- .macro disable_fiq
- .endm
-
- .macro arch_ret_to_user, tmp1, tmp2
- .endm
diff --git a/arch/arm/mach-highbank/localtimer.c b/arch/arm/mach-highbank/localtimer.c
deleted file mode 100644
index 5a00e7945fdf..000000000000
--- a/arch/arm/mach-highbank/localtimer.c
+++ /dev/null
@@ -1,40 +0,0 @@
-/*
- * Copyright 2010-2011 Calxeda, Inc.
- * Based on localtimer.c, Copyright (C) 2002 ARM Ltd.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program. If not, see <http://www.gnu.org/licenses/>.
- */
-#include <linux/init.h>
-#include <linux/clockchips.h>
-#include <linux/of.h>
-#include <linux/of_address.h>
-#include <linux/of_irq.h>
-
-#include <asm/smp_twd.h>
-
-/*
- * Setup the local clock events for a CPU.
- */
-int __cpuinit local_timer_setup(struct clock_event_device *evt)
-{
- struct device_node *np;
-
- np = of_find_compatible_node(NULL, NULL, "arm,smp-twd");
- if (!twd_base) {
- twd_base = of_iomap(np, 0);
- WARN_ON(!twd_base);
- }
- evt->irq = irq_of_parse_and_map(np, 0);
- twd_timer_setup(evt);
- return 0;
-}
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 4defb97bbfc8..3919fba52ac8 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -46,7 +46,6 @@ config SOC_IMX21
bool
select MACH_MX21
select CPU_ARM926T
- select ARCH_MXC_AUDMUX_V1
select IMX_HAVE_DMA_V1
select IMX_HAVE_IOMUX_V1
select MXC_AVIC
@@ -55,7 +54,6 @@ config SOC_IMX25
bool
select ARCH_MX25
select CPU_ARM926T
- select ARCH_MXC_AUDMUX_V2
select ARCH_MXC_IOMUX_V3
select MXC_AVIC
@@ -63,7 +61,6 @@ config SOC_IMX27
bool
select MACH_MX27
select CPU_ARM926T
- select ARCH_MXC_AUDMUX_V1
select IMX_HAVE_DMA_V1
select IMX_HAVE_IOMUX_V1
select MXC_AVIC
@@ -72,7 +69,6 @@ config SOC_IMX31
bool
select CPU_V6
select IMX_HAVE_PLATFORM_MXC_RNGA
- select ARCH_MXC_AUDMUX_V2
select MXC_AVIC
select SMP_ON_UP if SMP
@@ -80,7 +76,6 @@ config SOC_IMX35
bool
select CPU_V6
select ARCH_MXC_IOMUX_V3
- select ARCH_MXC_AUDMUX_V2
select HAVE_EPIT
select MXC_AVIC
select SMP_ON_UP if SMP
@@ -89,7 +84,6 @@ config SOC_IMX5
select CPU_V7
select MXC_TZIC
select ARCH_MXC_IOMUX_V3
- select ARCH_MXC_AUDMUX_V2
select ARCH_HAS_CPUFREQ
select ARCH_MX5
bool
diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index f4b6fb0730cb..1ca9558723c2 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -71,7 +71,6 @@ obj-$(CONFIG_CPU_V7) += head-v7.o
AFLAGS_head-v7.o :=-Wa,-march=armv7-a
obj-$(CONFIG_SMP) += platsmp.o
obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
-obj-$(CONFIG_LOCAL_TIMERS) += localtimer.o
obj-$(CONFIG_SOC_IMX6Q) += clock-imx6q.o mach-imx6q.o
ifeq ($(CONFIG_PM),y)
diff --git a/arch/arm/mach-imx/clock-imx27.c b/arch/arm/mach-imx/clock-imx27.c
index 88fe00a146e3..dc2d7a511d9b 100644
--- a/arch/arm/mach-imx/clock-imx27.c
+++ b/arch/arm/mach-imx/clock-imx27.c
@@ -661,7 +661,7 @@ static struct clk_lookup lookups[] = {
_REGISTER_CLOCK(NULL, "dma", dma_clk)
_REGISTER_CLOCK(NULL, "rtic", rtic_clk)
_REGISTER_CLOCK(NULL, "brom", brom_clk)
- _REGISTER_CLOCK(NULL, "emma", emma_clk)
+ _REGISTER_CLOCK("m2m-emmaprp.0", NULL, emma_clk)
_REGISTER_CLOCK(NULL, "slcdc", slcdc_clk)
_REGISTER_CLOCK("imx27-fec.0", NULL, fec_clk)
_REGISTER_CLOCK(NULL, "emi", emi_clk)
diff --git a/arch/arm/mach-imx/clock-imx31.c b/arch/arm/mach-imx/clock-imx31.c
index 988a28178d4c..3a943cd4159f 100644
--- a/arch/arm/mach-imx/clock-imx31.c
+++ b/arch/arm/mach-imx/clock-imx31.c
@@ -32,7 +32,7 @@
#include <mach/mx31.h>
#include <mach/common.h>
-#include "crmregs-imx31.h"
+#include "crmregs-imx3.h"
#define PRE_DIV_MIN_FREQ 10000000 /* Minimum Frequency after Predivider */
diff --git a/arch/arm/mach-imx/clock-imx35.c b/arch/arm/mach-imx/clock-imx35.c
index ac8238caecb9..1e279af656ad 100644
--- a/arch/arm/mach-imx/clock-imx35.c
+++ b/arch/arm/mach-imx/clock-imx35.c
@@ -27,23 +27,7 @@
#include <mach/hardware.h>
#include <mach/common.h>
-#define CCM_BASE MX35_IO_ADDRESS(MX35_CCM_BASE_ADDR)
-
-#define CCM_CCMR 0x00
-#define CCM_PDR0 0x04
-#define CCM_PDR1 0x08
-#define CCM_PDR2 0x0C
-#define CCM_PDR3 0x10
-#define CCM_PDR4 0x14
-#define CCM_RCSR 0x18
-#define CCM_MPCTL 0x1C
-#define CCM_PPCTL 0x20
-#define CCM_ACMR 0x24
-#define CCM_COSR 0x28
-#define CCM_CGR0 0x2C
-#define CCM_CGR1 0x30
-#define CCM_CGR2 0x34
-#define CCM_CGR3 0x38
+#include "crmregs-imx3.h"
#ifdef HAVE_SET_RATE_SUPPORT
static void calc_dividers(u32 div, u32 *pre, u32 *post, u32 maxpost)
@@ -111,14 +95,14 @@ static void calc_dividers_3_3(u32 div, u32 *pre, u32 *post)
static unsigned long get_rate_mpll(void)
{
- ulong mpctl = __raw_readl(CCM_BASE + CCM_MPCTL);
+ ulong mpctl = __raw_readl(MX35_CCM_MPCTL);
return mxc_decode_pll(mpctl, 24000000);
}
static unsigned long get_rate_ppll(void)
{
- ulong ppctl = __raw_readl(CCM_BASE + CCM_PPCTL);
+ ulong ppctl = __raw_readl(MX35_CCM_PPCTL);
return mxc_decode_pll(ppctl, 24000000);
}
@@ -148,7 +132,7 @@ static struct arm_ahb_div clk_consumer[] = {
static unsigned long get_rate_arm(void)
{
- unsigned long pdr0 = __raw_readl(CCM_BASE + CCM_PDR0);
+ unsigned long pdr0 = __raw_readl(MXC_CCM_PDR0);
struct arm_ahb_div *aad;
unsigned long fref = get_rate_mpll();
@@ -161,7 +145,7 @@ static unsigned long get_rate_arm(void)
static unsigned long get_rate_ahb(struct clk *clk)
{
- unsigned long pdr0 = __raw_readl(CCM_BASE + CCM_PDR0);
+ unsigned long pdr0 = __raw_readl(MXC_CCM_PDR0);
struct arm_ahb_div *aad;
unsigned long fref = get_rate_arm();
@@ -177,8 +161,8 @@ static unsigned long get_rate_ipg(struct clk *clk)
static unsigned long get_rate_uart(struct clk *clk)
{
- unsigned long pdr3 = __raw_readl(CCM_BASE + CCM_PDR3);
- unsigned long pdr4 = __raw_readl(CCM_BASE + CCM_PDR4);
+ unsigned long pdr3 = __raw_readl(MX35_CCM_PDR3);
+ unsigned long pdr4 = __raw_readl(MX35_CCM_PDR4);
unsigned long div = ((pdr4 >> 10) & 0x3f) + 1;
if (pdr3 & (1 << 14))
@@ -189,7 +173,7 @@ static unsigned long get_rate_uart(struct clk *clk)
static unsigned long get_rate_sdhc(struct clk *clk)
{
- unsigned long pdr3 = __raw_readl(CCM_BASE + CCM_PDR3);
+ unsigned long pdr3 = __raw_readl(MX35_CCM_PDR3);
unsigned long div, rate;
if (pdr3 & (1 << 6))
@@ -215,7 +199,7 @@ static unsigned long get_rate_sdhc(struct clk *clk)
static unsigned long get_rate_mshc(struct clk *clk)
{
- unsigned long pdr1 = __raw_readl(CCM_BASE + CCM_PDR1);
+ unsigned long pdr1 = __raw_readl(MXC_CCM_PDR1);
unsigned long div1, div2, rate;
if (pdr1 & (1 << 7))
@@ -231,7 +215,7 @@ static unsigned long get_rate_mshc(struct clk *clk)
static unsigned long get_rate_ssi(struct clk *clk)
{
- unsigned long pdr2 = __raw_readl(CCM_BASE + CCM_PDR2);
+ unsigned long pdr2 = __raw_readl(MX35_CCM_PDR2);
unsigned long div1, div2, rate;
if (pdr2 & (1 << 6))
@@ -256,7 +240,7 @@ static unsigned long get_rate_ssi(struct clk *clk)
static unsigned long get_rate_csi(struct clk *clk)
{
- unsigned long pdr2 = __raw_readl(CCM_BASE + CCM_PDR2);
+ unsigned long pdr2 = __raw_readl(MX35_CCM_PDR2);
unsigned long rate;
if (pdr2 & (1 << 7))
@@ -269,7 +253,7 @@ static unsigned long get_rate_csi(struct clk *clk)
static unsigned long get_rate_otg(struct clk *clk)
{
- unsigned long pdr4 = __raw_readl(CCM_BASE + CCM_PDR4);
+ unsigned long pdr4 = __raw_readl(MX35_CCM_PDR4);
unsigned long rate;
if (pdr4 & (1 << 9))
@@ -282,8 +266,8 @@ static unsigned long get_rate_otg(struct clk *clk)
static unsigned long get_rate_ipg_per(struct clk *clk)
{
- unsigned long pdr0 = __raw_readl(CCM_BASE + CCM_PDR0);
- unsigned long pdr4 = __raw_readl(CCM_BASE + CCM_PDR4);
+ unsigned long pdr0 = __raw_readl(MXC_CCM_PDR0);
+ unsigned long pdr4 = __raw_readl(MX35_CCM_PDR4);
unsigned long div;
if (pdr0 & (1 << 26)) {
@@ -297,7 +281,7 @@ static unsigned long get_rate_ipg_per(struct clk *clk)
static unsigned long get_rate_hsp(struct clk *clk)
{
- unsigned long hsp_podf = (__raw_readl(CCM_BASE + CCM_PDR0) >> 20) & 0x03;
+ unsigned long hsp_podf = (__raw_readl(MXC_CCM_PDR0) >> 20) & 0x03;
unsigned long fref = get_rate_mpll();
if (fref > 400 * 1000 * 1000) {
@@ -345,7 +329,7 @@ static void clk_cgr_disable(struct clk *clk)
#define DEFINE_CLOCK(name, i, er, es, gr, sr) \
static struct clk name = { \
.id = i, \
- .enable_reg = CCM_BASE + er, \
+ .enable_reg = er, \
.enable_shift = es, \
.get_rate = gr, \
.set_rate = sr, \
@@ -353,59 +337,59 @@ static void clk_cgr_disable(struct clk *clk)
.disable = clk_cgr_disable, \
}
-DEFINE_CLOCK(asrc_clk, 0, CCM_CGR0, 0, NULL, NULL);
-DEFINE_CLOCK(pata_clk, 0, CCM_CGR0, 2, get_rate_ipg, NULL);
-/* DEFINE_CLOCK(audmux_clk, 0, CCM_CGR0, 4, NULL, NULL); */
-DEFINE_CLOCK(can1_clk, 0, CCM_CGR0, 6, get_rate_ipg, NULL);
-DEFINE_CLOCK(can2_clk, 1, CCM_CGR0, 8, get_rate_ipg, NULL);
-DEFINE_CLOCK(cspi1_clk, 0, CCM_CGR0, 10, get_rate_ipg, NULL);
-DEFINE_CLOCK(cspi2_clk, 1, CCM_CGR0, 12, get_rate_ipg, NULL);
-DEFINE_CLOCK(ect_clk, 0, CCM_CGR0, 14, get_rate_ipg, NULL);
-DEFINE_CLOCK(edio_clk, 0, CCM_CGR0, 16, NULL, NULL);
-DEFINE_CLOCK(emi_clk, 0, CCM_CGR0, 18, get_rate_ipg, NULL);
-DEFINE_CLOCK(epit1_clk, 0, CCM_CGR0, 20, get_rate_ipg, NULL);
-DEFINE_CLOCK(epit2_clk, 1, CCM_CGR0, 22, get_rate_ipg, NULL);
-DEFINE_CLOCK(esai_clk, 0, CCM_CGR0, 24, NULL, NULL);
-DEFINE_CLOCK(esdhc1_clk, 0, CCM_CGR0, 26, get_rate_sdhc, NULL);
-DEFINE_CLOCK(esdhc2_clk, 1, CCM_CGR0, 28, get_rate_sdhc, NULL);
-DEFINE_CLOCK(esdhc3_clk, 2, CCM_CGR0, 30, get_rate_sdhc, NULL);
-
-DEFINE_CLOCK(fec_clk, 0, CCM_CGR1, 0, get_rate_ipg, NULL);
-DEFINE_CLOCK(gpio1_clk, 0, CCM_CGR1, 2, NULL, NULL);
-DEFINE_CLOCK(gpio2_clk, 1, CCM_CGR1, 4, NULL, NULL);
-DEFINE_CLOCK(gpio3_clk, 2, CCM_CGR1, 6, NULL, NULL);
-DEFINE_CLOCK(gpt_clk, 0, CCM_CGR1, 8, get_rate_ipg, NULL);
-DEFINE_CLOCK(i2c1_clk, 0, CCM_CGR1, 10, get_rate_ipg_per, NULL);
-DEFINE_CLOCK(i2c2_clk, 1, CCM_CGR1, 12, get_rate_ipg_per, NULL);
-DEFINE_CLOCK(i2c3_clk, 2, CCM_CGR1, 14, get_rate_ipg_per, NULL);
-DEFINE_CLOCK(iomuxc_clk, 0, CCM_CGR1, 16, NULL, NULL);
-DEFINE_CLOCK(ipu_clk, 0, CCM_CGR1, 18, get_rate_hsp, NULL);
-DEFINE_CLOCK(kpp_clk, 0, CCM_CGR1, 20, get_rate_ipg, NULL);
-DEFINE_CLOCK(mlb_clk, 0, CCM_CGR1, 22, get_rate_ahb, NULL);
-DEFINE_CLOCK(mshc_clk, 0, CCM_CGR1, 24, get_rate_mshc, NULL);
-DEFINE_CLOCK(owire_clk, 0, CCM_CGR1, 26, get_rate_ipg_per, NULL);
-DEFINE_CLOCK(pwm_clk, 0, CCM_CGR1, 28, get_rate_ipg_per, NULL);
-DEFINE_CLOCK(rngc_clk, 0, CCM_CGR1, 30, get_rate_ipg, NULL);
-
-DEFINE_CLOCK(rtc_clk, 0, CCM_CGR2, 0, get_rate_ipg, NULL);
-DEFINE_CLOCK(rtic_clk, 0, CCM_CGR2, 2, get_rate_ahb, NULL);
-DEFINE_CLOCK(scc_clk, 0, CCM_CGR2, 4, get_rate_ipg, NULL);
-DEFINE_CLOCK(sdma_clk, 0, CCM_CGR2, 6, NULL, NULL);
-DEFINE_CLOCK(spba_clk, 0, CCM_CGR2, 8, get_rate_ipg, NULL);
-DEFINE_CLOCK(spdif_clk, 0, CCM_CGR2, 10, NULL, NULL);
-DEFINE_CLOCK(ssi1_clk, 0, CCM_CGR2, 12, get_rate_ssi, NULL);
-DEFINE_CLOCK(ssi2_clk, 1, CCM_CGR2, 14, get_rate_ssi, NULL);
-DEFINE_CLOCK(uart1_clk, 0, CCM_CGR2, 16, get_rate_uart, NULL);
-DEFINE_CLOCK(uart2_clk, 1, CCM_CGR2, 18, get_rate_uart, NULL);
-DEFINE_CLOCK(uart3_clk, 2, CCM_CGR2, 20, get_rate_uart, NULL);
-DEFINE_CLOCK(usbotg_clk, 0, CCM_CGR2, 22, get_rate_otg, NULL);
-DEFINE_CLOCK(wdog_clk, 0, CCM_CGR2, 24, NULL, NULL);
-DEFINE_CLOCK(max_clk, 0, CCM_CGR2, 26, NULL, NULL);
-DEFINE_CLOCK(audmux_clk, 0, CCM_CGR2, 30, NULL, NULL);
-
-DEFINE_CLOCK(csi_clk, 0, CCM_CGR3, 0, get_rate_csi, NULL);
-DEFINE_CLOCK(iim_clk, 0, CCM_CGR3, 2, NULL, NULL);
-DEFINE_CLOCK(gpu2d_clk, 0, CCM_CGR3, 4, NULL, NULL);
+DEFINE_CLOCK(asrc_clk, 0, MX35_CCM_CGR0, 0, NULL, NULL);
+DEFINE_CLOCK(pata_clk, 0, MX35_CCM_CGR0, 2, get_rate_ipg, NULL);
+/* DEFINE_CLOCK(audmux_clk, 0, MX35_CCM_CGR0, 4, NULL, NULL); */
+DEFINE_CLOCK(can1_clk, 0, MX35_CCM_CGR0, 6, get_rate_ipg, NULL);
+DEFINE_CLOCK(can2_clk, 1, MX35_CCM_CGR0, 8, get_rate_ipg, NULL);
+DEFINE_CLOCK(cspi1_clk, 0, MX35_CCM_CGR0, 10, get_rate_ipg, NULL);
+DEFINE_CLOCK(cspi2_clk, 1, MX35_CCM_CGR0, 12, get_rate_ipg, NULL);
+DEFINE_CLOCK(ect_clk, 0, MX35_CCM_CGR0, 14, get_rate_ipg, NULL);
+DEFINE_CLOCK(edio_clk, 0, MX35_CCM_CGR0, 16, NULL, NULL);
+DEFINE_CLOCK(emi_clk, 0, MX35_CCM_CGR0, 18, get_rate_ipg, NULL);
+DEFINE_CLOCK(epit1_clk, 0, MX35_CCM_CGR0, 20, get_rate_ipg, NULL);
+DEFINE_CLOCK(epit2_clk, 1, MX35_CCM_CGR0, 22, get_rate_ipg, NULL);
+DEFINE_CLOCK(esai_clk, 0, MX35_CCM_CGR0, 24, NULL, NULL);
+DEFINE_CLOCK(esdhc1_clk, 0, MX35_CCM_CGR0, 26, get_rate_sdhc, NULL);
+DEFINE_CLOCK(esdhc2_clk, 1, MX35_CCM_CGR0, 28, get_rate_sdhc, NULL);
+DEFINE_CLOCK(esdhc3_clk, 2, MX35_CCM_CGR0, 30, get_rate_sdhc, NULL);
+
+DEFINE_CLOCK(fec_clk, 0, MX35_CCM_CGR1, 0, get_rate_ipg, NULL);
+DEFINE_CLOCK(gpio1_clk, 0, MX35_CCM_CGR1, 2, NULL, NULL);
+DEFINE_CLOCK(gpio2_clk, 1, MX35_CCM_CGR1, 4, NULL, NULL);
+DEFINE_CLOCK(gpio3_clk, 2, MX35_CCM_CGR1, 6, NULL, NULL);
+DEFINE_CLOCK(gpt_clk, 0, MX35_CCM_CGR1, 8, get_rate_ipg, NULL);
+DEFINE_CLOCK(i2c1_clk, 0, MX35_CCM_CGR1, 10, get_rate_ipg_per, NULL);
+DEFINE_CLOCK(i2c2_clk, 1, MX35_CCM_CGR1, 12, get_rate_ipg_per, NULL);
+DEFINE_CLOCK(i2c3_clk, 2, MX35_CCM_CGR1, 14, get_rate_ipg_per, NULL);
+DEFINE_CLOCK(iomuxc_clk, 0, MX35_CCM_CGR1, 16, NULL, NULL);
+DEFINE_CLOCK(ipu_clk, 0, MX35_CCM_CGR1, 18, get_rate_hsp, NULL);
+DEFINE_CLOCK(kpp_clk, 0, MX35_CCM_CGR1, 20, get_rate_ipg, NULL);
+DEFINE_CLOCK(mlb_clk, 0, MX35_CCM_CGR1, 22, get_rate_ahb, NULL);
+DEFINE_CLOCK(mshc_clk, 0, MX35_CCM_CGR1, 24, get_rate_mshc, NULL);
+DEFINE_CLOCK(owire_clk, 0, MX35_CCM_CGR1, 26, get_rate_ipg_per, NULL);
+DEFINE_CLOCK(pwm_clk, 0, MX35_CCM_CGR1, 28, get_rate_ipg_per, NULL);
+DEFINE_CLOCK(rngc_clk, 0, MX35_CCM_CGR1, 30, get_rate_ipg, NULL);
+
+DEFINE_CLOCK(rtc_clk, 0, MX35_CCM_CGR2, 0, get_rate_ipg, NULL);
+DEFINE_CLOCK(rtic_clk, 0, MX35_CCM_CGR2, 2, get_rate_ahb, NULL);
+DEFINE_CLOCK(scc_clk, 0, MX35_CCM_CGR2, 4, get_rate_ipg, NULL);
+DEFINE_CLOCK(sdma_clk, 0, MX35_CCM_CGR2, 6, NULL, NULL);
+DEFINE_CLOCK(spba_clk, 0, MX35_CCM_CGR2, 8, get_rate_ipg, NULL);
+DEFINE_CLOCK(spdif_clk, 0, MX35_CCM_CGR2, 10, NULL, NULL);
+DEFINE_CLOCK(ssi1_clk, 0, MX35_CCM_CGR2, 12, get_rate_ssi, NULL);
+DEFINE_CLOCK(ssi2_clk, 1, MX35_CCM_CGR2, 14, get_rate_ssi, NULL);
+DEFINE_CLOCK(uart1_clk, 0, MX35_CCM_CGR2, 16, get_rate_uart, NULL);
+DEFINE_CLOCK(uart2_clk, 1, MX35_CCM_CGR2, 18, get_rate_uart, NULL);
+DEFINE_CLOCK(uart3_clk, 2, MX35_CCM_CGR2, 20, get_rate_uart, NULL);
+DEFINE_CLOCK(usbotg_clk, 0, MX35_CCM_CGR2, 22, get_rate_otg, NULL);
+DEFINE_CLOCK(wdog_clk, 0, MX35_CCM_CGR2, 24, NULL, NULL);
+DEFINE_CLOCK(max_clk, 0, MX35_CCM_CGR2, 26, NULL, NULL);
+DEFINE_CLOCK(audmux_clk, 0, MX35_CCM_CGR2, 30, NULL, NULL);
+
+DEFINE_CLOCK(csi_clk, 0, MX35_CCM_CGR3, 0, get_rate_csi, NULL);
+DEFINE_CLOCK(iim_clk, 0, MX35_CCM_CGR3, 2, NULL, NULL);
+DEFINE_CLOCK(gpu2d_clk, 0, MX35_CCM_CGR3, 4, NULL, NULL);
DEFINE_CLOCK(usbahb_clk, 0, 0, 0, get_rate_ahb, NULL);
@@ -422,7 +406,7 @@ static unsigned long get_rate_nfc(struct clk *clk)
{
unsigned long div1;
- div1 = (__raw_readl(CCM_BASE + CCM_PDR4) >> 28) + 1;
+ div1 = (__raw_readl(MX35_CCM_PDR4) >> 28) + 1;
return get_rate_ahb(NULL) / div1;
}
@@ -518,11 +502,11 @@ int __init mx35_clocks_init()
/* Turn off all clocks except the ones we need to survive, namely:
* EMI, GPIO1/2/3, GPT, IOMUX, MAX and eventually uart
*/
- __raw_writel((3 << 18), CCM_BASE + CCM_CGR0);
+ __raw_writel((3 << 18), MX35_CCM_CGR0);
__raw_writel((3 << 2) | (3 << 4) | (3 << 6) | (3 << 8) | (3 << 16),
- CCM_BASE + CCM_CGR1);
- __raw_writel(cgr2, CCM_BASE + CCM_CGR2);
- __raw_writel(0, CCM_BASE + CCM_CGR3);
+ MX35_CCM_CGR1);
+ __raw_writel(cgr2, MX35_CCM_CGR2);
+ __raw_writel(0, MX35_CCM_CGR3);
clk_enable(&iim_clk);
imx_print_silicon_rev("i.MX35", mx35_revision());
@@ -533,7 +517,7 @@ int __init mx35_clocks_init()
* extra clocks turned on, otherwise the MX35 boot ROM code will
* hang after a watchdog reset.
*/
- if (!(__raw_readl(CCM_BASE + CCM_RCSR) & (3 << 10))) {
+ if (!(__raw_readl(MX35_CCM_RCSR) & (3 << 10))) {
/* Additionally turn on UART1, SCC, and IIM clocks */
clk_enable(&iim_clk);
clk_enable(&uart1_clk);
diff --git a/arch/arm/mach-imx/cpu_op-mx51.c b/arch/arm/mach-imx/cpu_op-mx51.c
index 9d34c3d4c024..7b92cd6da6d3 100644
--- a/arch/arm/mach-imx/cpu_op-mx51.c
+++ b/arch/arm/mach-imx/cpu_op-mx51.c
@@ -11,6 +11,7 @@
* http://www.gnu.org/copyleft/gpl.html
*/
+#include <linux/bug.h>
#include <linux/types.h>
#include <mach/hardware.h>
#include <linux/kernel.h>
diff --git a/arch/arm/mach-imx/crmregs-imx31.h b/arch/arm/mach-imx/crmregs-imx3.h
index 9a34d393b813..53141273df45 100644
--- a/arch/arm/mach-imx/crmregs-imx31.h
+++ b/arch/arm/mach-imx/crmregs-imx3.h
@@ -24,23 +24,36 @@
#define CKIH_CLK_FREQ_27MHZ 27000000
#define CKIL_CLK_FREQ 32768
-#define MXC_CCM_BASE MX31_IO_ADDRESS(MX31_CCM_BASE_ADDR)
+#define MXC_CCM_BASE (cpu_is_mx31() ? \
+MX31_IO_ADDRESS(MX31_CCM_BASE_ADDR) : MX35_IO_ADDRESS(MX35_CCM_BASE_ADDR))
/* Register addresses */
#define MXC_CCM_CCMR (MXC_CCM_BASE + 0x00)
#define MXC_CCM_PDR0 (MXC_CCM_BASE + 0x04)
#define MXC_CCM_PDR1 (MXC_CCM_BASE + 0x08)
+#define MX35_CCM_PDR2 (MXC_CCM_BASE + 0x0C)
#define MXC_CCM_RCSR (MXC_CCM_BASE + 0x0C)
+#define MX35_CCM_PDR3 (MXC_CCM_BASE + 0x10)
#define MXC_CCM_MPCTL (MXC_CCM_BASE + 0x10)
+#define MX35_CC