diff options
Diffstat (limited to 'drivers/ata/pata_hpt37x.c')
| -rw-r--r-- | drivers/ata/pata_hpt37x.c | 133 |
1 files changed, 47 insertions, 86 deletions
diff --git a/drivers/ata/pata_hpt37x.c b/drivers/ata/pata_hpt37x.c index 7abc7e04f656..156f304ef051 100644 --- a/drivers/ata/pata_hpt37x.c +++ b/drivers/ata/pata_hpt37x.c @@ -23,7 +23,7 @@ #include <linux/libata.h> #define DRV_NAME "pata_hpt37x" -#define DRV_VERSION "0.6.23" +#define DRV_VERSION "0.6.25" struct hpt_clock { u8 xfer_speed; @@ -394,6 +394,7 @@ static int hpt37x_pre_reset(struct ata_link *link, unsigned long deadline) { 0x50, 1, 0x04, 0x04 }, { 0x54, 1, 0x04, 0x04 } }; + u8 mcr2; if (!pci_test_config_bits(pdev, &hpt37x_enable_bits[ap->port_no])) return -ENOENT; @@ -402,25 +403,29 @@ static int hpt37x_pre_reset(struct ata_link *link, unsigned long deadline) pci_write_config_byte(pdev, 0x50 + 4 * ap->port_no, 0x37); udelay(100); + /* + * Disable the "fast interrupt" prediction. Don't hold off + * on interrupts. (== 0x01 despite what the docs say) + */ + pci_read_config_byte(pdev, 0x51 + 4 * ap->port_no, &mcr2); + /* Is it HPT370/A? */ + if (pdev->device == PCI_DEVICE_ID_TTI_HPT366 && pdev->revision < 5) { + mcr2 &= ~0x02; + mcr2 |= 0x01; + } else { + mcr2 &= ~0x07; + } + pci_write_config_byte(pdev, 0x51 + 4 * ap->port_no, mcr2); + return ata_sff_prereset(link, deadline); } -static void hpt370_set_mode(struct ata_port *ap, struct ata_device *adev, +static void hpt37x_set_mode(struct ata_port *ap, struct ata_device *adev, u8 mode) { struct pci_dev *pdev = to_pci_dev(ap->host->dev); - u32 addr1, addr2; + int addr = 0x40 + 4 * (adev->devno + 2 * ap->port_no); u32 reg, timing, mask; - u8 fast; - - addr1 = 0x40 + 4 * (adev->devno + 2 * ap->port_no); - addr2 = 0x51 + 4 * ap->port_no; - - /* Fast interrupt prediction disable, hold off interrupt disable */ - pci_read_config_byte(pdev, addr2, &fast); - fast &= ~0x02; - fast |= 0x01; - pci_write_config_byte(pdev, addr2, fast); /* Determine timing mask and find matching mode entry */ if (mode < XFER_MW_DMA_0) @@ -432,34 +437,34 @@ static void hpt370_set_mode(struct ata_port *ap, struct ata_device *adev, timing = hpt37x_find_mode(ap, mode); - pci_read_config_dword(pdev, addr1, ®); + pci_read_config_dword(pdev, addr, ®); reg = (reg & ~mask) | (timing & mask); - pci_write_config_dword(pdev, addr1, reg); + pci_write_config_dword(pdev, addr, reg); } /** - * hpt370_set_piomode - PIO setup + * hpt37x_set_piomode - PIO setup * @ap: ATA interface * @adev: device on the interface * * Perform PIO mode setup. */ -static void hpt370_set_piomode(struct ata_port *ap, struct ata_device *adev) +static void hpt37x_set_piomode(struct ata_port *ap, struct ata_device *adev) { - hpt370_set_mode(ap, adev, adev->pio_mode); + hpt37x_set_mode(ap, adev, adev->pio_mode); } /** - * hpt370_set_dmamode - DMA timing setup + * hpt37x_set_dmamode - DMA timing setup * @ap: ATA interface * @adev: Device being configured * * Set up the channel for MWDMA or UDMA modes. */ -static void hpt370_set_dmamode(struct ata_port *ap, struct ata_device *adev) +static void hpt37x_set_dmamode(struct ata_port *ap, struct ata_device *adev) { - hpt370_set_mode(ap, adev, adev->dma_mode); + hpt37x_set_mode(ap, adev, adev->dma_mode); } /** @@ -499,63 +504,6 @@ static void hpt370_bmdma_stop(struct ata_queued_cmd *qc) ata_bmdma_stop(qc); } -static void hpt372_set_mode(struct ata_port *ap, struct ata_device *adev, - u8 mode) -{ - struct pci_dev *pdev = to_pci_dev(ap->host->dev); - u32 addr1, addr2; - u32 reg, timing, mask; - u8 fast; - - addr1 = 0x40 + 4 * (adev->devno + 2 * ap->port_no); - addr2 = 0x51 + 4 * ap->port_no; - - /* Fast interrupt prediction disable, hold off interrupt disable */ - pci_read_config_byte(pdev, addr2, &fast); - fast &= ~0x07; - pci_write_config_byte(pdev, addr2, fast); - - /* Determine timing mask and find matching mode entry */ - if (mode < XFER_MW_DMA_0) - mask = 0xcfc3ffff; - else if (mode < XFER_UDMA_0) - mask = 0x31c001ff; - else - mask = 0x303c0000; - - timing = hpt37x_find_mode(ap, mode); - - pci_read_config_dword(pdev, addr1, ®); - reg = (reg & ~mask) | (timing & mask); - pci_write_config_dword(pdev, addr1, reg); -} - -/** - * hpt372_set_piomode - PIO setup - * @ap: ATA interface - * @adev: device on the interface - * - * Perform PIO mode setup. - */ - -static void hpt372_set_piomode(struct ata_port *ap, struct ata_device *adev) -{ - hpt372_set_mode(ap, adev, adev->pio_mode); -} - -/** - * hpt372_set_dmamode - DMA timing setup - * @ap: ATA interface - * @adev: Device being configured - * - * Set up the channel for MWDMA or UDMA modes. - */ - -static void hpt372_set_dmamode(struct ata_port *ap, struct ata_device *adev) -{ - hpt372_set_mode(ap, adev, adev->dma_mode); -} - /** * hpt37x_bmdma_stop - DMA engine stop * @qc: ATA command @@ -593,8 +541,8 @@ static struct ata_port_operations hpt370_port_ops = { .mode_filter = hpt370_filter, .cable_detect = hpt37x_cable_detect, - .set_piomode = hpt370_set_piomode, - .set_dmamode = hpt370_set_dmamode, + .set_piomode = hpt37x_set_piomode, + .set_dmamode = hpt37x_set_dmamode, .prereset = hpt37x_pre_reset, }; @@ -608,8 +556,7 @@ static struct ata_port_operations hpt370a_port_ops = { }; /* - * Configuration for HPT371 and HPT302. Slightly different PIO and DMA - * mode setting functionality. + * Configuration for HPT371 and HPT302. */ static struct ata_port_operations hpt302_port_ops = { @@ -618,8 +565,8 @@ static struct ata_port_operations hpt302_port_ops = { .bmdma_stop = hpt37x_bmdma_stop, .cable_detect = hpt37x_cable_detect, - .set_piomode = hpt372_set_piomode, - .set_dmamode = hpt372_set_dmamode, + .set_piomode = hpt37x_set_piomode, + .set_dmamode = hpt37x_set_dmamode, .prereset = hpt37x_pre_reset, }; @@ -920,6 +867,20 @@ static int hpt37x_init_one(struct pci_dev *dev, const struct pci_device_id *id) pci_write_config_byte(dev, 0x5a, irqmask); /* + * HPT371 chips physically have only one channel, the secondary one, + * but the primary channel registers do exist! Go figure... + * So, we manually disable the non-existing channel here + * (if the BIOS hasn't done this already). + */ + if (dev->device == PCI_DEVICE_ID_TTI_HPT371) { + u8 mcr1; + + pci_read_config_byte(dev, 0x50, &mcr1); + mcr1 &= ~0x04; + pci_write_config_byte(dev, 0x50, mcr1); + } + + /* * default to pci clock. make sure MA15/16 are set to output * to prevent drives having problems with 40-pin cables. Needed * for some drives such as IBM-DTLA which will not enter ready @@ -950,14 +911,14 @@ static int hpt37x_init_one(struct pci_dev *dev, const struct pci_device_id *id) if ((freq >> 12) != 0xABCDE) { int i; - u8 sr; + u16 sr; u32 total = 0; dev_warn(&dev->dev, "BIOS has not set timing clocks\n"); /* This is the process the HPT371 BIOS is reported to use */ for (i = 0; i < 128; i++) { - pci_read_config_byte(dev, 0x78, &sr); + pci_read_config_word(dev, 0x78, &sr); total += sr & 0x1FF; udelay(15); } |