diff options
Diffstat (limited to 'drivers/clk/mediatek/clk-mtk.h')
| -rw-r--r-- | drivers/clk/mediatek/clk-mtk.h | 28 |
1 files changed, 19 insertions, 9 deletions
diff --git a/drivers/clk/mediatek/clk-mtk.h b/drivers/clk/mediatek/clk-mtk.h index c3d6756b0c7e..7de41c3b3206 100644 --- a/drivers/clk/mediatek/clk-mtk.h +++ b/drivers/clk/mediatek/clk-mtk.h @@ -10,6 +10,7 @@ #include <linux/regmap.h> #include <linux/bitops.h> #include <linux/clk-provider.h> +#include <linux/platform_device.h> struct clk; struct clk_onecell_data; @@ -213,13 +214,13 @@ struct mtk_pll_div_table { struct mtk_pll_data { int id; const char *name; - uint32_t reg; - uint32_t pwr_reg; - uint32_t en_mask; - uint32_t pd_reg; - uint32_t tuner_reg; - uint32_t tuner_en_reg; - uint8_t tuner_en_bit; + u32 reg; + u32 pwr_reg; + u32 en_mask; + u32 pd_reg; + u32 tuner_reg; + u32 tuner_en_reg; + u8 tuner_en_bit; int pd_shift; unsigned int flags; const struct clk_ops *ops; @@ -228,11 +229,13 @@ struct mtk_pll_data { unsigned long fmax; int pcwbits; int pcwibits; - uint32_t pcw_reg; + u32 pcw_reg; int pcw_shift; - uint32_t pcw_chg_reg; + u32 pcw_chg_reg; const struct mtk_pll_div_table *div_table; const char *parent_name; + u32 en_reg; + u8 pll_en_bit; /* Assume 0, indicates BIT(0) by default */ }; void mtk_clk_register_plls(struct device_node *node, @@ -248,4 +251,11 @@ void mtk_register_reset_controller(struct device_node *np, void mtk_register_reset_controller_set_clr(struct device_node *np, unsigned int num_regs, int regofs); +struct mtk_clk_desc { + const struct mtk_gate *clks; + size_t num_clks; +}; + +int mtk_clk_simple_probe(struct platform_device *pdev); + #endif /* __DRV_CLK_MTK_H */ |