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path: root/drivers/gpu/drm/amd/display/dc/core/dc_stream.c
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Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/core/dc_stream.c')
-rw-r--r--drivers/gpu/drm/amd/display/dc/core/dc_stream.c109
1 files changed, 68 insertions, 41 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_stream.c b/drivers/gpu/drm/amd/display/dc/core/dc_stream.c
index 45931ee14a6e..f0f54f4d3d9b 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_stream.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_stream.c
@@ -221,6 +221,9 @@ struct dc_stream_status *dc_stream_get_status_from_state(
{
uint8_t i;
+ if (state == NULL)
+ return NULL;
+
for (i = 0; i < state->stream_count; i++) {
if (stream == state->streams[i])
return &state->stream_status[i];
@@ -243,6 +246,40 @@ struct dc_stream_status *dc_stream_get_status(
return dc_stream_get_status_from_state(dc->current_state, stream);
}
+static void program_cursor_attributes(
+ struct dc *dc,
+ struct dc_stream_state *stream,
+ const struct dc_cursor_attributes *attributes)
+{
+ int i;
+ struct resource_context *res_ctx;
+ struct pipe_ctx *pipe_to_program = NULL;
+
+ if (!stream)
+ return;
+
+ res_ctx = &dc->current_state->res_ctx;
+
+ for (i = 0; i < MAX_PIPES; i++) {
+ struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i];
+
+ if (pipe_ctx->stream != stream)
+ continue;
+
+ if (!pipe_to_program) {
+ pipe_to_program = pipe_ctx;
+ dc->hwss.cursor_lock(dc, pipe_to_program, true);
+ }
+
+ dc->hwss.set_cursor_attribute(pipe_ctx);
+ if (dc->hwss.set_cursor_sdr_white_level)
+ dc->hwss.set_cursor_sdr_white_level(pipe_ctx);
+ }
+
+ if (pipe_to_program)
+ dc->hwss.cursor_lock(dc, pipe_to_program, false);
+}
+
#ifndef TRIM_FSFT
/*
* dc_optimize_timing_for_fsft() - dc to optimize timing
@@ -267,10 +304,7 @@ bool dc_stream_set_cursor_attributes(
struct dc_stream_state *stream,
const struct dc_cursor_attributes *attributes)
{
- int i;
struct dc *dc;
- struct resource_context *res_ctx;
- struct pipe_ctx *pipe_to_program = NULL;
#if defined(CONFIG_DRM_AMD_DC_DCN)
bool reset_idle_optimizations = false;
#endif
@@ -290,7 +324,6 @@ bool dc_stream_set_cursor_attributes(
}
dc = stream->ctx->dc;
- res_ctx = &dc->current_state->res_ctx;
stream->cursor_attributes = *attributes;
#if defined(CONFIG_DRM_AMD_DC_DCN)
@@ -302,11 +335,39 @@ bool dc_stream_set_cursor_attributes(
}
#endif
+ program_cursor_attributes(dc, stream, attributes);
+
+#if defined(CONFIG_DRM_AMD_DC_DCN)
+ /* re-enable idle optimizations if necessary */
+ if (reset_idle_optimizations)
+ dc_allow_idle_optimizations(dc, true);
+
+#endif
+ return true;
+}
+
+static void program_cursor_position(
+ struct dc *dc,
+ struct dc_stream_state *stream,
+ const struct dc_cursor_position *position)
+{
+ int i;
+ struct resource_context *res_ctx;
+ struct pipe_ctx *pipe_to_program = NULL;
+
+ if (!stream)
+ return;
+
+ res_ctx = &dc->current_state->res_ctx;
for (i = 0; i < MAX_PIPES; i++) {
struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i];
- if (pipe_ctx->stream != stream)
+ if (pipe_ctx->stream != stream ||
+ (!pipe_ctx->plane_res.mi && !pipe_ctx->plane_res.hubp) ||
+ !pipe_ctx->plane_state ||
+ (!pipe_ctx->plane_res.xfm && !pipe_ctx->plane_res.dpp) ||
+ (!pipe_ctx->plane_res.ipp && !pipe_ctx->plane_res.dpp))
continue;
if (!pipe_to_program) {
@@ -314,31 +375,18 @@ bool dc_stream_set_cursor_attributes(
dc->hwss.cursor_lock(dc, pipe_to_program, true);
}
- dc->hwss.set_cursor_attribute(pipe_ctx);
- if (dc->hwss.set_cursor_sdr_white_level)
- dc->hwss.set_cursor_sdr_white_level(pipe_ctx);
+ dc->hwss.set_cursor_position(pipe_ctx);
}
if (pipe_to_program)
dc->hwss.cursor_lock(dc, pipe_to_program, false);
-
-#if defined(CONFIG_DRM_AMD_DC_DCN)
- /* re-enable idle optimizations if necessary */
- if (reset_idle_optimizations)
- dc_allow_idle_optimizations(dc, true);
-
-#endif
- return true;
}
bool dc_stream_set_cursor_position(
struct dc_stream_state *stream,
const struct dc_cursor_position *position)
{
- int i;
struct dc *dc;
- struct resource_context *res_ctx;
- struct pipe_ctx *pipe_to_program = NULL;
#if defined(CONFIG_DRM_AMD_DC_DCN)
bool reset_idle_optimizations = false;
#endif
@@ -354,7 +402,6 @@ bool dc_stream_set_cursor_position(
}
dc = stream->ctx->dc;
- res_ctx = &dc->current_state->res_ctx;
#if defined(CONFIG_DRM_AMD_DC_DCN)
dc_z10_restore(dc);
@@ -367,27 +414,7 @@ bool dc_stream_set_cursor_position(
#endif
stream->cursor_position = *position;
- for (i = 0; i < MAX_PIPES; i++) {
- struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i];
-
- if (pipe_ctx->stream != stream ||
- (!pipe_ctx->plane_res.mi && !pipe_ctx->plane_res.hubp) ||
- !pipe_ctx->plane_state ||
- (!pipe_ctx->plane_res.xfm && !pipe_ctx->plane_res.dpp) ||
- (!pipe_ctx->plane_res.ipp && !pipe_ctx->plane_res.dpp))
- continue;
-
- if (!pipe_to_program) {
- pipe_to_program = pipe_ctx;
- dc->hwss.cursor_lock(dc, pipe_to_program, true);
- }
-
- dc->hwss.set_cursor_position(pipe_ctx);
- }
-
- if (pipe_to_program)
- dc->hwss.cursor_lock(dc, pipe_to_program, false);
-
+ program_cursor_position(dc, stream, position);
#if defined(CONFIG_DRM_AMD_DC_DCN)
/* re-enable idle optimizations if necessary */
if (reset_idle_optimizations)