diff options
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c')
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c | 31 |
1 files changed, 18 insertions, 13 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c index 3ac6c7b65a45..4c230f1de9a3 100644 --- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c +++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c @@ -939,12 +939,15 @@ void dce110_edp_backlight_control( return; } - if (enable && link->panel_cntl && - link->panel_cntl->funcs->is_panel_backlight_on(link->panel_cntl)) { - DC_LOG_HW_RESUME_S3( - "%s: panel already powered up. Do nothing.\n", + if (link->panel_cntl) { + bool is_backlight_on = link->panel_cntl->funcs->is_panel_backlight_on(link->panel_cntl); + + if ((enable && is_backlight_on) || (!enable && !is_backlight_on)) { + DC_LOG_HW_RESUME_S3( + "%s: panel already powered up/off. Do nothing.\n", __func__); - return; + return; + } } /* Send VBIOS command to control eDP panel backlight */ @@ -992,8 +995,6 @@ void dce110_edp_backlight_control( link_transmitter_control(ctx->dc_bios, &cntl); - - if (enable && link->dpcd_sink_ext_caps.bits.oled) msleep(OLED_POST_T7_DELAY); @@ -1004,7 +1005,7 @@ void dce110_edp_backlight_control( /*edp 1.2*/ if (cntl.action == TRANSMITTER_CONTROL_BACKLIGHT_OFF) - edp_receiver_ready_T9(link); + edp_add_delay_for_T9(link); if (!enable && link->dpcd_sink_ext_caps.bits.oled) msleep(OLED_PRE_T11_DELAY); @@ -1145,12 +1146,14 @@ void dce110_blank_stream(struct pipe_ctx *pipe_ctx) if (dc_is_dp_signal(pipe_ctx->stream->signal)) { pipe_ctx->stream_res.stream_enc->funcs->dp_blank(pipe_ctx->stream_res.stream_enc); - /* - * After output is idle pattern some sinks need time to recognize the stream - * has changed or they enter protection state and hang. - */ - if (!dc_is_embedded_signal(pipe_ctx->stream->signal)) + if (!dc_is_embedded_signal(pipe_ctx->stream->signal)) { + /* + * After output is idle pattern some sinks need time to recognize the stream + * has changed or they enter protection state and hang. + */ msleep(60); + } else if (pipe_ctx->stream->signal == SIGNAL_TYPE_EDP) + edp_receiver_ready_T9(link); } } @@ -1527,6 +1530,8 @@ static void power_down_encoders(struct dc *dc) dc->links[i]->link_enc, signal); dc->links[i]->link_status.link_active = false; + memset(&dc->links[i]->cur_link_settings, 0, + sizeof(dc->links[i]->cur_link_settings)); } } |