diff options
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dpp_cm.c')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dpp_cm.c | 12 |
1 files changed, 9 insertions, 3 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dpp_cm.c b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dpp_cm.c index 9ab63c72f21c..9da66e491116 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dpp_cm.c +++ b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dpp_cm.c @@ -136,9 +136,13 @@ static void dpp3_power_on_gamcor_lut( uint32_t power_status; struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); - - REG_SET(CM_MEM_PWR_CTRL, 0, - GAMCOR_MEM_PWR_DIS, power_on == true ? 0:1); + if (dpp_base->ctx->dc->debug.enable_mem_low_power.bits.cm) { + REG_UPDATE(CM_MEM_PWR_CTRL, GAMCOR_MEM_PWR_FORCE, power_on ? 0 : 3); + if (power_on) + REG_WAIT(CM_MEM_PWR_STATUS, GAMCOR_MEM_PWR_STATE, 0, 1, 5); + } else + REG_SET(CM_MEM_PWR_CTRL, 0, + GAMCOR_MEM_PWR_DIS, power_on == true ? 0:1); REG_GET(CM_MEM_PWR_STATUS, GAMCOR_MEM_PWR_STATE, &power_status); if (power_status != 0) @@ -229,6 +233,8 @@ bool dpp3_program_gamcor_lut( if (params == NULL) { //bypass if we have no pwl data REG_SET(CM_GAMCOR_CONTROL, 0, CM_GAMCOR_MODE, 0); + if (dpp_base->ctx->dc->debug.enable_mem_low_power.bits.cm) + dpp3_power_on_gamcor_lut(dpp_base, false); return false; } dpp3_power_on_gamcor_lut(dpp_base, true); |