diff options
Diffstat (limited to 'drivers/gpu/drm/amd/include/asic_reg/vega10/MP/mp_9_0_sh_mask.h')
| -rw-r--r-- | drivers/gpu/drm/amd/include/asic_reg/vega10/MP/mp_9_0_sh_mask.h | 1463 |
1 files changed, 0 insertions, 1463 deletions
diff --git a/drivers/gpu/drm/amd/include/asic_reg/vega10/MP/mp_9_0_sh_mask.h b/drivers/gpu/drm/amd/include/asic_reg/vega10/MP/mp_9_0_sh_mask.h deleted file mode 100644 index ae7b51870322..000000000000 --- a/drivers/gpu/drm/amd/include/asic_reg/vega10/MP/mp_9_0_sh_mask.h +++ /dev/null @@ -1,1463 +0,0 @@ -/* - * Copyright (C) 2017 Advanced Micro Devices, Inc. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included - * in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS - * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN - * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - */ -#ifndef _mp_9_0_SH_MASK_HEADER -#define _mp_9_0_SH_MASK_HEADER - - -// addressBlock: mp_SmuMp0_SmnDec -//MP0_SMN_C2PMSG_32 -#define MP0_SMN_C2PMSG_32__CONTENT__SHIFT 0x0 -#define MP0_SMN_C2PMSG_32__CONTENT_MASK 0xFFFFFFFFL -//MP0_SMN_C2PMSG_33 -#define MP0_SMN_C2PMSG_33__CONTENT__SHIFT 0x0 -#define MP0_SMN_C2PMSG_33__CONTENT_MASK 0xFFFFFFFFL -//MP0_SMN_C2PMSG_34 -#define MP0_SMN_C2PMSG_34__CONTENT__SHIFT 0x0 -#define MP0_SMN_C2PMSG_34__CONTENT_MASK 0xFFFFFFFFL -//MP0_SMN_C2PMSG_35 -#define MP0_SMN_C2PMSG_35__CONTENT__SHIFT 0x0 -#define MP0_SMN_C2PMSG_35__CONTENT_MASK 0xFFFFFFFFL -//MP0_SMN_C2PMSG_36 -#define MP0_SMN_C2PMSG_36__CONTENT__SHIFT 0x0 -#define MP0_SMN_C2PMSG_36__CONTENT_MASK 0xFFFFFFFFL -//MP0_SMN_C2PMSG_37 -#define MP0_SMN_C2PMSG_37__CONTENT__SHIFT 0x0 -#define MP0_SMN_C2PMSG_37__CONTENT_MASK 0xFFFFFFFFL -//MP0_SMN_C2PMSG_38 -#define MP0_SMN_C2PMSG_38__CONTENT__SHIFT 0x0 -#define MP0_SMN_C2PMSG_38__CONTENT_MASK 0xFFFFFFFFL -//MP0_SMN_C2PMSG_39 -#define MP0_SMN_C2PMSG_39__CONTENT__SHIFT 0x0 -#define MP0_SMN_C2PMSG_39__CONTENT_MASK 0xFFFFFFFFL -//MP0_SMN_C2PMSG_40 -#define MP0_SMN_C2PMSG_40__CONTENT__SHIFT 0x0 -#define MP0_SMN_C2PMSG_40__CONTENT_MASK 0xFFFFFFFFL -//MP0_SMN_C2PMSG_41 -#define MP0_SMN_C2PMSG_41__CONTENT__SHIFT 0x0 -#define MP0_SMN_C2PMSG_41__CONTENT_MASK 0xFFFFFFFFL -//MP0_SMN_C2PMSG_42 -#define MP0_SMN_C2PMSG_42__CONTENT__SHIFT 0x0 -#define MP0_SMN_C2PMSG_42__CONTENT_MASK 0xFFFFFFFFL -//MP0_SMN_C2PMSG_43 -#define MP0_SMN_C2PMSG_43__CONTENT__SHIFT 0x0 -#define MP0_SMN_C2PMSG_43__CONTENT_MASK 0xFFFFFFFFL -//MP0_SMN_C2PMSG_44 -#define MP0_SMN_C2PMSG_44__CONTENT__SHIFT 0x0 -#define MP0_SMN_C2PMSG_44__CONTENT_MASK 0xFFFFFFFFL -//MP0_SMN_C2PMSG_45 -#define MP0_SMN_C2PMSG_45__CONTENT__SHIFT 0x0 -#define MP0_SMN_C2PMSG_45__CONTENT_MASK 0xFFFFFFFFL -//MP0_SMN_C2PMSG_46 -#define MP0_SMN_C2PMSG_46__CONTENT__SHIFT 0x0 -#define MP0_SMN_C2PMSG_46__CONTENT_MASK 0xFFFFFFFFL -//MP0_SMN_C2PMSG_47 -#define MP0_SMN_C2PMSG_47__CONTENT__SHIFT 0x0 -#define MP0_SMN_C2PMSG_47__CONTENT_MASK 0xFFFFFFFFL -//MP0_SMN_C2PMSG_48 -#define MP0_SMN_C2PMSG_48__CONTENT__SHIFT 0x0 -#define MP0_SMN_C2PMSG_48__CONTENT_MASK 0xFFFFFFFFL -//MP0_SMN_C2PMSG_49 -#define MP0_SMN_C2PMSG_49__CONTENT__SHIFT 0x0 -#define MP0_SMN_C2PMSG_49__CONTENT_MASK 0xFFFFFFFFL -//MP0_SMN_C2PMSG_50 -#define MP0_SMN_C2PMSG_50__CONTENT__SHIFT 0x0 -#define MP0_SMN_C2PMSG_50__CONTENT_MASK 0xFFFFFFFFL -//MP0_SMN_C2PMSG_51 -#define MP0_SMN_C2PMSG_51__CONTENT__SHIFT 0x0 -#define MP0_SMN_C2PMSG_51__CONTENT_MASK 0xFFFFFFFFL -//MP0_SMN_C2PMSG_52 -#define MP0_SMN_C2PMSG_52__CONTENT__SHIFT 0x0 -#define MP0_SMN_C2PMSG_52__CONTENT_MASK 0xFFFFFFFFL -//MP0_SMN_C2PMSG_53 -#define MP0_SMN_C2PMSG_53__CONTENT__SHIFT 0x0 -#define MP0_SMN_C2PMSG_53__CONTENT_MASK 0xFFFFFFFFL -//MP0_SMN_C2PMSG_54 -#define MP0_SMN_C2PMSG_54__CONTENT__SHIFT 0x0 -#define MP0_SMN_C2PMSG_54__CONTENT_MASK 0xFFFFFFFFL -//MP0_SMN_C2PMSG_55 -#define MP0_SMN_C2PMSG_55__CONTENT__SHIFT 0x0 -#define MP0_SMN_C2PMSG_55__CONTENT_MASK 0xFFFFFFFFL -//MP0_SMN_C2PMSG_56 -#define MP0_SMN_C2PMSG_56__CONTENT__SHIFT 0x0 -#define MP0_SMN_C2PMSG_56__CONTENT_MASK 0xFFFFFFFFL -//MP0_SMN_C2PMSG_57 -#define MP0_SMN_C2PMSG_57__CONTENT__SHIFT 0x0 -#define MP0_SMN_C2PMSG_57__CONTENT_MASK 0xFFFFFFFFL -//MP0_SMN_C2PMSG_58 -#define MP0_SMN_C2PMSG_58__CONTENT__SHIFT 0x0 -#define MP0_SMN_C2PMSG_58__CONTENT_MASK 0xFFFFFFFFL -//MP0_SMN_C2PMSG_59 -#define MP0_SMN_C2PMSG_59__CONTENT__SHIFT 0x0 -#define MP0_SMN_C2PMSG_59__CONTENT_MASK 0xFFFFFFFFL -//MP0_SMN_C2PMSG_60 -#define MP0_SMN_C2PMSG_60__CONTENT__SHIFT 0x0 -#define MP0_SMN_C2PMSG_60__CONTENT_MASK 0xFFFFFFFFL -//MP0_SMN_C2PMSG_61 -#define MP0_SMN_C2PMSG_61__CONTENT__SHIFT 0x0 -#define MP0_SMN_C2PMSG_61__CONTENT_MASK 0xFFFFFFFFL -//MP0_SMN_C2PMSG_62 -#define MP0_SMN_C2PMSG_62__CONTENT__SHIFT 0x0 -#define MP0_SMN_C2PMSG_62__CONTENT_MASK 0xFFFFFFFFL -//MP0_SMN_C2PMSG_63 -#define MP0_SMN_C2PMSG_63__CONTENT__SHIFT 0x0 -#define MP0_SMN_C2PMSG_63__CONTENT_MASK 0xFFFFFFFFL -//MP0_SMN_C2PMSG_64 -#define MP0_SMN_C2PMSG_64__CONTENT__SHIFT 0x0 -#define MP0_SMN_C2PMSG_64__CONTENT_MASK 0xFFFFFFFFL -//MP0_SMN_C2PMSG_65 -#define MP0_SMN_C2PMSG_65__CONTENT__SHIFT 0x0 -#define MP0_SMN_C2PMSG_65__CONTENT_MASK 0xFFFFFFFFL -//MP0_SMN_C2PMSG_66 -#define MP0_SMN_C2PMSG_66__CONTENT__SHIFT 0x0 -#define MP0_SMN_C2PMSG_66__CONTENT_MASK 0xFFFFFFFFL -//MP0_SMN_C2PMSG_67 -#define MP0_SMN_C2PMSG_67__CONTENT__SHIFT 0x0 -#define MP0_SMN_C2PMSG_67__CONTENT_MASK 0xFFFFFFFFL -//MP0_SMN_C2PMSG_68 -#define MP0_SMN_C2PMSG_68__CONTENT__SHIFT 0x0 -#define MP0_SMN_C2PMSG_68__CONTENT_MASK 0xFFFFFFFFL -//MP0_SMN_C2PMSG_69 -#define MP0_SMN_C2PMSG_69__CONTENT__SHIFT 0x0 -#define MP0_SMN_C2PMSG_69__CONTENT_MASK 0xFFFFFFFFL -//MP0_SMN_C2PMSG_70 -#define MP0_SMN_C2PMSG_70__CONTENT__SHIFT 0x0 -#define MP0_SMN_C2PMSG_70__CONTENT_MASK 0xFFFFFFFFL -//MP0_SMN_C2PMSG_71 -#define MP0_SMN_C2PMSG_71__CONTENT__SHIFT 0x0 -#define MP0_SMN_C2PMSG_71__CONTENT_MASK 0xFFFFFFFFL -//MP0_SMN_C2PMSG_72 -#define MP0_SMN_C2PMSG_72__CONTENT__SHIFT 0x0 -#define MP0_SMN_C2PMSG_72__CONTENT_MASK 0xFFFFFFFFL -//MP0_SMN_C2PMSG_73 -#define MP0_SMN_C2PMSG_73__CONTENT__SHIFT 0x0 -#define MP0_SMN_C2PMSG_73__CONTENT_MASK 0xFFFFFFFFL -//MP0_SMN_C2PMSG_74 -#define MP0_SMN_C2PMSG_74__CONTENT__SHIFT 0x0 -#define MP0_SMN_C2PMSG_74__CONTENT_MASK 0xFFFFFFFFL -//MP0_SMN_C2PMSG_75 -#define MP0_SMN_C2PMSG_75__CONTENT__SHIFT 0x0 -#define MP0_SMN_C2PMSG_75__CONTENT_MASK 0xFFFFFFFFL -//MP0_SMN_C2PMSG_76 -#define MP0_SMN_C2PMSG_76__CONTENT__SHIFT 0x0 -#define MP0_SMN_C2PMSG_76__CONTENT_MASK 0xFFFFFFFFL -//MP0_SMN_C2PMSG_77 -#define MP0_SMN_C2PMSG_77__CONTENT__SHIFT 0x0 -#define MP0_SMN_C2PMSG_77__CONTENT_MASK 0xFFFFFFFFL -//MP0_SMN_C2PMSG_78 -#define MP0_SMN_C2PMSG_78__CONTENT__SHIFT 0x0 -#define MP0_SMN_C2PMSG_78__CONTENT_MASK 0xFFFFFFFFL -//MP0_SMN_C2PMSG_79 -#define MP0_SMN_C2PMSG_79__CONTENT__SHIFT 0x0 -#define MP0_SMN_C2PMSG_79__CONTENT_MASK 0xFFFFFFFFL -//MP0_SMN_C2PMSG_80 -#define MP0_SMN_C2PMSG_80__CONTENT__SHIFT 0x0 -#define MP0_SMN_C2PMSG_80__CONTENT_MASK 0xFFFFFFFFL -//MP0_SMN_C2PMSG_81 -#define MP0_SMN_C2PMSG_81__CONTENT__SHIFT 0x0 -#define MP0_SMN_C2PMSG_81__CONTENT_MASK 0xFFFFFFFFL -//MP0_SMN_C2PMSG_82 -#define MP0_SMN_C2PMSG_82__CONTENT__SHIFT 0x0 -#define MP0_SMN_C2PMSG_82__CONTENT_MASK 0xFFFFFFFFL -//MP0_SMN_C2PMSG_83 -#define MP0_SMN_C2PMSG_83__CONTENT__SHIFT 0x0 -#define MP0_SMN_C2PMSG_83__CONTENT_MASK 0xFFFFFFFFL -//MP0_SMN_C2PMSG_84 -#define MP0_SMN_C2PMSG_84__CONTENT__SHIFT 0x0 -#define MP0_SMN_C2PMSG_84__CONTENT_MASK 0xFFFFFFFFL -//MP0_SMN_C2PMSG_85 -#define MP0_SMN_C2PMSG_85__CONTENT__SHIFT 0x0 -#define MP0_SMN_C2PMSG_85__CONTENT_MASK 0xFFFFFFFFL -//MP0_SMN_C2PMSG_86 -#define MP0_SMN_C2PMSG_86__CONTENT__SHIFT 0x0 -#define MP0_SMN_C2PMSG_86__CONTENT_MASK 0xFFFFFFFFL -//MP0_SMN_C2PMSG_87 -#define MP0_SMN_C2PMSG_87__CONTENT__SHIFT 0x0 -#define MP0_SMN_C2PMSG_87__CONTENT_MASK 0xFFFFFFFFL -//MP0_SMN_C2PMSG_88 -#define MP0_SMN_C2PMSG_88__CONTENT__SHIFT 0x0 -#define MP0_SMN_C2PMSG_88__CONTENT_MASK 0xFFFFFFFFL -//MP0_SMN_C2PMSG_89 -#define MP0_SMN_C2PMSG_89__CONTENT__SHIFT 0x0 -#define MP0_SMN_C2PMSG_89__CONTENT_MASK 0xFFFFFFFFL -//MP0_SMN_C2PMSG_90 -#define MP0_SMN_C2PMSG_90__CONTENT__SHIFT 0x0 -#define MP0_SMN_C2PMSG_90__CONTENT_MASK 0xFFFFFFFFL -//MP0_SMN_C2PMSG_91 -#define MP0_SMN_C2PMSG_91__CONTENT__SHIFT 0x0 -#define MP0_SMN_C2PMSG_91__CONTENT_MASK 0xFFFFFFFFL -//MP0_SMN_C2PMSG_92 -#define MP0_SMN_C2PMSG_92__CONTENT__SHIFT 0x0 -#define MP0_SMN_C2PMSG_92__CONTENT_MASK 0xFFFFFFFFL -//MP0_SMN_C2PMSG_93 -#define MP0_SMN_C2PMSG_93__CONTENT__SHIFT 0x0 -#define MP0_SMN_C2PMSG_93__CONTENT_MASK 0xFFFFFFFFL -//MP0_SMN_C2PMSG_94 -#define MP0_SMN_C2PMSG_94__CONTENT__SHIFT 0x0 -#define MP0_SMN_C2PMSG_94__CONTENT_MASK 0xFFFFFFFFL -//MP0_SMN_C2PMSG_95 -#define MP0_SMN_C2PMSG_95__CONTENT__SHIFT 0x0 -#define MP0_SMN_C2PMSG_95__CONTENT_MASK 0xFFFFFFFFL -//MP0_SMN_C2PMSG_96 -#define MP0_SMN_C2PMSG_96__CONTENT__SHIFT 0x0 -#define MP0_SMN_C2PMSG_96__CONTENT_MASK 0xFFFFFFFFL -//MP0_SMN_C2PMSG_97 -#define MP0_SMN_C2PMSG_97__CONTENT__SHIFT 0x0 -#define MP0_SMN_C2PMSG_97__CONTENT_MASK 0xFFFFFFFFL -//MP0_SMN_C2PMSG_98 -#define MP0_SMN_C2PMSG_98__CONTENT__SHIFT 0x0 -#define MP0_SMN_C2PMSG_98__CONTENT_MASK 0xFFFFFFFFL -//MP0_SMN_C2PMSG_99 -#define MP0_SMN_C2PMSG_99__CONTENT__SHIFT 0x0 -#define MP0_SMN_C2PMSG_99__CONTENT_MASK 0xFFFFFFFFL -//MP0_SMN_C2PMSG_100 -#define MP0_SMN_C2PMSG_100__CONTENT__SHIFT 0x0 -#define MP0_SMN_C2PMSG_100__CONTENT_MASK 0xFFFFFFFFL -//MP0_SMN_C2PMSG_101 -#define MP0_SMN_C2PMSG_101__CONTENT__SHIFT 0x0 -#define MP0_SMN_C2PMSG_101__CONTENT_MASK 0xFFFFFFFFL -//MP0_SMN_C2PMSG_102 -#define MP0_SMN_C2PMSG_102__CONTENT__SHIFT 0x0 -#define MP0_SMN_C2PMSG_102__CONTENT_MASK 0xFFFFFFFFL -//MP0_SMN_C2PMSG_103 -#define MP0_SMN_C2PMSG_103__CONTENT__SHIFT 0x0 -#define MP0_SMN_C2PMSG_103__CONTENT_MASK 0xFFFFFFFFL -//MP0_SMN_ACTIVE_FCN_ID -#define MP0_SMN_ACTIVE_FCN_ID__VFID__SHIFT 0x0 -#define MP0_SMN_ACTIVE_FCN_ID__VF__SHIFT 0x1f -#define MP0_SMN_ACTIVE_FCN_ID__VFID_MASK 0x0000000FL -#define MP0_SMN_ACTIVE_FCN_ID__VF_MASK 0x80000000L -//MP0_SMN_IH_CREDIT -#define MP0_SMN_IH_CREDIT__CREDIT_VALUE__SHIFT 0x0 -#define MP0_SMN_IH_CREDIT__CLIENT_ID__SHIFT 0x10 -#define MP0_SMN_IH_CREDIT__CREDIT_VALUE_MASK 0x00000003L -#define MP0_SMN_IH_CREDIT__CLIENT_ID_MASK 0x00FF0000L -//MP0_SMN_IH_SW_INT -#define MP0_SMN_IH_SW_INT__VALID__SHIFT 0x0 -#define MP0_SMN_IH_SW_INT__ID__SHIFT 0x1 -#define MP0_SMN_IH_SW_INT__VALID_MASK 0x00000001L -#define MP0_SMN_IH_SW_INT__ID_MASK 0x000001FEL -//MP0_SMN_IH_SW_INT_CTRL -#define MP0_SMN_IH_SW_INT_CTRL__SW_TRIG_MASK__SHIFT 0x0 -#define MP0_SMN_IH_SW_INT_CTRL__SW_INT_ACK__SHIFT 0x8 -#define MP0_SMN_IH_SW_INT_CTRL__SW_TRIG_MASK_MASK 0x00000001L -#define MP0_SMN_IH_SW_INT_CTRL__SW_INT_ACK_MASK 0x00000100L - - -// addressBlock: mp_SmuMp1_SmnDec -//MP1_SMN_ACP2MP_RESP -#define MP1_SMN_ACP2MP_RESP__CONTENT__SHIFT 0x0 -#define MP1_SMN_ACP2MP_RESP__CONTENT_MASK 0xFFFFFFFFL -//MP1_SMN_DC2MP_RESP -#define MP1_SMN_DC2MP_RESP__CONTENT__SHIFT 0x0 -#define MP1_SMN_DC2MP_RESP__CONTENT_MASK 0xFFFFFFFFL -//MP1_SMN_UVD2MP_RESP -#define MP1_SMN_UVD2MP_RESP__CONTENT__SHIFT 0x0 -#define MP1_SMN_UVD2MP_RESP__CONTENT_MASK 0xFFFFFFFFL -//MP1_SMN_VCE2MP_RESP -#define MP1_SMN_VCE2MP_RESP__CONTENT__SHIFT 0x0 -#define MP1_SMN_VCE2MP_RESP__CONTENT_MASK 0xFFFFFFFFL -//MP1_SMN_RLC2MP_RESP -#define MP1_SMN_RLC2MP_RESP__CONTENT__SHIFT 0x0 -#define MP1_SMN_RLC2MP_RESP__CONTENT_MASK 0xFFFFFFFFL -//MP1_SMN_C2PMSG_32 -#define MP1_SMN_C2PMSG_32__CONTENT__SHIFT 0x0 -#define MP1_SMN_C2PMSG_32__CONTENT_MASK 0xFFFFFFFFL -//MP1_SMN_C2PMSG_33 -#define MP1_SMN_C2PMSG_33__CONTENT__SHIFT 0x0 -#define MP1_SMN_C2PMSG_33__CONTENT_MASK 0xFFFFFFFFL -//MP1_SMN_C2PMSG_34 -#define MP1_SMN_C2PMSG_34__CONTENT__SHIFT 0x0 -#define MP1_SMN_C2PMSG_34__CONTENT_MASK 0xFFFFFFFFL -//MP1_SMN_C2PMSG_35 -#define MP1_SMN_C2PMSG_35__CONTENT__SHIFT 0x0 -#define MP1_SMN_C2PMSG_35__CONTENT_MASK 0xFFFFFFFFL -//MP1_SMN_C2PMSG_36 -#define MP1_SMN_C2PMSG_36__CONTENT__SHIFT 0x0 -#define MP1_SMN_C2PMSG_36__CONTENT_MASK 0xFFFFFFFFL -//MP1_SMN_C2PMSG_37 -#define MP1_SMN_C2PMSG_37__CONTENT__SHIFT 0x0 -#define MP1_SMN_C2PMSG_37__CONTENT_MASK 0xFFFFFFFFL -//MP1_SMN_C2PMSG_38 -#define MP1_SMN_C2PMSG_38__CONTENT__SHIFT 0x0 -#define MP1_SMN_C2PMSG_38__CONTENT_MASK 0xFFFFFFFFL -//MP1_SMN_C2PMSG_39 -#define MP1_SMN_C2PMSG_39__CONTENT__SHIFT 0x0 -#define MP1_SMN_C2PMSG_39__CONTENT_MASK 0xFFFFFFFFL -//MP1_SMN_C2PMSG_40 -#define MP1_SMN_C2PMSG_40__CONTENT__SHIFT 0x0 -#define MP1_SMN_C2PMSG_40__CONTENT_MASK 0xFFFFFFFFL -//MP1_SMN_C2PMSG_41 -#define MP1_SMN_C2PMSG_41__CONTENT__SHIFT 0x0 -#define MP1_SMN_C2PMSG_41__CONTENT_MASK 0xFFFFFFFFL -//MP1_SMN_C2PMSG_42 -#define MP1_SMN_C2PMSG_42__CONTENT__SHIFT 0x0 -#define MP1_SMN_C2PMSG_42__CONTENT_MASK 0xFFFFFFFFL -//MP1_SMN_C2PMSG_43 -#define MP1_SMN_C2PMSG_43__CONTENT__SHIFT 0x0 -#define MP1_SMN_C2PMSG_43__CONTENT_MASK 0xFFFFFFFFL -//MP1_SMN_C2PMSG_44 -#define MP1_SMN_C2PMSG_44__CONTENT__SHIFT 0x0 -#define MP1_SMN_C2PMSG_44__CONTENT_MASK 0xFFFFFFFFL -//MP1_SMN_C2PMSG_45 -#define MP1_SMN_C2PMSG_45__CONTENT__SHIFT 0x0 -#define MP1_SMN_C2PMSG_45__CONTENT_MASK 0xFFFFFFFFL -//MP1_SMN_C2PMSG_46 -#define MP1_SMN_C2PMSG_46__CONTENT__SHIFT 0x0 -#define MP1_SMN_C2PMSG_46__CONTENT_MASK 0xFFFFFFFFL -//MP1_SMN_C2PMSG_47 -#define MP1_SMN_C2PMSG_47__CONTENT__SHIFT 0x0 -#define MP1_SMN_C2PMSG_47__CONTENT_MASK 0xFFFFFFFFL -//MP1_SMN_C2PMSG_48 -#define MP1_SMN_C2PMSG_48__CONTENT__SHIFT 0x0 -#define MP1_SMN_C2PMSG_48__CONTENT_MASK 0xFFFFFFFFL -//MP1_SMN_C2PMSG_49 -#define MP1_SMN_C2PMSG_49__CONTENT__SHIFT 0x0 -#define MP1_SMN_C2PMSG_49__CONTENT_MASK 0xFFFFFFFFL -//MP1_SMN_C2PMSG_50 -#define MP1_SMN_C2PMSG_50__CONTENT__SHIFT 0x0 -#define MP1_SMN_C2PMSG_50__CONTENT_MASK 0xFFFFFFFFL -//MP1_SMN_C2PMSG_51 -#define MP1_SMN_C2PMSG_51__CONTENT__SHIFT 0x0 -#define MP1_SMN_C2PMSG_51__CONTENT_MASK 0xFFFFFFFFL -//MP1_SMN_C2PMSG_52 -#define MP1_SMN_C2PMSG_52__CONTENT__SHIFT 0x0 -#define MP1_SMN_C2PMSG_52__CONTENT_MASK 0xFFFFFFFFL -//MP1_SMN_C2PMSG_53 -#define MP1_SMN_C2PMSG_53__CONTENT__SHIFT 0x0 -#define MP1_SMN_C2PMSG_53__CONTENT_MASK 0xFFFFFFFFL -//MP1_SMN_C2PMSG_54 -#define MP1_SMN_C2PMSG_54__CONTENT__SHIFT 0x0 -#define MP1_SMN_C2PMSG_54__CONTENT_MASK 0xFFFFFFFFL -//MP1_SMN_C2PMSG_55 -#define MP1_SMN_C2PMSG_55__CONTENT__SHIFT 0x0 -#define MP1_SMN_C2PMSG_55__CONTENT_MASK 0xFFFFFFFFL -//MP1_SMN_C2PMSG_56 -#define MP1_SMN_C2PMSG_56__CONTENT__SHIFT 0x0 -#define MP1_SMN_C2PMSG_56__CONTENT_MASK 0xFFFFFFFFL -//MP1_SMN_C2PMSG_57 -#define MP1_SMN_C2PMSG_57__CONTENT__SHIFT 0x0 -#define MP1_SMN_C2PMSG_57__CONTENT_MASK 0xFFFFFFFFL -//MP1_SMN_C2PMSG_58 -#define MP1_SMN_C2PMSG_58__CONTENT__SHIFT 0x0 -#define MP1_SMN_C2PMSG_58__CONTENT_MASK 0xFFFFFFFFL -//MP1_SMN_C2PMSG_59 -#define MP1_SMN_C2PMSG_59__CONTENT__SHIFT 0x0 -#define MP1_SMN_C2PMSG_59__CONTENT_MASK 0xFFFFFFFFL -//MP1_SMN_C2PMSG_60 -#define MP1_SMN_C2PMSG_60__CONTENT__SHIFT 0x0 -#define MP1_SMN_C2PMSG_60__CONTENT_MASK 0xFFFFFFFFL -//MP1_SMN_C2PMSG_61 -#define MP1_SMN_C2PMSG_61__CONTENT__SHIFT 0x0 -#define MP1_SMN_C2PMSG_61__CONTENT_MASK 0xFFFFFFFFL -//MP1_SMN_C2PMSG_62 -#define MP1_SMN_C2PMSG_62__CONTENT__SHIFT 0x0 -#define MP1_SMN_C2PMSG_62__CONTENT_MASK 0xFFFFFFFFL -//MP1_SMN_C2PMSG_63 -#define MP1_SMN_C2PMSG_63__CONTENT__SHIFT 0x0 -#define MP1_SMN_C2PMSG_63__CONTENT_MASK 0xFFFFFFFFL -//MP1_SMN_C2PMSG_64 -#define MP1_SMN_C2PMSG_64__CONTENT__SHIFT 0x0 -#define MP1_SMN_C2PMSG_64__CONTENT_MASK 0xFFFFFFFFL -//MP1_SMN_C2PMSG_65 -#define MP1_SMN_C2PMSG_65__CONTENT__SHIFT 0x0 -#define MP1_SMN_C2PMSG_65__CONTENT_MASK 0xFFFFFFFFL -//MP1_SMN_C2PMSG_66 -#define MP1_SMN_C2PMSG_66__CONTENT__SHIFT 0x0 -#define MP1_SMN_C2PMSG_66__CONTENT_MASK 0xFFFFFFFFL -//MP1_SMN_C2PMSG_67 -#define MP1_SMN_C2PMSG_67__CONTENT__SHIFT 0x0 -#define MP1_SMN_C2PMSG_67__CONTENT_MASK 0xFFFFFFFFL -//MP1_SMN_C2PMSG_68 -#define MP1_SMN_C2PMSG_68__CONTENT__SHIFT 0x0 -#define MP1_SMN_C2PMSG_68__CONTENT_MASK 0xFFFFFFFFL -//MP1_SMN_C2PMSG_69 -#define MP1_SMN_C2PMSG_69__CONTENT__SHIFT 0x0 -#define MP1_SMN_C2PMSG_69__CONTENT_MASK 0xFFFFFFFFL -//MP1_SMN_C2PMSG_70 -#define MP1_SMN_C2PMSG_70__CONTENT__SHIFT 0x0 -#define MP1_SMN_C2PMSG_70__CONTENT_MASK 0xFFFFFFFFL -//MP1_SMN_C2PMSG_71 -#define MP1_SMN_C2PMSG_71__CONTENT__SHIFT 0x0 -#define MP1_SMN_C2PMSG_71__CONTENT_MASK 0xFFFFFFFFL -//MP1_SMN_C2PMSG_72 -#define MP1_SMN_C2PMSG_72__CONTENT__SHIFT 0x0 -#define MP1_SMN_C2PMSG_72__CONTENT_MASK 0xFFFFFFFFL -//MP1_SMN_C2PMSG_73 -#define MP1_SMN_C2PMSG_73__CONTENT__SHIFT 0x0 -#define MP1_SMN_C2PMSG_73__CONTENT_MASK 0xFFFFFFFFL -//MP1_SMN_C2PMSG_74 -#define MP1_SMN_C2PMSG_74__CONTENT__SHIFT 0x0 -#define MP1_SMN_C2PMSG_74__CONTENT_MASK 0xFFFFFFFFL -//MP1_SMN_C2PMSG_75 -#define MP1_SMN_C2PMSG_75__CONTENT__SHIFT 0x0 -#define MP1_SMN_C2PMSG_75__CONTENT_MASK 0xFFFFFFFFL -//MP1_SMN_C2PMSG_76 -#define MP1_SMN_C2PMSG_76__CONTENT__SHIFT 0x0 -#define MP1_SMN_C2PMSG_76__CONTENT_MASK 0xFFFFFFFFL -//MP1_SMN_C2PMSG_77 -#define MP1_SMN_C2PMSG_77__CONTENT__SHIFT 0x0 -#define MP1_SMN_C2PMSG_77__CONTENT_MASK 0xFFFFFFFFL -//MP1_SMN_C2PMSG_78 -#define MP1_SMN_C2PMSG_78__CONTENT__SHIFT 0x0 -#define MP1_SMN_C2PMSG_78__CONTENT_MASK 0xFFFFFFFFL -//MP1_SMN_C2PMSG_79 -#define MP1_SMN_C2PMSG_79__CONTENT__SHIFT 0x0 -#define MP1_SMN_C2PMSG_79__CONTENT_MASK 0xFFFFFFFFL -//MP1_SMN_C2PMSG_80 -#define MP1_SMN_C2PMSG_80__CONTENT__SHIFT 0x0 -#define MP1_SMN_C2PMSG_80__CONTENT_MASK 0xFFFFFFFFL -//MP1_SMN_C2PMSG_81 -#define MP1_SMN_C2PMSG_81__CONTENT__SHIFT 0x0 -#define MP1_SMN_C2PMSG_81__CONTENT_MASK 0xFFFFFFFFL -//MP1_SMN_C2PMSG_82 -#define MP1_SMN_C2PMSG_82__CONTENT__SHIFT 0x0 -#define MP1_SMN_C2PMSG_82__CONTENT_MASK 0xFFFFFFFFL -//MP1_SMN_C2PMSG_83 -#define MP1_SMN_C2PMSG_83__CONTENT__SHIFT 0x0 -#define MP1_SMN_C2PMSG_83__CONTENT_MASK 0xFFFFFFFFL -//MP1_SMN_C2PMSG_84 -#define MP1_SMN_C2PMSG_84__CONTENT__SHIFT 0x0 -#define MP1_SMN_C2PMSG_84__CONTENT_MASK 0xFFFFFFFFL -//MP1_SMN_C2PMSG_85 -#define MP1_SMN_C2PMSG_85__CONTENT__SHIFT 0x0 -#define MP1_SMN_C2PMSG_85__CONTENT_MASK 0xFFFFFFFFL -//MP1_SMN_C2PMSG_86 -#define MP1_SMN_C2PMSG_86__CONTENT__SHIFT 0x0 -#define MP1_SMN_C2PMSG_86__CONTENT_MASK 0xFFFFFFFFL -//MP1_SMN_C2PMSG_87 -#define MP1_SMN_C2PMSG_87__CONTENT__SHIFT 0x0 -#define MP1_SMN_C2PMSG_87__CONTENT_MASK 0xFFFFFFFFL -//MP1_SMN_C2PMSG_88 -#define MP1_SMN_C2PMSG_88__CONTENT__SHIFT 0x0 -#define MP1_SMN_C2PMSG_88__CONTENT_MASK 0xFFFFFFFFL -//MP1_SMN_C2PMSG_89 -#define MP1_SMN_C2PMSG_89__CONTENT__SHIFT 0x0 -#define MP1_SMN_C2PMSG_89__CONTENT_MASK 0xFFFFFFFFL -//MP1_SMN_C2PMSG_90 -#define MP1_SMN_C2PMSG_90__CONTENT__SHIFT 0x0 -#define MP1_SMN_C2PMSG_90__CONTENT_MASK 0xFFFFFFFFL -//MP1_SMN_C2PMSG_91 -#define MP1_SMN_C2PMSG_91__CONTENT__SHIFT 0x0 -#define MP1_SMN_C2PMSG_91__CONTENT_MASK 0xFFFFFFFFL -//MP1_SMN_C2PMSG_92 -#define MP1_SMN_C2PMSG_92__CONTENT__SHIFT 0x0 -#define MP1_SMN_C2PMSG_92__CONTENT_MASK 0xFFFFFFFFL -//MP1_SMN_C2PMSG_93 -#define MP1_SMN_C2PMSG_93__CONTENT__SHIFT 0x0 -#define MP1_SMN_C2PMSG_93__CONTENT_MASK 0xFFFFFFFFL -//MP1_SMN_C2PMSG_94 -#define MP1_SMN_C2PMSG_94__CONTENT__SHIFT 0x0 -#define MP1_SMN_C2PMSG_94__CONTENT_MASK 0xFFFFFFFFL -//MP1_SMN_C2PMSG_95 -#define MP1_SMN_C2PMSG_95__CONTENT__SHIFT 0x0 -#define MP1_SMN_C2PMSG_95__CONTENT_MASK 0xFFFFFFFFL -//MP1_SMN_C2PMSG_96 -#define MP1_SMN_C2PMSG_96__CONTENT__SHIFT 0x0 -#define MP1_SMN_C2PMSG_96__CONTENT_MASK 0xFFFFFFFFL -//MP1_SMN_C2PMSG_97 -#define MP1_SMN_C2PMSG_97__CONTENT__SHIFT 0x0 -#define MP1_SMN_C2PMSG_97__CONTENT_MASK 0xFFFFFFFFL -//MP1_SMN_C2PMSG_98 -#define MP1_SMN_C2PMSG_98__CONTENT__SHIFT 0x0 -#define MP1_SMN_C2PMSG_98__CONTENT_MASK 0xFFFFFFFFL -//MP1_SMN_C2PMSG_99 -#define MP1_SMN_C2PMSG_99__CONTENT__SHIFT 0x0 -#define MP1_SMN_C2PMSG_99__CONTENT_MASK 0xFFFFFFFFL -//MP1_SMN_C2PMSG_100 -#define MP1_SMN_C2PMSG_100__CONTENT__SHIFT 0x0 -#define MP1_SMN_C2PMSG_100__CONTENT_MASK 0xFFFFFFFFL -//MP1_SMN_C2PMSG_101 -#define MP1_SMN_C2PMSG_101__CONTENT__SHIFT 0x0 -#define MP1_SMN_C2PMSG_101__CONTENT_MASK 0xFFFFFFFFL -//MP1_SMN_C2PMSG_102 -#define MP1_SMN_C2PMSG_102__CONTENT__SHIFT 0x0 -#define MP1_SMN_C2PMSG_102__CONTENT_MASK 0xFFFFFFFFL -//MP1_SMN_C2PMSG_103 -#define MP1_SMN_C2PMSG_103__CONTENT__SHIFT 0x0 -#define MP1_SMN_C2PMSG_103__CONTENT_MASK 0xFFFFFFFFL -//MP1_SMN_ACTIVE_FCN_ID -#define MP1_SMN_ACTIVE_FCN_ID__VFID__SHIFT 0x0 -#define MP1_SMN_ACTIVE_FCN_ID__VF__SHIFT 0x1f -#define MP1_SMN_ACTIVE_FCN_ID__VFID_MASK 0x0000000FL -#define MP1_SMN_ACTIVE_FCN_ID__VF_MASK 0x80000000L -//MP1_SMN_IH_CREDIT -#define MP1_SMN_IH_CREDIT__CREDIT_VALUE__SHIFT 0x0 -#define MP1_SMN_IH_CREDIT__CLIENT_ID__SHIFT 0x10 -#define MP1_SMN_IH_CREDIT__CREDIT_VALUE_MASK 0x00000003L -#define MP1_SMN_IH_CREDIT__CLIENT_ID_MASK 0x00FF0000L -//MP1_SMN_IH_SW_INT -#define MP1_SMN_IH_SW_INT__VALID__SHIFT 0x0 -#define MP1_SMN_IH_SW_INT__ID__SHIFT 0x1 -#define MP1_SMN_IH_SW_INT__VALID_MASK 0x00000001L -#define MP1_SMN_IH_SW_INT__ID_MASK 0x000001FEL -//MP1_SMN_IH_SW_INT_CTRL -#define MP1_SMN_IH_SW_INT_CTRL__SW_TRIG_MASK__SHIFT 0x0 -#define MP1_SMN_IH_SW_INT_CTRL__SW_INT_ACK__SHIFT 0x8 -#define MP1_SMN_IH_SW_INT_CTRL__SW_TRIG_MASK_MASK 0x00000001L -#define MP1_SMN_IH_SW_INT_CTRL__SW_INT_ACK_MASK 0x00000100L -//MP1_SMN_FPS_CNT -#define MP1_SMN_FPS_CNT__COUNT__SHIFT 0x0 -#define MP1_SMN_FPS_CNT__COUNT_MASK 0xFFFFFFFFL -//MP1_SMN_EXT_SCRATCH0 -#define MP1_SMN_EXT_SCRATCH0__DATA__SHIFT 0x0 -#define MP1_SMN_EXT_SCRATCH0__DATA_MASK 0xFFFFFFFFL -//MP1_SMN_EXT_SCRATCH1 -#define MP1_SMN_EXT_SCRATCH1__DATA__SHIFT 0x0 -#define MP1_SMN_EXT_SCRATCH1__DATA_MASK 0xFFFFFFFFL -//MP1_SMN_EXT_SCRATCH2 -#define MP1_SMN_EXT_SCRATCH2__DATA__SHIFT 0x0 -#define MP1_SMN_EXT_SCRATCH2__DATA_MASK 0xFFFFFFFFL -//MP1_SMN_EXT_SCRATCH3 -#define MP1_SMN_EXT_SCRATCH3__DATA__SHIFT 0x0 -#define MP1_SMN_EXT_SCRATCH3__DATA_MASK 0xFFFFFFFFL -//MP1_SMN_EXT_SCRATCH4 -#define MP1_SMN_EXT_SCRATCH4__DATA__SHIFT 0x0 -#define MP1_SMN_EXT_SCRATCH4__DATA_MASK 0xFFFFFFFFL -//MP1_SMN_EXT_SCRATCH5 -#define MP1_SMN_EXT_SCRATCH5__DATA__SHIFT 0x0 -#define MP1_SMN_EXT_SCRATCH5__DATA_MASK 0xFFFFFFFFL -//MP1_SMN_EXT_SCRATCH6 -#define MP1_SMN_EXT_SCRATCH6__DATA__SHIFT 0x0 -#define MP1_SMN_EXT_SCRATCH6__DATA_MASK 0xFFFFFFFFL -//MP1_SMN_EXT_SCRATCH7 -#define MP1_SMN_EXT_SCRATCH7__DATA__SHIFT 0x0 -#define MP1_SMN_EXT_SCRATCH7__DATA_MASK 0xFFFFFFFFL -//MP1_SMN_EXT_SCRATCH8 -#define MP1_SMN_EXT_SCRATCH8__DATA__SHIFT 0x0 -#define MP1_SMN_EXT_SCRATCH8__DATA_MASK 0xFFFFFFFFL - - - - -// addressBlock: mp_SmuMp0Pub_CruDec -//MP0_SOC_INFO -#define MP0_SOC_INFO__SOC_DIE_ID__SHIFT 0x0 -#define MP0_SOC_INFO__SOC_PKG_TYPE__SHIFT 0x2 -#define MP0_SOC_INFO__SOC_DIE_ID_MASK 0x00000003L -#define MP0_SOC_INFO__SOC_PKG_TYPE_MASK 0x0000001CL -//MP0_PUB_SCRATCH0 -#define MP0_PUB_SCRATCH0__DATA__SHIFT 0x0 -#define MP0_PUB_SCRATCH0__DATA_MASK 0xFFFFFFFFL -//MP0_PUB_SCRATCH1 -#define MP0_PUB_SCRATCH1__DATA__SHIFT 0x0 -#define MP0_PUB_SCRATCH1__DATA_MASK 0xFFFFFFFFL -//MP0_PUB_SCRATCH2 -#define MP0_PUB_SCRATCH2__DATA__SHIFT 0x0 -#define MP0_PUB_SCRATCH2__DATA_MASK 0xFFFFFFFFL -//MP0_PUB_SCRATCH3 -#define MP0_PUB_SCRATCH3__DATA__SHIFT 0x0 -#define MP0_PUB_SCRATCH3__DATA_MASK 0xFFFFFFFFL -//MP0_FW_INTF -#define MP0_FW_INTF__SS_SECURE__SHIFT 0x13 -#define MP0_FW_INTF__SS_SECURE_MASK 0x00080000L -//MP0_C2PMSG_0 -#define MP0_C2PMSG_0__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_0__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_1 -#define MP0_C2PMSG_1__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_1__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_2 -#define MP0_C2PMSG_2__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_2__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_3 -#define MP0_C2PMSG_3__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_3__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_4 -#define MP0_C2PMSG_4__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_4__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_5 -#define MP0_C2PMSG_5__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_5__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_6 -#define MP0_C2PMSG_6__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_6__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_7 -#define MP0_C2PMSG_7__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_7__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_8 -#define MP0_C2PMSG_8__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_8__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_9 -#define MP0_C2PMSG_9__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_9__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_10 -#define MP0_C2PMSG_10__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_10__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_11 -#define MP0_C2PMSG_11__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_11__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_12 -#define MP0_C2PMSG_12__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_12__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_13 -#define MP0_C2PMSG_13__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_13__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_14 -#define MP0_C2PMSG_14__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_14__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_15 -#define MP0_C2PMSG_15__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_15__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_16 -#define MP0_C2PMSG_16__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_16__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_17 -#define MP0_C2PMSG_17__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_17__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_18 -#define MP0_C2PMSG_18__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_18__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_19 -#define MP0_C2PMSG_19__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_19__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_20 -#define MP0_C2PMSG_20__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_20__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_21 -#define MP0_C2PMSG_21__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_21__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_22 -#define MP0_C2PMSG_22__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_22__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_23 -#define MP0_C2PMSG_23__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_23__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_24 -#define MP0_C2PMSG_24__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_24__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_25 -#define MP0_C2PMSG_25__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_25__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_26 -#define MP0_C2PMSG_26__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_26__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_27 -#define MP0_C2PMSG_27__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_27__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_28 -#define MP0_C2PMSG_28__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_28__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_29 -#define MP0_C2PMSG_29__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_29__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_30 -#define MP0_C2PMSG_30__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_30__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_31 -#define MP0_C2PMSG_31__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_31__CONTENT_MASK 0xFFFFFFFFL -//MP0_P2CMSG_0 -#define MP0_P2CMSG_0__CONTENT__SHIFT 0x0 -#define MP0_P2CMSG_0__CONTENT_MASK 0xFFFFFFFFL -//MP0_P2CMSG_1 -#define MP0_P2CMSG_1__CONTENT__SHIFT 0x0 -#define MP0_P2CMSG_1__CONTENT_MASK 0xFFFFFFFFL -//MP0_P2CMSG_2 -#define MP0_P2CMSG_2__CONTENT__SHIFT 0x0 -#define MP0_P2CMSG_2__CONTENT_MASK 0xFFFFFFFFL -//MP0_P2CMSG_3 -#define MP0_P2CMSG_3__CONTENT__SHIFT 0x0 -#define MP0_P2CMSG_3__CONTENT_MASK 0xFFFFFFFFL -//MP0_P2CMSG_INTEN -#define MP0_P2CMSG_INTEN__INTEN__SHIFT 0x0 -#define MP0_P2CMSG_INTEN__INTEN_MASK 0x0000000FL -//MP0_P2CMSG_INTSTS -#define MP0_P2CMSG_INTSTS__INTSTS0__SHIFT 0x0 -#define MP0_P2CMSG_INTSTS__INTSTS1__SHIFT 0x1 -#define MP0_P2CMSG_INTSTS__INTSTS2__SHIFT 0x2 -#define MP0_P2CMSG_INTSTS__INTSTS3__SHIFT 0x3 -#define MP0_P2CMSG_INTSTS__INTSTS0_MASK 0x00000001L -#define MP0_P2CMSG_INTSTS__INTSTS1_MASK 0x00000002L -#define MP0_P2CMSG_INTSTS__INTSTS2_MASK 0x00000004L -#define MP0_P2CMSG_INTSTS__INTSTS3_MASK 0x00000008L -//MP0_C2PMSG_ATTR_0 -#define MP0_C2PMSG_ATTR_0__MSG_ATTR__SHIFT 0x0 -#define MP0_C2PMSG_ATTR_0__MSG_ATTR_MASK 0xFFFFFFFFL -//MP0_C2PMSG_ATTR_1 -#define MP0_C2PMSG_ATTR_1__MSG_ATTR__SHIFT 0x0 -#define MP0_C2PMSG_ATTR_1__MSG_ATTR_MASK 0xFFFFFFFFL -//MP0_C2PMSG_ATTR_2 -#define MP0_C2PMSG_ATTR_2__MSG_ATTR__SHIFT 0x0 -#define MP0_C2PMSG_ATTR_2__MSG_ATTR_MASK 0xFFFFFFFFL -//MP0_C2PMSG_ATTR_3 -#define MP0_C2PMSG_ATTR_3__MSG_ATTR__SHIFT 0x0 -#define MP0_C2PMSG_ATTR_3__MSG_ATTR_MASK 0xFFFFFFFFL -//MP0_C2PMSG_ATTR_4 -#define MP0_C2PMSG_ATTR_4__MSG_ATTR__SHIFT 0x0 -#define MP0_C2PMSG_ATTR_4__MSG_ATTR_MASK 0xFFFFFFFFL -//MP0_C2PMSG_ATTR_5 -#define MP0_C2PMSG_ATTR_5__MSG_ATTR__SHIFT 0x0 -#define MP0_C2PMSG_ATTR_5__MSG_ATTR_MASK 0xFFFFFFFFL -//MP0_C2PMSG_ATTR_6 -#define MP0_C2PMSG_ATTR_6__MSG_ATTR__SHIFT 0x0 -#define MP0_C2PMSG_ATTR_6__MSG_ATTR_MASK 0x0000FFFFL -//MP0_P2CMSG_ATTR -#define MP0_P2CMSG_ATTR__MSG_ATTR__SHIFT 0x0 -#define MP0_P2CMSG_ATTR__MSG_ATTR_MASK 0x000000FFL -//MP0_P2SMSG_0 -#define MP0_P2SMSG_0__CONTENT__SHIFT 0x0 -#define MP0_P2SMSG_0__CONTENT_MASK 0xFFFFFFFFL -//MP0_P2SMSG_1 -#define MP0_P2SMSG_1__CONTENT__SHIFT 0x0 -#define MP0_P2SMSG_1__CONTENT_MASK 0xFFFFFFFFL -//MP0_P2SMSG_2 -#define MP0_P2SMSG_2__CONTENT__SHIFT 0x0 -#define MP0_P2SMSG_2__CONTENT_MASK 0xFFFFFFFFL -//MP0_P2SMSG_3 -#define MP0_P2SMSG_3__CONTENT__SHIFT 0x0 -#define MP0_P2SMSG_3__CONTENT_MASK 0xFFFFFFFFL -//MP0_P2SMSG_ATTR -#define MP0_P2SMSG_ATTR__MSG_ATTR__SHIFT 0x0 -#define MP0_P2SMSG_ATTR__MSG_ATTR_MASK 0x000000FFL -//MP0_S2PMSG_ATTR -#define MP0_S2PMSG_ATTR__MSG_ATTR__SHIFT 0x0 -#define MP0_S2PMSG_ATTR__MSG_ATTR_MASK 0x00000003L -//MP0_P2SMSG_INTSTS -#define MP0_P2SMSG_INTSTS__INTSTS0__SHIFT 0x0 -#define MP0_P2SMSG_INTSTS__INTSTS1__SHIFT 0x1 -#define MP0_P2SMSG_INTSTS__INTSTS2__SHIFT 0x2 -#define MP0_P2SMSG_INTSTS__INTSTS3__SHIFT 0x3 -#define MP0_P2SMSG_INTSTS__INTSTS0_MASK 0x00000001L -#define MP0_P2SMSG_INTSTS__INTSTS1_MASK 0x00000002L -#define MP0_P2SMSG_INTSTS__INTSTS2_MASK 0x00000004L -#define MP0_P2SMSG_INTSTS__INTSTS3_MASK 0x00000008L -//MP0_S2PMSG_0 -#define MP0_S2PMSG_0__CONTENT__SHIFT 0x0 -#define MP0_S2PMSG_0__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_32 -#define MP0_C2PMSG_32__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_32__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_33 -#define MP0_C2PMSG_33__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_33__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_34 -#define MP0_C2PMSG_34__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_34__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_35 -#define MP0_C2PMSG_35__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_35__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_36 -#define MP0_C2PMSG_36__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_36__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_37 -#define MP0_C2PMSG_37__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_37__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_38 -#define MP0_C2PMSG_38__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_38__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_39 -#define MP0_C2PMSG_39__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_39__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_40 -#define MP0_C2PMSG_40__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_40__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_41 -#define MP0_C2PMSG_41__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_41__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_42 -#define MP0_C2PMSG_42__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_42__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_43 -#define MP0_C2PMSG_43__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_43__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_44 -#define MP0_C2PMSG_44__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_44__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_45 -#define MP0_C2PMSG_45__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_45__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_46 -#define MP0_C2PMSG_46__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_46__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_47 -#define MP0_C2PMSG_47__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_47__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_48 -#define MP0_C2PMSG_48__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_48__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_49 -#define MP0_C2PMSG_49__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_49__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_50 -#define MP0_C2PMSG_50__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_50__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_51 -#define MP0_C2PMSG_51__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_51__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_52 -#define MP0_C2PMSG_52__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_52__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_53 -#define MP0_C2PMSG_53__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_53__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_54 -#define MP0_C2PMSG_54__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_54__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_55 -#define MP0_C2PMSG_55__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_55__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_56 -#define MP0_C2PMSG_56__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_56__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_57 -#define MP0_C2PMSG_57__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_57__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_58 -#define MP0_C2PMSG_58__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_58__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_59 -#define MP0_C2PMSG_59__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_59__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_60 -#define MP0_C2PMSG_60__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_60__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_61 -#define MP0_C2PMSG_61__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_61__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_62 -#define MP0_C2PMSG_62__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_62__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_63 -#define MP0_C2PMSG_63__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_63__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_64 -#define MP0_C2PMSG_64__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_64__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_65 -#define MP0_C2PMSG_65__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_65__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_66 -#define MP0_C2PMSG_66__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_66__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_67 -#define MP0_C2PMSG_67__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_67__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_68 -#define MP0_C2PMSG_68__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_68__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_69 -#define MP0_C2PMSG_69__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_69__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_70 -#define MP0_C2PMSG_70__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_70__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_71 -#define MP0_C2PMSG_71__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_71__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_72 -#define MP0_C2PMSG_72__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_72__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_73 -#define MP0_C2PMSG_73__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_73__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_74 -#define MP0_C2PMSG_74__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_74__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_75 -#define MP0_C2PMSG_75__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_75__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_76 -#define MP0_C2PMSG_76__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_76__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_77 -#define MP0_C2PMSG_77__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_77__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_78 -#define MP0_C2PMSG_78__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_78__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_79 -#define MP0_C2PMSG_79__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_79__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_80 -#define MP0_C2PMSG_80__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_80__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_81 -#define MP0_C2PMSG_81__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_81__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_82 -#define MP0_C2PMSG_82__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_82__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_83 -#define MP0_C2PMSG_83__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_83__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_84 -#define MP0_C2PMSG_84__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_84__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_85 -#define MP0_C2PMSG_85__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_85__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_86 -#define MP0_C2PMSG_86__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_86__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_87 -#define MP0_C2PMSG_87__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_87__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_88 -#define MP0_C2PMSG_88__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_88__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_89 -#define MP0_C2PMSG_89__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_89__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_90 -#define MP0_C2PMSG_90__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_90__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_91 -#define MP0_C2PMSG_91__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_91__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_92 -#define MP0_C2PMSG_92__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_92__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_93 -#define MP0_C2PMSG_93__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_93__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_94 -#define MP0_C2PMSG_94__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_94__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_95 -#define MP0_C2PMSG_95__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_95__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_96 -#define MP0_C2PMSG_96__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_96__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_97 -#define MP0_C2PMSG_97__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_97__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_98 -#define MP0_C2PMSG_98__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_98__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_99 -#define MP0_C2PMSG_99__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_99__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_100 -#define MP0_C2PMSG_100__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_100__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_101 -#define MP0_C2PMSG_101__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_101__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_102 -#define MP0_C2PMSG_102__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_102__CONTENT_MASK 0xFFFFFFFFL -//MP0_C2PMSG_103 -#define MP0_C2PMSG_103__CONTENT__SHIFT 0x0 -#define MP0_C2PMSG_103__CONTENT_MASK 0xFFFFFFFFL -//MP0_ACTIVE_FCN_ID -#define MP0_ACTIVE_FCN_ID__VFID__SHIFT 0x0 -#define MP0_ACTIVE_FCN_ID__VF__SHIFT 0x1f -#define MP0_ACTIVE_FCN_ID__VFID_MASK 0x0000000FL -#define MP0_ACTIVE_FCN_ID__VF_MASK 0x80000000L -//MP0_IH_CREDIT -#define MP0_IH_CREDIT__CREDIT_VALUE__SHIFT 0x0 -#define MP0_IH_CREDIT__CLIENT_ID__SHIFT 0x10 -#define MP0_IH_CREDIT__CREDIT_VALUE_MASK 0x00000003L -#define MP0_IH_CREDIT__CLIENT_ID_MASK 0x00FF0000L -//MP0_IH_SW_INT -#define MP0_IH_SW_INT__ID__SHIFT 0x0 -#define MP0_IH_SW_INT__VALID__SHIFT 0x8 -#define MP0_IH_SW_INT__ID_MASK 0x000000FFL -#define MP0_IH_SW_INT__VALID_MASK 0x00000100L -//MP0_IH_SW_INT_CTRL -#define MP0_IH_SW_INT_CTRL__INT_MASK__SHIFT 0x0 -#define MP0_IH_SW_INT_CTRL__INT_ACK__SHIFT 0x8 -#define MP0_IH_SW_INT_CTRL__INT_MASK_MASK 0x00000001L -#define MP0_IH_SW_INT_CTRL__INT_ACK_MASK 0x00000100L - - -//CGTT_DRM_CLK_CTRL0 -#define CGTT_DRM_CLK_CTRL0__ON_DELAY__SHIFT 0x0 -#define CGTT_DRM_CLK_CTRL0__OFF_HYSTERESIS__SHIFT 0x4 -#define CGTT_DRM_CLK_CTRL0__DIV_ID__SHIFT 0xc -#define CGTT_DRM_CLK_CTRL0__RAMP_DIS_CLK_0__SHIFT 0x15 -#define CGTT_DRM_CLK_CTRL0__RAMP_DIS_CLK_REG__SHIFT 0x16 -#define CGTT_DRM_CLK_CTRL0__SOFT_OVERRIDE7__SHIFT 0x18 -#define CGTT_DRM_CLK_CTRL0__SOFT_OVERRIDE6__SHIFT 0x19 -#define CGTT_DRM_CLK_CTRL0__SOFT_OVERRIDE5__SHIFT 0x1a -#define CGTT_DRM_CLK_CTRL0__SOFT_OVERRIDE4__SHIFT 0x1b -#define CGTT_DRM_CLK_CTRL0__SOFT_OVERRIDE3__SHIFT 0x1c -#define CGTT_DRM_CLK_CTRL0__SOFT_OVERRIDE2__SHIFT 0x1d -#define CGTT_DRM_CLK_CTRL0__SOFT_OVERRIDE1__SHIFT 0x1e -#define CGTT_DRM_CLK_CTRL0__SOFT_OVERRIDE0__SHIFT 0x1f -#define CGTT_DRM_CLK_CTRL0__ON_DELAY_MASK 0x0000000FL -#define CGTT_DRM_CLK_CTRL0__OFF_HYSTERESIS_MASK 0x00000FF0L -#define CGTT_DRM_CLK_CTRL0__DIV_ID_MASK 0x00007000L -#define CGTT_DRM_CLK_CTRL0__RAMP_DIS_CLK_0_MASK 0x00200000L -#define CGTT_DRM_CLK_CTRL0__RAMP_DIS_CLK_REG_MASK 0x00400000L -#define CGTT_DRM_CLK_CTRL0__SOFT_OVERRIDE7_MASK 0x01000000L -#define CGTT_DRM_CLK_CTRL0__SOFT_OVERRIDE6_MASK 0x02000000L -#define CGTT_DRM_CLK_CTRL0__SOFT_OVERRIDE5_MASK 0x04000000L -#define CGTT_DRM_CLK_CTRL0__SOFT_OVERRIDE4_MASK 0x08000000L -#define CGTT_DRM_CLK_CTRL0__SOFT_OVERRIDE3_MASK 0x10000000L -#define CGTT_DRM_CLK_CTRL0__SOFT_OVERRIDE2_MASK 0x20000000L -#define CGTT_DRM_CLK_CTRL0__SOFT_OVERRIDE1_MASK 0x40000000L -#define CGTT_DRM_CLK_CTRL0__SOFT_OVERRIDE0_MASK 0x80000000L -//DRM_LIGHT_SLEEP_CTRL -#define DRM_LIGHT_SLEEP_CTRL__MEM_LIGHT_SLEEP_EN__SHIFT 0x0 -#define DRM_LIGHT_SLEEP_CTRL__MEM_LIGHT_SLEEP_EN_MASK 0x00000001L - - -// addressBlock: mp_SmuMp1Pub_CruDec -//MP1_SMN_PUB_CTRL -#define MP1_SMN_PUB_CTRL__RESET__SHIFT 0x0 -#define MP1_SMN_PUB_CTRL__RESET_MASK 0x00000001L -//MP1_FIRMWARE_FLAGS -#define MP1_FIRMWARE_FLAGS__INTERRUPTS_ENABLED__SHIFT 0x0 -#define MP1_FIRMWARE_FLAGS__RESERVED__SHIFT 0x1 -#define MP1_FIRMWARE_FLAGS__INTERRUPTS_ENABLED_MASK 0x00000001L -#define MP1_FIRMWARE_FLAGS__RESERVED_MASK 0xFFFFFFFEL -//MP1_PUB_SCRATCH0 -#define MP1_PUB_SCRATCH0__DATA__SHIFT 0x0 -#define MP1_PUB_SCRATCH0__DATA_MASK 0xFFFFFFFFL -//MP1_PUB_SCRATCH1 -#define MP1_PUB_SCRATCH1__DATA__SHIFT 0x0 -#define MP1_PUB_SCRATCH1__DATA_MASK 0xFFFFFFFFL -//MP1_PUB_SCRATCH2 -#define MP1_PUB_SCRATCH2__DATA__SHIFT 0x0 -#define MP1_PUB_SCRATCH2__DATA_MASK 0xFFFFFFFFL -//MP1_PUB_SCRATCH3 -#define MP1_PUB_SCRATCH3__DATA__SHIFT 0x0 -#define MP1_PUB_SCRATCH3__DATA_MASK 0xFFFFFFFFL -//MP1_C2PMSG_0 -#define MP1_C2PMSG_0__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_0__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_1 -#define MP1_C2PMSG_1__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_1__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_2 -#define MP1_C2PMSG_2__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_2__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_3 -#define MP1_C2PMSG_3__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_3__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_4 -#define MP1_C2PMSG_4__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_4__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_5 -#define MP1_C2PMSG_5__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_5__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_6 -#define MP1_C2PMSG_6__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_6__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_7 -#define MP1_C2PMSG_7__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_7__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_8 -#define MP1_C2PMSG_8__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_8__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_9 -#define MP1_C2PMSG_9__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_9__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_10 -#define MP1_C2PMSG_10__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_10__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_11 -#define MP1_C2PMSG_11__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_11__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_12 -#define MP1_C2PMSG_12__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_12__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_13 -#define MP1_C2PMSG_13__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_13__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_14 -#define MP1_C2PMSG_14__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_14__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_15 -#define MP1_C2PMSG_15__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_15__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_16 -#define MP1_C2PMSG_16__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_16__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_17 -#define MP1_C2PMSG_17__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_17__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_18 -#define MP1_C2PMSG_18__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_18__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_19 -#define MP1_C2PMSG_19__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_19__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_20 -#define MP1_C2PMSG_20__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_20__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_21 -#define MP1_C2PMSG_21__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_21__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_22 -#define MP1_C2PMSG_22__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_22__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_23 -#define MP1_C2PMSG_23__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_23__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_24 -#define MP1_C2PMSG_24__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_24__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_25 -#define MP1_C2PMSG_25__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_25__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_26 -#define MP1_C2PMSG_26__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_26__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_27 -#define MP1_C2PMSG_27__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_27__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_28 -#define MP1_C2PMSG_28__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_28__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_29 -#define MP1_C2PMSG_29__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_29__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_30 -#define MP1_C2PMSG_30__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_30__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_31 -#define MP1_C2PMSG_31__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_31__CONTENT_MASK 0xFFFFFFFFL -//MP1_P2CMSG_0 -#define MP1_P2CMSG_0__CONTENT__SHIFT 0x0 -#define MP1_P2CMSG_0__CONTENT_MASK 0xFFFFFFFFL -//MP1_P2CMSG_1 -#define MP1_P2CMSG_1__CONTENT__SHIFT 0x0 -#define MP1_P2CMSG_1__CONTENT_MASK 0xFFFFFFFFL -//MP1_P2CMSG_2 -#define MP1_P2CMSG_2__CONTENT__SHIFT 0x0 -#define MP1_P2CMSG_2__CONTENT_MASK 0xFFFFFFFFL -//MP1_P2CMSG_3 -#define MP1_P2CMSG_3__CONTENT__SHIFT 0x0 -#define MP1_P2CMSG_3__CONTENT_MASK 0xFFFFFFFFL -//MP1_P2CMSG_INTEN -#define MP1_P2CMSG_INTEN__INTEN__SHIFT 0x0 -#define MP1_P2CMSG_INTEN__INTEN_MASK 0x0000000FL -//MP1_P2CMSG_INTSTS -#define MP1_P2CMSG_INTSTS__INTSTS0__SHIFT 0x0 -#define MP1_P2CMSG_INTSTS__INTSTS1__SHIFT 0x1 -#define MP1_P2CMSG_INTSTS__INTSTS2__SHIFT 0x2 -#define MP1_P2CMSG_INTSTS__INTSTS3__SHIFT 0x3 -#define MP1_P2CMSG_INTSTS__INTSTS0_MASK 0x00000001L -#define MP1_P2CMSG_INTSTS__INTSTS1_MASK 0x00000002L -#define MP1_P2CMSG_INTSTS__INTSTS2_MASK 0x00000004L -#define MP1_P2CMSG_INTSTS__INTSTS3_MASK 0x00000008L -//MP1_P2SMSG_0 -#define MP1_P2SMSG_0__CONTENT__SHIFT 0x0 -#define MP1_P2SMSG_0__CONTENT_MASK 0xFFFFFFFFL -//MP1_P2SMSG_1 -#define MP1_P2SMSG_1__CONTENT__SHIFT 0x0 -#define MP1_P2SMSG_1__CONTENT_MASK 0xFFFFFFFFL -//MP1_P2SMSG_2 -#define MP1_P2SMSG_2__CONTENT__SHIFT 0x0 -#define MP1_P2SMSG_2__CONTENT_MASK 0xFFFFFFFFL -//MP1_P2SMSG_3 -#define MP1_P2SMSG_3__CONTENT__SHIFT 0x0 -#define MP1_P2SMSG_3__CONTENT_MASK 0xFFFFFFFFL -//MP1_P2SMSG_INTSTS -#define MP1_P2SMSG_INTSTS__INTSTS0__SHIFT 0x0 -#define MP1_P2SMSG_INTSTS__INTSTS1__SHIFT 0x1 -#define MP1_P2SMSG_INTSTS__INTSTS2__SHIFT 0x2 -#define MP1_P2SMSG_INTSTS__INTSTS3__SHIFT 0x3 -#define MP1_P2SMSG_INTSTS__INTSTS0_MASK 0x00000001L -#define MP1_P2SMSG_INTSTS__INTSTS1_MASK 0x00000002L -#define MP1_P2SMSG_INTSTS__INTSTS2_MASK 0x00000004L -#define MP1_P2SMSG_INTSTS__INTSTS3_MASK 0x00000008L -//MP1_S2PMSG_0 -#define MP1_S2PMSG_0__CONTENT__SHIFT 0x0 -#define MP1_S2PMSG_0__CONTENT_MASK 0xFFFFFFFFL -//MP1_ACP2MP_RESP -#define MP1_ACP2MP_RESP__CONTENT__SHIFT 0x0 -#define MP1_ACP2MP_RESP__CONTENT_MASK 0xFFFFFFFFL -//MP1_DC2MP_RESP -#define MP1_DC2MP_RESP__CONTENT__SHIFT 0x0 -#define MP1_DC2MP_RESP__CONTENT_MASK 0xFFFFFFFFL -//MP1_UVD2MP_RESP -#define MP1_UVD2MP_RESP__CONTENT__SHIFT 0x0 -#define MP1_UVD2MP_RESP__CONTENT_MASK 0xFFFFFFFFL -//MP1_VCE2MP_RESP -#define MP1_VCE2MP_RESP__CONTENT__SHIFT 0x0 -#define MP1_VCE2MP_RESP__CONTENT_MASK 0xFFFFFFFFL -//MP1_RLC2MP_RESP -#define MP1_RLC2MP_RESP__CONTENT__SHIFT 0x0 -#define MP1_RLC2MP_RESP__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_32 -#define MP1_C2PMSG_32__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_32__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_33 -#define MP1_C2PMSG_33__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_33__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_34 -#define MP1_C2PMSG_34__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_34__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_35 -#define MP1_C2PMSG_35__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_35__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_36 -#define MP1_C2PMSG_36__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_36__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_37 -#define MP1_C2PMSG_37__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_37__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_38 -#define MP1_C2PMSG_38__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_38__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_39 -#define MP1_C2PMSG_39__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_39__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_40 -#define MP1_C2PMSG_40__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_40__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_41 -#define MP1_C2PMSG_41__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_41__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_42 -#define MP1_C2PMSG_42__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_42__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_43 -#define MP1_C2PMSG_43__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_43__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_44 -#define MP1_C2PMSG_44__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_44__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_45 -#define MP1_C2PMSG_45__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_45__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_46 -#define MP1_C2PMSG_46__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_46__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_47 -#define MP1_C2PMSG_47__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_47__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_48 -#define MP1_C2PMSG_48__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_48__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_49 -#define MP1_C2PMSG_49__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_49__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_50 -#define MP1_C2PMSG_50__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_50__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_51 -#define MP1_C2PMSG_51__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_51__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_52 -#define MP1_C2PMSG_52__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_52__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_53 -#define MP1_C2PMSG_53__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_53__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_54 -#define MP1_C2PMSG_54__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_54__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_55 -#define MP1_C2PMSG_55__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_55__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_56 -#define MP1_C2PMSG_56__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_56__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_57 -#define MP1_C2PMSG_57__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_57__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_58 -#define MP1_C2PMSG_58__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_58__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_59 -#define MP1_C2PMSG_59__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_59__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_60 -#define MP1_C2PMSG_60__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_60__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_61 -#define MP1_C2PMSG_61__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_61__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_62 -#define MP1_C2PMSG_62__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_62__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_63 -#define MP1_C2PMSG_63__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_63__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_64 -#define MP1_C2PMSG_64__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_64__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_65 -#define MP1_C2PMSG_65__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_65__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_66 -#define MP1_C2PMSG_66__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_66__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_67 -#define MP1_C2PMSG_67__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_67__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_68 -#define MP1_C2PMSG_68__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_68__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_69 -#define MP1_C2PMSG_69__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_69__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_70 -#define MP1_C2PMSG_70__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_70__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_71 -#define MP1_C2PMSG_71__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_71__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_72 -#define MP1_C2PMSG_72__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_72__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_73 -#define MP1_C2PMSG_73__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_73__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_74 -#define MP1_C2PMSG_74__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_74__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_75 -#define MP1_C2PMSG_75__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_75__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_76 -#define MP1_C2PMSG_76__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_76__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_77 -#define MP1_C2PMSG_77__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_77__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_78 -#define MP1_C2PMSG_78__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_78__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_79 -#define MP1_C2PMSG_79__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_79__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_80 -#define MP1_C2PMSG_80__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_80__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_81 -#define MP1_C2PMSG_81__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_81__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_82 -#define MP1_C2PMSG_82__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_82__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_83 -#define MP1_C2PMSG_83__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_83__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_84 -#define MP1_C2PMSG_84__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_84__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_85 -#define MP1_C2PMSG_85__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_85__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_86 -#define MP1_C2PMSG_86__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_86__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_87 -#define MP1_C2PMSG_87__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_87__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_88 -#define MP1_C2PMSG_88__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_88__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_89 -#define MP1_C2PMSG_89__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_89__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_90 -#define MP1_C2PMSG_90__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_90__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_91 -#define MP1_C2PMSG_91__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_91__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_92 -#define MP1_C2PMSG_92__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_92__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_93 -#define MP1_C2PMSG_93__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_93__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_94 -#define MP1_C2PMSG_94__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_94__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_95 -#define MP1_C2PMSG_95__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_95__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_96 -#define MP1_C2PMSG_96__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_96__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_97 -#define MP1_C2PMSG_97__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_97__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_98 -#define MP1_C2PMSG_98__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_98__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_99 -#define MP1_C2PMSG_99__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_99__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_100 -#define MP1_C2PMSG_100__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_100__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_101 -#define MP1_C2PMSG_101__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_101__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_102 -#define MP1_C2PMSG_102__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_102__CONTENT_MASK 0xFFFFFFFFL -//MP1_C2PMSG_103 -#define MP1_C2PMSG_103__CONTENT__SHIFT 0x0 -#define MP1_C2PMSG_103__CONTENT_MASK 0xFFFFFFFFL -//MP1_ACTIVE_FCN_ID -#define MP1_ACTIVE_FCN_ID__VFID__SHIFT 0x0 -#define MP1_ACTIVE_FCN_ID__VF__SHIFT 0x1f -#define MP1_ACTIVE_FCN_ID__VFID_MASK 0x0000000FL -#define MP1_ACTIVE_FCN_ID__VF_MASK 0x80000000L -//MP1_IH_CREDIT -#define MP1_IH_CREDIT__CREDIT_VALUE__SHIFT 0x0 -#define MP1_IH_CREDIT__CLIENT_ID__SHIFT 0x10 -#define MP1_IH_CREDIT__CREDIT_VALUE_MASK 0x00000003L -#define MP1_IH_CREDIT__CLIENT_ID_MASK 0x00FF0000L -//MP1_IH_SW_INT -#define MP1_IH_SW_INT__ID__SHIFT 0x0 -#define MP1_IH_SW_INT__VALID__SHIFT 0x8 -#define MP1_IH_SW_INT__ID_MASK 0x000000FFL -#define MP1_IH_SW_INT__VALID_MASK 0x00000100L -//MP1_IH_SW_INT_CTRL -#define MP1_IH_SW_INT_CTRL__INT_MASK__SHIFT 0x0 -#define MP1_IH_SW_INT_CTRL__INT_ACK__SHIFT 0x8 -#define MP1_IH_SW_INT_CTRL__INT_MASK_MASK 0x00000001L -#define MP1_IH_SW_INT_CTRL__INT_ACK_MASK 0x00000100L -//MP1_FPS_CNT -#define MP1_FPS_CNT__COUNT__SHIFT 0x0 -#define MP1_FPS_CNT__COUNT_MASK 0xFFFFFFFFL -//MP1_PUB_CTRL -#define MP1_PUB_CTRL__RESET__SHIFT 0x0 -#define MP1_PUB_CTRL__RESET_MASK 0x00000001L -//MP1_EXT_SCRATCH0 -#define MP1_EXT_SCRATCH0__DATA__SHIFT 0x0 -#define MP1_EXT_SCRATCH0__DATA_MASK 0xFFFFFFFFL -//MP1_EXT_SCRATCH1 -#define MP1_EXT_SCRATCH1__DATA__SHIFT 0x0 -#define MP1_EXT_SCRATCH1__DATA_MASK 0xFFFFFFFFL -//MP1_EXT_SCRATCH2 -#define MP1_EXT_SCRATCH2__DATA__SHIFT 0x0 -#define MP1_EXT_SCRATCH2__DATA_MASK 0xFFFFFFFFL -//MP1_EXT_SCRATCH3 -#define MP1_EXT_SCRATCH3__DATA__SHIFT 0x0 -#define MP1_EXT_SCRATCH3__DATA_MASK 0xFFFFFFFFL -//MP1_EXT_SCRATCH4 -#define MP1_EXT_SCRATCH4__DATA__SHIFT 0x0 -#define MP1_EXT_SCRATCH4__DATA_MASK 0xFFFFFFFFL -//MP1_EXT_SCRATCH5 -#define MP1_EXT_SCRATCH5__DATA__SHIFT 0x0 -#define MP1_EXT_SCRATCH5__DATA_MASK 0xFFFFFFFFL -//MP1_EXT_SCRATCH6 -#define MP1_EXT_SCRATCH6__DATA__SHIFT 0x0 -#define MP1_EXT_SCRATCH6__DATA_MASK 0xFFFFFFFFL -//MP1_EXT_SCRATCH7 -#define MP1_EXT_SCRATCH7__DATA__SHIFT 0x0 -#define MP1_EXT_SCRATCH7__DATA_MASK 0xFFFFFFFFL - - -#endif |