diff options
Diffstat (limited to 'drivers/gpu/drm/i915/gt/intel_engine_types.h')
| -rw-r--r-- | drivers/gpu/drm/i915/gt/intel_engine_types.h | 12 |
1 files changed, 11 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_types.h b/drivers/gpu/drm/i915/gt/intel_engine_types.h index 92be41a6903c..b23366a81048 100644 --- a/drivers/gpu/drm/i915/gt/intel_engine_types.h +++ b/drivers/gpu/drm/i915/gt/intel_engine_types.h @@ -75,6 +75,7 @@ struct intel_instdone { u32 instdone; /* The following exist only in the RCS engine */ u32 slice_common; + u32 slice_common_extra[2]; u32 sampler[I915_MAX_SLICES][I915_MAX_SUBSLICES]; u32 row[I915_MAX_SLICES][I915_MAX_SUBSLICES]; }; @@ -126,7 +127,6 @@ DECLARE_EWMA(_engine_latency, 6, 4) struct st_preempt_hang { struct completion completion; unsigned int count; - bool inject_hang; }; /** @@ -157,6 +157,16 @@ struct intel_engine_execlists { struct i915_priolist default_priolist; /** + * @error_interrupt: CS Master EIR + * + * The CS generates an interrupt when it detects an error. We capture + * the first error interrupt, record the EIR and schedule the tasklet. + * In the tasklet, we process the pending CS events to ensure we have + * the guilty request, and then reset the engine. + */ + u32 error_interrupt; + + /** * @no_priolist: priority lists disabled */ bool no_priolist; |