diff options
Diffstat (limited to 'drivers/gpu/drm/nouveau/include/nvif')
| -rw-r--r-- | drivers/gpu/drm/nouveau/include/nvif/cl0080.h | 1 | ||||
| -rw-r--r-- | drivers/gpu/drm/nouveau/include/nvif/cla06f.h | 3 | ||||
| -rw-r--r-- | drivers/gpu/drm/nouveau/include/nvif/class.h | 9 | ||||
| -rw-r--r-- | drivers/gpu/drm/nouveau/include/nvif/clc36f.h | 19 |
4 files changed, 30 insertions, 2 deletions
diff --git a/drivers/gpu/drm/nouveau/include/nvif/cl0080.h b/drivers/gpu/drm/nouveau/include/nvif/cl0080.h index 4f5233107f5f..4cbed0329367 100644 --- a/drivers/gpu/drm/nouveau/include/nvif/cl0080.h +++ b/drivers/gpu/drm/nouveau/include/nvif/cl0080.h @@ -32,6 +32,7 @@ struct nv_device_info_v0 { #define NV_DEVICE_INFO_V0_MAXWELL 0x09 #define NV_DEVICE_INFO_V0_PASCAL 0x0a #define NV_DEVICE_INFO_V0_VOLTA 0x0b +#define NV_DEVICE_INFO_V0_TURING 0x0c __u8 family; __u8 pad06[2]; __u64 ram_size; diff --git a/drivers/gpu/drm/nouveau/include/nvif/cla06f.h b/drivers/gpu/drm/nouveau/include/nvif/cla06f.h index fbfcffc5feb2..81401eb970ea 100644 --- a/drivers/gpu/drm/nouveau/include/nvif/cla06f.h +++ b/drivers/gpu/drm/nouveau/include/nvif/cla06f.h @@ -4,12 +4,13 @@ struct kepler_channel_gpfifo_a_v0 { __u8 version; - __u8 pad01[1]; + __u8 priv; __u16 chid; __u32 ilength; __u64 ioffset; __u64 runlist; __u64 vmm; + __u64 inst; }; #define NVA06F_V0_NTFY_NON_STALL_INTERRUPT 0x00 diff --git a/drivers/gpu/drm/nouveau/include/nvif/class.h b/drivers/gpu/drm/nouveau/include/nvif/class.h index 6db56bd7d67e..1d82cbf70cf4 100644 --- a/drivers/gpu/drm/nouveau/include/nvif/class.h +++ b/drivers/gpu/drm/nouveau/include/nvif/class.h @@ -68,7 +68,8 @@ #define KEPLER_CHANNEL_GPFIFO_B /* cla06f.h */ 0x0000a16f #define MAXWELL_CHANNEL_GPFIFO_A /* cla06f.h */ 0x0000b06f #define PASCAL_CHANNEL_GPFIFO_A /* cla06f.h */ 0x0000c06f -#define VOLTA_CHANNEL_GPFIFO_A /* cla06f.h */ 0x0000c36f +#define VOLTA_CHANNEL_GPFIFO_A /* clc36f.h */ 0x0000c36f +#define TURING_CHANNEL_GPFIFO_A /* clc36f.h */ 0x0000c46f #define NV50_DISP /* cl5070.h */ 0x00005070 #define G82_DISP /* cl5070.h */ 0x00008270 @@ -83,6 +84,7 @@ #define GP100_DISP /* cl5070.h */ 0x00009770 #define GP102_DISP /* cl5070.h */ 0x00009870 #define GV100_DISP /* cl5070.h */ 0x0000c370 +#define TU104_DISP /* cl5070.h */ 0x0000c570 #define NV31_MPEG 0x00003174 #define G82_MPEG 0x00008274 @@ -95,6 +97,7 @@ #define GF110_DISP_CURSOR /* cl507a.h */ 0x0000907a #define GK104_DISP_CURSOR /* cl507a.h */ 0x0000917a #define GV100_DISP_CURSOR /* cl507a.h */ 0x0000c37a +#define TU104_DISP_CURSOR /* cl507a.h */ 0x0000c57a #define NV50_DISP_OVERLAY /* cl507b.h */ 0x0000507b #define G82_DISP_OVERLAY /* cl507b.h */ 0x0000827b @@ -103,6 +106,7 @@ #define GK104_DISP_OVERLAY /* cl507b.h */ 0x0000917b #define GV100_DISP_WINDOW_IMM_CHANNEL_DMA /* clc37b.h */ 0x0000c37b +#define TU104_DISP_WINDOW_IMM_CHANNEL_DMA /* clc37b.h */ 0x0000c57b #define NV50_DISP_BASE_CHANNEL_DMA /* cl507c.h */ 0x0000507c #define G82_DISP_BASE_CHANNEL_DMA /* cl507c.h */ 0x0000827c @@ -125,6 +129,7 @@ #define GP100_DISP_CORE_CHANNEL_DMA /* cl507d.h */ 0x0000977d #define GP102_DISP_CORE_CHANNEL_DMA /* cl507d.h */ 0x0000987d #define GV100_DISP_CORE_CHANNEL_DMA /* cl507d.h */ 0x0000c37d +#define TU104_DISP_CORE_CHANNEL_DMA /* cl507d.h */ 0x0000c57d #define NV50_DISP_OVERLAY_CHANNEL_DMA /* cl507e.h */ 0x0000507e #define G82_DISP_OVERLAY_CHANNEL_DMA /* cl507e.h */ 0x0000827e @@ -134,6 +139,7 @@ #define GK104_DISP_OVERLAY_CONTROL_DMA /* cl507e.h */ 0x0000917e #define GV100_DISP_WINDOW_CHANNEL_DMA /* clc37e.h */ 0x0000c37e +#define TU104_DISP_WINDOW_CHANNEL_DMA /* clc37e.h */ 0x0000c57e #define NV50_TESLA 0x00005097 #define G82_TESLA 0x00008297 @@ -183,6 +189,7 @@ #define PASCAL_DMA_COPY_A 0x0000c0b5 #define PASCAL_DMA_COPY_B 0x0000c1b5 #define VOLTA_DMA_COPY_A 0x0000c3b5 +#define TURING_DMA_COPY_A 0x0000c5b5 #define FERMI_DECOMPRESS 0x000090b8 diff --git a/drivers/gpu/drm/nouveau/include/nvif/clc36f.h b/drivers/gpu/drm/nouveau/include/nvif/clc36f.h new file mode 100644 index 000000000000..6b14d7e3f6bb --- /dev/null +++ b/drivers/gpu/drm/nouveau/include/nvif/clc36f.h @@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef __NVIF_CLC36F_H__ +#define __NVIF_CLC36F_H__ + +struct volta_channel_gpfifo_a_v0 { + __u8 version; + __u8 priv; + __u16 chid; + __u32 ilength; + __u64 ioffset; + __u64 runlist; + __u64 vmm; + __u64 inst; + __u32 token; +}; + +#define NVC36F_V0_NTFY_NON_STALL_INTERRUPT 0x00 +#define NVC36F_V0_NTFY_KILLED 0x01 +#endif |