diff options
Diffstat (limited to 'drivers/gpu/drm/nouveau/nvkm/engine/device/base.c')
| -rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/engine/device/base.c | 112 |
1 files changed, 77 insertions, 35 deletions
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c index c3c7159f3411..8ebbe1656008 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c @@ -1987,6 +1987,8 @@ nv117_chipset = { .dma = gf119_dma_new, .fifo = gm107_fifo_new, .gr = gm107_gr_new, + .nvdec[0] = gm107_nvdec_new, + .nvenc[0] = gm107_nvenc_new, .sw = gf100_sw_new, }; @@ -2027,6 +2029,7 @@ nv118_chipset = { static const struct nvkm_device_chip nv120_chipset = { .name = "GM200", + .acr = gm200_acr_new, .bar = gm107_bar_new, .bios = nvkm_bios_new, .bus = gf100_bus_new, @@ -2045,7 +2048,6 @@ nv120_chipset = { .pci = gk104_pci_new, .pmu = gm107_pmu_new, .therm = gm200_therm_new, - .secboot = gm200_secboot_new, .timer = gk20a_timer_new, .top = gk104_top_new, .volt = gk104_volt_new, @@ -2056,12 +2058,16 @@ nv120_chipset = { .dma = gf119_dma_new, .fifo = gm200_fifo_new, .gr = gm200_gr_new, + .nvdec[0] = gm107_nvdec_new, + .nvenc[0] = gm107_nvenc_new, + .nvenc[1] = gm107_nvenc_new, .sw = gf100_sw_new, }; static const struct nvkm_device_chip nv124_chipset = { .name = "GM204", + .acr = gm200_acr_new, .bar = gm107_bar_new, .bios = nvkm_bios_new, .bus = gf100_bus_new, @@ -2080,7 +2086,6 @@ nv124_chipset = { .pci = gk104_pci_new, .pmu = gm107_pmu_new, .therm = gm200_therm_new, - .secboot = gm200_secboot_new, .timer = gk20a_timer_new, .top = gk104_top_new, .volt = gk104_volt_new, @@ -2091,12 +2096,16 @@ nv124_chipset = { .dma = gf119_dma_new, .fifo = gm200_fifo_new, .gr = gm200_gr_new, + .nvdec[0] = gm107_nvdec_new, + .nvenc[0] = gm107_nvenc_new, + .nvenc[1] = gm107_nvenc_new, .sw = gf100_sw_new, }; static const struct nvkm_device_chip nv126_chipset = { .name = "GM206", + .acr = gm200_acr_new, .bar = gm107_bar_new, .bios = nvkm_bios_new, .bus = gf100_bus_new, @@ -2115,7 +2124,6 @@ nv126_chipset = { .pci = gk104_pci_new, .pmu = gm107_pmu_new, .therm = gm200_therm_new, - .secboot = gm200_secboot_new, .timer = gk20a_timer_new, .top = gk104_top_new, .volt = gk104_volt_new, @@ -2126,12 +2134,15 @@ nv126_chipset = { .dma = gf119_dma_new, .fifo = gm200_fifo_new, .gr = gm200_gr_new, + .nvdec[0] = gm107_nvdec_new, + .nvenc[0] = gm107_nvenc_new, .sw = gf100_sw_new, }; static const struct nvkm_device_chip nv12b_chipset = { .name = "GM20B", + .acr = gm20b_acr_new, .bar = gm20b_bar_new, .bus = gf100_bus_new, .clk = gm20b_clk_new, @@ -2143,7 +2154,6 @@ nv12b_chipset = { .mc = gk20a_mc_new, .mmu = gm20b_mmu_new, .pmu = gm20b_pmu_new, - .secboot = gm20b_secboot_new, .timer = gk20a_timer_new, .top = gk104_top_new, .ce[2] = gm200_ce_new, @@ -2157,6 +2167,7 @@ nv12b_chipset = { static const struct nvkm_device_chip nv130_chipset = { .name = "GP100", + .acr = gm200_acr_new, .bar = gm107_bar_new, .bios = nvkm_bios_new, .bus = gf100_bus_new, @@ -2172,7 +2183,6 @@ nv130_chipset = { .mc = gp100_mc_new, .mmu = gp100_mmu_new, .therm = gp100_therm_new, - .secboot = gm200_secboot_new, .pci = gp100_pci_new, .pmu = gp100_pmu_new, .timer = gk20a_timer_new, @@ -2187,12 +2197,17 @@ nv130_chipset = { .disp = gp100_disp_new, .fifo = gp100_fifo_new, .gr = gp100_gr_new, + .nvdec[0] = gm107_nvdec_new, + .nvenc[0] = gm107_nvenc_new, + .nvenc[1] = gm107_nvenc_new, + .nvenc[2] = gm107_nvenc_new, .sw = gf100_sw_new, }; static const struct nvkm_device_chip nv132_chipset = { .name = "GP102", + .acr = gp102_acr_new, .bar = gm107_bar_new, .bios = nvkm_bios_new, .bus = gf100_bus_new, @@ -2208,7 +2223,6 @@ nv132_chipset = { .mc = gp100_mc_new, .mmu = gp100_mmu_new, .therm = gp100_therm_new, - .secboot = gp102_secboot_new, .pci = gp100_pci_new, .pmu = gp102_pmu_new, .timer = gk20a_timer_new, @@ -2221,7 +2235,9 @@ nv132_chipset = { .dma = gf119_dma_new, .fifo = gp100_fifo_new, .gr = gp102_gr_new, - .nvdec[0] = gp102_nvdec_new, + .nvdec[0] = gm107_nvdec_new, + .nvenc[0] = gm107_nvenc_new, + .nvenc[1] = gm107_nvenc_new, .sec2 = gp102_sec2_new, .sw = gf100_sw_new, }; @@ -2229,6 +2245,7 @@ nv132_chipset = { static const struct nvkm_device_chip nv134_chipset = { .name = "GP104", + .acr = gp102_acr_new, .bar = gm107_bar_new, .bios = nvkm_bios_new, .bus = gf100_bus_new, @@ -2244,7 +2261,6 @@ nv134_chipset = { .mc = gp100_mc_new, .mmu = gp100_mmu_new, .therm = gp100_therm_new, - .secboot = gp102_secboot_new, .pci = gp100_pci_new, .pmu = gp102_pmu_new, .timer = gk20a_timer_new, @@ -2257,7 +2273,9 @@ nv134_chipset = { .dma = gf119_dma_new, .fifo = gp100_fifo_new, .gr = gp104_gr_new, - .nvdec[0] = gp102_nvdec_new, + .nvdec[0] = gm107_nvdec_new, + .nvenc[0] = gm107_nvenc_new, + .nvenc[1] = gm107_nvenc_new, .sec2 = gp102_sec2_new, .sw = gf100_sw_new, }; @@ -2265,6 +2283,7 @@ nv134_chipset = { static const struct nvkm_device_chip nv136_chipset = { .name = "GP106", + .acr = gp102_acr_new, .bar = gm107_bar_new, .bios = nvkm_bios_new, .bus = gf100_bus_new, @@ -2280,7 +2299,6 @@ nv136_chipset = { .mc = gp100_mc_new, .mmu = gp100_mmu_new, .therm = gp100_therm_new, - .secboot = gp102_secboot_new, .pci = gp100_pci_new, .pmu = gp102_pmu_new, .timer = gk20a_timer_new, @@ -2293,7 +2311,8 @@ nv136_chipset = { .dma = gf119_dma_new, .fifo = gp100_fifo_new, .gr = gp104_gr_new, - .nvdec[0] = gp102_nvdec_new, + .nvdec[0] = gm107_nvdec_new, + .nvenc[0] = gm107_nvenc_new, .sec2 = gp102_sec2_new, .sw = gf100_sw_new, }; @@ -2301,6 +2320,7 @@ nv136_chipset = { static const struct nvkm_device_chip nv137_chipset = { .name = "GP107", + .acr = gp102_acr_new, .bar = gm107_bar_new, .bios = nvkm_bios_new, .bus = gf100_bus_new, @@ -2316,7 +2336,6 @@ nv137_chipset = { .mc = gp100_mc_new, .mmu = gp100_mmu_new, .therm = gp100_therm_new, - .secboot = gp102_secboot_new, .pci = gp100_pci_new, .pmu = gp102_pmu_new, .timer = gk20a_timer_new, @@ -2329,7 +2348,9 @@ nv137_chipset = { .dma = gf119_dma_new, .fifo = gp100_fifo_new, .gr = gp107_gr_new, - .nvdec[0] = gp102_nvdec_new, + .nvdec[0] = gm107_nvdec_new, + .nvenc[0] = gm107_nvenc_new, + .nvenc[1] = gm107_nvenc_new, .sec2 = gp102_sec2_new, .sw = gf100_sw_new, }; @@ -2337,6 +2358,7 @@ nv137_chipset = { static const struct nvkm_device_chip nv138_chipset = { .name = "GP108", + .acr = gp108_acr_new, .bar = gm107_bar_new, .bios = nvkm_bios_new, .bus = gf100_bus_new, @@ -2352,7 +2374,6 @@ nv138_chipset = { .mc = gp100_mc_new, .mmu = gp100_mmu_new, .therm = gp100_therm_new, - .secboot = gp108_secboot_new, .pci = gp100_pci_new, .pmu = gp102_pmu_new, .timer = gk20a_timer_new, @@ -2364,30 +2385,30 @@ nv138_chipset = { .disp = gp102_disp_new, .dma = gf119_dma_new, .fifo = gp100_fifo_new, - .gr = gp107_gr_new, - .nvdec[0] = gp102_nvdec_new, - .sec2 = gp102_sec2_new, + .gr = gp108_gr_new, + .nvdec[0] = gm107_nvdec_new, + .sec2 = gp108_sec2_new, .sw = gf100_sw_new, }; static const struct nvkm_device_chip nv13b_chipset = { .name = "GP10B", + .acr = gp10b_acr_new, .bar = gm20b_bar_new, .bus = gf100_bus_new, - .fault = gp100_fault_new, + .fault = gp10b_fault_new, .fb = gp10b_fb_new, .fuse = gm107_fuse_new, .ibus = gp10b_ibus_new, .imem = gk20a_instmem_new, - .ltc = gp102_ltc_new, + .ltc = gp10b_ltc_new, .mc = gp10b_mc_new, .mmu = gp10b_mmu_new, - .secboot = gp10b_secboot_new, - .pmu = gm20b_pmu_new, + .pmu = gp10b_pmu_new, .timer = gk20a_timer_new, .top = gk104_top_new, - .ce[2] = gp102_ce_new, + .ce[0] = gp100_ce_new, .dma = gf119_dma_new, .fifo = gp10b_fifo_new, .gr = gp10b_gr_new, @@ -2397,6 +2418,7 @@ nv13b_chipset = { static const struct nvkm_device_chip nv140_chipset = { .name = "GV100", + .acr = gp108_acr_new, .bar = gm107_bar_new, .bios = nvkm_bios_new, .bus = gf100_bus_new, @@ -2414,7 +2436,6 @@ nv140_chipset = { .mmu = gv100_mmu_new, .pci = gp100_pci_new, .pmu = gp102_pmu_new, - .secboot = gp108_secboot_new, .therm = gp100_therm_new, .timer = gk20a_timer_new, .top = gk104_top_new, @@ -2431,13 +2452,17 @@ nv140_chipset = { .dma = gv100_dma_new, .fifo = gv100_fifo_new, .gr = gv100_gr_new, - .nvdec[0] = gp102_nvdec_new, - .sec2 = gp102_sec2_new, + .nvdec[0] = gm107_nvdec_new, + .nvenc[0] = gm107_nvenc_new, + .nvenc[1] = gm107_nvenc_new, + .nvenc[2] = gm107_nvenc_new, + .sec2 = gp108_sec2_new, }; static const struct nvkm_device_chip nv162_chipset = { .name = "TU102", + .acr = tu102_acr_new, .bar = tu102_bar_new, .bios = nvkm_bios_new, .bus = gf100_bus_new, @@ -2466,13 +2491,16 @@ nv162_chipset = { .disp = tu102_disp_new, .dma = gv100_dma_new, .fifo = tu102_fifo_new, - .nvdec[0] = gp102_nvdec_new, + .gr = tu102_gr_new, + .nvdec[0] = gm107_nvdec_new, + .nvenc[0] = gm107_nvenc_new, .sec2 = tu102_sec2_new, }; static const struct nvkm_device_chip nv164_chipset = { .name = "TU104", + .acr = tu102_acr_new, .bar = tu102_bar_new, .bios = nvkm_bios_new, .bus = gf100_bus_new, @@ -2501,13 +2529,17 @@ nv164_chipset = { .disp = tu102_disp_new, .dma = gv100_dma_new, .fifo = tu102_fifo_new, - .nvdec[0] = gp102_nvdec_new, + .gr = tu102_gr_new, + .nvdec[0] = gm107_nvdec_new, + .nvdec[1] = gm107_nvdec_new, + .nvenc[0] = gm107_nvenc_new, .sec2 = tu102_sec2_new, }; static const struct nvkm_device_chip nv166_chipset = { .name = "TU106", + .acr = tu102_acr_new, .bar = tu102_bar_new, .bios = nvkm_bios_new, .bus = gf100_bus_new, @@ -2536,13 +2568,18 @@ nv166_chipset = { .disp = tu102_disp_new, .dma = gv100_dma_new, .fifo = tu102_fifo_new, - .nvdec[0] = gp102_nvdec_new, + .gr = tu102_gr_new, + .nvdec[0] = gm107_nvdec_new, + .nvdec[1] = gm107_nvdec_new, + .nvdec[2] = gm107_nvdec_new, + .nvenc[0] = gm107_nvenc_new, .sec2 = tu102_sec2_new, }; static const struct nvkm_device_chip nv167_chipset = { .name = "TU117", + .acr = tu102_acr_new, .bar = tu102_bar_new, .bios = nvkm_bios_new, .bus = gf100_bus_new, @@ -2571,13 +2608,16 @@ nv167_chipset = { .disp = tu102_disp_new, .dma = gv100_dma_new, .fifo = tu102_fifo_new, - .nvdec[0] = gp102_nvdec_new, + .gr = tu102_gr_new, + .nvdec[0] = gm107_nvdec_new, + .nvenc[0] = gm107_nvenc_new, .sec2 = tu102_sec2_new, }; static const struct nvkm_device_chip nv168_chipset = { .name = "TU116", + .acr = tu102_acr_new, .bar = tu102_bar_new, .bios = nvkm_bios_new, .bus = gf100_bus_new, @@ -2606,7 +2646,9 @@ nv168_chipset = { .disp = tu102_disp_new, .dma = gv100_dma_new, .fifo = tu102_fifo_new, - .nvdec[0] = gp102_nvdec_new, + .gr = tu102_gr_new, + .nvdec[0] = gm107_nvdec_new, + .nvenc[0] = gm107_nvenc_new, .sec2 = tu102_sec2_new, }; @@ -2638,6 +2680,7 @@ nvkm_device_subdev(struct nvkm_device *device, int index) switch (index) { #define _(n,p,m) case NVKM_SUBDEV_##n: if (p) return (m); break + _(ACR , device->acr , &device->acr->subdev); _(BAR , device->bar , &device->bar->subdev); _(VBIOS , device->bios , &device->bios->subdev); _(BUS , device->bus , &device->bus->subdev); @@ -2658,7 +2701,6 @@ nvkm_device_subdev(struct nvkm_device *device, int index) _(MXM , device->mxm , device->mxm); _(PCI , device->pci , &device->pci->subdev); _(PMU , device->pmu , &device->pmu->subdev); - _(SECBOOT , device->secboot , &device->secboot->subdev); _(THERM , device->therm , &device->therm->subdev); _(TIMER , device->timer , &device->timer->subdev); _(TOP , device->top , &device->top->subdev); @@ -2703,9 +2745,9 @@ nvkm_device_engine(struct nvkm_device *device, int index) _(MSPDEC , device->mspdec , device->mspdec); _(MSPPP , device->msppp , device->msppp); _(MSVLD , device->msvld , device->msvld); - _(NVENC0 , device->nvenc[0], device->nvenc[0]); - _(NVENC1 , device->nvenc[1], device->nvenc[1]); - _(NVENC2 , device->nvenc[2], device->nvenc[2]); + _(NVENC0 , device->nvenc[0], &device->nvenc[0]->engine); + _(NVENC1 , device->nvenc[1], &device->nvenc[1]->engine); + _(NVENC2 , device->nvenc[2], &device->nvenc[2]->engine); _(NVDEC0 , device->nvdec[0], &device->nvdec[0]->engine); _(NVDEC1 , device->nvdec[1], &device->nvdec[1]->engine); _(NVDEC2 , device->nvdec[2], &device->nvdec[2]->engine); @@ -3144,6 +3186,7 @@ nvkm_device_ctor(const struct nvkm_device_func *func, } \ break switch (i) { + _(NVKM_SUBDEV_ACR , acr); _(NVKM_SUBDEV_BAR , bar); _(NVKM_SUBDEV_VBIOS , bios); _(NVKM_SUBDEV_BUS , bus); @@ -3164,7 +3207,6 @@ nvkm_device_ctor(const struct nvkm_device_func *func, _(NVKM_SUBDEV_MXM , mxm); _(NVKM_SUBDEV_PCI , pci); _(NVKM_SUBDEV_PMU , pmu); - _(NVKM_SUBDEV_SECBOOT , secboot); _(NVKM_SUBDEV_THERM , therm); _(NVKM_SUBDEV_TIMER , timer); _(NVKM_SUBDEV_TOP , top); |