diff options
Diffstat (limited to 'drivers/gpu/drm/nouveau/nvkm/engine')
57 files changed, 571 insertions, 365 deletions
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/ce/gk104.c b/drivers/gpu/drm/nouveau/nvkm/engine/ce/gk104.c index c541a1c012dc..e2b944dce9b8 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/ce/gk104.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/ce/gk104.c @@ -22,19 +22,65 @@ * Authors: Ben Skeggs */ #include "priv.h" +#include <core/enum.h> #include <nvif/class.h> +static const struct nvkm_enum +gk104_ce_launcherr_report[] = { + { 0x0, "NO_ERR" }, + { 0x1, "2D_LAYER_EXCEEDS_DEPTH" }, + { 0x2, "INVALID_ARGUMENT" }, + { 0x3, "MEM2MEM_RECT_OUT_OF_BOUNDS" }, + { 0x4, "SRC_LINE_EXCEEDS_PITCH" }, + { 0x5, "SRC_LINE_EXCEEDS_NEG_PITCH" }, + { 0x6, "DST_LINE_EXCEEDS_PITCH" }, + { 0x7, "DST_LINE_EXCEEDS_NEG_PITCH" }, + { 0x8, "BAD_SRC_PIXEL_COMP_REF" }, + { 0x9, "INVALID_VALUE" }, + { 0xa, "UNUSED_FIELD" }, + { 0xb, "INVALID_OPERATION" }, + {} +}; + +static void +gk104_ce_intr_launcherr(struct nvkm_engine *ce, const u32 base) +{ + struct nvkm_subdev *subdev = &ce->subdev; + struct nvkm_device *device = subdev->device; + u32 stat = nvkm_rd32(device, 0x104f14 + base); + const struct nvkm_enum *en = + nvkm_enum_find(gk104_ce_launcherr_report, stat & 0x0000000f); + nvkm_warn(subdev, "LAUNCHERR %08x [%s]\n", stat, en ? en->name : ""); + nvkm_wr32(device, 0x104f14 + base, 0x00000000); +} + void gk104_ce_intr(struct nvkm_engine *ce) { const u32 base = (ce->subdev.index - NVKM_ENGINE_CE0) * 0x1000; struct nvkm_subdev *subdev = &ce->subdev; struct nvkm_device *device = subdev->device; - u32 stat = nvkm_rd32(device, 0x104908 + base); - if (stat) { - nvkm_warn(subdev, "intr %08x\n", stat); - nvkm_wr32(device, 0x104908 + base, stat); + u32 mask = nvkm_rd32(device, 0x104904 + base); + u32 intr = nvkm_rd32(device, 0x104908 + base) & mask; + if (intr & 0x00000001) { + nvkm_warn(subdev, "BLOCKPIPE\n"); + nvkm_wr32(device, 0x104908 + base, 0x00000001); + intr &= ~0x00000001; + } + if (intr & 0x00000002) { + nvkm_warn(subdev, "NONBLOCKPIPE\n"); + nvkm_wr32(device, 0x104908 + base, 0x00000002); + intr &= ~0x00000002; + } + if (intr & 0x00000004) { + gk104_ce_intr_launcherr(ce, base); + nvkm_wr32(device, 0x104908 + base, 0x00000004); + intr &= ~0x00000004; + } + if (intr) { + nvkm_warn(subdev, "intr %08x\n", intr); + nvkm_wr32(device, 0x104908 + base, intr); } } diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c index bbc9824af6e0..b1ba1c782a2b 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c @@ -1388,7 +1388,7 @@ nvc1_chipset = { .mc = gf100_mc_new, .mmu = gf100_mmu_new, .mxm = nv50_mxm_new, - .pci = g94_pci_new, + .pci = gf106_pci_new, .pmu = gf100_pmu_new, .therm = gt215_therm_new, .timer = nv41_timer_new, @@ -1423,7 +1423,7 @@ nvc3_chipset = { .mc = gf100_mc_new, .mmu = gf100_mmu_new, .mxm = nv50_mxm_new, - .pci = g94_pci_new, + .pci = gf106_pci_new, .pmu = gf100_pmu_new, .therm = gt215_therm_new, .timer = nv41_timer_new, @@ -1566,7 +1566,7 @@ nvcf_chipset = { .mc = gf100_mc_new, .mmu = gf100_mmu_new, .mxm = nv50_mxm_new, - .pci = g94_pci_new, + .pci = gf106_pci_new, .pmu = gf100_pmu_new, .therm = gt215_therm_new, .timer = nv41_timer_new, @@ -1601,7 +1601,7 @@ nvd7_chipset = { .mc = gf100_mc_new, .mmu = gf100_mmu_new, .mxm = nv50_mxm_new, - .pci = g94_pci_new, + .pci = gf106_pci_new, .therm = gf119_therm_new, .timer = nv41_timer_new, .ce[0] = gf100_ce_new, @@ -1634,7 +1634,7 @@ nvd9_chipset = { .mc = gf100_mc_new, .mmu = gf100_mmu_new, .mxm = nv50_mxm_new, - .pci = g94_pci_new, + .pci = gf106_pci_new, .pmu = gf119_pmu_new, .therm = gf119_therm_new, .timer = nv41_timer_new, @@ -1669,7 +1669,7 @@ nve4_chipset = { .mc = gf100_mc_new, .mmu = gf100_mmu_new, .mxm = nv50_mxm_new, - .pci = g94_pci_new, + .pci = gk104_pci_new, .pmu = gk104_pmu_new, .therm = gf119_therm_new, .timer = nv41_timer_new, @@ -1706,7 +1706,7 @@ nve6_chipset = { .mc = gf100_mc_new, .mmu = gf100_mmu_new, .mxm = nv50_mxm_new, - .pci = g94_pci_new, + .pci = gk104_pci_new, .pmu = gk104_pmu_new, .therm = gf119_therm_new, .timer = nv41_timer_new, @@ -1743,7 +1743,7 @@ nve7_chipset = { .mc = gf100_mc_new, .mmu = gf100_mmu_new, .mxm = nv50_mxm_new, - .pci = g94_pci_new, + .pci = gk104_pci_new, .pmu = gk104_pmu_new, .therm = gf119_therm_new, .timer = nv41_timer_new, @@ -1804,7 +1804,7 @@ nvf0_chipset = { .mc = gf100_mc_new, .mmu = gf100_mmu_new, .mxm = nv50_mxm_new, - .pci = g94_pci_new, + .pci = gk104_pci_new, .pmu = gk110_pmu_new, .therm = gf119_therm_new, .timer = nv41_timer_new, @@ -1840,7 +1840,7 @@ nvf1_chipset = { .mc = gf100_mc_new, .mmu = gf100_mmu_new, .mxm = nv50_mxm_new, - .pci = g94_pci_new, + .pci = gk104_pci_new, .pmu = gk110_pmu_new, .therm = gf119_therm_new, .timer = nv41_timer_new, @@ -1876,7 +1876,7 @@ nv106_chipset = { .mc = gk20a_mc_new, .mmu = gf100_mmu_new, .mxm = nv50_mxm_new, - .pci = g94_pci_new, + .pci = gk104_pci_new, .pmu = gk208_pmu_new, .therm = gf119_therm_new, .timer = nv41_timer_new, @@ -1912,7 +1912,7 @@ nv108_chipset = { .mc = gk20a_mc_new, .mmu = gf100_mmu_new, .mxm = nv50_mxm_new, - .pci = g94_pci_new, + .pci = gk104_pci_new, .pmu = gk208_pmu_new, .therm = gf119_therm_new, .timer = nv41_timer_new, @@ -1948,7 +1948,7 @@ nv117_chipset = { .mc = gk20a_mc_new, .mmu = gf100_mmu_new, .mxm = nv50_mxm_new, - .pci = g94_pci_new, + .pci = gk104_pci_new, .pmu = gm107_pmu_new, .therm = gm107_therm_new, .timer = gk20a_timer_new, @@ -1973,13 +1973,13 @@ nv124_chipset = { .fuse = gm107_fuse_new, .gpio = gk104_gpio_new, .i2c = gm204_i2c_new, - .ibus = gk104_ibus_new, + .ibus = gm204_ibus_new, .imem = nv50_instmem_new, - .ltc = gm107_ltc_new, + .ltc = gm204_ltc_new, .mc = gk20a_mc_new, .mmu = gf100_mmu_new, .mxm = nv50_mxm_new, - .pci = g94_pci_new, + .pci = gk104_pci_new, .pmu = gm107_pmu_new, .timer = gk20a_timer_new, .volt = gk104_volt_new, @@ -2004,13 +2004,13 @@ nv126_chipset = { .fuse = gm107_fuse_new, .gpio = gk104_gpio_new, .i2c = gm204_i2c_new, - .ibus = gk104_ibus_new, + .ibus = gm204_ibus_new, .imem = nv50_instmem_new, - .ltc = gm107_ltc_new, + .ltc = gm204_ltc_new, .mc = gk20a_mc_new, .mmu = gf100_mmu_new, .mxm = nv50_mxm_new, - .pci = g94_pci_new, + .pci = gk104_pci_new, .pmu = gm107_pmu_new, .timer = gk20a_timer_new, .volt = gk104_volt_new, @@ -2033,7 +2033,7 @@ nv12b_chipset = { .fuse = gm107_fuse_new, .ibus = gk20a_ibus_new, .imem = gk20a_instmem_new, - .ltc = gm107_ltc_new, + .ltc = gm204_ltc_new, .mc = gk20a_mc_new, .mmu = gf100_mmu_new, .timer = gk20a_timer_new, @@ -2494,7 +2494,8 @@ nvkm_device_ctor(const struct nvkm_device_func *func, device->pri = ioremap(mmio_base, mmio_size); if (!device->pri) { nvdev_error(device, "unable to map PRI\n"); - return -ENOMEM; + ret = -ENOMEM; + goto done; } } diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/ctrl.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/ctrl.c index cf8bc068e9b7..b0ece71aefde 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/ctrl.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/ctrl.c @@ -27,6 +27,7 @@ #include <subdev/clk.h> #include <nvif/class.h> +#include <nvif/if0001.h> #include <nvif/ioctl.h> #include <nvif/unpack.h> @@ -37,10 +38,10 @@ nvkm_control_mthd_pstate_info(struct nvkm_control *ctrl, void *data, u32 size) struct nvif_control_pstate_info_v0 v0; } *args = data; struct nvkm_clk *clk = ctrl->device->clk; - int ret; + int ret = -ENOSYS; nvif_ioctl(&ctrl->object, "control pstate info size %d\n", size); - if (nvif_unpack(args->v0, 0, 0, false)) { + if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, false))) { nvif_ioctl(&ctrl->object, "control pstate info vers %d\n", args->v0.version); } else @@ -75,10 +76,10 @@ nvkm_control_mthd_pstate_attr(struct nvkm_control *ctrl, void *data, u32 size) struct nvkm_cstate *cstate; int i = 0, j = -1; u32 lo, hi; - int ret; + int ret = -ENOSYS; nvif_ioctl(&ctrl->object, "control pstate attr size %d\n", size); - if (nvif_unpack(args->v0, 0, 0, false)) { + if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, false))) { nvif_ioctl(&ctrl->object, "control pstate attr vers %d state %d index %d\n", args->v0.version, args->v0.state, args->v0.index); @@ -143,10 +144,10 @@ nvkm_control_mthd_pstate_user(struct nvkm_control *ctrl, void *data, u32 size) struct nvif_control_pstate_user_v0 v0; } *args = data; struct nvkm_clk *clk = ctrl->device->clk; - int ret; + int ret = -ENOSYS; nvif_ioctl(&ctrl->object, "control pstate user size %d\n", size); - if (nvif_unpack(args->v0, 0, 0, false)) { + if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, false))) { nvif_ioctl(&ctrl->object, "control pstate user vers %d ustate %d pwrsrc %d\n", args->v0.version, args->v0.ustate, args->v0.pwrsrc); @@ -204,7 +205,7 @@ nvkm_control_new(struct nvkm_device *device, const struct nvkm_oclass *oclass, const struct nvkm_device_oclass nvkm_control_oclass = { - .base.oclass = NVIF_IOCTL_NEW_V0_CONTROL, + .base.oclass = NVIF_CLASS_CONTROL, .base.minver = -1, .base.maxver = -1, .ctor = nvkm_control_new, diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/user.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/user.c index 1ae48f27029d..137066426ed7 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/user.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/user.c @@ -31,6 +31,7 @@ #include <subdev/timer.h> #include <nvif/class.h> +#include <nvif/cl0080.h> #include <nvif/unpack.h> struct nvkm_udevice { @@ -48,10 +49,10 @@ nvkm_udevice_info(struct nvkm_udevice *udev, void *data, u32 size) union { struct nv_device_info_v0 v0; } *args = data; - int ret; + int ret = -ENOSYS; nvif_ioctl(object, "device info size %d\n", size); - if (nvif_unpack(args->v0, 0, 0, false)) { + if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, false))) { nvif_ioctl(object, "device info vers %d\n", args->v0.version); } else return ret; @@ -123,13 +124,16 @@ nvkm_udevice_info(struct nvkm_udevice *udev, void *data, u32 size) static int nvkm_udevice_time(struct nvkm_udevice *udev, void *data, u32 size) { + struct nvkm_object *object = &udev->object; struct nvkm_device *device = udev->device; union { struct nv_device_time_v0 v0; } *args = data; - int ret; + int ret = -ENOSYS; - if (nvif_unpack(args->v0, 0, 0, false)) { + nvif_ioctl(object, "device time size %d\n", size); + if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, false))) { + nvif_ioctl(object, "device time vers %d\n", args->v0.version); args->v0.time = nvkm_timer_read(device->timer); } @@ -140,6 +144,7 @@ static int nvkm_udevice_mthd(struct nvkm_object *object, u32 mthd, void *data, u32 size) { struct nvkm_udevice *udev = nvkm_udevice(object); + nvif_ioctl(object, "device mthd %08x\n", mthd); switch (mthd) { case NV_DEVICE_V0_INFO: return nvkm_udevice_info(udev, data, size); @@ -331,10 +336,10 @@ nvkm_udevice_new(const struct nvkm_oclass *oclass, void *data, u32 size, struct nvkm_object *parent = &client->object; const struct nvkm_object_func *func; struct nvkm_udevice *udev; - int ret; + int ret = -ENOSYS; nvif_ioctl(parent, "create device size %d\n", size); - if (nvif_unpack(args->v0, 0, 0, false)) { + if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, false))) { nvif_ioctl(parent, "create device v%d device %016llx\n", args->v0.version, args->v0.device); } else diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/base.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/base.c index 44b67719f64d..785fa76d0fbf 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/base.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/base.c @@ -32,6 +32,7 @@ #include <subdev/bios/dcb.h> #include <nvif/class.h> +#include <nvif/cl0046.h> #include <nvif/event.h> #include <nvif/unpack.h> @@ -58,9 +59,9 @@ nvkm_disp_vblank_ctor(struct nvkm_object *object, void *data, u32 size, union { struct nvif_notify_head_req_v0 v0; } *req = data; - int ret; + int ret = -ENOSYS; - if (nvif_unpack(req->v0, 0, 0, false)) { + if (!(ret = nvif_unpack(ret, &data, &size, req->v0, 0, 0, false))) { notify->size = sizeof(struct nvif_notify_head_rep_v0); if (ret = -ENXIO, req->v0.head <= disp->vblank.index_nr) { notify->types = 1; @@ -96,9 +97,9 @@ nvkm_disp_hpd_ctor(struct nvkm_object *object, void *data, u32 size, struct nvif_notify_conn_req_v0 v0; } *req = data; struct nvkm_output *outp; - int ret; + int ret = -ENOSYS; - if (nvif_unpack(req->v0, 0, 0, false)) { + if (!(ret = nvif_unpack(ret, &data, &size, req->v0, 0, 0, false))) { notify->size = sizeof(struct nvif_notify_conn_rep_v0); list_for_each_entry(outp, &disp->outp, head) { if (ret = -ENXIO, outp->conn->index == req->v0.conn) { diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/basenv50.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/basenv50.c index 1fd89edefc26..83f152300ec0 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/basenv50.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/basenv50.c @@ -27,6 +27,7 @@ #include <core/client.h> #include <nvif/class.h> +#include <nvif/cl507c.h> #include <nvif/unpack.h> int @@ -41,11 +42,11 @@ nv50_disp_base_new(const struct nv50_disp_dmac_func *func, } *args = data; struct nvkm_object *parent = oclass->parent; struct nv50_disp *disp = root->disp; - int head, ret; + int head, ret = -ENOSYS; u64 push; nvif_ioctl(parent, "create disp base channel dma size %d\n", size); - if (nvif_unpack(args->v0, 0, 0, false)) { + if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, false))) { nvif_ioctl(parent, "create disp base channel dma vers %d " "pushbuf %016llx head %d\n", args->v0.version, args->v0.pushbuf, args->v0.head); diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c index 01803c0679b6..dd2953bc9264 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c @@ -28,7 +28,7 @@ #include <core/ramht.h> #include <engine/dma.h> -#include <nvif/class.h> +#include <nvif/cl507d.h> #include <nvif/event.h> #include <nvif/unpack.h> @@ -134,9 +134,9 @@ nv50_disp_chan_uevent_ctor(struct nvkm_object *object, void *data, u32 size, union { struct nvif_notify_uevent_req none; } *args = data; - int ret; + int ret = -ENOSYS; - if (nvif_unvers(args->none)) { + if (!(ret = nvif_unvers(ret, &data, &size, args->none))) { notify->size = sizeof(struct nvif_notify_uevent_rep); notify->types = 1; notify->index = chan->chid; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/corenv50.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/corenv50.c index db4a9b3e0e09..b547c8b833ca 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/corenv50.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/corenv50.c @@ -28,6 +28,7 @@ #include <subdev/timer.h> #include <nvif/class.h> +#include <nvif/cl507d.h> #include <nvif/unpack.h> int @@ -42,10 +43,10 @@ nv50_disp_core_new(const struct nv50_disp_dmac_func *func, } *args = data; struct nvkm_object *parent = oclass->parent; u64 push; - int ret; + int ret = -ENOSYS; nvif_ioctl(parent, "create disp core channel dma size %d\n", size); - if (nvif_unpack(args->v0, 0, 0, false)) { + if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, false))) { nvif_ioctl(parent, "create disp core channel dma vers %d " "pushbuf %016llx\n", args->v0.version, args->v0.pushbuf); diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/cursnv50.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/cursnv50.c index 225858e62cf6..8b1320499a0f 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/cursnv50.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/cursnv50.c @@ -27,6 +27,7 @@ #include <core/client.h> #include <nvif/class.h> +#include <nvif/cl507a.h> #include <nvif/unpack.h> int @@ -41,10 +42,10 @@ nv50_disp_curs_new(const struct nv50_disp_chan_func *func, } *args = data; struct nvkm_object *parent = oclass->parent; struct nv50_disp *disp = root->disp; - int head, ret; + int head, ret = -ENOSYS; nvif_ioctl(parent, "create disp cursor size %d\n", size); - if (nvif_unpack(args->v0, 0, 0, false)) { + if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, false))) { nvif_ioctl(parent, "create disp cursor vers %d head %d\n", args->v0.version, args->v0.head); if (args->v0.head > disp->base.head.nr) diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/dacnv50.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/dacnv50.c index 9bfa9e7dc161..c9b78b8f9c87 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/dacnv50.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/dacnv50.c @@ -27,7 +27,7 @@ #include <core/client.h> #include <subdev/timer.h> -#include <nvif/class.h> +#include <nvif/cl5070.h> #include <nvif/unpack.h> int @@ -39,10 +39,10 @@ nv50_dac_power(NV50_DISP_MTHD_V1) struct nv50_disp_dac_pwr_v0 v0; } *args = data; u32 stat; - int ret; + int ret = -ENOSYS; nvif_ioctl(object, "disp dac pwr size %d\n", size); - if (nvif_unpack(args->v0, 0, 0, false)) { + if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, false))) { nvif_ioctl(object, "disp dac pwr vers %d state %d data %d " "vsync %d hsync %d\n", args->v0.version, args->v0.state, args->v0.data, @@ -76,10 +76,10 @@ nv50_dac_sense(NV50_DISP_MTHD_V1) } *args = data; const u32 doff = outp->or * 0x800; u32 loadval; - int ret; + int ret = -ENOSYS; nvif_ioctl(object, "disp dac load size %d\n", size); - if (nvif_unpack(args->v0, 0, 0, false)) { + if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, false))) { nvif_ioctl(object, "disp dac load vers %d data %08x\n", args->v0.version, args->v0.data); if (args->v0.data & 0xfff00000) diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.c index 186fd3ac78f6..f0314664349c 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.c @@ -158,7 +158,7 @@ exec_clkcmp(struct nv50_disp *disp, int head, int id, u32 pclk, u32 *conf) switch (outp->info.type) { case DCB_OUTPUT_TMDS: *conf = (ctrl & 0x00000f00) >> 8; - if (pclk >= 165000) + if (*conf == 5) *conf |= 0x0100; break; case DCB_OUTPUT_LVDS: diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/hdagf119.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/hdagf119.c index af99efbd63f7..da6129b2b78f 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/hdagf119.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/hdagf119.c @@ -29,7 +29,7 @@ #include <subdev/bios/dcb.h> #include <subdev/timer.h> -#include <nvif/class.h> +#include <nvif/cl5070.h> #include <nvif/unpack.h> int @@ -41,10 +41,10 @@ gf119_hda_eld(NV50_DISP_MTHD_V1) } *args = data; const u32 soff = outp->or * 0x030; const u32 hoff = head * 0x800; - int ret, i; + int ret = -ENOSYS, i; nvif_ioctl(object, "disp sor hda eld size %d\n", size); - if (nvif_unpack(args->v0, 0, 0, true)) { + if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, true))) { nvif_ioctl(object, "disp sor hda eld vers %d\n", args->v0.version); if (size > 0x60) diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/hdagt215.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/hdagt215.c index c1590b746f13..6f0436df0219 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/hdagt215.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/hdagt215.c @@ -27,7 +27,7 @@ #include <core/client.h> #include <subdev/timer.h> -#include <nvif/class.h> +#include <nvif/cl5070.h> #include <nvif/unpack.h> int @@ -38,10 +38,10 @@ gt215_hda_eld(NV50_DISP_MTHD_V1) struct nv50_disp_sor_hda_eld_v0 v0; } *args = data; const u32 soff = outp->or * 0x800; - int ret, i; + int ret = -ENOSYS, i; nvif_ioctl(object, "disp sor hda eld size %d\n", size); - if (nvif_unpack(args->v0, 0, 0, true)) { + if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, true))) { nvif_ioctl(object, "disp sor hda eld vers %d\n", args->v0.version); if (size > 0x60) diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmig84.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmig84.c index ee9e800a8f06..1c4256e8cbd6 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmig84.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmig84.c @@ -25,7 +25,7 @@ #include <core/client.h> -#include <nvif/class.h> +#include <nvif/cl5070.h> #include <nvif/unpack.h> int @@ -37,10 +37,10 @@ g84_hdmi_ctrl(NV50_DISP_MTHD_V1) struct nv50_disp_sor_hdmi_pwr_v0 v0; } *args = data; u32 ctrl; - int ret; + int ret = -ENOSYS; nvif_ioctl(object, "disp sor hdmi ctrl size %d\n", size); - if (nvif_unpack(args->v0, 0, 0, false)) { + if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, false))) { nvif_ioctl(object, "disp sor hdmi ctrl vers %d state %d " "max_ac_packet %d rekey %d\n", args->v0.version, args->v0.state, diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmigf119.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmigf119.c index b5af025d3b04..632f02da1382 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmigf119.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmigf119.c @@ -25,7 +25,7 @@ #include <core/client.h> -#include <nvif/class.h> +#include <nvif/cl5070.h> #include <nvif/unpack.h> int @@ -37,10 +37,10 @@ gf119_hdmi_ctrl(NV50_DISP_MTHD_V1) struct nv50_disp_sor_hdmi_pwr_v0 v0; } *args = data; u32 ctrl; - int ret; + int ret = -ENOSYS; nvif_ioctl(object, "disp sor hdmi ctrl size %d\n", size); - if (nvif_unpack(args->v0, 0, 0, false)) { + if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, false))) { nvif_ioctl(object, "disp sor hdmi ctrl vers %d state %d " "max_ac_packet %d rekey %d\n", args->v0.version, args->v0.state, diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmigk104.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmigk104.c index 110dc19e4f67..4e8067d511d7 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmigk104.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmigk104.c @@ -25,7 +25,7 @@ #include <core/client.h> -#include <nvif/class.h> +#include <nvif/cl5070.h> #include <nvif/unpack.h> int @@ -38,10 +38,10 @@ gk104_hdmi_ctrl(NV50_DISP_MTHD_V1) struct nv50_disp_sor_hdmi_pwr_v0 v0; } *args = data; u32 ctrl; - int ret; + int ret = -ENOSYS; nvif_ioctl(object, "disp sor hdmi ctrl size %d\n", size); - if (nvif_unpack(args->v0, 0, 0, false)) { + if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, false))) { nvif_ioctl(object, "disp sor hdmi ctrl vers %d state %d " "max_ac_packet %d rekey %d\n", args->v0.version, args->v0.state, diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmigt215.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmigt215.c index 61237dbfa35a..f1afc16494b6 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmigt215.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmigt215.c @@ -26,7 +26,7 @@ #include <core/client.h> -#include <nvif/class.h> +#include <nvif/cl5070.h> #include <nvif/unpack.h> int @@ -38,10 +38,10 @@ gt215_hdmi_ctrl(NV50_DISP_MTHD_V1) struct nv50_disp_sor_hdmi_pwr_v0 v0; } *args = data; u32 ctrl; - int ret; + int ret = -ENOSYS; nvif_ioctl(object, "disp sor hdmi ctrl size %d\n", size); - if (nvif_unpack(args->v0, 0, 0, false)) { + if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, false))) { nvif_ioctl(object, "disp sor hdmi ctrl vers %d state %d " "max_ac_packet %d rekey %d\n", args->v0.version, args->v0.state, diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c index 32e73a975b58..4226d2153b9c 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c @@ -391,7 +391,7 @@ exec_clkcmp(struct nv50_disp *disp, int head, int id, u32 pclk, u32 *conf) switch (outp->info.type) { case DCB_OUTPUT_TMDS: *conf = (ctrl & 0x00000f00) >> 8; - if (pclk >= 165000) + if (*conf == 5) *conf |= 0x0100; break; case DCB_OUTPUT_LVDS: diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/oimmnv50.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/oimmnv50.c index cd888a1e443c..3940b9c966ec 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/oimmnv50.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/oimmnv50.c @@ -27,6 +27,7 @@ #include <core/client.h> #include <nvif/class.h> +#include <nvif/cl507b.h> #include <nvif/unpack.h> int @@ -41,10 +42,10 @@ nv50_disp_oimm_new(const struct nv50_disp_chan_func *func, } *args = data; struct nvkm_object *parent = oclass->parent; struct nv50_disp *disp = root->disp; - int head, ret; + int head, ret = -ENOSYS; nvif_ioctl(parent, "create disp overlay size %d\n", size); - if (nvif_unpack(args->v0, 0, 0, false)) { + if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, false))) { nvif_ioctl(parent, "create disp overlay vers %d head %d\n", args->v0.version, args->v0.head); if (args->v0.head > disp->base.head.nr) diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/ovlynv50.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/ovlynv50.c index 6fa296c047b8..2a49c46425cd 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/ovlynv50.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/ovlynv50.c @@ -27,6 +27,7 @@ #include <core/client.h> #include <nvif/class.h> +#include <nvif/cl507e.h> #include <nvif/unpack.h> int @@ -41,11 +42,11 @@ nv50_disp_ovly_new(const struct nv50_disp_dmac_func *func, } *args = data; struct nvkm_object *parent = oclass->parent; struct nv50_disp *disp = root->disp; - int head, ret; + int head, ret = -ENOSYS; u64 push; nvif_ioctl(parent, "create disp overlay channel dma size %d\n", size); - if (nvif_unpack(args->v0, 0, 0, false)) { + if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, false))) { nvif_ioctl(parent, "create disp overlay channel dma vers %d " "pushbuf %016llx head %d\n", args->v0.version, args->v0.pushbuf, args->v0.head); diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/piornv50.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/piornv50.c index ab524bde7795..6c532eadba17 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/piornv50.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/piornv50.c @@ -28,7 +28,7 @@ #include <subdev/i2c.h> #include <subdev/timer.h> -#include <nvif/class.h> +#include <nvif/cl5070.h> #include <nvif/unpack.h> int @@ -40,10 +40,10 @@ nv50_pior_power(NV50_DISP_MTHD_V1) struct nv50_disp_pior_pwr_v0 v0; } *args = data; u32 ctrl, type; - int ret; + int ret = -ENOSYS; nvif_ioctl(object, "disp pior pwr size %d\n", size); - if (nvif_unpack(args->v0, 0, 0, false)) { + if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, false))) { nvif_ioctl(object, "disp pior pwr vers %d state %d type %x\n", args->v0.version, args->v0.state, args->v0.type); if (args->v0.type > 0x0f) diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootgf119.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootgf119.c index 8591726871ac..335d88823c22 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootgf119.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootgf119.c @@ -29,6 +29,7 @@ #include <subdev/timer.h> #include <nvif/class.h> +#include <nvif/cl5070.h> #include <nvif/unpack.h> int @@ -39,12 +40,12 @@ gf119_disp_root_scanoutpos(NV50_DISP_MTHD_V0) const u32 blanke = nvkm_rd32(device, 0x64041c + (head * 0x300)); const u32 blanks = nvkm_rd32(device, 0x640420 + (head * 0x300)); union { - struct nv04_disp_scanoutpos_v0 v0; + struct nv50_disp_scanoutpos_v0 v0; } *args = data; - int ret; + int ret = -ENOSYS; nvif_ioctl(object, "disp scanoutpos size %d\n", size); - if (nvif_unpack(args->v0, 0, 0, false)) { + if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, false))) { nvif_ioctl(object, "disp scanoutpos vers %d\n", args->v0.version); args->v0.vblanke = (blanke & 0xffff0000) >> 16; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv04.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv04.c index 2be846374d39..f535f43231e2 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv04.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv04.c @@ -27,6 +27,7 @@ #include <core/client.h> #include <nvif/class.h> +#include <nvif/cl0046.h> #include <nvif/unpack.h> struct nv04_disp_root { @@ -45,10 +46,10 @@ nv04_disp_scanoutpos(struct nv04_disp_root *root, struct nv04_disp_scanoutpos_v0 v0; } *args = data; u32 line; - int ret; + int ret = -ENOSYS; nvif_ioctl(object, "disp scanoutpos size %d\n", size); - if (nvif_unpack(args->v0, 0, 0, false)) { + if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, false))) { nvif_ioctl(object, "disp scanoutpos vers %d\n", args->v0.version); args->v0.vblanks = nvkm_rd32(device, 0x680800 + hoff) & 0xffff; @@ -85,10 +86,10 @@ nv04_disp_mthd(struct nvkm_object *object, u32 mthd, void *data, u32 size) union { struct nv04_disp_mthd_v0 v0; } *args = data; - int head, ret; + int head, ret = -ENOSYS; nvif_ioctl(object, "disp mthd size %d\n", size); - if (nvif_unpack(args->v0, 0, 0, true)) { + if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, true))) { nvif_ioctl(object, "disp mthd vers %d mthd %02x head %d\n", args->v0.version, args->v0.method, args->v0.head); mthd = args->v0.method; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv50.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv50.c index 06fb24d88702..2f9cecd81d04 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv50.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv50.c @@ -29,6 +29,7 @@ #include <subdev/timer.h> #include <nvif/class.h> +#include <nvif/cl5070.h> #include <nvif/unpack.h> int @@ -39,12 +40,12 @@ nv50_disp_root_scanoutpos(NV50_DISP_MTHD_V0) const u32 blanks = nvkm_rd32(device, 0x610af4 + (head * 0x540)); const u32 total = nvkm_rd32(device, 0x610afc + (head * 0x540)); union { - struct nv04_disp_scanoutpos_v0 v0; + struct nv50_disp_scanoutpos_v0 v0; } *args = data; - int ret; + int ret = -ENOSYS; nvif_ioctl(object, "disp scanoutpos size %d\n", size); - if (nvif_unpack(args->v0, 0, 0, false)) { + if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, false))) { nvif_ioctl(object, "disp scanoutpos vers %d\n", args->v0.version); args->v0.vblanke = (blanke & 0xffff0000) >> 16; @@ -78,19 +79,19 @@ nv50_disp_root_mthd_(struct nvkm_object *object, u32 mthd, void *data, u32 size) struct nvkm_output *outp = NULL; struct nvkm_output *temp; u16 type, mask = 0; - int head, ret; + int head, ret = -ENOSYS; if (mthd != NV50_DISP_MTHD) return -EINVAL; nvif_ioctl(object, "disp mthd size %d\n", size); - if (nvif_unpack(args->v0, 0, 0, true)) { + if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, true))) { nvif_ioctl(object, "disp mthd vers %d mthd %02x head %d\n", args->v0.version, args->v0.method, args->v0.head); mthd = args->v0.method; head = args->v0.head; } else - if (nvif_unpack(args->v1, 1, 1, true)) { + if (!(ret = nvif_unpack(ret, &data, &size, args->v1, 1, 1, true))) { nvif_ioctl(object, "disp mthd vers %d mthd %02x " "type %04x mask %04x\n", args->v1.version, args->v1.method, @@ -143,8 +144,9 @@ nv50_disp_root_mthd_(struct nvkm_object *object, u32 mthd, void *data, u32 size) union { struct nv50_disp_sor_lvds_script_v0 v0; } *args = data; + int ret = -ENOSYS; nvif_ioctl(object, "disp sor lvds script size %d\n", size); - if (nvif_unpack(args->v0, 0, 0, false)) { + if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, false))) { nvif_ioctl(object, "disp sor lvds script " "vers %d name %04x\n", args->v0.version, args->v0.script); @@ -159,8 +161,9 @@ nv50_disp_root_mthd_(struct nvkm_object *object, u32 mthd, void *data, u32 size) union { struct nv50_disp_sor_dp_pwr_v0 v0; } *args = data; + int ret = -ENOSYS; nvif_ioctl(object, "disp sor dp pwr size %d\n", size); - if (nvif_unpack(args->v0, 0, 0, false)) { + if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, false))) { nvif_ioctl(object, "disp sor dp pwr vers %d state %d\n", args->v0.version, args->v0.state); if (args->v0.state == 0) { diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/sornv50.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/sornv50.c index 29e0d2a9a839..53596bed3c36 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/sornv50.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/sornv50.c @@ -27,7 +27,7 @@ #include <core/client.h> #include <subdev/timer.h> -#include <nvif/class.h> +#include <nvif/cl5070.h> #include <nvif/unpack.h> int @@ -39,10 +39,10 @@ nv50_sor_power(NV50_DISP_MTHD_V1) } *args = data; const u32 soff = outp->or * 0x800; u32 stat; - int ret; + int ret = -ENOSYS; nvif_ioctl(object, "disp sor pwr size %d\n", size); - if (nvif_unpack(args->v0, 0, 0, false)) { + if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, false))) { nvif_ioctl(object, "disp sor pwr vers %d state %d\n", args->v0.version, args->v0.state); stat = !!args->v0.state; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/dma/user.c b/drivers/gpu/drm/nouveau/nvkm/engine/dma/user.c index 45ab062661a4..13c661b1ef14 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/dma/user.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/dma/user.c @@ -28,7 +28,7 @@ #include <subdev/fb.h> #include <subdev/instmem.h> -#include <nvif/class.h> +#include <nvif/cl0002.h> #include <nvif/unpack.h> static int @@ -69,7 +69,7 @@ nvkm_dmaobj_ctor(const struct nvkm_dmaobj_func *func, struct nvkm_dma *dma, struct nvkm_fb *fb = device->fb; void *data = *pdata; u32 size = *psize; - int ret; + int ret = -ENOSYS; nvkm_object_ctor(&nvkm_dmaobj_func, oclass, &dmaobj->object); dmaobj->func = func; @@ -77,7 +77,7 @@ nvkm_dmaobj_ctor(const struct nvkm_dmaobj_func *func, struct nvkm_dma *dma, RB_CLEAR_NODE(&dmaobj->rb); nvif_ioctl(parent, "create dma size %d\n", *psize); - if (nvif_unpack(args->v0, 0, 0, true)) { + if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, true))) { nvif_ioctl(parent, "create dma vers %d target %d access %d " "start %016llx limit %016llx\n", args->v0.version, args->v0.target, args->v0.access, diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/dma/usergf100.c b/drivers/gpu/drm/nouveau/nvkm/engine/dma/usergf100.c index 13e341cc4e32..ef7ac360101e 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/dma/usergf100.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/dma/usergf100.c @@ -28,7 +28,7 @@ #include <core/gpuobj.h> #include <subdev/fb.h> -#include <nvif/class.h> +#include <nvif/cl0002.h> #include <nvif/unpack.h> struct gf100_dmaobj { @@ -87,10 +87,11 @@ gf100_dmaobj_new(struct nvkm_dma *dma, const struct nvkm_oclass *oclass, if (ret) return ret; + ret = -ENOSYS; args = data; nvif_ioctl(parent, "create gf100 dma size %d\n", size); - if (nvif_unpack(args->v0, 0, 0, false)) { + if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, false))) { nvif_ioctl(parent, "create gf100 dma vers %d priv %d kind %02x\n", args->v0.version, args->v0.priv, args->v0.kind); diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/dma/usergf119.c b/drivers/gpu/drm/nouveau/nvkm/engine/dma/usergf119.c index 0e1af8b4db84..c068cee34588 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/dma/usergf119.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/dma/usergf119.c @@ -28,7 +28,7 @@ #include <core/gpuobj.h> #include <subdev/fb.h> -#include <nvif/class.h> +#include <nvif/cl0002.h> #include <nvif/unpack.h> struct gf119_dmaobj { @@ -85,10 +85,11 @@ gf119_dmaobj_new(struct nvkm_dma *dma, const struct nvkm_oclass *oclass, if (ret) return ret; + ret = -ENOSYS; args = data; nvif_ioctl(parent, "create gf119 dma size %d\n", size); - if (nvif_unpack(args->v0, 0, 0, false)) { + if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, false))) { nvif_ioctl(parent, "create gf100 dma vers %d page %d kind %02x\n", args->v0.version, args->v0.page, args->v0.kind); diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/dma/usernv50.c b/drivers/gpu/drm/nouveau/nvkm/engine/dma/usernv50.c index 5b7ce313ea14..6a85b5dea643 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/dma/usernv50.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/dma/usernv50.c @@ -28,7 +28,7 @@ #include <core/gpuobj.h> #include <subdev/fb.h> -#include <nvif/class.h> +#include <nvif/cl0002.h> #include <nvif/unpack.h> struct nv50_dmaobj { @@ -87,10 +87,11 @@ nv50_dmaobj_new(struct nvkm_dma *dma, const struct nvkm_oclass *oclass, if (ret) return ret; + ret = -ENOSYS; args = data; nvif_ioctl(parent, "create nv50 dma size %d\n", size); - if (nvif_unpack(args->v0, 0, 0, false)) { + if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, false))) { nvif_ioctl(parent, "create nv50 dma vers %d priv %d part %d " "comp %d kind %02x\n", args->v0.version, args->v0.priv, args->v0.part, args->v0.comp, diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/base.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/base.c index 1fbbfbe6ca9c..cfc7d5725a61 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/base.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/base.c @@ -129,9 +129,9 @@ nvkm_fifo_uevent_ctor(struct nvkm_object *object, void *data, u32 size, union { struct nvif_notify_uevent_req none; } *req = data; - int ret; + int ret = -ENOSYS; - if (nvif_unvers(req->none)) { + if (!(ret = nvif_unvers(ret, &data, &size, req->none))) { notify->size = sizeof(struct nvif_notify_uevent_rep); notify->types = 1; notify->index = 0; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/chang84.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/chang84.c index 04305241ceed..aeb3387a3fb0 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/chang84.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/chang84.c @@ -28,7 +28,7 @@ #include <subdev/mmu.h> #include <subdev/timer.h> -#include <nvif/class.h> +#include <nvif/cl826e.h> int g84_fifo_chan_ntfy(struct nvkm_fifo_chan *chan, u32 type, diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmag84.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmag84.c index a5ca52c7b74f..caa914074752 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmag84.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmag84.c @@ -27,6 +27,7 @@ #include <core/ramht.h> #include <nvif/class.h> +#include <nvif/cl826e.h> #include <nvif/unpack.h> static int @@ -35,14 +36,14 @@ g84_fifo_dma_new(struct nvkm_fifo *base, const struct nvkm_oclass *oclass, { struct nvkm_object *parent = oclass->parent; union { - struct nv50_channel_dma_v0 v0; + struct g82_channel_dma_v0 v0; } *args = data; struct nv50_fifo *fifo = nv50_fifo(base); struct nv50_fifo_chan *chan; - int ret; + int ret = -ENOSYS; nvif_ioctl(parent, "create channel dma size %d\n", size); - if (nvif_unpack(args->v0, 0, 0, false)) { + if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, false))) { nvif_ioctl(parent, "create channel dma vers %d vm %llx " "pushbuf %llx offset %016llx\n", args->v0.version, args->v0.vm, args->v0.pushbuf, diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv04.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv04.c index bfcc6408a772..edec30fd3ecd 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv04.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv04.c @@ -29,6 +29,7 @@ #include <subdev/instmem.h> #include <nvif/class.h> +#include <nvif/cl006b.h> #include <nvif/unpack.h> void @@ -167,10 +168,10 @@ nv04_fifo_dma_new(struct nvkm_fifo *base, const struct nvkm_oclass *oclass, struct nv04_fifo_chan *chan = NULL; struct nvkm_device *device = fifo->base.engine.subdev.device; struct nvkm_instmem *imem = device->imem; - int ret; + int ret = -ENOSYS; nvif_ioctl(parent, "create channel dma size %d\n", size); - if (nvif_unpack(args->v0, 0, 0, false)) { + if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, false))) { nvif_ioctl(parent, "create channel dma vers %d pushbuf %llx " "offset %08x\n", args->v0.version, args->v0.pushbuf, args->v0.offset); diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv10.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv10.c index 34f68e5bd040..f5f355ff005d 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv10.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv10.c @@ -29,6 +29,7 @@ #include <subdev/instmem.h> #include <nvif/class.h> +#include <nvif/cl006b.h> #include <nvif/unpack.h> static int @@ -43,10 +44,10 @@ nv10_fifo_dma_new(struct nvkm_fifo *base, const struct nvkm_oclass *oclass, struct nv04_fifo_chan *chan = NULL; struct nvkm_device *device = fifo->base.engine.subdev.device; struct nvkm_instmem *imem = device->imem; - int ret; + int ret = -ENOSYS; nvif_ioctl(parent, "create channel dma size %d\n", size); - if (nvif_unpack(args->v0, 0, 0, false)) { + if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, false))) { nvif_ioctl(parent, "create channel dma vers %d pushbuf %llx " "offset %08x\n", args->v0.version, args->v0.pushbuf, args->v0.offset); diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv17.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv17.c index ed7cc9f2b540..7edc6a564b5d 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv17.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv17.c @@ -29,6 +29,7 @@ #include <subdev/instmem.h> #include <nvif/class.h> +#include <nvif/cl006b.h> #include <nvif/unpack.h> static int @@ -43,10 +44,10 @@ nv17_fifo_dma_new(struct nvkm_fifo *base, const struct nvkm_oclass *oclass, struct nv04_fifo_chan *chan = NULL; struct nvkm_device *device = fifo->base.engine.subdev.device; struct nvkm_instmem *imem = device->imem; - int ret; + int ret = -ENOSYS; nvif_ioctl(parent, "create channel dma size %d\n", size); - if (nvif_unpack(args->v0, 0, 0, false)) { + if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, false))) { nvif_ioctl(parent, "create channel dma vers %d pushbuf %llx " "offset %08x\n", args->v0.version, args->v0.pushbuf, args->v0.offset); diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv40.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv40.c index 043b6c325949..0ec179fc40a1 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv40.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv40.c @@ -29,6 +29,7 @@ #include <subdev/instmem.h> #include <nvif/class.h> +#include <nvif/cl006b.h> #include <nvif/unpack.h> static bool @@ -188,10 +189,10 @@ nv40_fifo_dma_new(struct nvkm_fifo *base, const struct nvkm_oclass *oclass, struct nv04_fifo_chan *chan = NULL; struct nvkm_device *device = fifo->base.engine.subdev.device; struct nvkm_instmem *imem = device->imem; - int ret; + int ret = -ENOSYS; nvif_ioctl(parent, "create channel dma size %d\n", size); - if (nvif_unpack(args->v0, 0, 0, false)) { + if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, false))) { nvif_ioctl(parent, "create channel dma vers %d pushbuf %llx " "offset %08x\n", args->v0.version, args->v0.pushbuf, args->v0.offset); diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv50.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv50.c index 6b3b15f12c39..480bc3777be5 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv50.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv50.c @@ -27,6 +27,7 @@ #include <core/ramht.h> #include <nvif/class.h> +#include <nvif/cl506e.h> #include <nvif/unpack.h> static int @@ -39,10 +40,10 @@ nv50_fifo_dma_new(struct nvkm_fifo *base, const struct nvkm_oclass *oclass, } *args = data; struct nv50_fifo *fifo = nv50_fifo(base); struct nv50_fifo_chan *chan; - int ret; + int ret = -ENOSYS; nvif_ioctl(parent, "create channel dma size %d\n", size); - if (nvif_unpack(args->v0, 0, 0, false)) { + if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, false))) { nvif_ioctl(parent, "create channel dma vers %d vm %llx " "pushbuf %llx offset %016llx\n", args->v0.version, args->v0.vm, args->v0.pushbuf, diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c index ff6fcbda615b..36a39c7fd8d2 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c @@ -47,7 +47,7 @@ gf100_fifo_uevent_fini(struct nvkm_fifo *fifo) } void -gf100_fifo_runlist_update(struct gf100_fifo *fifo) +gf100_fifo_runlist_commit(struct gf100_fifo *fifo) { struct gf100_fifo_chan *chan; struct nvkm_subdev *subdev = &fifo->base.engine.subdev; @@ -77,6 +77,22 @@ gf100_fifo_runlist_update(struct gf100_fifo *fifo) mutex_unlock(&subdev->mutex); } +void +gf100_fifo_runlist_remove(struct gf100_fifo *fifo, struct gf100_fifo_chan *chan) +{ + mutex_lock(&fifo->base.engine.subdev.mutex); + list_del_init(&chan->head); + mutex_unlock(&fifo->base.engine.subdev.mutex); +} + +void +gf100_fifo_runlist_insert(struct gf100_fifo *fifo, struct gf100_fifo_chan *chan) +{ + mutex_lock(&fifo->base.engine.subdev.mutex); + list_add_tail(&chan->head, &fifo->chan); + mutex_unlock(&fifo->base.engine.subdev.mutex); +} + static inline int gf100_fifo_engidx(struct gf100_fifo *fifo, u32 engn) { @@ -139,7 +155,7 @@ gf100_fifo_recover_work(struct work_struct *work) } } - gf100_fifo_runlist_update(fifo); + gf100_fifo_runlist_commit(fifo); nvkm_wr32(device, 0x00262c, engm); nvkm_mask(device, 0x002630, engm, 0x00000000); } @@ -239,7 +255,7 @@ gf100_fifo_fault_engine[] = { { 0x14, "PMSPDEC", NULL, NVKM_ENGINE_MSPDEC }, { 0x15, "PCE0", NULL, NVKM_ENGINE_CE0 }, { 0x16, "PCE1", NULL, NVKM_ENGINE_CE1 }, - { 0x17, "PDAEMON" }, + { 0x17, "PMU" }, {} }; @@ -270,7 +286,7 @@ gf100_fifo_fault_hubclient[] = { { 0x0c, "PMSPPP" }, { 0x0d, "PMSVLD" }, { 0x11, "PCOUNTER" }, - { 0x12, "PDAEMON" }, + { 0x12, "PMU" }, { 0x14, "CCACHE" }, { 0x15, "CCACHE_POST" }, {} diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.h b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.h index c649ca9b53e3..08c33c3ceaf7 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.h +++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.h @@ -5,6 +5,7 @@ #include <subdev/mmu.h> +struct gf100_fifo_chan; struct gf100_fifo { struct nvkm_fifo base; @@ -27,5 +28,7 @@ struct gf100_fifo { }; void gf100_fifo_intr_engine(struct gf100_fifo *); -void gf100_fifo_runlist_update(struct gf100_fifo *); +void gf100_fifo_runlist_insert(struct gf100_fifo *, struct gf100_fifo_chan *); +void gf100_fifo_runlist_remove(struct gf100_fifo *, struct gf100_fifo_chan *); +void gf100_fifo_runlist_commit(struct gf100_fifo *); #endif diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c index 98970a0b7a66..4fcd147d43c8 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c @@ -47,7 +47,7 @@ gk104_fifo_uevent_init(struct nvkm_fifo *fifo) } void -gk104_fifo_runlist_update(struct gk104_fifo *fifo, u32 engine) +gk104_fifo_runlist_commit(struct gk104_fifo *fifo, u32 engine) { struct gk104_fifo_engn *engn = &fifo->engine[engine]; struct gk104_fifo_chan *chan; @@ -78,6 +78,22 @@ gk104_fifo_runlist_update(struct gk104_fifo *fifo, u32 engine) mutex_unlock(&subdev->mutex); } +void +gk104_fifo_runlist_remove(struct gk104_fifo *fifo, struct gk104_fifo_chan *chan) +{ + mutex_lock(&fifo->base.engine.subdev.mutex); + list_del_init(&chan->head); + mutex_unlock(&fifo->base.engine.subdev.mutex); +} + +void +gk104_fifo_runlist_insert(struct gk104_fifo *fifo, struct gk104_fifo_chan *chan) +{ + mutex_lock(&fifo->base.engine.subdev.mutex); + list_add_tail(&chan->head, &fifo->engine[chan->engine].chan); + mutex_unlock(&fifo->base.engine.subdev.mutex); +} + static inline struct nvkm_engine * gk104_fifo_engine(struct gk104_fifo *fifo, u32 engn) { @@ -112,7 +128,7 @@ gk104_fifo_recover_work(struct work_struct *work) nvkm_subdev_fini(&engine->subdev, false); WARN_ON(nvkm_subdev_init(&engine->subdev)); } - gk104_fifo_runlist_update(fifo, gk104_fifo_subdev_engine(engn)); + gk104_fifo_runlist_commit(fifo, gk104_fifo_subdev_engine(engn)); } nvkm_wr32(device, 0x00262c, engm); @@ -180,7 +196,7 @@ gk104_fifo_intr_sched_ctxsw(struct gk104_fifo *fifo) spin_lock_irqsave(&fifo->base.lock, flags); for (engn = 0; engn < ARRAY_SIZE(fifo->engine); engn++) { - u32 stat = nvkm_rd32(device, 0x002640 + (engn * 0x04)); + u32 stat = nvkm_rd32(device, 0x002640 + (engn * 0x08)); u32 busy = (stat & 0x80000000); u32 next = (stat & 0x07ff0000) >> 16; u32 chsw = (stat & 0x00008000); diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.h b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.h index 5afd9b5ec5d1..bec519d8f91e 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.h +++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.h @@ -5,6 +5,7 @@ #include <subdev/mmu.h> +struct gk104_fifo_chan; struct gk104_fifo_engn { struct nvkm_memory *runlist[2]; int cur_runlist; @@ -35,7 +36,9 @@ void gk104_fifo_fini(struct nvkm_fifo *); void gk104_fifo_intr(struct nvkm_fifo *); void gk104_fifo_uevent_init(struct nvkm_fifo *); void gk104_fifo_uevent_fini(struct nvkm_fifo *); -void gk104_fifo_runlist_update(struct gk104_fifo *, u32 engine); +void gk104_fifo_runlist_insert(struct gk104_fifo *, struct gk104_fifo_chan *); +void gk104_fifo_runlist_remove(struct gk104_fifo *, struct gk104_fifo_chan *); +void gk104_fifo_runlist_commit(struct gk104_fifo *, u32 engine); static inline u64 gk104_fifo_engine_subdev(int engine) diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifog84.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifog84.c index 820132363f68..77c2f2a28bf3 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifog84.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifog84.c @@ -27,6 +27,7 @@ #include <core/ramht.h> #include <nvif/class.h> +#include <nvif/cl826f.h> #include <nvif/unpack.h> static int @@ -35,15 +36,15 @@ g84_fifo_gpfifo_new(struct nvkm_fifo *base, const struct nvkm_oclass *oclass, { struct nvkm_object *parent = oclass->parent; union { - struct nv50_channel_gpfifo_v0 v0; + struct g82_channel_gpfifo_v0 v0; } *args = data; struct nv50_fifo *fifo = nv50_fifo(base); struct nv50_fifo_chan *chan; u64 ioffset, ilength; - int ret; + int ret = -ENOSYS; nvif_ioctl(parent, "create channel gpfifo size %d\n", size); - if (nvif_unpack(args->v0, 0, 0, false)) { + if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, false))) { nvif_ioctl(parent, "create channel gpfifo vers %d vm %llx " "pushbuf %llx ioffset %016llx " "ilength %08x\n", diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogf100.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogf100.c index e7cbc139c1d4..cbc67f262322 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogf100.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogf100.c @@ -29,6 +29,7 @@ #include <subdev/timer.h> #include <nvif/class.h> +#include <nvif/cl906f.h> #include <nvif/unpack.h> static u32 @@ -138,9 +139,9 @@ gf100_fifo_gpfifo_fini(struct nvkm_fifo_chan *base) u32 coff = chan->base.chid * 8; if (!list_empty(&chan->head) && !chan->killed) { - list_del_init(&chan->head); + gf100_fifo_runlist_remove(fifo, chan); nvkm_mask(device, 0x003004 + coff, 0x00000001, 0x00000000); - gf100_fifo_runlist_update(fifo); + gf100_fifo_runlist_commit(fifo); } gf100_fifo_intr_engine(fifo); @@ -160,9 +161,9 @@ gf100_fifo_gpfifo_init(struct nvkm_fifo_chan *base) nvkm_wr32(device, 0x003000 + coff, 0xc0000000 | addr); if (list_empty(&chan->head) && !chan->killed) { - list_add_tail(&chan->head, &fifo->chan); + gf100_fifo_runlist_insert(fifo, chan); nvkm_wr32(device, 0x003004 + coff, 0x001f0001); - gf100_fifo_runlist_update(fifo); + gf100_fifo_runlist_commit(fifo); } } @@ -199,10 +200,10 @@ gf100_fifo_gpfifo_new(struct nvkm_fifo *base, const struct nvkm_oclass *oclass, struct nvkm_object *parent = oclass->parent; struct gf100_fifo_chan *chan; u64 usermem, ioffset, ilength; - int ret, i; + int ret = -ENOSYS, i; nvif_ioctl(parent, "create channel gpfifo size %d\n", size); - if (nvif_unpack(args->v0, 0, 0, false)) { + if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, false))) { nvif_ioctl(parent, "create channel gpfifo vers %d vm %llx " "ioffset %016llx ilength %08x\n", args->v0.version, args->v0.vm, args->v0.ioffset, diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogk104.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogk104.c index 0b817540a9e4..2e1df01bd928 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogk104.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogk104.c @@ -30,6 +30,7 @@ #include <subdev/timer.h> #include <nvif/class.h> +#include <nvif/cla06f.h> #include <nvif/unpack.h> static int @@ -151,9 +152,9 @@ gk104_fifo_gpfifo_fini(struct nvkm_fifo_chan *base) u32 coff = chan->base.chid * 8; if (!list_empty(&chan->head)) { - list_del_init(&chan->head); + gk104_fifo_runlist_remove(fifo, chan); nvkm_mask(device, 0x800004 + coff, 0x00000800, 0x00000800); - gk104_fifo_runlist_update(fifo, chan->engine); + gk104_fifo_runlist_commit(fifo, chan->engine); } nvkm_wr32(device, 0x800000 + coff, 0x00000000); @@ -172,9 +173,9 @@ gk104_fifo_gpfifo_init(struct nvkm_fifo_chan *base) nvkm_wr32(device, 0x800000 + coff, 0x80000000 | addr); if (list_empty(&chan->head) && !chan->killed) { - list_add_tail(&chan->head, &fifo->engine[chan->engine].chan); + gk104_fifo_runlist_insert(fifo, chan); nvkm_mask(device, 0x800004 + coff, 0x00000400, 0x00000400); - gk104_fifo_runlist_update(fifo, chan->engine); + gk104_fifo_runlist_commit(fifo, chan->engine); nvkm_mask(device, 0x800004 + coff, 0x00000400, 0x00000400); } } @@ -213,10 +214,10 @@ gk104_fifo_gpfifo_new(struct nvkm_fifo *base, const struct nvkm_oclass *oclass, struct gk104_fifo_chan *chan; u64 usermem, ioffset, ilength; u32 engines; - int ret, i; + int ret = -ENOSYS, i; nvif_ioctl(parent, "create channel gpfifo size %d\n", size); - if (nvif_unpack(args->v0, 0, 0, false)) { + if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, false))) { nvif_ioctl(parent, "create channel gpfifo vers %d vm %llx " "ioffset %016llx ilength %08x engine %08x\n", args->v0.version, args->v0.vm, args->v0.ioffset, diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifonv50.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifonv50.c index a8c69f878221..c5a7de9db259 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifonv50.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifonv50.c @@ -27,6 +27,7 @@ #include <core/ramht.h> #include <nvif/class.h> +#include <nvif/cl506f.h> #include <nvif/unpack.h> static int @@ -40,10 +41,10 @@ nv50_fifo_gpfifo_new(struct nvkm_fifo *base, const struct nvkm_oclass *oclass, struct nv50_fifo *fifo = nv50_fifo(base); struct nv50_fifo_chan *chan; u64 ioffset, ilength; - int ret; + int ret = -ENOSYS; nvif_ioctl(parent, "create channel gpfifo size %d\n", size); - if (nvif_unpack(args->v0, 0, 0, false)) { + if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, false))) { nvif_ioctl(parent, "create channel gpfifo vers %d vm %llx " "pushbuf %llx ioffset %016llx " "ilength %08x\n", diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgk20a.c b/drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgk20a.c index ddaa16a71c84..ad0a6cfe7580 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgk20a.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgk20a.c @@ -55,7 +55,7 @@ gk20a_grctx_generate_main(struct gf100_gr *gr, struct gf100_grctx *info) gk104_grctx_generate_rop_active_fbps(gr); - nvkm_mask(device, 0x5044b0, 0x8000000, 0x8000000); + nvkm_mask(device, 0x5044b0, 0x08000000, 0x08000000); gf100_gr_wait_idle(gr); diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/gpc.fuc b/drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/gpc.fuc index 7dacb3cc0668..e168b83a10c9 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/gpc.fuc +++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/gpc.fuc @@ -247,10 +247,7 @@ init: tpc_strand_info(-1); ld b32 $r4 D[$r0 + #tpc_count] - mov $r5 NV_PGRAPH_GPC0_TPC0 - ld b32 $r6 D[$r0 + #gpc_id] - shl b32 $r6 15 - add b32 $r5 $r6 + gpc_addr($r5, NV_PGRAPH_GPC0_TPC0) tpc_strand_init_tpc_loop: add b32 $r14 $r5 NV_TPC_STRAND_CNT call(nv_rd32) diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/gpcgm107.fuc5.h b/drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/gpcgm107.fuc5.h index 11bf363a6ae9..5136f9161706 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/gpcgm107.fuc5.h +++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/gpcgm107.fuc5.h @@ -289,7 +289,7 @@ uint32_t gm107_grgpc_code[] = { 0x020014fe, 0x12004002, 0xbd0002f6, - 0x05b34104, + 0x05ad4104, 0x400010fe, 0x00f60700, 0x0204bd00, @@ -387,180 +387,180 @@ uint32_t gm107_grgpc_code[] = { 0x7e00008f, 0x98000314, 0x00850504, - 0x06985040, - 0x0f64b604, -/* 0x04e3: tpc_strand_init_tpc_loop */ - 0xb80056bb, - 0x0005705e, - 0x0000657e, - 0x74bdf6b2, -/* 0x04f0: tpc_strand_init_idx_loop */ - 0x05605eb8, - 0x7e7fb200, - 0xb800008f, - 0x0005885e, - 0x7e082f95, - 0xb800008f, - 0x00058c5e, - 0x7e082f95, - 0xb800008f, - 0x0005905e, - 0x0000657e, - 0xb606f5b6, - 0xf4b601f0, - 0x002fbb08, - 0xb6003fbb, - 0x62b60170, - 0xbf1bf401, - 0x080050b7, - 0xf40142b6, - 0x3f0fa81b, - 0x501d608e, - 0xb201e5f0, - 0x008f7eff, - 0x8e0d0f00, - 0xf0501da8, - 0xffb201e5, - 0x00008f7e, - 0x0003147e, - 0x02010080, - 0xbd0003f6, - 0xf024bd04, - 0x00801f29, - 0x02f60230, -/* 0x0577: main */ - 0xf404bd00, - 0x28f40031, - 0x7e240d00, - 0xf4000037, - 0xe4b0f401, - 0x1d18f404, - 0x020181fe, - 0xfd20bd06, - 0xe4b60412, - 0x051efd01, - 0x7e0018fe, - 0xf400064a, -/* 0x05a6: main_not_ctx_xfer */ - 0xef94d40e, - 0x01f5f010, - 0x0002f87e, -/* 0x05b3: ih */ - 0xf9c70ef4, - 0x0188fe80, - 0x90f980f9, - 0xb0f9a0f9, - 0xe0f9d0f9, - 0x04bdf0f9, - 0xcf02004a, - 0xabc400aa, - 0x1f0bf404, - 0x004e240d, - 0x00eecf1a, - 0xcf19004f, - 0x047e00ff, - 0x010e0000, - 0xf61d0040, - 0x04bd000e, -/* 0x05f0: ih_no_fifo */ - 0xf6010040, - 0x04bd000a, - 0xe0fcf0fc, - 0xb0fcd0fc, - 0x90fca0fc, - 0x88fe80fc, - 0xf480fc00, - 0x01f80032, -/* 0x0610: hub_barrier_done */ - 0x0e98010f, - 0x04febb04, - 0x188effb2, - 0x8f7e4094, - 0x00f80000, -/* 0x0624: ctx_redswitch */ - 0x0080200f, - 0x0ff60185, - 0x0e04bd00, -/* 0x0631: ctx_redswitch_delay */ - 0x01e2b608, - 0xf1fd1bf4, - 0xf10800f5, - 0x800200f5, - 0xf6018500, - 0x04bd000f, -/* 0x064a: ctx_xfer */ - 0x008000f8, - 0x0ff60281, - 0x8e04bd00, - 0xf0501dc4, - 0xffb201e5, - 0x00008f7e, - 0x7e0711f4, -/* 0x0667: ctx_xfer_not_load */ - 0x7e000624, - 0xbd000216, - 0x47fc8024, - 0x0002f602, - 0x2cf004bd, - 0x0320b601, - 0x024afc80, - 0xbd0002f6, - 0x8e0c0f04, - 0xf0501da8, - 0xffb201e5, - 0x00008f7e, - 0x0003147e, + 0x55f05040, +/* 0x04dd: tpc_strand_init_tpc_loop */ + 0x705eb801, + 0x657e0005, + 0xf6b20000, +/* 0x04ea: tpc_strand_init_idx_loop */ + 0x5eb874bd, + 0xb2000560, + 0x008f7e7f, + 0x885eb800, + 0x2f950005, + 0x008f7e08, + 0x8c5eb800, + 0x2f950005, + 0x008f7e08, + 0x905eb800, + 0x657e0005, + 0xf5b60000, + 0x01f0b606, + 0xbb08f4b6, + 0x3fbb002f, + 0x0170b600, + 0xf40162b6, + 0x50b7bf1b, + 0x42b60800, + 0xa81bf401, 0x608e3f0f, 0xe5f0501d, 0x7effb201, 0x0f00008f, - 0x1d9c8e00, + 0x1da88e0d, 0x01e5f050, 0x8f7effb2, - 0x010f0000, - 0x0003147e, - 0xb601fcf0, - 0xa88e03f0, - 0xe5f0501d, - 0x7effb201, - 0xf000008f, - 0xa5f001ac, - 0x00008b02, - 0x040c9850, - 0xbb0fc4b6, - 0x0c9800bc, - 0x010d9800, - 0x3d7e000e, - 0xacf00001, - 0x40008b01, - 0x040c9850, - 0xbb0fc4b6, - 0x0c9800bc, - 0x020d9801, - 0x4e060f98, - 0x3d7e0800, - 0xacf00001, - 0x04a5f001, - 0x5030008b, - 0xb6040c98, - 0xbcbb0fc4, - 0x020c9800, - 0x98030d98, - 0x004e080f, - 0x013d7e02, - 0x020a7e00, - 0x03147e00, - 0x0601f400, -/* 0x073f: ctx_xfer_post */ - 0x7e1a12f4, - 0x0f000227, - 0x1da88e0d, + 0x147e0000, + 0x00800003, + 0x03f60201, + 0xbd04bd00, + 0x1f29f024, + 0x02300080, + 0xbd0002f6, +/* 0x0571: main */ + 0x0031f404, + 0x0d0028f4, + 0x00377e24, + 0xf401f400, + 0xf404e4b0, + 0x81fe1d18, + 0xbd060201, + 0x0412fd20, + 0xfd01e4b6, + 0x18fe051e, + 0x06447e00, + 0xd40ef400, +/* 0x05a0: main_not_ctx_xfer */ + 0xf010ef94, + 0xf87e01f5, + 0x0ef40002, +/* 0x05ad: ih */ + 0xfe80f9c7, + 0x80f90188, + 0xa0f990f9, + 0xd0f9b0f9, + 0xf0f9e0f9, + 0x004a04bd, + 0x00aacf02, + 0xf404abc4, + 0x240d1f0b, + 0xcf1a004e, + 0x004f00ee, + 0x00ffcf19, + 0x0000047e, + 0x0040010e, + 0x000ef61d, +/* 0x05ea: ih_no_fifo */ + 0x004004bd, + 0x000af601, + 0xf0fc04bd, + 0xd0fce0fc, + 0xa0fcb0fc, + 0x80fc90fc, + 0xfc0088fe, + 0x0032f480, +/* 0x060a: hub_barrier_done */ + 0x010f01f8, + 0xbb040e98, + 0xffb204fe, + 0x4094188e, + 0x00008f7e, +/* 0x061e: ctx_redswitch */ + 0x200f00f8, + 0x01850080, + 0xbd000ff6, +/* 0x062b: ctx_redswitch_delay */ + 0xb6080e04, + 0x1bf401e2, + 0x00f5f1fd, + 0x00f5f108, + 0x85008002, + 0x000ff601, + 0x00f804bd, +/* 0x0644: ctx_xfer */ + 0x02810080, + 0xbd000ff6, + 0x1dc48e04, + 0x01e5f050, + 0x8f7effb2, + 0x11f40000, + 0x061e7e07, +/* 0x0661: ctx_xfer_not_load */ + 0x02167e00, + 0x8024bd00, + 0xf60247fc, + 0x04bd0002, + 0xb6012cf0, + 0xfc800320, + 0x02f6024a, + 0x0f04bd00, + 0x1da88e0c, 0x01e5f050, 0x8f7effb2, 0x147e0000, -/* 0x0756: ctx_xfer_done */ - 0x107e0003, - 0x00f80006, + 0x3f0f0003, + 0x501d608e, + 0xb201e5f0, + 0x008f7eff, + 0x8e000f00, + 0xf0501d9c, + 0xffb201e5, + 0x00008f7e, + 0x147e010f, + 0xfcf00003, + 0x03f0b601, + 0x501da88e, + 0xb201e5f0, + 0x008f7eff, + 0x01acf000, + 0x8b02a5f0, + 0x98500000, + 0xc4b6040c, + 0x00bcbb0f, + 0x98000c98, + 0x000e010d, + 0x00013d7e, + 0x8b01acf0, + 0x98504000, + 0xc4b6040c, + 0x00bcbb0f, + 0x98010c98, + 0x0f98020d, + 0x08004e06, + 0x00013d7e, + 0xf001acf0, + 0x008b04a5, + 0x0c985030, + 0x0fc4b604, + 0x9800bcbb, + 0x0d98020c, + 0x080f9803, + 0x7e02004e, + 0x7e00013d, + 0x7e00020a, + 0xf4000314, + 0x12f40601, +/* 0x0739: ctx_xfer_post */ + 0x02277e1a, + 0x8e0d0f00, + 0xf0501da8, + 0xffb201e5, + 0x00008f7e, + 0x0003147e, +/* 0x0750: ctx_xfer_done */ + 0x00060a7e, + 0x000000f8, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c index 9f5dfc85147a..1f81069edc58 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c @@ -34,6 +34,7 @@ #include <engine/fifo.h> #include <nvif/class.h> +#include <nvif/cl9097.h> #include <nvif/unpack.h> /******************************************************************************* @@ -139,6 +140,12 @@ gf100_gr_zbc_depth_get(struct gf100_gr *gr, int format, /******************************************************************************* * Graphics object classes ******************************************************************************/ +#define gf100_gr_object(p) container_of((p), struct gf100_gr_object, object) + +struct gf100_gr_object { + struct nvkm_object object; + struct gf100_gr_chan *chan; +}; static int gf100_fermi_mthd_zbc_color(struct nvkm_object *object, void *data, u32 size) @@ -147,9 +154,9 @@ gf100_fermi_mthd_zbc_color(struct nvkm_object *object, void *data, u32 size) union { struct fermi_a_zbc_color_v0 v0; } *args = data; - int ret; + int ret = -ENOSYS; - if (nvif_unpack(args->v0, 0, 0, false)) { + if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, false))) { switch (args->v0.format) { case FERMI_A_ZBC_COLOR_V0_FMT_ZERO: case FERMI_A_ZBC_COLOR_V0_FMT_UNORM_ONE: @@ -193,9 +200,9 @@ gf100_fermi_mthd_zbc_depth(struct nvkm_object *object, void *data, u32 size) union { struct fermi_a_zbc_depth_v0 v0; } *args = data; - int ret; + int ret = -ENOSYS; - if (nvif_unpack(args->v0, 0, 0, false)) { + if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, false))) { switch (args->v0.format) { case FERMI_A_ZBC_DEPTH_V0_FMT_FP32: ret = gf100_gr_zbc_depth_get(gr, args->v0.format, @@ -213,6 +220,7 @@ gf100_fermi_mthd_zbc_depth(struct nvkm_object *object, void *data, u32 size) static int gf100_fermi_mthd(struct nvkm_object *object, u32 mthd, void *data, u32 size) { + nvif_ioctl(object, "fermi mthd %08x\n", mthd); switch (mthd) { case FERMI_A_ZBC_COLOR: return gf100_fermi_mthd_zbc_color(object, data, size); @@ -256,6 +264,27 @@ gf100_gr_mthd_sw(struct nvkm_device *device, u16 class, u32 mthd, u32 data) return false; } +static const struct nvkm_object_func +gf100_gr_object_func = { +}; + +static int +gf100_gr_object_new(const struct nvkm_oclass *oclass, void *data, u32 size, + struct nvkm_object **pobject) +{ + struct gf100_gr_chan *chan = gf100_gr_chan(oclass->parent); + struct gf100_gr_object *object; + + if (!(object = kzalloc(sizeof(*object), GFP_KERNEL))) + return -ENOMEM; + *pobject = &object->object; + + nvkm_object_ctor(oclass->base.func ? oclass->base.func : + &gf100_gr_object_func, oclass, &object->object); + object->chan = chan; + return 0; +} + static int gf100_gr_object_get(struct nvkm_gr *base, int index, struct nvkm_sclass *sclass) { @@ -265,6 +294,7 @@ gf100_gr_object_get(struct nvkm_gr *base, int index, struct nvkm_sclass *sclass) while (gr->func->sclass[c].oclass) { if (c++ == index) { *sclass = gr->func->sclass[index]; + sclass->ctor = gf100_gr_object_new; return index; } } @@ -826,7 +856,41 @@ gf100_gr_units(struct nvkm_gr *base) return cfg; } +static const struct nvkm_bitfield gf100_dispatch_error[] = { + { 0x00000001, "INJECTED_BUNDLE_ERROR" }, + { 0x00000002, "CLASS_SUBCH_MISMATCH" }, + { 0x00000004, "SUBCHSW_DURING_NOTIFY" }, + {} +}; + +static const struct nvkm_bitfield gf100_m2mf_error[] = { + { 0x00000001, "PUSH_TOO_MUCH_DATA" }, + { 0x00000002, "PUSH_NOT_ENOUGH_DATA" }, + {} +}; + +static const struct nvkm_bitfield gf100_unk6_error[] = { + { 0x00000001, "TEMP_TOO_SMALL" }, + {} +}; + +static const struct nvkm_bitfield gf100_ccache_error[] = { + { 0x00000001, "INTR" }, + { 0x00000002, "LDCONST_OOB" }, + {} +}; + +static const struct nvkm_bitfield gf100_macro_error[] = { + { 0x00000001, "TOO_FEW_PARAMS" }, + { 0x00000002, "TOO_MANY_PARAMS" }, + { 0x00000004, "ILLEGAL_OPCODE" }, + { 0x00000008, "DOUBLE_BRANCH" }, + { 0x00000010, "WATCHDOG" }, + {} +}; + static const struct nvkm_bitfield gk104_sked_error[] = { + { 0x00000040, "CTA_RESUME" }, { 0x00000080, "CONSTANT_BUFFER_SIZE" }, { 0x00000200, "LOCAL_MEMORY_SIZE_POS" }, { 0x00000400, "LOCAL_MEMORY_SIZE_NEG" }, @@ -836,6 +900,8 @@ static const struct nvkm_bitfield gk104_sked_error[] = { { 0x00040000, "TOTAL_THREADS" }, { 0x00100000, "PROGRAM_OFFSET" }, { 0x00200000, "SHARED_MEMORY_SIZE" }, + { 0x00800000, "CTA_THREAD_DIMENSION_ZERO" }, + { 0x01000000, "MEMORY_WINDOW_OVERLAP" }, { 0x02000000, "SHARED_CONFIG_TOO_SMALL" }, { 0x04000000, "TOTAL_REGISTER_COUNT" }, {} @@ -1005,12 +1071,16 @@ gf100_gr_trap_intr(struct gf100_gr *gr) { struct nvkm_subdev *subdev = &gr->base.engine.subdev; struct nvkm_device *device = subdev->device; + char error[128]; u32 trap = nvkm_rd32(device, 0x400108); int rop, gpc; if (trap & 0x00000001) { u32 stat = nvkm_rd32(device, 0x404000); - nvkm_error(subdev, "DISPATCH %08x\n", stat); + + nvkm_snprintbf(error, sizeof(error), gf100_dispatch_error, + stat & 0x3fffffff); + nvkm_error(subdev, "DISPATCH %08x [%s]\n", stat, error); nvkm_wr32(device, 0x404000, 0xc0000000); nvkm_wr32(device, 0x400108, 0x00000001); trap &= ~0x00000001; @@ -1018,7 +1088,11 @@ gf100_gr_trap_intr(struct gf100_gr *gr) if (trap & 0x00000002) { u32 stat = nvkm_rd32(device, 0x404600); - nvkm_error(subdev, "M2MF %08x\n", stat); + + nvkm_snprintbf(error, sizeof(error), gf100_m2mf_error, + stat & 0x3fffffff); + nvkm_error(subdev, "M2MF %08x [%s]\n", stat, error); + nvkm_wr32(device, 0x404600, 0xc0000000); nvkm_wr32(device, 0x400108, 0x00000002); trap &= ~0x00000002; @@ -1026,7 +1100,10 @@ gf100_gr_trap_intr(struct gf100_gr *gr) if (trap & 0x00000008) { u32 stat = nvkm_rd32(device, 0x408030); - nvkm_error(subdev, "CCACHE %08x\n", stat); + + nvkm_snprintbf(error, sizeof(error), gf100_m2mf_error, + stat & 0x3fffffff); + nvkm_error(subdev, "CCACHE %08x [%s]\n", stat, error); nvkm_wr32(device, 0x408030, 0xc0000000); nvkm_wr32(device, 0x400108, 0x00000008); trap &= ~0x00000008; @@ -1034,7 +1111,8 @@ gf100_gr_trap_intr(struct gf100_gr *gr) if (trap & 0x00000010) { u32 stat = nvkm_rd32(device, 0x405840); - nvkm_error(subdev, "SHADER %08x\n", stat); + nvkm_error(subdev, "SHADER %08x, sph: 0x%06x, stage: 0x%02x\n", + stat, stat & 0xffffff, (stat >> 24) & 0x3f); nvkm_wr32(device, 0x405840, 0xc0000000); nvkm_wr32(device, 0x400108, 0x00000010); trap &= ~0x00000010; @@ -1042,7 +1120,11 @@ gf100_gr_trap_intr(struct gf100_gr *gr) if (trap & 0x00000040) { u32 stat = nvkm_rd32(device, 0x40601c); - nvkm_error(subdev, "UNK6 %08x\n", stat); + + nvkm_snprintbf(error, sizeof(error), gf100_unk6_error, + stat & 0x3fffffff); + nvkm_error(subdev, "UNK6 %08x [%s]\n", stat, error); + nvkm_wr32(device, 0x40601c, 0xc0000000); nvkm_wr32(device, 0x400108, 0x00000040); trap &= ~0x00000040; @@ -1050,7 +1132,16 @@ gf100_gr_trap_intr(struct gf100_gr *gr) if (trap & 0x00000080) { u32 stat = nvkm_rd32(device, 0x404490); - nvkm_error(subdev, "MACRO %08x\n", stat); + u32 pc = nvkm_rd32(device, 0x404494); + u32 op = nvkm_rd32(device, 0x40449c); + + nvkm_snprintbf(error, sizeof(error), gf100_macro_error, + stat & 0x1fffffff); + nvkm_error(subdev, "MACRO %08x [%s], pc: 0x%03x%s, op: 0x%08x\n", + stat, error, pc & 0x7ff, + (pc & 0x10000000) ? "" : " (invalid)", + op); + nvkm_wr32(device, 0x404490, 0xc0000000); nvkm_wr32(device, 0x400108, 0x00000080); trap &= ~0x00000080; @@ -1058,10 +1149,9 @@ gf100_gr_trap_intr(struct gf100_gr *gr) if (trap & 0x00000100) { u32 stat = nvkm_rd32(device, 0x407020) & 0x3fffffff; - char sked[128]; - nvkm_snprintbf(sked, sizeof(sked), gk104_sked_error, stat); - nvkm_error(subdev, "SKED: %08x [%s]\n", stat, sked); + nvkm_snprintbf(error, sizeof(error), gk104_sked_error, stat); + nvkm_error(subdev, "SKED: %08x [%s]\n", stat, error); if (stat) nvkm_wr32(device, 0x407020, 0x40000000); diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/nv40.c b/drivers/gpu/drm/nouveau/nvkm/engine/gr/nv40.c index ffa902ece872..05a895496fc6 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/nv40.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/nv40.c @@ -156,6 +156,7 @@ nv40_gr_chan_new(struct nvkm_gr *base, struct nvkm_fifo_chan *fifoch, return -ENOMEM; nvkm_object_ctor(&nv40_gr_chan, oclass, &chan->object); chan->gr = gr; + chan->fifo = fifoch; *pobject = &chan->object; spin_lock_irqsave(&chan->gr->base.engine.lock, flags); diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/pm/base.c b/drivers/gpu/drm/nouveau/nvkm/engine/pm/base.c index 2721592d3031..f19fabef8d73 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/pm/base.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/pm/base.c @@ -27,6 +27,8 @@ #include <core/option.h> #include <nvif/class.h> +#include <nvif/if0002.h> +#include <nvif/if0003.h> #include <nvif/ioctl.h> #include <nvif/unpack.h> @@ -210,10 +212,10 @@ nvkm_perfdom_init(struct nvkm_perfdom *dom, void *data, u32 size) } *args = data; struct nvkm_object *object = &dom->object; struct nvkm_pm *pm = dom->perfmon->pm; - int ret, i; + int ret = -ENOSYS, i; nvif_ioctl(object, "perfdom init size %d\n", size); - if (nvif_unvers(args->none)) { + if (!(ret = nvif_unvers(ret, &data, &size, args->none))) { nvif_ioctl(object, "perfdom init\n"); } else return ret; @@ -240,10 +242,10 @@ nvkm_perfdom_sample(struct nvkm_perfdom *dom, void *data, u32 size) } *args = data; struct nvkm_object *object = &dom->object; struct nvkm_pm *pm = dom->perfmon->pm; - int ret; + int ret = -ENOSYS; nvif_ioctl(object, "perfdom sample size %d\n", size); - if (nvif_unvers(args->none)) { + if (!(ret = nvif_unvers(ret, &data, &size, args->none))) { nvif_ioctl(object, "perfdom sample\n"); } else return ret; @@ -264,10 +266,10 @@ nvkm_perfdom_read(struct nvkm_perfdom *dom, void *data, u32 size) } *args = data; struct nvkm_object *object = &dom->object; struct nvkm_pm *pm = dom->perfmon->pm; - int ret, i; + int ret = -ENOSYS, i; nvif_ioctl(object, "perfdom read size %d\n", size); - if (nvif_unpack(args->v0, 0, 0, false)) { + if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, false))) { nvif_ioctl(object, "perfdom read vers %d\n", args->v0.version); } else return ret; @@ -374,10 +376,10 @@ nvkm_perfdom_new_(struct nvkm_perfmon *perfmon, struct nvkm_perfctr *ctr[4] = {}; struct nvkm_perfdom *dom; int c, s, m; - int ret; + int ret = -ENOSYS; nvif_ioctl(parent, "create perfdom size %d\n", size); - if (nvif_unpack(args->v0, 0, 0, false)) { + if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, false))) { nvif_ioctl(parent, "create perfdom vers %d dom %d mode %02x\n", args->v0.version, args->v0.domain, args->v0.mode); } else @@ -439,10 +441,10 @@ nvkm_perfmon_mthd_query_domain(struct nvkm_perfmon *perfmon, struct nvkm_pm *pm = perfmon->pm; struct nvkm_perfdom *dom; u8 domain_nr; - int di, ret; + int di, ret = -ENOSYS; nvif_ioctl(object, "perfmon query domain size %d\n", size); - if (nvif_unpack(args->v0, 0, 0, false)) { + if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, false))) { nvif_ioctl(object, "perfmon domain vers %d iter %02x\n", args->v0.version, args->v0.iter); di = (args->v0.iter & 0xff) - 1; @@ -490,10 +492,10 @@ nvkm_perfmon_mthd_query_signal(struct nvkm_perfmon *perfmon, struct nvkm_perfsig *sig; const bool all = nvkm_boolopt(device->cfgopt, "NvPmShowAll", false); const bool raw = nvkm_boolopt(device->cfgopt, "NvPmUnnamed", all); - int ret, si; + int ret = -ENOSYS, si; nvif_ioctl(object, "perfmon query signal size %d\n", size); - if (nvif_unpack(args->v0, 0, 0, false)) { + if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, false))) { nvif_ioctl(object, "perfmon query signal vers %d dom %d iter %04x\n", args->v0.version, args->v0.domain, args->v0.iter); @@ -543,10 +545,10 @@ nvkm_perfmon_mthd_query_source(struct nvkm_perfmon *perfmon, struct nvkm_perfsig *sig; struct nvkm_perfsrc *src; u8 source_nr = 0; - int si, ret; + int si, ret = -ENOSYS; nvif_ioctl(object, "perfmon query source size %d\n", size); - if (nvif_unpack(args->v0, 0, 0, false)) { + if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, false))) { nvif_ioctl(object, "perfmon source vers %d dom %d sig %02x iter %02x\n", args->v0.version, args->v0.domain, args->v0.signal, @@ -612,7 +614,7 @@ nvkm_perfmon_child_get(struct nvkm_object *object, int index, struct nvkm_oclass *oclass) { if (index == 0) { - oclass->base.oclass = NVIF_IOCTL_NEW_V0_PERFDOM; + oclass->base.oclass = NVIF_CLASS_PERFDOM; oclass->base.minver = 0; oclass->base.maxver = 0; oclass->ctor = nvkm_perfmon_child_new; @@ -679,7 +681,7 @@ nvkm_pm_oclass_new(struct nvkm_device *device, const struct nvkm_oclass *oclass, static const struct nvkm_device_oclass nvkm_pm_oclass = { - .base.oclass = NVIF_IOCTL_NEW_V0_PERFMON, + .base.oclass = NVIF_CLASS_PERFMON, .base.minver = -1, .base.maxver = -1, .ctor = nvkm_pm_oclass_new, diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/sw/chan.c b/drivers/gpu/drm/nouveau/nvkm/engine/sw/chan.c index d082f4f73a80..f28967065639 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/sw/chan.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/sw/chan.c @@ -53,9 +53,9 @@ nvkm_sw_chan_event_ctor(struct nvkm_object *object, void *data, u32 size, union { struct nvif_notify_uevent_req none; } *req = data; - int ret; + int ret = -ENOSYS; - if (nvif_unvers(req->none)) { + if (!(ret = nvif_unvers(ret, &data, &size, req->none))) { notify->size = sizeof(struct nvif_notify_uevent_rep); notify->types = 1; notify->index = 0; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/sw/gf100.c b/drivers/gpu/drm/nouveau/nvkm/engine/sw/gf100.c index b01ef7eca906..ea8f4247b628 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/sw/gf100.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/sw/gf100.c @@ -28,8 +28,8 @@ #include <engine/disp.h> #include <engine/fifo.h> +#include <nvif/class.h> #include <nvif/event.h> -#include <nvif/ioctl.h> /******************************************************************************* * software context @@ -143,7 +143,7 @@ static const struct nvkm_sw_func gf100_sw = { .chan_new = gf100_sw_chan_new, .sclass = { - { nvkm_nvsw_new, { -1, -1, NVIF_IOCTL_NEW_V0_SW_GF100 } }, + { nvkm_nvsw_new, { -1, -1, NVIF_CLASS_SW_GF100 } }, {} } }; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/sw/nv04.c b/drivers/gpu/drm/nouveau/nvkm/engine/sw/nv04.c index 445217ffa791..b6675fe1b0ce 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/sw/nv04.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/sw/nv04.c @@ -27,6 +27,7 @@ #include "nvsw.h" #include <nvif/class.h> +#include <nvif/if0004.h> #include <nvif/ioctl.h> #include <nvif/unpack.h> @@ -46,9 +47,9 @@ nv04_nvsw_mthd_get_ref(struct nvkm_nvsw *nvsw, void *data, u32 size) union { struct nv04_nvsw_get_ref_v0 v0; } *args = data; - int ret; + int ret = -ENOSYS; - if (nvif_unpack(args->v0, 0, 0, false)) { + if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, false))) { args->v0.ref = atomic_read(&chan->ref); } @@ -126,7 +127,7 @@ static const struct nvkm_sw_func nv04_sw = { .chan_new = nv04_sw_chan_new, .sclass = { - { nv04_nvsw_new, { -1, -1, NVIF_IOCTL_NEW_V0_SW_NV04 } }, + { nv04_nvsw_new, { -1, -1, NVIF_CLASS_SW_NV04 } }, {} } }; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/sw/nv10.c b/drivers/gpu/drm/nouveau/nvkm/engine/sw/nv10.c index adf70d92b244..09d22fcd194c 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/sw/nv10.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/sw/nv10.c @@ -25,7 +25,7 @@ #include "chan.h" #include "nvsw.h" -#include <nvif/ioctl.h> +#include <nvif/class.h> /******************************************************************************* * software context @@ -56,7 +56,7 @@ static const struct nvkm_sw_func nv10_sw = { .chan_new = nv10_sw_chan_new, .sclass = { - { nvkm_nvsw_new, { -1, -1, NVIF_IOCTL_NEW_V0_SW_NV10 } }, + { nvkm_nvsw_new, { -1, -1, NVIF_CLASS_SW_NV10 } }, {} } }; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/sw/nv50.c b/drivers/gpu/drm/nouveau/nvkm/engine/sw/nv50.c index a381196af69d..01573d187f2c 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/sw/nv50.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/sw/nv50.c @@ -28,8 +28,8 @@ #include <engine/fifo/chan.h> #include <subdev/bar.h> +#include <nvif/class.h> #include <nvif/event.h> -#include <nvif/ioctl.h> /******************************************************************************* * software context @@ -136,7 +136,7 @@ static const struct nvkm_sw_func nv50_sw = { .chan_new = nv50_sw_chan_new, .sclass = { - { nvkm_nvsw_new, { -1, -1, NVIF_IOCTL_NEW_V0_SW_NV50 } }, + { nvkm_nvsw_new, { -1, -1, NVIF_CLASS_SW_NV50 } }, {} } }; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/sw/nvsw.c b/drivers/gpu/drm/nouveau/nvkm/engine/sw/nvsw.c index 66cf986b9572..33dd03fff3c4 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/sw/nvsw.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/sw/nvsw.c @@ -24,7 +24,7 @@ #include "nvsw.h" #include "chan.h" -#include <nvif/class.h> +#include <nvif/if0004.h> static int nvkm_nvsw_mthd_(struct nvkm_object *object, u32 mthd, void *data, u32 size) @@ -41,7 +41,7 @@ nvkm_nvsw_ntfy_(struct nvkm_object *object, u32 mthd, { struct nvkm_nvsw *nvsw = nvkm_nvsw(object); switch (mthd) { - case NVSW_NTFY_UEVENT: + case NV04_NVSW_NTFY_UEVENT: *pevent = &nvsw->chan->event; return 0; default: |