diff options
Diffstat (limited to 'drivers/gpu/drm/radeon')
39 files changed, 301 insertions, 348 deletions
diff --git a/drivers/gpu/drm/radeon/atom.c b/drivers/gpu/drm/radeon/atom.c index f66c33dd21a3..6a2e091aa7b6 100644 --- a/drivers/gpu/drm/radeon/atom.c +++ b/drivers/gpu/drm/radeon/atom.c @@ -170,7 +170,7 @@ static uint32_t atom_iio_execute(struct atom_context *ctx, int base, case ATOM_IIO_END: return temp; default: - printk(KERN_INFO "Unknown IIO opcode.\n"); + pr_info("Unknown IIO opcode\n"); return 0; } } @@ -194,22 +194,19 @@ static uint32_t atom_get_src_int(atom_exec_context *ctx, uint8_t attr, val = gctx->card->reg_read(gctx->card, idx); break; case ATOM_IO_PCI: - printk(KERN_INFO - "PCI registers are not implemented.\n"); + pr_info("PCI registers are not implemented\n"); return 0; case ATOM_IO_SYSIO: - printk(KERN_INFO - "SYSIO registers are not implemented.\n"); + pr_info("SYSIO registers are not implemented\n"); return 0; default: if (!(gctx->io_mode & 0x80)) { - printk(KERN_INFO "Bad IO mode.\n"); + pr_info("Bad IO mode\n"); return 0; } if (!gctx->iio[gctx->io_mode & 0x7F]) { - printk(KERN_INFO - "Undefined indirect IO read method %d.\n", - gctx->io_mode & 0x7F); + pr_info("Undefined indirect IO read method %d\n", + gctx->io_mode & 0x7F); return 0; } val = @@ -473,22 +470,19 @@ static void atom_put_dst(atom_exec_context *ctx, int arg, uint8_t attr, gctx->card->reg_write(gctx->card, idx, val); break; case ATOM_IO_PCI: - printk(KERN_INFO - "PCI registers are not implemented.\n"); + pr_info("PCI registers are not implemented\n"); return; case ATOM_IO_SYSIO: - printk(KERN_INFO - "SYSIO registers are not implemented.\n"); + pr_info("SYSIO registers are not implemented\n"); return; default: if (!(gctx->io_mode & 0x80)) { - printk(KERN_INFO "Bad IO mode.\n"); + pr_info("Bad IO mode\n"); return; } if (!gctx->iio[gctx->io_mode & 0xFF]) { - printk(KERN_INFO - "Undefined indirect IO write method %d.\n", - gctx->io_mode & 0x7F); + pr_info("Undefined indirect IO write method %d\n", + gctx->io_mode & 0x7F); return; } atom_iio_execute(gctx, gctx->iio[gctx->io_mode & 0xFF], @@ -819,17 +813,17 @@ static void atom_op_postcard(atom_exec_context *ctx, int *ptr, int arg) static void atom_op_repeat(atom_exec_context *ctx, int *ptr, int arg) { - printk(KERN_INFO "unimplemented!\n"); + pr_info("unimplemented!\n"); } static void atom_op_restorereg(atom_exec_context *ctx, int *ptr, int arg) { - printk(KERN_INFO "unimplemented!\n"); + pr_info("unimplemented!\n"); } static void atom_op_savereg(atom_exec_context *ctx, int *ptr, int arg) { - printk(KERN_INFO "unimplemented!\n"); + pr_info("unimplemented!\n"); } static void atom_op_setdatablock(atom_exec_context *ctx, int *ptr, int arg) @@ -992,7 +986,7 @@ static void atom_op_switch(atom_exec_context *ctx, int *ptr, int arg) } (*ptr) += 2; } else { - printk(KERN_INFO "Bad case.\n"); + pr_info("Bad case\n"); return; } (*ptr) += 2; @@ -1026,7 +1020,7 @@ static void atom_op_xor(atom_exec_context *ctx, int *ptr, int arg) static void atom_op_debug(atom_exec_context *ctx, int *ptr, int arg) { - printk(KERN_INFO "unimplemented!\n"); + pr_info("unimplemented!\n"); } static struct { @@ -1280,14 +1274,14 @@ struct atom_context *atom_parse(struct card_info *card, void *bios) ctx->bios = bios; if (CU16(0) != ATOM_BIOS_MAGIC) { - printk(KERN_INFO "Invalid BIOS magic.\n"); + pr_info("Invalid BIOS magic\n"); kfree(ctx); return NULL; } if (strncmp (CSTR(ATOM_ATI_MAGIC_PTR), ATOM_ATI_MAGIC, strlen(ATOM_ATI_MAGIC))) { - printk(KERN_INFO "Invalid ATI magic.\n"); + pr_info("Invalid ATI magic\n"); kfree(ctx); return NULL; } @@ -1296,7 +1290,7 @@ struct atom_context *atom_parse(struct card_info *card, void *bios) if (strncmp (CSTR(base + ATOM_ROM_MAGIC_PTR), ATOM_ROM_MAGIC, strlen(ATOM_ROM_MAGIC))) { - printk(KERN_INFO "Invalid ATOM magic.\n"); + pr_info("Invalid ATOM magic\n"); kfree(ctx); return NULL; } @@ -1320,7 +1314,7 @@ struct atom_context *atom_parse(struct card_info *card, void *bios) break; } } - printk(KERN_INFO "ATOM BIOS: %s\n", name); + pr_info("ATOM BIOS: %s\n", name); return ctx; } diff --git a/drivers/gpu/drm/radeon/ci_dpm.c b/drivers/gpu/drm/radeon/ci_dpm.c index 7ba450832e6b..ea36dc4dd5d2 100644 --- a/drivers/gpu/drm/radeon/ci_dpm.c +++ b/drivers/gpu/drm/radeon/ci_dpm.c @@ -776,6 +776,12 @@ bool ci_dpm_vblank_too_short(struct radeon_device *rdev) u32 vblank_time = r600_dpm_get_vblank_time(rdev); u32 switch_limit = pi->mem_gddr5 ? 450 : 300; + /* disable mclk switching if the refresh is >120Hz, even if the + * blanking period would allow it + */ + if (r600_dpm_get_vrefresh(rdev) > 120) + return true; + if (vblank_time < switch_limit) return true; else diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c index f6ff41a0eed6..008c145b7f29 100644 --- a/drivers/gpu/drm/radeon/cik.c +++ b/drivers/gpu/drm/radeon/cik.c @@ -35,6 +35,9 @@ #include "clearstate_ci.h" #include "radeon_kfd.h" +#define SH_MEM_CONFIG_GFX_DEFAULT \ + ALIGNMENT_MODE(SH_MEM_ALIGNMENT_MODE_UNALIGNED) + MODULE_FIRMWARE("radeon/BONAIRE_pfp.bin"); MODULE_FIRMWARE("radeon/BONAIRE_me.bin"); MODULE_FIRMWARE("radeon/BONAIRE_ce.bin"); @@ -2069,8 +2072,7 @@ static int cik_init_microcode(struct radeon_device *rdev) if (err) goto out; if (rdev->pfp_fw->size != pfp_req_size) { - printk(KERN_ERR - "cik_cp: Bogus length %zu in firmware \"%s\"\n", + pr_err("cik_cp: Bogus length %zu in firmware \"%s\"\n", rdev->pfp_fw->size, fw_name); err = -EINVAL; goto out; @@ -2078,8 +2080,7 @@ static int cik_init_microcode(struct radeon_device *rdev) } else { err = radeon_ucode_validate(rdev->pfp_fw); if (err) { - printk(KERN_ERR - "cik_fw: validation failed for firmware \"%s\"\n", + pr_err("cik_fw: validation failed for firmware \"%s\"\n", fw_name); goto out; } else { @@ -2095,16 +2096,14 @@ static int cik_init_microcode(struct radeon_device *rdev) if (err) goto out; if (rdev->me_fw->size != me_req_size) { - printk(KERN_ERR - "cik_cp: Bogus length %zu in firmware \"%s\"\n", + pr_err("cik_cp: Bogus length %zu in firmware \"%s\"\n", rdev->me_fw->size, fw_name); err = -EINVAL; } } else { err = radeon_ucode_validate(rdev->me_fw); if (err) { - printk(KERN_ERR - "cik_fw: validation failed for firmware \"%s\"\n", + pr_err("cik_fw: validation failed for firmware \"%s\"\n", fw_name); goto out; } else { @@ -2120,16 +2119,14 @@ static int cik_init_microcode(struct radeon_device *rdev) if (err) goto out; if (rdev->ce_fw->size != ce_req_size) { - printk(KERN_ERR - "cik_cp: Bogus length %zu in firmware \"%s\"\n", + pr_err("cik_cp: Bogus length %zu in firmware \"%s\"\n", rdev->ce_fw->size, fw_name); err = -EINVAL; } } else { err = radeon_ucode_validate(rdev->ce_fw); if (err) { - printk(KERN_ERR - "cik_fw: validation failed for firmware \"%s\"\n", + pr_err("cik_fw: validation failed for firmware \"%s\"\n", fw_name); goto out; } else { @@ -2145,16 +2142,14 @@ static int cik_init_microcode(struct radeon_device *rdev) if (err) goto out; if (rdev->mec_fw->size != mec_req_size) { - printk(KERN_ERR - "cik_cp: Bogus length %zu in firmware \"%s\"\n", + pr_err("cik_cp: Bogus length %zu in firmware \"%s\"\n", rdev->mec_fw->size, fw_name); err = -EINVAL; } } else { err = radeon_ucode_validate(rdev->mec_fw); if (err) { - printk(KERN_ERR - "cik_fw: validation failed for firmware \"%s\"\n", + pr_err("cik_fw: validation failed for firmware \"%s\"\n", fw_name); goto out; } else { @@ -2185,16 +2180,14 @@ static int cik_init_microcode(struct radeon_device *rdev) if (err) goto out; if (rdev->rlc_fw->size != rlc_req_size) { - printk(KERN_ERR - "cik_rlc: Bogus length %zu in firmware \"%s\"\n", + pr_err("cik_rlc: Bogus length %zu in firmware \"%s\"\n", rdev->rlc_fw->size, fw_name); err = -EINVAL; } } else { err = radeon_ucode_validate(rdev->rlc_fw); if (err) { - printk(KERN_ERR - "cik_fw: validation failed for firmware \"%s\"\n", + pr_err("cik_fw: validation failed for firmware \"%s\"\n", fw_name); goto out; } else { @@ -2210,16 +2203,14 @@ static int cik_init_microcode(struct radeon_device *rdev) if (err) goto out; if (rdev->sdma_fw->size != sdma_req_size) { - printk(KERN_ERR - "cik_sdma: Bogus length %zu in firmware \"%s\"\n", + pr_err("cik_sdma: Bogus length %zu in firmware \"%s\"\n", rdev->sdma_fw->size, fw_name); err = -EINVAL; } } else { err = radeon_ucode_validate(rdev->sdma_fw); if (err) { - printk(KERN_ERR - "cik_fw: validation failed for firmware \"%s\"\n", + pr_err("cik_fw: validation failed for firmware \"%s\"\n", fw_name); goto out; } else { @@ -2242,8 +2233,7 @@ static int cik_init_microcode(struct radeon_device *rdev) } if ((rdev->mc_fw->size != mc_req_size) && (rdev->mc_fw->size != mc2_req_size)){ - printk(KERN_ERR - "cik_mc: Bogus length %zu in firmware \"%s\"\n", + pr_err("cik_mc: Bogus length %zu in firmware \"%s\"\n", rdev->mc_fw->size, fw_name); err = -EINVAL; } @@ -2251,8 +2241,7 @@ static int cik_init_microcode(struct radeon_device *rdev) } else { err = radeon_ucode_validate(rdev->mc_fw); if (err) { - printk(KERN_ERR - "cik_fw: validation failed for firmware \"%s\"\n", + pr_err("cik_fw: validation failed for firmware \"%s\"\n", fw_name); goto out; } else { @@ -2269,23 +2258,20 @@ static int cik_init_microcode(struct radeon_device *rdev) snprintf(fw_name, sizeof(fw_name), "radeon/%s_smc.bin", chip_name); err = request_firmware(&rdev->smc_fw, fw_name, rdev->dev); if (err) { - printk(KERN_ERR - "smc: error loading firmware \"%s\"\n", + pr_err("smc: error loading firmware \"%s\"\n", fw_name); release_firmware(rdev->smc_fw); rdev->smc_fw = NULL; err = 0; } else if (rdev->smc_fw->size != smc_req_size) { - printk(KERN_ERR - "cik_smc: Bogus length %zu in firmware \"%s\"\n", + pr_err("cik_smc: Bogus length %zu in firmware \"%s\"\n", rdev->smc_fw->size, fw_name); err = -EINVAL; } } else { err = radeon_ucode_validate(rdev->smc_fw); if (err) { - printk(KERN_ERR - "cik_fw: validation failed for firmware \"%s\"\n", + pr_err("cik_fw: validation failed for firmware \"%s\"\n", fw_name); goto out; } else { @@ -2297,7 +2283,7 @@ static int cik_init_microcode(struct radeon_device *rdev) if (new_fw == 0) { rdev->new_fw = false; } else if (new_fw < num_fw) { - printk(KERN_ERR "ci_fw: mixing new and old firmware!\n"); + pr_err("ci_fw: mixing new and old firmware!\n"); err = -EINVAL; } else { rdev->new_fw = true; @@ -2306,8 +2292,7 @@ static int cik_init_microcode(struct radeon_device *rdev) out: if (err) { if (err != -EINVAL) - printk(KERN_ERR - "cik_cp: Failed to load firmware \"%s\"\n", + pr_err("cik_cp: Failed to load firmware \"%s\"\n", fw_name); release_firmware(rdev->pfp_fw); rdev->pfp_fw = NULL; @@ -5587,7 +5572,7 @@ static int cik_pcie_gart_enable(struct radeon_device *rdev) for (i = 0; i < 16; i++) { cik_srbm_select(rdev, 0, 0, 0, i); /* CP and shaders */ - WREG32(SH_MEM_CONFIG, 0); + WREG32(SH_MEM_CONFIG, SH_MEM_CONFIG_GFX_DEFAULT); WREG32(SH_MEM_APE1_BASE, 1); WREG32(SH_MEM_APE1_LIMIT, 0); WREG32(SH_MEM_BASES, 0); @@ -5794,7 +5779,7 @@ void cik_vm_flush(struct radeon_device *rdev, struct radeon_ring *ring, radeon_ring_write(ring, 0); radeon_ring_write(ring, 0); /* SH_MEM_BASES */ - radeon_ring_write(ring, 0); /* SH_MEM_CONFIG */ + radeon_ring_write(ring, SH_MEM_CONFIG_GFX_DEFAULT); /* SH_MEM_CONFIG */ radeon_ring_write(ring, 1); /* SH_MEM_APE1_BASE */ radeon_ring_write(ring, 0); /* SH_MEM_APE1_LIMIT */ @@ -7416,7 +7401,7 @@ static inline void cik_irq_ack(struct radeon_device *rdev) WREG32(DC_HPD5_INT_CONTROL, tmp); } if (rdev->irq.stat_regs.cik.disp_int_cont5 & DC_HPD6_INTERRUPT) { - tmp = RREG32(DC_HPD5_INT_CONTROL); + tmp = RREG32(DC_HPD6_INT_CONTROL); tmp |= DC_HPDx_INT_ACK; WREG32(DC_HPD6_INT_CONTROL, tmp); } @@ -7446,7 +7431,7 @@ static inline void cik_irq_ack(struct radeon_device *rdev) WREG32(DC_HPD5_INT_CONTROL, tmp); } if (rdev->irq.stat_regs.cik.disp_int_cont5 & DC_HPD6_RX_INTERRUPT) { - tmp = RREG32(DC_HPD5_INT_CONTROL); + tmp = RREG32(DC_HPD6_INT_CONTROL); tmp |= DC_HPDx_RX_INT_ACK; WREG32(DC_HPD6_INT_CONTROL, tmp); } @@ -9165,23 +9150,10 @@ static u32 dce8_latency_watermark(struct dce8_wm_params *wm) a.full = dfixed_const(available_bandwidth); b.full = dfixed_const(wm->num_heads); a.full = dfixed_div(a, b); + tmp = div_u64((u64) dmif_size * (u64) wm->disp_clk, mc_latency + 512); + tmp = min(dfixed_trunc(a), tmp); - b.full = dfixed_const(mc_latency + 512); - c.full = dfixed_const(wm->disp_clk); - b.full = dfixed_div(b, c); - - c.full = dfixed_const(dmif_size); - b.full = dfixed_div(c, b); - - tmp = min(dfixed_trunc(a), dfixed_trunc(b)); - - b.full = dfixed_const(1000); - c.full = dfixed_const(wm->disp_clk); - b.full = dfixed_div(c, b); - c.full = dfixed_const(wm->bytes_per_pixel); - b.full = dfixed_mul(b, c); - - lb_fill_bw = min(tmp, dfixed_trunc(b)); + lb_fill_bw = min(tmp, wm->disp_clk * wm->bytes_per_pixel / 1000); a.full = dfixed_const(max_src_lines_per_dst_line * wm->src_width * wm->bytes_per_pixel); b.full = dfixed_const(1000); @@ -9289,14 +9261,14 @@ static void dce8_program_watermarks(struct radeon_device *rdev, { struct drm_display_mode *mode = &radeon_crtc->base.mode; struct dce8_wm_params wm_low, wm_high; - u32 pixel_period; + u32 active_time; u32 line_time = 0; u32 latency_watermark_a = 0, latency_watermark_b = 0; u32 tmp, wm_mask; if (radeon_crtc->base.enabled && num_heads && mode) { - pixel_period = 1000000 / (u32)mode->clock; - line_time = min((u32)mode->crtc_htotal * pixel_period, (u32)65535); + active_time = 1000000UL * (u32)mode->crtc_hdisplay / (u32)mode->clock; + line_time = min((u32) (1000000UL * (u32)mode->crtc_htotal / (u32)mode->clock), (u32)65535); /* watermark for high clocks */ if ((rdev->pm.pm_method == PM_METHOD_DPM) && @@ -9312,7 +9284,7 @@ static void dce8_program_watermarks(struct radeon_device *rdev, wm_high.disp_clk = mode->clock; wm_high.src_width = mode->crtc_hdisplay; - wm_high.active_time = mode->crtc_hdisplay * pixel_period; + wm_high.active_time = active_time; wm_high.blank_time = line_time - wm_high.active_time; wm_high.interlaced = false; if (mode->flags & DRM_MODE_FLAG_INTERLACE) @@ -9352,7 +9324,7 @@ static void dce8_program_watermarks(struct radeon_device *rdev, wm_low.disp_clk = mode->clock; wm_low.src_width = mode->crtc_hdisplay; - wm_low.active_time = mode->crtc_hdisplay * pixel_period; + wm_low.active_time = active_time; wm_low.blank_time = line_time - wm_low.active_time; wm_low.interlaced = false; if (mode->flags & DRM_MODE_FLAG_INTERLACE) diff --git a/drivers/gpu/drm/radeon/cikd.h b/drivers/gpu/drm/radeon/cikd.h index 48db93577c1d..e21015475ed5 100644 --- a/drivers/gpu/drm/radeon/cikd.h +++ b/drivers/gpu/drm/radeon/cikd.h @@ -2016,7 +2016,7 @@ # define SDMA_COPY_SUB_OPCODE_T2T_SUB_WINDOW 6 #define SDMA_OPCODE_WRITE 2 # define SDMA_WRITE_SUB_OPCODE_LINEAR 0 -# define SDMA_WRTIE_SUB_OPCODE_TILED 1 +# define SDMA_WRITE_SUB_OPCODE_TILED 1 #define SDMA_OPCODE_INDIRECT_BUFFER 4 #define SDMA_OPCODE_FENCE 5 #define SDMA_OPCODE_TRAP 6 diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c index 0b6b5766216f..0bf103536404 100644 --- a/drivers/gpu/drm/radeon/evergreen.c +++ b/drivers/gpu/drm/radeon/evergreen.c @@ -2188,13 +2188,7 @@ static u32 evergreen_latency_watermark(struct evergreen_wm_params *wm) b.full = dfixed_const(wm->num_heads); a.full = dfixed_div(a, b); - b.full = dfixed_const(1000); - c.full = dfixed_const(wm->disp_clk); - b.full = dfixed_div(c, b); - c.full = dfixed_const(wm->bytes_per_pixel); - b.full = dfixed_mul(b, c); - - lb_fill_bw = min(dfixed_trunc(a), dfixed_trunc(b)); + lb_fill_bw = min(dfixed_trunc(a), wm->disp_clk * wm->bytes_per_pixel / 1000); a.full = dfixed_const(max_src_lines_per_dst_line * wm->src_width * wm->bytes_per_pixel); b.full = dfixed_const(1000); @@ -2261,7 +2255,7 @@ static void evergreen_program_watermarks(struct radeon_device *rdev, struct drm_display_mode *mode = &radeon_crtc->base.mode; struct evergreen_wm_params wm_low, wm_high; u32 dram_channels; - u32 pixel_period; + u32 active_time; u32 line_time = 0; u32 latency_watermark_a = 0, latency_watermark_b = 0; u32 priority_a_mark = 0, priority_b_mark = 0; @@ -2272,8 +2266,8 @@ static void evergreen_program_watermarks(struct radeon_device *rdev, fixed20_12 a, b, c; if (radeon_crtc->base.enabled && num_heads && mode) { - pixel_period = 1000000 / (u32)mode->clock; - line_time = min((u32)mode->crtc_htotal * pixel_period, (u32)65535); + active_time = 1000000UL * (u32)mode->crtc_hdisplay / (u32)mode->clock; + line_time = min((u32) (1000000UL * (u32)mode->crtc_htotal / (u32)mode->clock), (u32)65535); priority_a_cnt = 0; priority_b_cnt = 0; dram_channels = evergreen_get_number_of_dram_channels(rdev); @@ -2291,7 +2285,7 @@ static void evergreen_program_watermarks(struct radeon_device *rdev, wm_high.disp_clk = mode->clock; wm_high.src_width = mode->crtc_hdisplay; - wm_high.active_time = mode->crtc_hdisplay * pixel_period; + wm_high.active_time = active_time; wm_high.blank_time = line_time - wm_high.active_time; wm_high.interlaced = false; if (mode->flags & DRM_MODE_FLAG_INTERLACE) @@ -2318,7 +2312,7 @@ static void evergreen_program_watermarks(struct radeon_device *rdev, wm_low.disp_clk = mode->clock; wm_low.src_width = mode->crtc_hdisplay; - wm_low.active_time = mode->crtc_hdisplay * pixel_period; + wm_low.active_time = active_time; wm_low.blank_time = line_time - wm_low.active_time; wm_low.interlaced = false; if (mode->flags & DRM_MODE_FLAG_INTERLACE) @@ -2486,7 +2480,7 @@ void evergreen_pcie_gart_tlb_flush(struct radeon_device *rdev) tmp = RREG32(VM_CONTEXT0_REQUEST_RESPONSE); tmp = (tmp & RESPONSE_TYPE_MASK) >> RESPONSE_TYPE_SHIFT; if (tmp == 2) { - printk(KERN_WARNING "[drm] r600 flush TLB failed\n"); + pr_warn("[drm] r600 flush TLB failed\n"); return; } if (tmp) { @@ -4933,7 +4927,7 @@ static void evergreen_irq_ack(struct radeon_device *rdev) WREG32(DC_HPD5_INT_CONTROL, tmp); } if (rdev->irq.stat_regs.evergreen.disp_int_cont5 & DC_HPD6_INTERRUPT) { - tmp = RREG32(DC_HPD5_INT_CONTROL); + tmp = RREG32(DC_HPD6_INT_CONTROL); tmp |= DC_HPDx_INT_ACK; WREG32(DC_HPD6_INT_CONTROL, tmp); } @@ -4964,7 +4958,7 @@ static void evergreen_irq_ack(struct radeon_device *rdev) WREG32(DC_HPD5_INT_CONTROL, tmp); } if (rdev->irq.stat_regs.evergreen.disp_int_cont5 & DC_HPD6_RX_INTERRUPT) { - tmp = RREG32(DC_HPD5_INT_CONTROL); + tmp = RREG32(DC_HPD6_INT_CONTROL); tmp |= DC_HPDx_RX_INT_ACK; WREG32(DC_HPD6_INT_CONTROL, tmp); } diff --git a/drivers/gpu/drm/radeon/evergreen_cs.c b/drivers/gpu/drm/radeon/evergreen_cs.c index f8b05090232a..54324330b91f 100644 --- a/drivers/gpu/drm/radeon/evergreen_cs.c +++ b/drivers/gpu/drm/radeon/evergreen_cs.c @@ -1061,8 +1061,7 @@ static int evergreen_packet0_check(struct radeon_cs_parser *p, } break; default: - printk(KERN_ERR "Forbidden register 0x%04X in cs at %d\n", - reg, idx); + pr_err("Forbidden register 0x%04X in cs at %d\n", reg, idx); return -EINVAL; } return 0; @@ -2776,7 +2775,7 @@ int evergreen_cs_parse(struct radeon_cs_parser *p) } while (p->idx < p->chunk_ib->length_dw); #if 0 for (r = 0; r < p->ib.length_dw; r++) { - printk(KERN_INFO "%05d 0x%08X\n", r, p->ib.ptr[r]); + pr_info("%05d 0x%08X\n", r, p->ib.ptr[r]); mdelay(1); } #endif @@ -3215,7 +3214,7 @@ int evergreen_dma_cs_parse(struct radeon_cs_parser *p) } while (p->idx < p->chunk_ib->length_dw); #if 0 for (r = 0; r < p->ib->length_dw; r++) { - printk(KERN_INFO "%05d 0x%08X\n", r, p->ib.ptr[r]); + pr_info("%05d 0x%08X\n", r, p->ib.ptr[r]); mdelay(1); } #endif diff --git a/drivers/gpu/drm/radeon/ni.c b/drivers/gpu/drm/radeon/ni.c index a0d4a0522fdc..9eccd0c81d88 100644 --- a/drivers/gpu/drm/radeon/ni.c +++ b/drivers/gpu/drm/radeon/ni.c @@ -774,8 +774,7 @@ int ni_init_microcode(struct radeon_device *rdev) if (err) goto out; if (rdev->pfp_fw->size != pfp_req_size) { - printk(KERN_ERR - "ni_cp: Bogus length %zu in firmware \"%s\"\n", + pr_err("ni_cp: Bogus length %zu in firmware \"%s\"\n", rdev->pfp_fw->size, fw_name); err = -EINVAL; goto out; @@ -786,8 +785,7 @@ int ni_init_microcode(struct radeon_device *rdev) if (err) goto out; if (rdev->me_fw->size != me_req_size) { - printk(KERN_ERR - "ni_cp: Bogus length %zu in firmware \"%s\"\n", + pr_err("ni_cp: Bogus length %zu in firmware \"%s\"\n", rdev->me_fw->size, fw_name); err = -EINVAL; } @@ -797,8 +795,7 @@ int ni_init_microcode(struct radeon_device *rdev) if (err) goto out; if (rdev->rlc_fw->size != rlc_req_size) { - printk(KERN_ERR - "ni_rlc: Bogus length %zu in firmware \"%s\"\n", + pr_err("ni_rlc: Bogus length %zu in firmware \"%s\"\n", rdev->rlc_fw->size, fw_name); err = -EINVAL; } @@ -810,8 +807,7 @@ int ni_init_microcode(struct radeon_device *rdev) if (err) goto out; if (rdev->mc_fw->size != mc_req_size) { - printk(KERN_ERR - "ni_mc: Bogus length %zu in firmware \"%s\"\n", + pr_err("ni_mc: Bogus length %zu in firmware \"%s\"\n", rdev->mc_fw->size, fw_name); err = -EINVAL; } @@ -821,15 +817,12 @@ int ni_init_microcode(struct radeon_device *rdev) snprintf(fw_name, sizeof(fw_name), "radeon/%s_smc.bin", chip_name); err = request_firmware(&rdev->smc_fw, fw_name, rdev->dev); if (err) { - printk(KERN_ERR - "smc: error loading firmware \"%s\"\n", - fw_name); + pr_err("smc: error loading firmware \"%s\"\n", fw_name); release_firmware(rdev->smc_fw); rdev->smc_fw = NULL; err = 0; } else if (rdev->smc_fw->size != smc_req_size) { - printk(KERN_ERR - "ni_mc: Bogus length %zu in firmware \"%s\"\n", + pr_err("ni_mc: Bogus length %zu in firmware \"%s\"\n", rdev->mc_fw->size, fw_name); err = -EINVAL; } @@ -838,8 +831,7 @@ int ni_init_microcode(struct radeon_device *rdev) out: if (err) { if (err != -EINVAL) - printk(KERN_ERR - "ni_cp: Failed to load firmware \"%s\"\n", + pr_err("ni_cp: Failed to load firmware \"%s\"\n", fw_name); release_firmware(rdev->pfp_fw); rdev->pfp_fw = NULL; diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c index e3399310d41d..c31e660e35db 100644 --- a/drivers/gpu/drm/radeon/r100.c +++ b/drivers/gpu/drm/radeon/r100.c @@ -1042,11 +1042,9 @@ static int r100_cp_init_microcode(struct radeon_device *rdev) err = request_firmware(&rdev->me_fw, fw_name, rdev->dev); if (err) { - printk(KERN_ERR "radeon_cp: Failed to load firmware \"%s\"\n", - fw_name); + pr_err("radeon_cp: Failed to load firmware \"%s\"\n", fw_name); } else if (rdev->me_fw->size % 8) { - printk(KERN_ERR - "radeon_cp: Bogus length %zu in firmware \"%s\"\n", + pr_err("radeon_cp: Bogus length %zu in firmware \"%s\"\n", rdev->me_fw->size, fw_name); err = -EINVAL; release_firmware(rdev->me_fw); @@ -1087,8 +1085,7 @@ static void r100_cp_load_microcode(struct radeon_device *rdev) int i, size; if (r100_gui_wait_for_idle(rdev)) { - printk(KERN_WARNING "Failed to wait GUI idle while " - "programming pipes. Bad things might happen.\n"); + pr_warn("Failed to wait GUI idle while programming pipes. Bad things might happen.\n"); } if (rdev->me_fw) { @@ -1246,8 +1243,7 @@ void r100_cp_disable(struct radeon_device *rdev) WREG32(RADEON_CP_CSQ_CNTL, 0); WREG32(R_000770_SCRATCH_UMSK, 0); if (r100_gui_wait_for_idle(rdev)) { - printk(KERN_WARNING "Failed to wait GUI idle while " - "programming pipes. Bad things might happen.\n"); + pr_warn("Failed to wait GUI idle while programming pipes. Bad things might happen.\n"); } } @@ -1881,8 +1877,7 @@ static int r100_packet0_check(struct radeon_cs_parser *p, track->tex_dirty = true; break; default: - printk(KERN_ERR "Forbidden register 0x%04X in cs at %d\n", - reg, idx); + pr_err("Forbidden register 0x%04X in cs at %d\n", reg, idx); return -EINVAL; } return 0; @@ -2486,8 +2481,7 @@ int r100_gui_wait_for_idle(struct radeon_device *rdev) uint32_t tmp; if (r100_rbbm_fifo_wait_for_entry(rdev, 64)) { - printk(KERN_WARNING "radeon: wait for empty RBBM fifo failed !" - " Bad things might happen.\n"); + pr_warn("radeon: wait for empty RBBM fifo failed! Bad things might happen.\n"); } for (i = 0; i < rdev->usec_timeout; i++) { tmp = RREG32(RADEON_RBBM_STATUS); @@ -3301,7 +3295,7 @@ void r100_bandwidth_update(struct radeon_device *rdev) mem_trp = ((temp >> 8) & 0x7) + 1; mem_tras = ((temp >> 11) & 0xf) + 4; } else if (rdev->family == CHIP_RV350 || - rdev->family <= CHIP_RV380) { + rdev->family == CHIP_RV380) { /* rv3x0 */ mem_trcd = (temp & 0x7) + 3; mem_trp = ((temp >> 8) & 0x7) + 3; diff --git a/drivers/gpu/drm/radeon/r200.c b/drivers/gpu/drm/radeon/r200.c index c70e6d5bcd19..c22321cc5a41 100644 --- a/drivers/gpu/drm/radeon/r200.c +++ b/drivers/gpu/drm/radeon/r200.c @@ -537,8 +537,7 @@ int r200_packet0_check(struct radeon_cs_parser *p, track->tex_dirty = true; break; default: - printk(KERN_ERR "Forbidden register 0x%04X in cs at %d\n", - reg, idx); + pr_err("Forbidden register 0x%04X in cs at %d\n", reg, idx); return -EINVAL; } return 0; diff --git a/drivers/gpu/drm/radeon/r300.c b/drivers/gpu/drm/radeon/r300.c index 7e417d8dc733..21161aa8acbf 100644 --- a/drivers/gpu/drm/radeon/r300.c +++ b/drivers/gpu/drm/radeon/r300.c @@ -387,8 +387,7 @@ static void r300_gpu_init(struct radeon_device *rdev) WREG32(R300_GB_TILE_CONFIG, gb_tile_config); if (r100_gui_wait_for_idle(rdev)) { - printk(KERN_WARNING "Failed to wait GUI idle while " - "programming pipes. Bad things might happen.\n"); + pr_warn("Failed to wait GUI idle while programming pipes. Bad things might happen.\n"); } tmp = RREG32(R300_DST_PIPE_CONFIG); @@ -399,14 +398,12 @@ static void r300_gpu_init(struct radeon_device *rdev) R300_DC_DC_DISABLE_IGNORE_PE); if (r100_gui_wait_for_idle(rdev)) { - printk(KERN_WARNING "Failed to wait GUI idle while " - "programming pipes. Bad things might happen.\n"); + pr_warn("Failed to wait GUI idle while programming pipes. Bad things might happen.\n"); } if (r300_mc_wait_for_idle(rdev)) { - printk(KERN_WARNING "Failed to wait MC idle while " - "programming pipes. Bad things might happen.\n"); + pr_warn("Failed to wait MC idle while programming pipes. Bad things might happen.\n"); } - DRM_INFO("radeon: %d quad pipes, %d Z pipes initialized.\n", + DRM_INFO("radeon: %d quad pipes, %d Z pipes initialized\n", rdev->num_gb_pipes, rdev->num_z_pipes); } @@ -1165,7 +1162,7 @@ static int r300_packet0_check(struct radeon_cs_parser *p, } return 0; fail: - printk(KERN_ERR "Forbidden register 0x%04X in cs at %d (val=%08x)\n", + pr_err("Forbidden register 0x%04X in cs at %d (val=%08x)\n", reg, idx, idx_value); return -EINVAL; } diff --git a/drivers/gpu/drm/radeon/r420.c b/drivers/gpu/drm/radeon/r420.c index 2828605aef3f..45e1d4e60759 100644 --- a/drivers/gpu/drm/radeon/r420.c +++ b/drivers/gpu/drm/radeon/r420.c @@ -92,8 +92,7 @@ void r420_pipes_init(struct radeon_device *rdev) (1 << 2) | (1 << 3)); /* add idle wait as per freedesktop.org bug 24041 */ if (r100_gui_wait_for_idle(rdev)) { - printk(KERN_WARNING "Failed to wait GUI idle while " - "programming pipes. Bad things might happen.\n"); + pr_warn("Failed to wait GUI idle while programming pipes. Bad things might happen.\n"); } /* get max number of pipes */ gb_pipe_select = RREG32(R400_GB_PIPE_SELECT); @@ -128,8 +127,7 @@ void r420_pipes_init(struct radeon_device *rdev) tmp |= R300_TILE_SIZE_16 | R300_ENABLE_TILING; WREG32(R300_GB_TILE_CONFIG, tmp); if (r100_gui_wait_for_idle(rdev)) { - printk(KERN_WARNING "Failed to wait GUI idle while " - "programming pipes. Bad things might happen.\n"); + pr_warn("Failed to wait GUI idle while programming pipes. Bad things might happen.\n"); } tmp = RREG32(R300_DST_PIPE_CONFIG); @@ -141,8 +139,7 @@ void r420_pipes_init(struct radeon_device *rdev) R300_DC_DC_DISABLE_IGNORE_PE); if (r100_gui_wait_for_idle(rdev)) { - printk(KERN_WARNING "Failed to wait GUI idle while " - "programming pipes. Bad things might happen.\n"); + pr_warn("Failed to wait GUI idle while programming pipes. Bad things might happen.\n"); } if (rdev->family == CHIP_RV530) { @@ -206,6 +203,7 @@ static void r420_clock_resume(struct radeon_device *rdev) static void r420_cp_errata_init(struct radeon_device *rdev) { + int r; struct radeon_ring *ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]; /* RV410 and R420 can lock up if CP DMA to host memory happens @@ -215,7 +213,8 @@ static void r420_cp_errata_init(struct radeon_device *rdev) * of the CP init, apparently. */ radeon_scratch_get(rdev, &rdev->config.r300.resync_scratch); - radeon_ring_lock(rdev, ring, 8); + r = radeon_ring_lock(rdev, ring, 8); + WARN_ON(r); radeon_ring_write(ring, PACKET0(R300_CP_RESYNC_ADDR, 1)); radeon_ring_write(ring, rdev->config.r300.resync_scratch); radeon_ring_write(ring, 0xDEADBEEF); @@ -224,12 +223,14 @@ static void r420_cp_errata_init(struct radeon_device *rdev) static void r420_cp_errata_fini(struct radeon_device *rdev) { + int r; struct radeon_ring *ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]; /* Catch the RESYNC we dispatched all the way back, * at the very beginning of the CP init. */ - radeon_ring_lock(rdev, ring, 8); + r = radeon_ring_lock(rdev, ring, 8); + WARN_ON(r); radeon_ring_write(ring, PACKET0(R300_RB3D_DSTCACHE_CTLSTAT, 0)); radeon_ring_write(ring, R300_RB3D_DC_FINISH); radeon_ring_unlock_commit(rdev, ring, false); diff --git a/drivers/gpu/drm/radeon/r520.c b/drivers/gpu/drm/radeon/r520.c index 98d6053c36c6..074cf752faef 100644 --- a/drivers/gpu/drm/radeon/r520.c +++ b/drivers/gpu/drm/radeon/r520.c @@ -86,8 +86,7 @@ static void r520_gpu_init(struct radeon_device *rdev) (((gb_pipe_select >> 8) & 0xF) << 4); WREG32_PLL(0x000D, tmp); if (r520_mc_wait_for_idle(rdev)) { - printk(KERN_WARNING "Failed to wait MC idle while " - "programming pipes. Bad things might happen.\n"); + pr_warn("Failed to wait MC idle while programming pipes. Bad things might happen.\n"); } } diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c index a951881c2a50..e06e2d8feab3 100644 --- a/drivers/gpu/drm/radeon/r600.c +++ b/drivers/gpu/drm/radeon/r600.c @@ -1094,7 +1094,7 @@ void r600_pcie_gart_tlb_flush(struct radeon_device *rdev) tmp = RREG32(VM_CONTEXT0_REQUEST_RESPONSE); tmp = (tmp & RESPONSE_TYPE_MASK) >> RESPONSE_TYPE_SHIFT; if (tmp == 2) { - printk(KERN_WARNING "[drm] r600 flush TLB failed\n"); + pr_warn("[drm] r600 flush TLB failed\n"); return; } if (tmp) { @@ -2550,8 +2550,7 @@ int r600_init_microcode(struct radeon_device *rdev) if (err) goto out; if (rdev->pfp_fw->size != pfp_req_size) { - printk(KERN_ERR - "r600_cp: Bogus length %zu in firmware \"%s\"\n", + pr_err("r600_cp: Bogus length %zu in firmware \"%s\"\n", rdev->pfp_fw->size, fw_name); err = -EINVAL; goto out; @@ -2562,8 +2561,7 @@ int r600_init_microcode(struct radeon_device *rdev) if (err) goto out; if (rdev->me_fw->size != me_req_size) { - printk(KERN_ERR - "r600_cp: Bogus length %zu in firmware \"%s\"\n", + pr_err("r600_cp: Bogus length %zu in firmware \"%s\"\n", rdev->me_fw->size, fw_name); err = -EINVAL; } @@ -2573,8 +2571,7 @@ int r600_init_microcode(struct radeon_device *rdev) if (err) goto out; if (rdev->rlc_fw->size != rlc_req_size) { - printk(KERN_ERR - "r600_rlc: Bogus length %zu in firmware \"%s\"\n", + pr_err("r600_rlc: Bogus length %zu in firmware \"%s\"\n", rdev->rlc_fw->size, fw_name); err = -EINVAL; } @@ -2583,15 +2580,12 @@ int r600_init_microcode(struct radeon_device *rdev) snprintf(fw_name, sizeof(fw_name), "radeon/%s_smc.bin", smc_chip_name); err = request_firmware(&rdev->smc_fw, fw_name, rdev->dev); if (err) { - printk(KERN_ERR - "smc: error loading firmware \"%s\"\n", - fw_name); + pr_err("smc: error loading firmware \"%s\"\n", fw_name); release_firmware(rdev->smc_fw); rdev->smc_fw = NULL; err = 0; } else if (rdev->smc_fw->size != smc_req_size) { - printk(KERN_ERR - "smc: Bogus length %zu in firmware \"%s\"\n", + pr_err("smc: Bogus length %zu in firmware \"%s\"\n", rdev->smc_fw->size, fw_name); err = -EINVAL; } @@ -2600,8 +2594,7 @@ int r600_init_microcode(struct radeon_device *rdev) out: if (err) { if (err != -EINVAL) - printk(KERN_ERR - "r600_cp: Failed to load firmware \"%s\"\n", + pr_err("r600_cp: Failed to load firmware \"%s\"\n", fw_name); release_firmware(rdev->pfp_fw); rdev->pfp_fw = NULL; @@ -3995,7 +3988,7 @@ static void r600_irq_ack(struct radeon_device *rdev) WREG32(DC_HPD5_INT_CONTROL, tmp); } if (rdev->irq.stat_regs.r600.disp_int_cont2 & DC_HPD6_INTERRUPT) { - tmp = RREG32(DC_HPD5_INT_CONTROL); + tmp = RREG32(DC_HPD6_INT_CONTROL); tmp |= DC_HPDx_INT_ACK; WREG32(DC_HPD6_INT_CONTROL, tmp); } diff --git a/drivers/gpu/drm/radeon/r600_cs.c b/drivers/gpu/drm/radeon/r600_cs.c index 595a19736458..97fd58e97043 100644 --- a/drivers/gpu/drm/radeon/r600_cs.c +++ b/drivers/gpu/drm/radeon/r600_cs.c @@ -932,8 +932,7 @@ static int r600_packet0_check(struct radeon_cs_parser *p, } break; default: - printk(KERN_ERR "Forbidden register 0x%04X in cs at %d\n", - reg, idx); + pr_err("Forbidden register 0x%04X in cs at %d\n", reg, idx); return -EINVAL; } return 0; @@ -2320,7 +2319,7 @@ int r600_cs_parse(struct radeon_cs_parser *p) } while (p->idx < p->chunk_ib->length_dw); #if 0 for (r = 0; r < p->ib.length_dw; r++) { - printk(KERN_INFO "%05d 0x%08X\n", r, p->ib.ptr[r]); + pr_info("%05d 0x%08X\n", r, p->ib.ptr[r]); mdelay(1); } #endif @@ -2528,7 +2527,7 @@ int r600_dma_cs_parse(struct radeon_cs_parser *p) } while (p->idx < p->chunk_ib->length_dw); #if 0 for (r = 0; r < p->ib->length_dw; r++) { - printk(KERN_INFO "%05d 0x%08X\n", r, p->ib.ptr[r]); + pr_info("%05d 0x%08X\n", r, p->ib.ptr[r]); mdelay(1); } #endif diff --git a/drivers/gpu/drm/radeon/r600_dpm.c b/drivers/gpu/drm/radeon/r600_dpm.c index 5a26eb4545aa..c7fc1dbfd192 100644 --- a/drivers/gpu/drm/radeon/r600_dpm.c +++ b/drivers/gpu/drm/radeon/r600_dpm.c @@ -69,86 +69,89 @@ const u32 r600_dtc[R600_PM_NUMBER_OF_TC] = void r600_dpm_print_class_info(u32 class, u32 class2) { - printk("\tui class: "); + const char *s; + switch (class & ATOM_PPLIB_CLASSIFICATION_UI_MASK) { case ATOM_PPLIB_CLASSIFICATION_UI_NONE: default: - printk("none\n"); + s = "none"; break; case ATOM_PPLIB_CLASSIFICATION_UI_BATTERY: - printk("battery\n"); + s = "battery"; break; case ATOM_PPLIB_CLASSIFICATION_UI_BALANCED: - printk("balanced\n"); + s = "balanced"; break; case ATOM_PPLIB_CLASSIFICATION_UI_PERFORMANCE: - printk("performance\n"); + s = "performance"; break; } - printk("\tinternal class: "); + printk("\tui class: %s\n", s); + + printk("\tinternal class:"); if (((class & ~ATOM_PPLIB_CLASSIFICATION_UI_MASK) == 0) && (class2 == 0)) - printk("none"); + pr_cont(" none"); else { if (class & ATOM_PPLIB_CLASSIFICATION_BOOT) - printk("boot "); + pr_cont(" boot"); if (class & ATOM_PPLIB_CLASSIFICATION_THERMAL) - printk("thermal "); + pr_cont(" thermal"); if (class & ATOM_PPLIB_CLASSIFICATION_LIMITEDPOWERSOURCE) - printk("limited_pwr "); + pr_cont(" limited_pwr"); if (class & ATOM_PPLIB_CLASSIFICATION_REST) - printk("rest "); + pr_cont(" rest"); if (class & ATOM_PPLIB_CLASSIFICATION_FORCED) - printk("forced "); + pr_cont(" forced"); if (class & ATOM_PPLIB_CLASSIFICATION_3DPERFORMANCE) - printk("3d_perf "); + pr_cont(" 3d_perf"); if (class & ATOM_PPLIB_CLASSIFICATION_OVERDRIVETEMPLATE) - printk("ovrdrv "); + pr_cont(" ovrdrv"); if (class & ATOM_PPLIB_CLASSIFICATION_UVDSTATE) - printk("uvd "); + pr_cont(" uvd"); if (class & ATOM_PPLIB_CLASSIFICATION_3DLOW) - printk("3d_low "); + pr_cont(" 3d_low"); if (class & ATOM_PPLIB_CLASSIFICATION_ACPI) - printk("acpi "); + pr_cont(" acpi"); if (class & ATOM_PPLIB_CLASSIFICATION_HD2STATE) - printk("uvd_hd2 "); + pr_cont(" uvd_hd2"); if (class & ATOM_PPLIB_CLASSIFICATION_HDSTATE) - printk("uvd_hd "); + pr_cont(" uvd_hd"); if (class & ATOM_PPLIB_CLASSIFICATION_SDSTATE) - printk("uvd_sd "); + pr_cont(" uvd_sd"); if (class2 & ATOM_PPLIB_CLASSIFICATION2_LIMITEDPOWERSOURCE_2) - printk("limited_pwr2 "); + pr_cont(" limited_pwr2"); if (class2 & ATOM_PPLIB_CLASSIFICATION2_ULV) - printk("ulv "); + pr_cont(" ulv"); if (class2 & ATOM_PPLIB_CLASSIFICATION2_MVC) - printk("uvd_mvc "); + pr_cont(" uvd_mvc"); } - printk("\n"); + pr_cont("\n"); } void r600_dpm_print_cap_info(u32 caps) { - printk("\tcaps: "); + printk("\tcaps:"); if (caps & ATOM_PPLIB_SINGLE_DISPLAY_ONLY) - printk("single_disp "); + pr_cont(" single_disp"); if (caps & ATOM_PPLIB_SUPPORTS_VIDEO_PLAYBACK) - printk("video "); + pr_cont(" video"); if (caps & ATOM_PPLIB_DISALLOW_ON_DC) - printk("no_dc "); - printk("\n"); + pr_cont(" no_dc"); + pr_cont("\n"); } void r600_dpm_print_ps_status(struct radeon_device *rdev, struct radeon_ps *rps) { - printk("\tstatus: "); + printk("\tstatus:"); if (rps == rdev->pm.dpm.current_ps) - printk("c "); + pr_cont(" c"); if (rps == rdev->pm.dpm.requested_ps) - printk("r "); + pr_cont(" r"); if (rps == rdev->pm.dpm.boot_ps) - printk("b "); - printk("\n"); + pr_cont(" b"); + pr_cont("\n"); } u32 r600_dpm_get_vblank_time(struct radeon_device *rdev) diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h index 44e0c5ed6418..c1c8e2208a21 100644 --- a/drivers/gpu/drm/radeon/radeon.h +++ b/drivers/gpu/drm/radeon/radeon.h @@ -499,6 +499,7 @@ struct radeon_bo { u32 tiling_flags; u32 pitch; int surface_reg; + unsigned prime_shared_count; /* list of all virtual address to which this bo * is associated to */ @@ -2535,7 +2536,8 @@ static inline struct radeon_fence *to_radeon_fence(struct dma_fence *f) #define WREG16(reg, v) writew(v, (rdev->rmmio) + (reg)) #define RREG32(reg) r100_mm_rreg(rdev, (reg), false) #define RREG32_IDX(reg) r100_mm_rreg(rdev, (reg), true) -#define DREG32(reg) printk(KERN_INFO "REGISTER: " #reg " : 0x%08X\n", r100_mm_rreg(rdev, (reg), false)) +#define DREG32(reg) pr_info("REGISTER: " #reg " : 0x%08X\n", \ + r100_mm_rreg(rdev, (reg), false)) #define WREG32(reg, v) r100_mm_wreg(rdev, (reg), (v), false) #define WREG32_IDX(reg, v) r100_mm_wreg(rdev, (reg), (v), true) #define REG_SET(FIELD, v) (((v) << FIELD##_SHIFT) & FIELD##_MASK) diff --git a/drivers/gpu/drm/radeon/radeon_acpi.h b/drivers/gpu/drm/radeon/radeon_acpi.h index cd872f7953c6..7af1977c2c68 100644 --- a/drivers/gpu/drm/radeon/radeon_acpi.h +++ b/drivers/gpu/drm/radeon/radeon_acpi.h @@ -97,6 +97,7 @@ int radeon_atif_handler(struct radeon_device *rdev, # define ATIF_SET_PANEL_EXPANSION_MODE_IN_CMOS_SUPPORTED (1 << 7) # define ATIF_TEMPERATURE_CHANGE_NOTIFICATION_SUPPORTED (1 << 12) # define ATIF_GET_GRAPHICS_DEVICE_TYPES_SUPPORTED (1 << 14) +# define ATIF_GET_EXTERNAL_GPU_INFORMATION_SUPPORTED (1 << 20) #define ATIF_FUNCTION_GET_SYSTEM_PARAMETERS 0x1 /* ARG0: ATIF_FUNCTION_GET_SYSTEM_PARAMETERS * ARG1: none @@ -251,6 +252,17 @@ int radeon_atif_handler(struct radeon_device *rdev, # define ATIF_XGP_PORT (1 << 1) # define ATIF_VGA_ENABLED_GRAPHICS_DEVICE (1 << 2) # define ATIF_XGP_PORT_IN_DOCK (1 << 3) +#define ATIF_FUNCTION_GET_EXTERNAL_GPU_INFORMATION 0x15 +/* ARG0: ATIF_FUNCTION_GET_EXTERNAL_GPU_INFORMATION + * ARG1: none + * OUTPUT: + * WORD - number of reported external gfx devices + * WORD - device structure size in bytes (excludes device size field) + * WORD - flags \ + * WORD - bus number / repeated structure + */ +/* flags */ +# define ATIF_EXTERNAL_GRAPHICS_PORT (1 << 0) /* ATPX */ #define ATPX_FUNCTION_VERIFY_INTERFACE 0x0 diff --git a/drivers/gpu/drm/radeon/radeon_atpx_handler.c b/drivers/gpu/drm/radeon/radeon_atpx_handler.c index 0ae13cd2adda..40be4068ca69 100644 --- a/drivers/gpu/drm/radeon/radeon_atpx_handler.c +++ b/drivers/gpu/drm/radeon/radeon_atpx_handler.c @@ -577,8 +577,8 @@ static bool radeon_atpx_detect(void) if (has_atpx && vga_count == 2) { acpi_get_name(radeon_atpx_priv.atpx.handle, ACPI_FULL_PATHNAME, &buffer); - printk(KERN_INFO "vga_switcheroo: detected switching method %s handle\n", - acpi_method_name); + pr_info("vga_switcheroo: detected switching method %s handle\n", + acpi_method_name); radeon_atpx_priv.atpx_detected = true; radeon_atpx_priv.bridge_pm_usable = d3_supported; radeon_atpx_init(); diff --git a/drivers/gpu/drm/radeon/radeon_audio.c b/drivers/gpu/drm/radeon/radeon_audio.c index b214663b370d..aaacac190d26 100644 --- a/drivers/gpu/drm/radeon/radeon_audio.c +++ b/drivers/gpu/drm/radeon/radeon_audio.c @@ -576,9 +576,9 @@ static void radeon_audio_calc_cts(unsigned int clock, int *CTS, int *N, int freq /* Check that we are in spec (not always possible) */ if (n < (128*freq/1500)) - printk(KERN_WARNING "Calculated ACR N value is too small. You may experience audio problems.\n"); + pr_warn("Calculated ACR N value is too small. You may experience audio problems.\n"); if (n > (128*freq/300)) - printk(KERN_WARNING "Calculated ACR N value is too large. You may experience audio problems.\n"); + pr_warn("Calculated ACR N value is too large. You may experience audio problems.\n"); *N = n; *CTS = cts; diff --git a/drivers/gpu/drm/radeon/radeon_clocks.c b/drivers/gpu/drm/radeon/radeon_clocks.c index c1135feb93c1..e55146cdf543 100644 --- a/drivers/gpu/drm/radeon/radeon_clocks.c +++ b/drivers/gpu/drm/radeon/radeon_clocks.c @@ -111,7 +111,7 @@ static bool radeon_read_clocks_OF(struct drm_device *dev) return false; val = of_get_property(dp, "ATY,RefCLK", NULL); if (!val || !*val) { - printk(KERN_WARNING "radeonfb: No ATY,RefCLK property !\n"); + pr_warn("radeonfb: No ATY,RefCLK property !\n"); return false; } p1pll->reference_freq = p2pll->reference_freq = (*val) / 10; diff --git a/drivers/gpu/drm/radeon/radeon_cs.c b/drivers/gpu/drm/radeon/radeon_cs.c index a8442f7196d6..3ac671f6c8e1 100644 --- a/drivers/gpu/drm/radeon/radeon_cs.c +++ b/drivers/gpu/drm/radeon/radeon_cs.c @@ -117,11 +117,13 @@ static int radeon_cs_parser_relocs(struct radeon_cs_parser *p) priority = (r->flags & RADEON_RELOC_PRIO_MASK) * 2 + !!r->write_domain; - /* the first reloc of an UVD job is the msg and that must be in - VRAM, also but everything into VRAM on AGP cards and older - IGP chips to avoid image corruptions */ + /* The first reloc of an UVD job is the msg and that must be in + * VRAM, the second reloc is the DPB and for WMV that must be in + * VRAM as well. Also put everything into VRAM on AGP cards and older + * IGP chips to avoid image corruptions + */ if (p->ring == R600_RING_TYPE_UVD_INDEX && - (i == 0 || pci_find_capability(p->rdev->ddev->pdev, + (i <= 0 || pci_find_capability(p->rdev->ddev->pdev, PCI_CAP_ID_AGP) || p->rdev->family == CHIP_RS780 || p->rdev->family == CHIP_RS880)) { @@ -164,6 +166,16 @@ static int radeon_cs_parser_relocs(struct radeon_cs_parser *p) p->relocs[i].allowed_domains = domain; } + /* Objects shared as dma-bufs cannot be moved to VRAM */ + if (p->relocs[i].robj->prime_shared_count) { + p->relocs[i].allowed_domains &= ~RADEON_GEM_DOMAIN_VRAM; + if (!p->relocs[i].allowed_domains) { + DRM_ERROR("BO associated with dma-buf cannot " + "be moved to VRAM\n"); + return -EINVAL; + } + } + p->relocs[i].tv.bo = &p->relocs[i].robj->tbo; p->relocs[i].tv.shared = !r->write_domain; diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c index 4b0c388be3f5..6ecf42783d4b 100644 --- a/drivers/gpu/drm/radeon/radeon_device.c +++ b/drivers/gpu/drm/radeon/radeon_device.c @@ -1249,7 +1249,7 @@ static void radeon_switcheroo_set_state(struct pci_dev *pdev, enum vga_switchero if (state == VGA_SWITCHEROO_ON) { unsigned d3_delay = dev->pdev->d3_delay; - printk(KERN_INFO "radeon: switched on\n"); + pr_info("radeon: switched on\n"); /* don't suspend or resume card normally */ dev->switch_power_state = DRM_SWITCH_POWER_CHANGING; @@ -1263,7 +1263,7 @@ static void radeon_switcheroo_set_state(struct pci_dev *pdev, enum vga_switchero dev->switch_power_state = DRM_SWITCH_POWER_ON; drm_kms_helper_poll_enable(dev); } else { - printk(KERN_INFO "radeon: switched off\n"); + pr_info("radeon: switched off\n"); drm_kms_helper_poll_disable(dev); dev->switch_power_state = DRM_SWITCH_POWER_CHANGING; radeon_suspend_kms(dev, true, true, false); @@ -1410,12 +1410,12 @@ int radeon_device_init(struct radeon_device *rdev, if (r) { rdev->need_dma32 = true; dma_bits = 32; - printk(KERN_WARNING "radeon: No suitable DMA available.\n"); + pr_warn("radeon: No suitable DMA available\n"); } r = pci_set_consistent_dma_mask(rdev->pdev, DMA_BIT_MASK(dma_bits)); if (r) { pci_set_consistent_dma_mask(rdev->pdev, DMA_BIT_MASK(32)); - printk(KERN_WARNING "radeon: No coherent DMA available.\n"); + pr_warn("radeon: No coherent DMA available\n"); } /* Registers mapping */ @@ -1440,11 +1440,8 @@ int radeon_device_init(struct radeon_device *rdev, rdev->rmmio_size = pci_resource_len(rdev->pdev, 2); } rdev->rmmio = ioremap(rdev->rmmio_base, rdev->rmmio_size); - if (rdev->rmmio == NULL) { + if (rdev->rmmio == NULL) return -ENOMEM; - } - DRM_INFO("register mmio base: 0x%08X\n", (uint32_t)rdev->rmmio_base); - DRM_INFO("register mmio size: %u\n", (unsigned)rdev->rmmio_size); /* doorbell bar mapping */ if (rdev->family >= CHIP_BONAIRE) @@ -1471,7 +1468,9 @@ int radeon_device_init(struct radeon_device *rdev, if (rdev->flags & RADEON_IS_PX) runtime = true; - vga_switcheroo_register_client(rdev->pdev, &radeon_switcheroo_ops, runtime); + if (!pci_is_thunderbolt_attached(rdev->pdev)) + vga_switcheroo_register_client(rdev->pdev, + &radeon_switcheroo_ops, runtime); if (runtime) vga_switcheroo_init_domain_pm_ops(rdev->dev, &rdev->vga_pm_domain); @@ -1564,7 +1563,8 @@ void radeon_device_fini(struct radeon_device *rdev) /* evict vram memory */ radeon_bo_evict_vram(rdev); radeon_fini(rdev); - vga_switcheroo_unregister_client(rdev->pdev); + if (!pci_is_thunderbolt_attached(rdev->pdev)) + vga_switcheroo_unregister_client(rdev->pdev); if (rdev->flags & RADEON_IS_PX) vga_switcheroo_fini_domain_pm_ops(rdev->dev); vga_client_register(rdev->pdev, NULL, NULL, NULL); diff --git a/drivers/gpu/drm/radeon/radeon_display.c b/drivers/gpu/drm/radeon/radeon_display.c index aea8b62835a4..17d3dafc8319 100644 --- a/drivers/gpu/drm/radeon/radeon_display.c +++ b/drivers/gpu/drm/radeon/radeon_display.c @@ -232,7 +232,8 @@ void radeon_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green, } static int radeon_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green, - u16 *blue, uint32_t size) + u16 *blue, uint32_t size, + struct drm_modeset_acquire_ctx *ctx) { struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); int i; @@ -485,7 +486,8 @@ static int radeon_crtc_page_flip_target(struct drm_crtc *crtc, struct drm_framebuffer *fb, struct drm_pending_vblank_event *event, uint32_t page_flip_flags, - uint32_t target) + uint32_t target, + struct drm_modeset_acquire_ctx *ctx) { struct drm_device *dev = crtc->dev; struct radeon_device *rdev = dev->dev_private; @@ -623,7 +625,8 @@ cleanup: } static int -radeon_crtc_set_config(struct drm_mode_set *set) +radeon_crtc_set_config(struct drm_mode_set *set, + struct drm_modeset_acquire_ctx *ctx) { struct drm_device *dev; struct radeon_device *rdev; @@ -640,7 +643,7 @@ radeon_crtc_set_config(struct drm_mode_set *set) if (ret < 0) return ret; - ret = drm_crtc_helper_set_config(set); + ret = drm_crtc_helper_set_config(set, ctx); list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) if (crtc->enabled) @@ -1352,6 +1355,12 @@ radeon_user_framebuffer_create(struct drm_device *dev, return ERR_PTR(-ENOENT); } + /* Handle is imported dma-buf, so cannot be migrated to VRAM for scanout */ + if (obj->import_attach) { + DRM_DEBUG_KMS("Cannot create framebuffer from imported dma_buf\n"); + return ERR_PTR(-EINVAL); + } + radeon_fb = kzalloc(sizeof(*radeon_fb), GFP_KERNEL); if (radeon_fb == NULL) { drm_gem_object_unreference_unlocked(obj); diff --git a/drivers/gpu/drm/radeon/radeon_dp_auxch.c b/drivers/gpu/drm/radeon/radeon_dp_auxch.c index 474a8a1886f7..12eac4e75542 100644 --- a/drivers/gpu/drm/radeon/radeon_dp_auxch.c +++ b/drivers/gpu/drm/radeon/radeon_dp_auxch.c @@ -168,7 +168,8 @@ radeon_dp_aux_transfer_native(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg goto done; } if (tmp & AUX_RX_ERROR_FLAGS) { - DRM_DEBUG_KMS("dp_aux_ch flags not zero: %08x\n", tmp); + DRM_DEBUG_KMS_RATELIMITED("dp_aux_ch flags not zero: %08x\n", + tmp); ret = -EIO; goto done; } diff --git a/drivers/gpu/drm/radeon/radeon_dp_mst.c b/drivers/gpu/drm/radeon/radeon_dp_mst.c index 7d5ada3980dc..6598306dca9b 100644 --- a/drivers/gpu/drm/radeon/radeon_dp_mst.c +++ b/drivers/gpu/drm/radeon/radeon_dp_mst.c @@ -453,9 +453,11 @@ radeon_mst_encoder_dpms(struct drm_encoder *encoder, int mode) DRM_DEBUG_KMS("dig encoder is %d %d %d\n", dig_enc->dig_encoder, dig_enc->linkb, radeon_crtc->crtc_id); + slots = drm_dp_find_vcpi_slots(&radeon_connector->mst_port->mst_mgr, + mst_enc->pbn); ret = drm_dp_mst_allocate_vcpi(&radeon_connector->mst_port->mst_mgr, radeon_connector->port, - mst_enc->pbn, &slots); + mst_enc->pbn, slots); ret = drm_dp_update_payload_part1(&radeon_connector->mst_port->mst_mgr); radeon_dp_mst_set_be_cntl(primary, mst_enc, diff --git a/drivers/gpu/drm/radeon/radeon_drv.c b/drivers/gpu/drm/radeon/radeon_drv.c index 956c425e639e..93d45aa5c3d4 100644 --- a/drivers/gpu/drm/radeon/radeon_drv.c +++ b/drivers/gpu/drm/radeon/radeon_drv.c @@ -98,9 +98,10 @@ * 2.47.0 - Add UVD_NO_OP register support * 2.48.0 - TA_CS_BC_BASE_ADDR allowed on SI * 2.49.0 - DRM_RADEON_GEM_INFO ioctl returns correct vram_size/visible values + * 2.50.0 - Allows unaligned shader loads on CIK. (needed by OpenGL) */ #define KMS_DRIVER_MAJOR 2 -#define KMS_DRIVER_MINOR 49 +#define KMS_DRIVER_MINOR 50 #define KMS_DRIVER_PATCHLEVEL 0 int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags); void radeon_driver_unload_kms(struct drm_device *dev); @@ -108,8 +109,6 @@ void radeon_driver_lastclose_kms(struct drm_device *dev); int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv); void radeon_driver_postclose_kms(struct drm_device *dev, struct drm_file *file_priv); -void radeon_driver_preclose_kms(struct drm_device *dev, - struct drm_file *file_priv); int radeon_suspend_kms(struct drm_device *dev, bool suspend, bool fbcon, bool freeze); int radeon_resume_kms(struct drm_device *dev, bool resume, bool fbcon); @@ -538,7 +537,6 @@ static struct drm_driver kms_driver = { DRIVER_PRIME | DRIVER_RENDER, .load = radeon_driver_load_kms, .open = radeon_driver_open_kms, - .preclose = radeon_driver_preclose_kms, .postclose = radeon_driver_postclose_kms, .lastclose = radeon_driver_lastclose_kms, .set_busid = drm_pci_set_busid, diff --git a/drivers/gpu/drm/radeon/radeon_fb.c b/drivers/gpu/drm/radeon/radeon_fb.c index 2be4fe9c7217..356ad90a5238 100644 --- a/drivers/gpu/drm/radeon/radeon_fb.c +++ b/drivers/gpu/drm/radeon/radeon_fb.c @@ -149,8 +149,7 @@ static int radeonfb_create_pinned_object(struct radeon_fbdev *rfbdev, RADEON_GEM_DOMAIN_VRAM, 0, true, &gobj); if (ret) { - printk(KERN_ERR "failed to allocate framebuffer (%d)\n", - aligned_size); + pr_err("failed to allocate framebuffer (%d)\n", aligned_size); return -ENOMEM; } rbo = gem_to_radeon_bo(gobj); @@ -242,7 +241,7 @@ static int radeonfb_create(struct drm_fb_helper *helper, info = drm_fb_helper_alloc_fbi(helper); if (IS_ERR(info)) { ret = PTR_ERR(info); - goto out_unref; + goto out; } info->par = rfbdev; @@ -251,7 +250,7 @@ static int radeonfb_create(struct drm_fb_helper *helper, ret = radeon_framebuffer_init(rdev->ddev, &rfbdev->rfb, &mode_cmd, gobj); if (ret) { DRM_ERROR("failed to initialize framebuffer %d\n", ret); - goto out_destroy_fbi; + goto out; } fb = &rfbdev->rfb.base; @@ -284,7 +283,7 @@ static int radeonfb_create(struct drm_fb_helper *helper, if (info->screen_base == NULL) { ret = -ENOSPC; - goto out_destroy_fbi; + goto out; } DRM_INFO("fb mappable at 0x%lX\n", info->fix.smem_start); @@ -296,9 +295,7 @@ static int radeonfb_create(struct drm_fb_helper *helper, vga_switcheroo_client_fb_set(rdev->ddev->pdev, info); return 0; -out_destroy_fbi: - drm_fb_helper_release_fbi(helper); -out_unref: +out: if (rbo) { } @@ -322,7 +319,6 @@ static int radeon_fbdev_destroy(struct drm_device *dev, struct radeon_fbdev *rfb struct radeon_framebuffer *rfb = &rfbdev->rfb; drm_fb_helper_unregister_fbi(&rfbdev->helper); - drm_fb_helper_release_fbi(&rfbdev->helper); if (rfb->obj) { radeonfb_destroy_pinned_object(rfb->obj); diff --git a/drivers/gpu/drm/radeon/radeon_gart.c b/drivers/gpu/drm/radeon/radeon_gart.c index c4777c8d0312..0b3ec35515f3 100644 --- a/drivers/gpu/drm/radeon/radeon_gart.c +++ b/drivers/gpu/drm/radeon/radeon_gart.c @@ -27,6 +27,9 @@ */ #include <drm/drmP.h> #include <drm/radeon_drm.h> +#ifdef CONFIG_X86 +#include <asm/set_memory.h> +#endif #include "radeon.h" /* diff --git a/drivers/gpu/drm/radeon/radeon_gem.c b/drivers/gpu/drm/radeon/radeon_gem.c index 96683f5b2b1b..dddb372de2b9 100644 --- a/drivers/gpu/drm/radeon/radeon_gem.c +++ b/drivers/gpu/drm/radeon/radeon_gem.c @@ -106,7 +106,7 @@ static int radeon_gem_set_domain(struct drm_gem_object *gobj, } if (!domain) { /* Do nothings */ - printk(KERN_WARNING "Set domain without domain !\n"); + pr_warn("Set domain without domain !\n"); return 0; } if (domain == RADEON_GEM_DOMAIN_CPU) { @@ -116,10 +116,14 @@ static int radeon_gem_set_domain(struct drm_gem_object *gobj, r = -EBUSY; if (r < 0 && r != -EINTR) { - printk(KERN_ERR "Failed to wait for object: %li\n", r); + pr_err("Failed to wait for object: %li\n", r); return r; } } + if (domain == RADEON_GEM_DOMAIN_VRAM && robj->prime_shared_count) { + /* A BO that is associated with a dma-buf cannot be sensibly migrated to VRAM */ + return -EINVAL; + } return 0; } diff --git a/drivers/gpu/drm/radeon/radeon_kms.c b/drivers/gpu/drm/radeon/radeon_kms.c index 56f35c06742c..4761f27f2ca2 100644 --- a/drivers/gpu/drm/radeon/radeon_kms.c +++ b/drivers/gpu/drm/radeon/radeon_kms.c @@ -115,7 +115,8 @@ int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags) if ((radeon_runtime_pm != 0) && radeon_has_atpx() && - ((flags & RADEON_IS_IGP) == 0)) + ((flags & RADEON_IS_IGP) == 0) && + !pci_is_thunderbolt_attached(dev->pdev)) flags |= RADEON_IS_PX; /* radeon_device_init should report only fatal error @@ -691,13 +692,26 @@ out_suspend: * @dev: drm dev pointer * @file_priv: drm file * - * On device post close, tear down vm on cayman+ (all asics). + * On device close, tear down hyperz and cmask filps on r1xx-r5xx + * (all asics). And tear down vm on cayman+ (all asics). */ void radeon_driver_postclose_kms(struct drm_device *dev, struct drm_file *file_priv) { struct radeon_device *rdev = dev->dev_private; + pm_runtime_get_sync(dev->dev); + + mutex_lock(&rdev->gem.mutex); + if (rdev->hyperz_filp == file_priv) + rdev->hyperz_filp = NULL; + if (rdev->cmask_filp == file_priv) + rdev->cmask_filp = NULL; + mutex_unlock(&rdev->gem.mutex); + + radeon_uvd_free_handles(rdev, file_priv); + radeon_vce_free_handles(rdev, file_priv); + /* new gpu have virtual address space support */ if (rdev->family >= CHIP_CAYMAN && file_priv->driver_priv) { struct radeon_fpriv *fpriv = file_priv->driver_priv; @@ -721,33 +735,6 @@ void radeon_driver_postclose_kms(struct drm_device *dev, pm_runtime_put_autosuspend(dev->dev); } -/** - * radeon_driver_preclose_kms - drm callback for pre close - * - * @dev: drm dev pointer - * @file_priv: drm file - * - * On device pre close, tear down hyperz and cmask filps on r1xx-r5xx - * (all asics). - */ -void radeon_driver_preclose_kms(struct drm_device *dev, - struct drm_file *file_priv) -{ - struct radeon_device *rdev = dev->dev_private; - - pm_runtime_get_sync(dev->dev); - - mutex_lock(&rdev->gem.mutex); - if (rdev->hyperz_filp == file_priv) - rdev->hyperz_filp = NULL; - if (rdev->cmask_filp == file_priv) - rdev->cmask_filp = NULL; - mutex_unlock(&rdev->gem.mutex); - - radeon_uvd_free_handles(rdev, file_priv); - radeon_vce_free_handles(rdev, file_priv); -} - /* * VBlank related functions. */ diff --git a/drivers/gpu/drm/radeon/radeon_object.c b/drivers/gpu/drm/radeon/radeon_object.c index 74b276060c20..8b722297a05c 100644 --- a/drivers/gpu/drm/radeon/radeon_object.c +++ b/drivers/gpu/drm/radeon/radeon_object.c @@ -81,7 +81,7 @@ static void radeon_ttm_bo_destroy(struct ttm_buffer_object *tbo) list_del_init(&bo->list); mutex_unlock(&bo->rdev->gem.mutex); radeon_bo_clear_surface_reg(bo); - WARN_ON(!list_empty(&bo->va)); + WARN_ON_ONCE(!list_empty(&bo->va)); drm_gem_object_release(&bo->gem_base); kfree(bo); } @@ -352,6 +352,11 @@ int radeon_bo_pin_restricted(struct radeon_bo *bo, u32 domain, u64 max_offset, return 0; } + if (bo->prime_shared_count && domain == RADEON_GEM_DOMAIN_VRAM) { + /* A BO shared as a dma-buf cannot be sensibly migrated to VRAM */ + return -EINVAL; + } + radeon_ttm_placement_from_domain(bo, domain); for (i = 0; i < bo->placement.num_placement; i++) { /* force to pin into visible video ram */ diff --git a/drivers/gpu/drm/radeon/radeon_prime.c b/drivers/gpu/drm/radeon/radeon_prime.c index f3609c97496b..7110d403322c 100644 --- a/drivers/gpu/drm/radeon/radeon_prime.c +++ b/drivers/gpu/drm/radeon/radeon_prime.c @@ -77,6 +77,7 @@ struct drm_gem_object *radeon_gem_prime_import_sg_table(struct drm_device *dev, list_add_tail(&bo->list, &rdev->gem.objects); mutex_unlock(&rdev->gem.mutex); + bo->prime_shared_count = 1; return &bo->gem_base; } @@ -91,6 +92,9 @@ int radeon_gem_prime_pin(struct drm_gem_object *obj) /* pin buffer into GTT */ ret = radeon_bo_pin(bo, RADEON_GEM_DOMAIN_GTT, NULL); + if (likely(ret == 0)) + bo->prime_shared_count++; + radeon_bo_unreserve(bo); return ret; } @@ -105,6 +109,8 @@ void radeon_gem_prime_unpin(struct drm_gem_object *obj) return; radeon_bo_unpin(bo); + if (bo->prime_shared_count) + bo->prime_shared_count--; radeon_bo_unreserve(bo); } diff --git a/drivers/gpu/drm/radeon/radeon_test.c b/drivers/gpu/drm/radeon/radeon_test.c index 791818165c76..f5e9abfadb56 100644 --- a/drivers/gpu/drm/radeon/radeon_test.c +++ b/drivers/gpu/drm/radeon/radeon_test.c @@ -246,7 +246,7 @@ out_unref: out_cleanup: kfree(gtt_obj); if (r) { - printk(KERN_WARNING "Error while testing BO move.\n"); + pr_warn("Error while testing BO move\n"); } } @@ -298,7 +298,12 @@ static int radeon_test_create_and_emit_fence(struct radeon_device *rdev, DRM_ERROR("Failed to lock ring A %d\n", ring->idx); return r; } - radeon_fence_emit(rdev, fence, ring->idx); + r = radeon_fence_emit(rdev, fence, ring->idx); + if (r) { + DRM_ERROR("Failed to emit fence\n"); + radeon_ring_unlock_undo(rdev, ring); + return r; + } radeon_ring_unlock_commit(rdev, ring, false); } return 0; @@ -394,7 +399,7 @@ out_cleanup: radeon_fence_unref(&fence2); if (r) - printk(KERN_WARNING "Error while testing ring sync (%d).\n", r); + pr_warn("Error while testing ring sync (%d)\n", r); } static void radeon_test_ring_sync2(struct radeon_device *rdev, @@ -504,7 +509,7 @@ out_cleanup: radeon_fence_unref(&fenceB); if (r) - printk(KERN_WARNING "Error while testing ring sync (%d).\n", r); + pr_warn("Error while testing ring sync (%d)\n", r); } static bool radeon_test_sync_possible(struct radeon_ring *ringA, diff --git a/drivers/gpu/drm/radeon/radeon_ttm.c b/drivers/gpu/drm/radeon/radeon_ttm.c index aaa3e80fecb4..8b7623b5a624 100644 --- a/drivers/gpu/drm/radeon/radeon_ttm.c +++ b/drivers/gpu/drm/radeon/radeon_ttm.c @@ -873,6 +873,7 @@ static struct ttm_bo_driver radeon_bo_driver = { .fault_reserve_notify = &radeon_bo_fault_reserve_notify, .io_mem_reserve = &radeon_ttm_io_mem_reserve, .io_mem_free = &radeon_ttm_io_mem_free, + .io_mem_pfn = ttm_bo_default_io_mem_pfn, }; int radeon_ttm_init(struct radeon_device *rdev) diff --git a/drivers/gpu/drm/radeon/radeon_uvd.c b/drivers/gpu/drm/radeon/radeon_uvd.c index d34d1cf33895..7431eb4a11b7 100644 --- a/drivers/gpu/drm/radeon/radeon_uvd.c +++ b/drivers/gpu/drm/radeon/radeon_uvd.c @@ -621,7 +621,7 @@ static int radeon_uvd_cs_reloc(struct radeon_cs_parser *p, } /* TODO: is this still necessary on NI+ ? */ - if ((cmd == 0 || cmd == 0x3) && + if ((cmd == 0 || cmd == 1 || cmd == 0x3) && (start >> 28) != (p->rdev->uvd.gpu_addr >> 28)) { DRM_ERROR("msg/fb buffer %LX-%LX out of 256MB segment!\n", start, end); diff --git a/drivers/gpu/drm/radeon/rs400.c b/drivers/gpu/drm/radeon/rs400.c index 34e3235f41d2..4121209c183e 100644 --- a/drivers/gpu/drm/radeon/rs400.c +++ b/drivers/gpu/drm/radeon/rs400.c @@ -255,8 +255,8 @@ static void rs400_gpu_init(struct radeon_device *rdev) /* FIXME: is this correct ? */ r420_pipes_init(rdev); if (rs400_mc_wait_for_idle(rdev)) { - printk(KERN_WARNING "rs400: Failed to wait MC idle while " - "programming pipes. Bad things might happen. %08x\n", RREG32(RADEON_MC_STATUS)); + pr_warn("rs400: Failed to wait MC idle while programming pipes. Bad things might happen. %08x\n", + RREG32(RADEON_MC_STATUS)); } } diff --git a/drivers/gpu/drm/radeon/rs690.c b/drivers/gpu/drm/radeon/rs690.c index 6bc44c24e837..1bae33e43f3c 100644 --- a/drivers/gpu/drm/radeon/rs690.c +++ b/drivers/gpu/drm/radeon/rs690.c @@ -52,8 +52,7 @@ static void rs690_gpu_init(struct radeon_device *rdev) /* FIXME: is this correct ? */ r420_pipes_init(rdev); if (rs690_mc_wait_for_idle(rdev)) { - printk(KERN_WARNING "Failed to wait MC idle while " - "programming pipes. Bad things might happen.\n"); + pr_warn("Failed to wait MC idle while programming pipes. Bad things might happen.\n"); } } diff --git a/drivers/gpu/drm/radeon/rv515.c b/drivers/gpu/drm/radeon/rv515.c index c55d653aaf5f..ffbd2c006f60 100644 --- a/drivers/gpu/drm/radeon/rv515.c +++ b/drivers/gpu/drm/radeon/rv515.c @@ -154,8 +154,7 @@ static void rv515_gpu_init(struct radeon_device *rdev) unsigned pipe_select_current, gb_pipe_select, tmp; if (r100_gui_wait_for_idle(rdev)) { - printk(KERN_WARNING "Failed to wait GUI idle while " - "resetting GPU. Bad things might happen.\n"); + pr_warn("Failed to wait GUI idle while resetting GPU. Bad things might happen.\n"); } rv515_vga_render_disable(rdev); r420_pipes_init(rdev); @@ -166,12 +165,10 @@ static void rv515_gpu_init(struct radeon_device *rdev) (((gb_pipe_select >> 8) & 0xF) << 4); WREG32_PLL(0x000D, tmp); if (r100_gui_wait_for_idle(rdev)) { - printk(KERN_WARNING "Failed to wait GUI idle while " - "resetting GPU. Bad things might happen.\n"); + pr_warn("Failed to wait GUI idle while resetting GPU. Bad things might happen.\n"); } if (rv515_mc_wait_for_idle(rdev)) { - printk(KERN_WARNING "Failed to wait MC idle while " - "programming pipes. Bad things might happen.\n"); + pr_warn("Failed to wait MC idle while programming pipes. Bad things might happen.\n"); } } diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c index 414776811e71..76d1888528e6 100644 --- a/drivers/gpu/drm/radeon/si.c +++ b/drivers/gpu/drm/radeon/si.c @@ -1762,8 +1762,7 @@ static int si_init_microcode(struct radeon_device *rdev) if (err) goto out; if (rdev->pfp_fw->size != pfp_req_size) { - printk(KERN_ERR - "si_cp: Bogus length %zu in firmware \"%s\"\n", + pr_err("si_cp: Bogus length %zu in firmware \"%s\"\n", rdev->pfp_fw->size, fw_name); err = -EINVAL; goto out; @@ -1771,8 +1770,7 @@ static int si_init_microcode(struct radeon_device *rdev) } else { err = radeon_ucode_validate(rdev->pfp_fw); if (err) { - printk(KERN_ERR - "si_cp: validation failed for firmware \"%s\"\n", + pr_err("si_cp: validation failed for firmware \"%s\"\n", fw_name); goto out; } else { @@ -1788,16 +1786,14 @@ static int si_init_microcode(struct radeon_device *rdev) if (err) goto out; if (rdev->me_fw->size != me_req_size) { - printk(KERN_ERR - "si_cp: Bogus length %zu in firmware \"%s\"\n", + pr_err("si_cp: Bogus length %zu in firmware \"%s\"\n", rdev->me_fw->size, fw_name); err = -EINVAL; } } else { err = radeon_ucode_validate(rdev->me_fw); if (err) { - printk(KERN_ERR - "si_cp: validation failed for firmware \"%s\"\n", + pr_err("si_cp: validation failed for firmware \"%s\"\n", fw_name); goto out; } else { @@ -1813,16 +1809,14 @@ static int si_init_microcode(struct radeon_device *rdev) if (err) goto out; if (rdev->ce_fw->size != ce_req_size) { - printk(KERN_ERR - "si_cp: Bogus length %zu in firmware \"%s\"\n", + pr_err("si_cp: Bogus length %zu in firmware \"%s\"\n", rdev->ce_fw->size, fw_name); err = -EINVAL; } } else { err = radeon_ucode_validate(rdev->ce_fw); if (err) { - printk(KERN_ERR - "si_cp: validation failed for firmware \"%s\"\n", + pr_err("si_cp: validation failed for firmware \"%s\"\n", fw_name); goto out; } else { @@ -1838,16 +1832,14 @@ static int si_init_microcode(struct radeon_device *rdev) if (err) goto out; if (rdev->rlc_fw->size != rlc_req_size) { - printk(KERN_ERR - "si_rlc: Bogus length %zu in firmware \"%s\"\n", + pr_err("si_rlc: Bogus length %zu in firmware \"%s\"\n", rdev->rlc_fw->size, fw_name); err = -EINVAL; } } else { err = radeon_ucode_validate(rdev->rlc_fw); if (err) { - printk(KERN_ERR - "si_cp: validation failed for firmware \"%s\"\n", + pr_err("si_cp: validation failed for firmware \"%s\"\n", fw_name); goto out; } else { @@ -1871,8 +1863,7 @@ static int si_init_microcode(struct radeon_device *rdev) } if ((rdev->mc_fw->size != mc_req_size) && (rdev->mc_fw->size != mc2_req_size)) { - printk(KERN_ERR - "si_mc: Bogus length %zu in firmware \"%s\"\n", + pr_err("si_mc: Bogus length %zu in firmware \"%s\"\n", rdev->mc_fw->size, fw_name); err = -EINVAL; } @@ -1880,8 +1871,7 @@ static int si_init_microcode(struct radeon_device *rdev) } else { err = radeon_ucode_validate(rdev->mc_fw); if (err) { - printk(KERN_ERR - "si_cp: validation failed for firmware \"%s\"\n", + pr_err("si_cp: validation failed for firmware \"%s\"\n", fw_name); goto out; } else { @@ -1900,23 +1890,19 @@ static int si_init_microcode(struct radeon_device *rdev) snprintf(fw_name, sizeof(fw_name), "radeon/%s_smc.bin", chip_name); err = request_firmware(&rdev->smc_fw, fw_name, rdev->dev); if (err) { - printk(KERN_ERR - "smc: error loading firmware \"%s\"\n", - fw_name); + pr_err("smc: error loading firmware \"%s\"\n", fw_name); release_firmware(rdev->smc_fw); rdev->smc_fw = NULL; err = 0; } else if (rdev->smc_fw->size != smc_req_size) { - printk(KERN_ERR - "si_smc: Bogus length %zu in firmware \"%s\"\n", + pr_err("si_smc: Bogus length %zu in firmware \"%s\"\n", rdev->smc_fw->size, fw_name); err = -EINVAL; } } else { err = radeon_ucode_validate(rdev->smc_fw); if (err) { - printk(KERN_ERR - "si_cp: validation failed for firmware \"%s\"\n", + pr_err("si_cp: validation failed for firmware \"%s\"\n", fw_name); goto out; } else { @@ -1927,7 +1913,7 @@ static int si_init_microcode(struct radeon_device *rdev) if (new_fw == 0) { rdev->new_fw = false; } else if (new_fw < 6) { - printk(KERN_ERR "si_fw: mixing new and old firmware!\n"); + pr_err("si_fw: mixing new and old firmware!\n"); err = -EINVAL; } else { rdev->new_fw = true; @@ -1935,8 +1921,7 @@ static int si_init_microcode(struct radeon_device *rdev) out: if (err) { if (err != -EINVAL) - printk(KERN_ERR - "si_cp: Failed to load firmware \"%s\"\n", + pr_err("si_cp: Failed to load firmware \"%s\"\n", fw_name); release_firmware(rdev->pfp_fw); rdev->pfp_fw = NULL; @@ -2219,23 +2204,10 @@ static u32 dce6_latency_watermark(struct dce6_wm_params *wm) a.full = dfixed_const(available_bandwidth); b.full = dfixed_const(wm->num_heads); a.full = dfixed_div(a, b); + tmp = div_u64((u64) dmif_size * (u64) wm->disp_clk, mc_latency + 512); + tmp = min(dfixed_trunc(a), tmp); - b.full = dfixed_const(mc_latency + 512); - c.full = dfixed_const(wm->disp_clk); - b.full = dfixed_div(b, c); - - c.full = dfixed_const(dmif_size); - b.full = dfixed_div(c, b); - - tmp = min(dfixed_trunc(a), dfixed_trunc(b)); - - b.full = dfixed_const(1000); - c.full = dfixed_const(wm->disp_clk); - b.full = dfixed_div(c, b); - c.full = dfixed_const(wm->bytes_per_pixel); - b.full = dfixed_mul(b, c); - - lb_fill_bw = min(tmp, dfixed_trunc(b)); + lb_fill_bw = min(tmp, wm->disp_clk * wm->bytes_per_pixel / 1000); a.full = dfixed_const(max_src_lines_per_dst_line * wm->src_width * wm->bytes_per_pixel); b.full = dfixed_const(1000); @@ -2302,7 +2274,7 @@ static void dce6_program_watermarks(struct radeon_device *rdev, struct drm_display_mode *mode = &radeon_crtc->base.mode; struct dce6_wm_params wm_low, wm_high; u32 dram_channels; - u32 pixel_period; + u32 active_time; u32 line_time = 0; u32 latency_watermark_a = 0, latency_watermark_b = 0; u32 priority_a_mark = 0, priority_b_mark = 0; @@ -2312,8 +2284,8 @@ static void dce6_program_watermarks(struct radeon_device *rdev, fixed20_12 a, b, c; if (radeon_crtc->base.enabled && num_heads && mode) { - pixel_period = 1000000 / (u32)mode->clock; - line_time = min((u32)mode->crtc_htotal * pixel_period, (u32)65535); + active_time = 1000000UL * (u32)mode->crtc_hdisplay / (u32)mode->clock; + line_time = min((u32) (1000000UL * (u32)mode->crtc_htotal / (u32)mode->clock), (u32)65535); priority_a_cnt = 0; priority_b_cnt = 0; @@ -2335,7 +2307,7 @@ static void dce6_program_watermarks(struct radeon_device *rdev, wm_high.disp_clk = mode->clock; wm_high.src_width = mode->crtc_hdisplay; - wm_high.active_time = mode->crtc_hdisplay * pixel_period; + wm_high.active_time = active_time; wm_high.blank_time = line_time - wm_high.active_time; wm_high.interlaced = false; if (mode->flags & DRM_MODE_FLAG_INTERLACE) @@ -2362,7 +2334,7 @@ static void dce6_program_watermarks(struct radeon_device *rdev, wm_low.disp_clk = mode->clock; wm_low.src_width = mode->crtc_hdisplay; - wm_low.active_time = mode->crtc_hdisplay * pixel_period; + wm_low.active_time = active_time; wm_low.blank_time = line_time - wm_low.active_time; wm_low.interlaced = false; if (mode->flags & DRM_MODE_FLAG_INTERLACE) @@ -6345,7 +6317,7 @@ static inline void si_irq_ack(struct radeon_device *rdev) WREG32(DC_HPD5_INT_CONTROL, tmp); } if (rdev->irq.stat_regs.evergreen.disp_int_cont5 & DC_HPD6_INTERRUPT) { - tmp = RREG32(DC_HPD5_INT_CONTROL); + tmp = RREG32(DC_HPD6_INT_CONTROL); tmp |= DC_HPDx_INT_ACK; WREG32(DC_HPD6_INT_CONTROL, tmp); } @@ -6376,7 +6348,7 @@ static inline void si_irq_ack(struct radeon_device *rdev) WREG32(DC_HPD5_INT_CONTROL, tmp); } if (rdev->irq.stat_regs.evergreen.disp_int_cont5 & DC_HPD6_RX_INTERRUPT) { - tmp = RREG32(DC_HPD5_INT_CONTROL); + tmp = RREG32(DC_HPD6_INT_CONTROL); tmp |= DC_HPDx_RX_INT_ACK; WREG32(DC_HPD6_INT_CONTROL, tmp); } |