diff options
Diffstat (limited to 'drivers/gpu/drm/sun4i/sun8i_ui_scaler.h')
| -rw-r--r-- | drivers/gpu/drm/sun4i/sun8i_ui_scaler.h | 28 |
1 files changed, 11 insertions, 17 deletions
diff --git a/drivers/gpu/drm/sun4i/sun8i_ui_scaler.h b/drivers/gpu/drm/sun4i/sun8i_ui_scaler.h index 86295be8be78..1ef4bd6f2718 100644 --- a/drivers/gpu/drm/sun4i/sun8i_ui_scaler.h +++ b/drivers/gpu/drm/sun4i/sun8i_ui_scaler.h @@ -11,6 +11,9 @@ #include "sun8i_mixer.h" +#define DE2_UI_SCALER_UNIT_SIZE 0x10000 +#define DE3_UI_SCALER_UNIT_SIZE 0x08000 + /* this two macros assumes 16 fractional bits which is standard in DRM */ #define SUN8I_UI_SCALER_SCALE_MIN 1 #define SUN8I_UI_SCALER_SCALE_MAX ((1UL << 20) - 1) @@ -20,23 +23,14 @@ #define SUN8I_UI_SCALER_COEFF_COUNT 16 #define SUN8I_UI_SCALER_SIZE(w, h) (((h) - 1) << 16 | ((w) - 1)) -#define SUN8I_SCALER_GSU_CTRL(vi_cnt, ui_idx) \ - (0x20000 + 0x20000 * (vi_cnt) + 0x10000 * (ui_idx) + 0x0) -#define SUN8I_SCALER_GSU_OUTSIZE(vi_cnt, ui_idx) \ - (0x20000 + 0x20000 * (vi_cnt) + 0x10000 * (ui_idx) + 0x40) -#define SUN8I_SCALER_GSU_INSIZE(vi_cnt, ui_idx) \ - (0x20000 + 0x20000 * (vi_cnt) + 0x10000 * (ui_idx) + 0x80) -#define SUN8I_SCALER_GSU_HSTEP(vi_cnt, ui_idx) \ - (0x20000 + 0x20000 * (vi_cnt) + 0x10000 * (ui_idx) + 0x88) -#define SUN8I_SCALER_GSU_VSTEP(vi_cnt, ui_idx) \ - (0x20000 + 0x20000 * (vi_cnt) + 0x10000 * (ui_idx) + 0x8c) -#define SUN8I_SCALER_GSU_HPHASE(vi_cnt, ui_idx) \ - (0x20000 + 0x20000 * (vi_cnt) + 0x10000 * (ui_idx) + 0x90) -#define SUN8I_SCALER_GSU_VPHASE(vi_cnt, ui_idx) \ - (0x20000 + 0x20000 * (vi_cnt) + 0x10000 * (ui_idx) + 0x98) -#define SUN8I_SCALER_GSU_HCOEFF(vi_cnt, ui_idx, index) \ - (0x20000 + 0x20000 * (vi_cnt) + 0x10000 * (ui_idx) + 0x200 + \ - 0x4 * (index)) +#define SUN8I_SCALER_GSU_CTRL(base) ((base) + 0x0) +#define SUN8I_SCALER_GSU_OUTSIZE(base) ((base) + 0x40) +#define SUN8I_SCALER_GSU_INSIZE(base) ((base) + 0x80) +#define SUN8I_SCALER_GSU_HSTEP(base) ((base) + 0x88) +#define SUN8I_SCALER_GSU_VSTEP(base) ((base) + 0x8c) +#define SUN8I_SCALER_GSU_HPHASE(base) ((base) + 0x90) +#define SUN8I_SCALER_GSU_VPHASE(base) ((base) + 0x98) +#define SUN8I_SCALER_GSU_HCOEFF(base, index) ((base) + 0x200 + 0x4 * (index)) #define SUN8I_SCALER_GSU_CTRL_EN BIT(0) #define SUN8I_SCALER_GSU_CTRL_COEFF_RDY BIT(4) |