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-rw-r--r--drivers/ide/pci/Makefile4
-rw-r--r--drivers/ide/pci/atiixp.c71
-rw-r--r--drivers/ide/pci/cmd640.c16
-rw-r--r--drivers/ide/pci/cmd64x.c114
-rw-r--r--drivers/ide/pci/cs5520.c19
-rw-r--r--drivers/ide/pci/cy82c693.c64
-rw-r--r--drivers/ide/pci/delkin_cb.c2
-rw-r--r--drivers/ide/pci/hpt366.c11
-rw-r--r--drivers/ide/pci/it821x.c37
-rw-r--r--drivers/ide/pci/pdc202xx_new.c11
-rw-r--r--drivers/ide/pci/pdc202xx_old.c11
-rw-r--r--drivers/ide/pci/sc1200.c6
-rw-r--r--drivers/ide/pci/serverworks.c25
-rw-r--r--drivers/ide/pci/sgiioc4.c49
-rw-r--r--drivers/ide/pci/siimage.c15
-rw-r--r--drivers/ide/pci/sl82c105.c89
-rw-r--r--drivers/ide/pci/trm290.c9
17 files changed, 137 insertions, 416 deletions
diff --git a/drivers/ide/pci/Makefile b/drivers/ide/pci/Makefile
index 95d1ea8f1f14..94803253e8af 100644
--- a/drivers/ide/pci/Makefile
+++ b/drivers/ide/pci/Makefile
@@ -36,4 +36,8 @@ obj-$(CONFIG_BLK_DEV_VIA82CXXX) += via82cxxx.o
# Must appear at the end of the block
obj-$(CONFIG_BLK_DEV_GENERIC) += generic.o
+ifeq ($(CONFIG_BLK_DEV_CMD640), m)
+ obj-m += cmd640.o
+endif
+
EXTRA_CFLAGS := -Idrivers/ide
diff --git a/drivers/ide/pci/atiixp.c b/drivers/ide/pci/atiixp.c
index 5ae26564fb72..491871984aaa 100644
--- a/drivers/ide/pci/atiixp.c
+++ b/drivers/ide/pci/atiixp.c
@@ -1,5 +1,5 @@
/*
- * linux/drivers/ide/pci/atiixp.c Version 0.03 Aug 3 2007
+ * linux/drivers/ide/pci/atiixp.c Version 0.05 Nov 9 2007
*
* Copyright (C) 2003 ATI Inc. <hyu@ati.com>
* Copyright (C) 2004,2007 Bartlomiej Zolnierkiewicz
@@ -43,47 +43,8 @@ static atiixp_ide_timing mdma_timing[] = {
{ 0x02, 0x00 },
};
-static int save_mdma_mode[4];
-
static DEFINE_SPINLOCK(atiixp_lock);
-static void atiixp_dma_host_on(ide_drive_t *drive)
-{
- struct pci_dev *dev = drive->hwif->pci_dev;
- unsigned long flags;
- u16 tmp16;
-
- spin_lock_irqsave(&atiixp_lock, flags);
-
- pci_read_config_word(dev, ATIIXP_IDE_UDMA_CONTROL, &tmp16);
- if (save_mdma_mode[drive->dn])
- tmp16 &= ~(1 << drive->dn);
- else
- tmp16 |= (1 << drive->dn);
- pci_write_config_word(dev, ATIIXP_IDE_UDMA_CONTROL, tmp16);
-
- spin_unlock_irqrestore(&atiixp_lock, flags);
-
- ide_dma_host_on(drive);
-}
-
-static void atiixp_dma_host_off(ide_drive_t *drive)
-{
- struct pci_dev *dev = drive->hwif->pci_dev;
- unsigned long flags;
- u16 tmp16;
-
- spin_lock_irqsave(&atiixp_lock, flags);
-
- pci_read_config_word(dev, ATIIXP_IDE_UDMA_CONTROL, &tmp16);
- tmp16 &= ~(1 << drive->dn);
- pci_write_config_word(dev, ATIIXP_IDE_UDMA_CONTROL, tmp16);
-
- spin_unlock_irqrestore(&atiixp_lock, flags);
-
- ide_dma_host_off(drive);
-}
-
/**
* atiixp_set_pio_mode - set host controller for PIO mode
* @drive: drive
@@ -132,26 +93,33 @@ static void atiixp_set_dma_mode(ide_drive_t *drive, const u8 speed)
int timing_shift = (drive->dn & 2) ? 16 : 0 + (drive->dn & 1) ? 0 : 8;
u32 tmp32;
u16 tmp16;
+ u16 udma_ctl = 0;
spin_lock_irqsave(&atiixp_lock, flags);
- save_mdma_mode[drive->dn] = 0;
+ pci_read_config_word(dev, ATIIXP_IDE_UDMA_CONTROL, &udma_ctl);
+
if (speed >= XFER_UDMA_0) {
pci_read_config_word(dev, ATIIXP_IDE_UDMA_MODE, &tmp16);
tmp16 &= ~(0x07 << (drive->dn * 4));
tmp16 |= ((speed & 0x07) << (drive->dn * 4));
pci_write_config_word(dev, ATIIXP_IDE_UDMA_MODE, tmp16);
- } else {
- if ((speed >= XFER_MW_DMA_0) && (speed <= XFER_MW_DMA_2)) {
- save_mdma_mode[drive->dn] = speed;
- pci_read_config_dword(dev, ATIIXP_IDE_MDMA_TIMING, &tmp32);
- tmp32 &= ~(0xff << timing_shift);
- tmp32 |= (mdma_timing[speed & 0x03].recover_width << timing_shift) |
- (mdma_timing[speed & 0x03].command_width << (timing_shift + 4));
- pci_write_config_dword(dev, ATIIXP_IDE_MDMA_TIMING, tmp32);
- }
+
+ udma_ctl |= (1 << drive->dn);
+ } else if (speed >= XFER_MW_DMA_0) {
+ u8 i = speed & 0x03;
+
+ pci_read_config_dword(dev, ATIIXP_IDE_MDMA_TIMING, &tmp32);
+ tmp32 &= ~(0xff << timing_shift);
+ tmp32 |= (mdma_timing[i].recover_width << timing_shift) |
+ (mdma_timing[i].command_width << (timing_shift + 4));
+ pci_write_config_dword(dev, ATIIXP_IDE_MDMA_TIMING, tmp32);
+
+ udma_ctl &= ~(1 << drive->dn);
}
+ pci_write_config_word(dev, ATIIXP_IDE_UDMA_CONTROL, udma_ctl);
+
spin_unlock_irqrestore(&atiixp_lock, flags);
}
@@ -181,9 +149,6 @@ static void __devinit init_hwif_atiixp(ide_hwif_t *hwif)
hwif->cbl = ATA_CBL_PATA80;
else
hwif->cbl = ATA_CBL_PATA40;
-
- hwif->dma_host_on = &atiixp_dma_host_on;
- hwif->dma_host_off = &atiixp_dma_host_off;
}
static const struct ide_port_info atiixp_pci_info[] __devinitdata = {
diff --git a/drivers/ide/pci/cmd640.c b/drivers/ide/pci/cmd640.c
index 4aa48104e0c1..da3565e0071f 100644
--- a/drivers/ide/pci/cmd640.c
+++ b/drivers/ide/pci/cmd640.c
@@ -706,9 +706,9 @@ static int pci_conf2(void)
}
/*
- * Probe for a cmd640 chipset, and initialize it if found. Called from ide.c
+ * Probe for a cmd640 chipset, and initialize it if found.
*/
-int __init ide_probe_for_cmd640x (void)
+static int __init cmd640x_init(void)
{
#ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
int second_port_toggled = 0;
@@ -717,6 +717,7 @@ int __init ide_probe_for_cmd640x (void)
const char *bus_type, *port2;
unsigned int index;
u8 b, cfr;
+ u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
if (cmd640_vlb && probe_for_cmd640_vlb()) {
bus_type = "VLB";
@@ -769,6 +770,8 @@ int __init ide_probe_for_cmd640x (void)
cmd_hwif0->set_pio_mode = &cmd640_set_pio_mode;
#endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */
+ idx[0] = cmd_hwif0->index;
+
/*
* Ensure compatibility by always using the slowest timings
* for access to the drive's command register block,
@@ -826,6 +829,8 @@ int __init ide_probe_for_cmd640x (void)
cmd_hwif1->pio_mask = ATA_PIO5;
cmd_hwif1->set_pio_mode = &cmd640_set_pio_mode;
#endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */
+
+ idx[1] = cmd_hwif1->index;
}
printk(KERN_INFO "%s: %sserialized, secondary interface %s\n", cmd_hwif1->name,
cmd_hwif0->serialized ? "" : "not ", port2);
@@ -872,6 +877,13 @@ int __init ide_probe_for_cmd640x (void)
#ifdef CMD640_DUMP_REGS
cmd640_dump_regs();
#endif
+
+ ide_device_add(idx);
+
return 1;
}
+module_param_named(probe_vlb, cmd640_vlb, bool, 0);
+MODULE_PARM_DESC(probe_vlb, "probe for VLB version of CMD640 chipset");
+
+module_init(cmd640x_init);
diff --git a/drivers/ide/pci/cmd64x.c b/drivers/ide/pci/cmd64x.c
index 0b1e9479f019..cd4eb9def151 100644
--- a/drivers/ide/pci/cmd64x.c
+++ b/drivers/ide/pci/cmd64x.c
@@ -1,5 +1,5 @@
/*
- * linux/drivers/ide/pci/cmd64x.c Version 1.52 Dec 24, 2007
+ * linux/drivers/ide/pci/cmd64x.c Version 1.53 Dec 24, 2007
*
* cmd64x.c: Enable interrupts at initialization time on Ultra/PCI machines.
* Due to massive hardware bugs, UltraDMA is only supported
@@ -22,8 +22,6 @@
#include <asm/io.h>
-#define DISPLAY_CMD64X_TIMINGS
-
#define CMD_DEBUG 0
#if CMD_DEBUG
@@ -37,11 +35,6 @@
*/
#define CFR 0x50
#define CFR_INTR_CH0 0x04
-#define CNTRL 0x51
-#define CNTRL_ENA_1ST 0x04
-#define CNTRL_ENA_2ND 0x08
-#define CNTRL_DIS_RA0 0x40
-#define CNTRL_DIS_RA1 0x80
#define CMDTIM 0x52
#define ARTTIM0 0x53
@@ -60,108 +53,13 @@
#define MRDMODE 0x71
#define MRDMODE_INTR_CH0 0x04
#define MRDMODE_INTR_CH1 0x08
-#define MRDMODE_BLK_CH0 0x10
-#define MRDMODE_BLK_CH1 0x20
-#define BMIDESR0 0x72
#define UDIDETCR0 0x73
#define DTPR0 0x74
#define BMIDECR1 0x78
#define BMIDECSR 0x79
-#define BMIDESR1 0x7A
#define UDIDETCR1 0x7B
#define DTPR1 0x7C
-#if defined(DISPLAY_CMD64X_TIMINGS) && defined(CONFIG_IDE_PROC_FS)
-#include <linux/stat.h>
-#include <linux/proc_fs.h>
-
-static u8 cmd64x_proc = 0;
-
-#define CMD_MAX_DEVS 5
-
-static struct pci_dev *cmd_devs[CMD_MAX_DEVS];
-static int n_cmd_devs;
-
-static char * print_cmd64x_get_info (char *buf, struct pci_dev *dev, int index)
-{
- char *p = buf;
- u8 reg72 = 0, reg73 = 0; /* primary */
- u8 reg7a = 0, reg7b = 0; /* secondary */
- u8 reg50 = 1, reg51 = 1, reg57 = 0, reg71 = 0; /* extra */
-
- p += sprintf(p, "\nController: %d\n", index);
- p += sprintf(p, "PCI-%x Chipset.\n", dev->device);
-
- (void) pci_read_config_byte(dev, CFR, &reg50);
- (void) pci_read_config_byte(dev, CNTRL, &reg51);
- (void) pci_read_config_byte(dev, ARTTIM23, &reg57);
- (void) pci_read_config_byte(dev, MRDMODE, &reg71);
- (void) pci_read_config_byte(dev, BMIDESR0, &reg72);
- (void) pci_read_config_byte(dev, UDIDETCR0, &reg73);
- (void) pci_read_config_byte(dev, BMIDESR1, &reg7a);
- (void) pci_read_config_byte(dev, UDIDETCR1, &reg7b);
-
- /* PCI0643/6 originally didn't have the primary channel enable bit */
- if ((dev->device == PCI_DEVICE_ID_CMD_643) ||
- (dev->device == PCI_DEVICE_ID_CMD_646 && dev->revision < 3))
- reg51 |= CNTRL_ENA_1ST;
-
- p += sprintf(p, "---------------- Primary Channel "
- "---------------- Secondary Channel ------------\n");
- p += sprintf(p, " %s %s\n",
- (reg51 & CNTRL_ENA_1ST) ? "enabled " : "disabled",
- (reg51 & CNTRL_ENA_2ND) ? "enabled " : "disabled");
- p += sprintf(p, "---------------- drive0 --------- drive1 "
- "-------- drive0 --------- drive1 ------\n");
- p += sprintf(p, "DMA enabled: %s %s"
- " %s %s\n",
- (reg72 & 0x20) ? "yes" : "no ", (reg72 & 0x40) ? "yes" : "no ",
- (reg7a & 0x20) ? "yes" : "no ", (reg7a & 0x40) ? "yes" : "no ");
- p += sprintf(p, "UltraDMA mode: %s (%c) %s (%c)",
- ( reg73 & 0x01) ? " on" : "off",
- ((reg73 & 0x30) == 0x30) ? ((reg73 & 0x04) ? '3' : '0') :
- ((reg73 & 0x30) == 0x20) ? ((reg73 & 0x04) ? '3' : '1') :
- ((reg73 & 0x30) == 0x10) ? ((reg73 & 0x04) ? '4' : '2') :
- ((reg73 & 0x30) == 0x00) ? ((reg73 & 0x04) ? '5' : '2') : '?',
- ( reg73 & 0x02) ? " on" : "off",
- ((reg73 & 0xC0) == 0xC0) ? ((reg73 & 0x08) ? '3' : '0') :
- ((reg73 & 0xC0) == 0x80) ? ((reg73 & 0x08) ? '3' : '1') :
- ((reg73 & 0xC0) == 0x40) ? ((reg73 & 0x08) ? '4' : '2') :
- ((reg73 & 0xC0) == 0x00) ? ((reg73 & 0x08) ? '5' : '2') : '?');
- p += sprintf(p, " %s (%c) %s (%c)\n",
- ( reg7b & 0x01) ? " on" : "off",
- ((reg7b & 0x30) == 0x30) ? ((reg7b & 0x04) ? '3' : '0') :
- ((reg7b & 0x30) == 0x20) ? ((reg7b & 0x04) ? '3' : '1') :
- ((reg7b & 0x30) == 0x10) ? ((reg7b & 0x04) ? '4' : '2') :
- ((reg7b & 0x30) == 0x00) ? ((reg7b & 0x04) ? '5' : '2') : '?',
- ( reg7b & 0x02) ? " on" : "off",
- ((reg7b & 0xC0) == 0xC0) ? ((reg7b & 0x08) ? '3' : '0') :
- ((reg7b & 0xC0) == 0x80) ? ((reg7b & 0x08) ? '3' : '1') :
- ((reg7b & 0xC0) == 0x40) ? ((reg7b & 0x08) ? '4' : '2') :
- ((reg7b & 0xC0) == 0x00) ? ((reg7b & 0x08) ? '5' : '2') : '?');
- p += sprintf(p, "Interrupt: %s, %s %s, %s\n",
- (reg71 & MRDMODE_BLK_CH0 ) ? "blocked" : "enabled",
- (reg50 & CFR_INTR_CH0 ) ? "pending" : "clear ",
- (reg71 & MRDMODE_BLK_CH1 ) ? "blocked" : "enabled",
- (reg57 & ARTTIM23_INTR_CH1) ? "pending" : "clear ");
-
- return (char *)p;
-}
-
-static int cmd64x_get_info (char *buffer, char **addr, off_t offset, int count)
-{
- char *p = buffer;
- int i;
-
- for (i = 0; i < n_cmd_devs; i++) {
- struct pci_dev *dev = cmd_devs[i];
- p = print_cmd64x_get_info(p, dev, i);
- }
- return p-buffer; /* => must be less than 4k! */
-}
-
-#endif /* defined(DISPLAY_CMD64X_TIMINGS) && defined(CONFIG_IDE_PROC_FS) */
-
static u8 quantize_timing(int timing, int quant)
{
return (timing + quant - 1) / quant;
@@ -472,16 +370,6 @@ static unsigned int __devinit init_chipset_cmd64x(struct pci_dev *dev, const cha
mrdmode &= ~0x30;
(void) pci_write_config_byte(dev, MRDMODE, (mrdmode | 0x02));
-#if defined(DISPLAY_CMD64X_TIMINGS) && defined(CONFIG_IDE_PROC_FS)
-
- cmd_devs[n_cmd_devs++] = dev;
-
- if (!cmd64x_proc) {
- cmd64x_proc = 1;
- ide_pci_create_host_proc("cmd64x", cmd64x_get_info);
- }
-#endif /* DISPLAY_CMD64X_TIMINGS && CONFIG_IDE_PROC_FS */
-
return 0;
}
diff --git a/drivers/ide/pci/cs5520.c b/drivers/ide/pci/cs5520.c
index d1a91bcb5b29..6ec00b8d7ec1 100644
--- a/drivers/ide/pci/cs5520.c
+++ b/drivers/ide/pci/cs5520.c
@@ -71,7 +71,6 @@ static void cs5520_set_pio_mode(ide_drive_t *drive, const u8 pio)
ide_hwif_t *hwif = HWIF(drive);
struct pci_dev *pdev = hwif->pci_dev;
int controller = drive->dn > 1 ? 1 : 0;
- u8 reg;
/* FIXME: if DMA = 1 do we need to set the DMA bit here ? */
@@ -91,11 +90,6 @@ static void cs5520_set_pio_mode(ide_drive_t *drive, const u8 pio)
pci_write_config_byte(pdev, 0x66 + 4*controller + (drive->dn&1),
(cs5520_pio_clocks[pio].recovery << 4) |
(cs5520_pio_clocks[pio].assert));
-
- /* Set the DMA enable/disable flag */
- reg = inb(hwif->dma_base + 0x02 + 8*controller);
- reg |= 1<<((drive->dn&1)+5);
- outb(reg, hwif->dma_base + 0x02 + 8*controller);
}
static void cs5520_set_dma_mode(ide_drive_t *drive, const u8 speed)
@@ -109,13 +103,14 @@ static void cs5520_set_dma_mode(ide_drive_t *drive, const u8 speed)
* We wrap the DMA activate to set the vdma flag. This is needed
* so that the IDE DMA layer issues PIO not DMA commands over the
* DMA channel
+ *
+ * ATAPI is harder so disable it for now using IDE_HFLAG_NO_ATAPI_DMA
*/
-
-static int cs5520_dma_on(ide_drive_t *drive)
+
+static void cs5520_dma_host_set(ide_drive_t *drive, int on)
{
- /* ATAPI is harder so leave it for now */
- drive->vdma = 1;
- return 0;
+ drive->vdma = on;
+ ide_dma_host_set(drive, on);
}
static void __devinit init_hwif_cs5520(ide_hwif_t *hwif)
@@ -126,7 +121,7 @@ static void __devinit init_hwif_cs5520(ide_hwif_t *hwif)
if (hwif->dma_base == 0)
return;
- hwif->ide_dma_on = &cs5520_dma_on;
+ hwif->dma_host_set = &cs5520_dma_host_set;
}
#define DECLARE_CS_DEV(name_str) \
diff --git a/drivers/ide/pci/cy82c693.c b/drivers/ide/pci/cy82c693.c
index 1cd4e9cb0521..3ec4c659a37d 100644
--- a/drivers/ide/pci/cy82c693.c
+++ b/drivers/ide/pci/cy82c693.c
@@ -1,5 +1,5 @@
/*
- * linux/drivers/ide/pci/cy82c693.c Version 0.42 Oct 23, 2007
+ * linux/drivers/ide/pci/cy82c693.c Version 0.44 Nov 8, 2007
*
* Copyright (C) 1998-2000 Andreas S. Krebs (akrebs@altavista.net), Maintainer
* Copyright (C) 1998-2002 Andre Hedrick <andre@linux-ide.org>, Integrator
@@ -176,17 +176,12 @@ static void compute_clocks (u8 pio, pio_clocks_t *p_pclk)
* set DMA mode a specific channel for CY82C693
*/
-static void cy82c693_dma_enable (ide_drive_t *drive, int mode, int single)
+static void cy82c693_set_dma_mode(ide_drive_t *drive, const u8 mode)
{
- u8 index = 0, data = 0;
+ ide_hwif_t *hwif = drive->hwif;
+ u8 single = (mode & 0x10) >> 4, index = 0, data = 0;
- if (mode>2) /* make sure we set a valid mode */
- mode = 2;
-
- if (mode > drive->id->tDMA) /* to be absolutly sure we have a valid mode */
- mode = drive->id->tDMA;
-
- index = (HWIF(drive)->channel==0) ? CY82_INDEX_CHANNEL0 : CY82_INDEX_CHANNEL1;
+ index = hwif->channel ? CY82_INDEX_CHANNEL1 : CY82_INDEX_CHANNEL0;
#if CY82C693_DEBUG_LOGS
/* for debug let's show the previous values */
@@ -199,7 +194,7 @@ static void cy82c693_dma_enable (ide_drive_t *drive, int mode, int single)
(data&0x3), ((data>>2)&1));
#endif /* CY82C693_DEBUG_LOGS */
- data = (u8)mode|(u8)(single<<2);
+ data = (mode & 3) | (single << 2);
outb(index, CY82_INDEX_PORT);
outb(data, CY82_DATA_PORT);
@@ -207,7 +202,7 @@ static void cy82c693_dma_enable (ide_drive_t *drive, int mode, int single)
#if CY82C693_DEBUG_INFO
printk(KERN_INFO "%s (ch=%d, dev=%d): set DMA mode to %d (single=%d)\n",
drive->name, HWIF(drive)->channel, drive->select.b.unit,
- mode, single);
+ mode & 3, single);
#endif /* CY82C693_DEBUG_INFO */
/*
@@ -230,39 +225,6 @@ static void cy82c693_dma_enable (ide_drive_t *drive, int mode, int single)
#endif /* CY82C693_DEBUG_INFO */
}
-/*
- * used to set DMA mode for CY82C693 (single and multi modes)
- */
-static int cy82c693_ide_dma_on (ide_drive_t *drive)
-{
- struct hd_driveid *id = drive->id;
-
-#if CY82C693_DEBUG_INFO
- printk (KERN_INFO "dma_on: %s\n", drive->name);
-#endif /* CY82C693_DEBUG_INFO */
-
- if (id != NULL) {
- /* Enable DMA on any drive that has DMA
- * (multi or single) enabled
- */
- if (id->field_valid & 2) { /* regular DMA */
- int mmode, smode;
-
- mmode = id->dma_mword & (id->dma_mword >> 8);
- smode = id->dma_1word & (id->dma_1word >> 8);
-
- if (mmode != 0) {
- /* enable multi */
- cy82c693_dma_enable(drive, (mmode >> 1), 0);
- } else if (smode != 0) {
- /* enable single */
- cy82c693_dma_enable(drive, (smode >> 1), 1);
- }
- }
- }
- return __ide_dma_on(drive);
-}
-
static void cy82c693_set_pio_mode(ide_drive_t *drive, const u8 pio)
{
ide_hwif_t *hwif = HWIF(drive);
@@ -429,11 +391,7 @@ static unsigned int __devinit init_chipset_cy82c693(struct pci_dev *dev, const c
static void __devinit init_hwif_cy82c693(ide_hwif_t *hwif)
{
hwif->set_pio_mode = &cy82c693_set_pio_mode;
-
- if (hwif->dma_base == 0)
- return;
-
- hwif->ide_dma_on = &cy82c693_ide_dma_on;
+ hwif->set_dma_mode = &cy82c693_set_dma_mode;
}
static void __devinit init_iops_cy82c693(ide_hwif_t *hwif)
@@ -454,11 +412,11 @@ static const struct ide_port_info cy82c693_chipset __devinitdata = {
.init_iops = init_iops_cy82c693,
.init_hwif = init_hwif_cy82c693,
.chipset = ide_cy82c693,
- .host_flags = IDE_HFLAG_SINGLE | IDE_HFLAG_TRUST_BIOS_FOR_DMA |
+ .host_flags = IDE_HFLAG_SINGLE | IDE_HFLAG_CY82C693 |
IDE_HFLAG_BOOTABLE,
.pio_mask = ATA_PIO4,
- .swdma_mask = ATA_SWDMA2_ONLY,
- .mwdma_mask = ATA_MWDMA2_ONLY,
+ .swdma_mask = ATA_SWDMA2,
+ .mwdma_mask = ATA_MWDMA2,
};
static int __devinit cy82c693_init_one(struct pci_dev *dev, const struct pci_device_id *id)
diff --git a/drivers/ide/pci/delkin_cb.c b/drivers/ide/pci/delkin_cb.c
index 83829081640a..26aa492071bb 100644
--- a/drivers/ide/pci/delkin_cb.c
+++ b/drivers/ide/pci/delkin_cb.c
@@ -80,7 +80,7 @@ delkin_cb_probe (struct pci_dev *dev, const struct pci_device_id *id)
hw.irq = dev->irq;
hw.chipset = ide_pci; /* this enables IRQ sharing */
- rc = ide_register_hw(&hw, &ide_undecoded_slave, 0, &hwif);
+ rc = ide_register_hw(&hw, &ide_undecoded_slave, &hwif);
if (rc < 0) {
printk(KERN_ERR "delkin_cb: ide_register_hw failed (%d)\n", rc);
pci_disable_device(dev);
diff --git a/drivers/ide/pci/hpt366.c b/drivers/ide/pci/hpt366.c
index 3777fb8c8043..12685939a813 100644
--- a/drivers/ide/pci/hpt366.c
+++ b/drivers/ide/pci/hpt366.c
@@ -725,15 +725,18 @@ static void hpt3xx_set_pio_mode(ide_drive_t *drive, const u8 pio)
hpt3xx_set_mode(drive, XFER_PIO_0 + pio);
}
-static int hpt3xx_quirkproc(ide_drive_t *drive)
+static void hpt3xx_quirkproc(ide_drive_t *drive)
{
struct hd_driveid *id = drive->id;
const char **list = quirk_drives;
while (*list)
- if (strstr(id->model, *list++))
- return 1;
- return 0;
+ if (strstr(id->model, *list++)) {
+ drive->quirk_list = 1;
+ return;
+ }
+
+ drive->quirk_list = 0;
}
static void hpt3xx_maskproc(ide_drive_t *drive, int mask)
diff --git a/drivers/ide/pci/it821x.c b/drivers/ide/pci/it821x.c
index 99b7d763b6c7..e610a5340fdc 100644
--- a/drivers/ide/pci/it821x.c
+++ b/drivers/ide/pci/it821x.c
@@ -431,33 +431,29 @@ static u8 __devinit ata66_it821x(ide_hwif_t *hwif)
}
/**
- * it821x_fixup - post init callback
- * @hwif: interface
+ * it821x_quirkproc - post init callback
+ * @drive: drive
*
- * This callback is run after the drives have been probed but
+ * This callback is run after the drive has been probed but
* before anything gets attached. It allows drivers to do any
* final tuning that is needed, or fixups to work around bugs.
*/
-static void __devinit it821x_fixups(ide_hwif_t *hwif)
+static void __devinit it821x_quirkproc(ide_drive_t *drive)
{
- struct it821x_dev *itdev = ide_get_hwifdata(hwif);
- int i;
+ struct it821x_dev *itdev = ide_get_hwifdata(drive->hwif);
+ struct hd_driveid *id = drive->id;
+ u16 *idbits = (u16 *)drive->id;
- if(!itdev->smart) {
+ if (!itdev->smart) {
/*
* If we are in pass through mode then not much
* needs to be done, but we do bother to clear the
* IRQ mask as we may well be in PIO (eg rev 0x10)
* for now and we know unmasking is safe on this chipset.
*/
- for (i = 0; i < 2; i++) {
- ide_drive_t *drive = &hwif->drives[i];
- if(drive->present)
- drive->unmask = 1;
- }
- return;
- }
+ drive->unmask = 1;
+ } else {
/*
* Perform fixups on smart mode. We need to "lose" some
* capabilities the firmware lacks but does not filter, and
@@ -465,16 +461,6 @@ static void __devinit it821x_fixups(ide_hwif_t *hwif)
* in RAID mode.
*/
- for(i = 0; i < 2; i++) {
- ide_drive_t *drive = &hwif->drives[i];
- struct hd_driveid *id;
- u16 *idbits;
-
- if(!drive->present)
- continue;
- id = drive->id;
- idbits = (u16 *)drive->id;
-
/* Check for RAID v native */
if(strstr(id->model, "Integrated Technology Express")) {
/* In raid mode the ident block is slightly buggy
@@ -537,6 +523,8 @@ static void __devinit init_hwif_it821x(ide_hwif_t *hwif)
struct it821x_dev *idev = kzalloc(sizeof(struct it821x_dev), GFP_KERNEL);
u8 conf;
+ hwif->quirkproc = &it821x_quirkproc;
+
if (idev == NULL) {
printk(KERN_ERR "it821x: out of memory, falling back to legacy behaviour.\n");
return;
@@ -633,7 +621,6 @@ static unsigned int __devinit init_chipset_it821x(struct pci_dev *dev, const cha
.name = name_str, \
.init_chipset = init_chipset_it821x, \
.init_hwif = init_hwif_it821x, \
- .fixup = it821x_fixups, \
.host_flags = IDE_HFLAG_BOOTABLE, \
.pio_mask = ATA_PIO4, \
}
diff --git a/drivers/ide/pci/pdc202xx_new.c b/drivers/ide/pci/pdc202xx_new.c
index ef4a99b99d1f..89d2363a1ebd 100644
--- a/drivers/ide/pci/pdc202xx_new.c
+++ b/drivers/ide/pci/pdc202xx_new.c
@@ -203,14 +203,17 @@ static u8 pdcnew_cable_detect(ide_hwif_t *hwif)
return ATA_CBL_PATA80;
}
-static int pdcnew_quirkproc(ide_drive_t *drive)
+static void pdcnew_quirkproc(ide_drive_t *drive)
{
const char **list, *model = drive->id->model;
for (list = pdc_quirk_drives; *list != NULL; list++)
- if (strstr(model, *list) != NULL)
- return 2;
- return 0;
+ if (strstr(model, *list) != NULL) {
+ drive->quirk_list = 2;
+ return;
+ }
+
+ drive->quirk_list = 0;
}
static void pdcnew_reset(ide_drive_t *drive)
diff --git a/drivers/ide/pci/pdc202xx_old.c b/drivers/ide/pci/pdc202xx_old.c
index 67b2781e2213..3a1e081fe390 100644
--- a/drivers/ide/pci/pdc202xx_old.c
+++ b/drivers/ide/pci/pdc202xx_old.c
@@ -176,14 +176,17 @@ static void pdc_old_disable_66MHz_clock(ide_hwif_t *hwif)
outb(clock & ~(hwif->channel ? 0x08 : 0x02), clock_reg);
}
-static int pdc202xx_quirkproc (ide_drive_t *drive)
+static void pdc202xx_quirkproc(ide_drive_t *drive)
{
const char **list, *model = drive->id->model;
for (list = pdc_quirk_drives; *list != NULL; list++)
- if (strstr(model, *list) != NULL)
- return 2;
- return 0;
+ if (strstr(model, *list) != NULL) {
+ drive->quirk_list = 2;
+ return;
+ }
+
+ drive->quirk_list = 0;
}
static void pdc202xx_old_ide_dma_start(ide_drive_t *drive)
diff --git a/drivers/ide/pci/sc1200.c b/drivers/ide/pci/sc1200.c
index fef20bd4aa78..32fdf53379f5 100644
--- a/drivers/ide/pci/sc1200.c
+++ b/drivers/ide/pci/sc1200.c
@@ -220,9 +220,9 @@ static void sc1200_set_pio_mode(ide_drive_t *drive, const u8 pio)
}
if (mode != -1) {
printk("SC1200: %s: changing (U)DMA mode\n", drive->name);
- hwif->dma_off_quietly(drive);
- if (ide_set_dma_mode(drive, mode) == 0)
- hwif->dma_host_on(drive);
+ ide_dma_off_quietly(drive);
+ if (ide_set_dma_mode(drive, mode) == 0 && drive->using_dma)
+ hwif->dma_host_set(drive, 1);
return;
}
diff --git a/drivers/ide/pci/serverworks.c b/drivers/ide/pci/serverworks.c
index e9bd269547bb..877c09bf4829 100644
--- a/drivers/ide/pci/serverworks.c
+++ b/drivers/ide/pci/serverworks.c
@@ -164,25 +164,12 @@ static void svwks_set_dma_mode(ide_drive_t *drive, const u8 speed)
ultra_timing &= ~(0x0F << (4*unit));
ultra_enable &= ~(0x01 << drive->dn);
- switch(speed) {
- case XFER_MW_DMA_2:
- case XFER_MW_DMA_1:
- case XFER_MW_DMA_0:
- dma_timing |= dma_modes[speed - XFER_MW_DMA_0];
- break;
-
- case XFER_UDMA_5:
- case XFER_UDMA_4:
- case XFER_UDMA_3:
- case XFER_UDMA_2:
- case XFER_UDMA_1:
- case XFER_UDMA_0:
- dma_timing |= dma_modes[2];
- ultra_timing |= ((udma_modes[speed - XFER_UDMA_0]) << (4*unit));
- ultra_enable |= (0x01 << drive->dn);
- default:
- break;
- }
+ if (speed >= XFER_UDMA_0) {
+ dma_timing |= dma_modes[2];
+ ultra_timing |= (udma_modes[speed - XFER_UDMA_0] << (4 * unit));
+ ultra_enable |= (0x01 << drive->dn);
+ } else if (speed >= XFER_MW_DMA_0)
+ dma_timing |= dma_modes[speed - XFER_MW_DMA_0];
pci_write_config_byte(dev, drive_pci2[drive->dn], dma_timing);
pci_write_config_byte(dev, (0x56|hwif->channel), ultra_timing);
diff --git a/drivers/ide/pci/sgiioc4.c b/drivers/ide/pci/sgiioc4.c
index 7e9dade5648d..9e0be7d54980 100644
--- a/drivers/ide/pci/sgiioc4.c
+++ b/drivers/ide/pci/sgiioc4.c
@@ -277,21 +277,6 @@ sgiioc4_ide_dma_end(ide_drive_t * drive)
return dma_stat;
}
-static int
-sgiioc4_ide_dma_on(ide_drive_t * drive)
-{
- drive->using_dma = 1;
-
- return 0;
-}
-
-static void sgiioc4_dma_off_quietly(ide_drive_t *drive)
-{
- drive->using_dma = 0;
-
- drive->hwif->dma_host_off(drive);
-}
-
static void sgiioc4_set_dma_mode(ide_drive_t *drive, const u8 speed)
{
}
@@ -303,13 +288,10 @@ sgiioc4_ide_dma_test_irq(ide_drive_t * drive)
return sgiioc4_checkirq(HWIF(drive));
}
-static void sgiioc4_dma_host_on(ide_drive_t * drive)
-{
-}
-
-static void sgiioc4_dma_host_off(ide_drive_t * drive)
+static void sgiioc4_dma_host_set(ide_drive_t *drive, int on)
{
- sgiioc4_clearirq(drive);
+ if (!on)
+ sgiioc4_clearirq(drive);
}
static void
@@ -593,14 +575,11 @@ ide_init_sgiioc4(ide_hwif_t * hwif)
hwif->mwdma_mask = ATA_MWDMA2_ONLY;
+ hwif->dma_host_set = &sgiioc4_dma_host_set;
hwif->dma_setup = &sgiioc4_ide_dma_setup;
hwif->dma_start = &sgiioc4_ide_dma_start;
hwif->ide_dma_end = &sgiioc4_ide_dma_end;
- hwif->ide_dma_on = &sgiioc4_ide_dma_on;
- hwif->dma_off_quietly = &sgiioc4_dma_off_quietly;
hwif->ide_dma_test_irq = &sgiioc4_ide_dma_test_irq;
- hwif->dma_host_on = &sgiioc4_dma_host_on;
- hwif->dma_host_off = &sgiioc4_dma_host_off;
hwif->dma_lost_irq = &sgiioc4_dma_lost_irq;
hwif->dma_timeout = &ide_dma_timeout;
}
@@ -614,6 +593,7 @@ sgiioc4_ide_setup_pci_device(struct pci_dev *dev)
ide_hwif_t *hwif;
int h;
u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
+ hw_regs_t hw;
/*
* Find an empty HWIF; if none available, return -ENOMEM.
@@ -653,21 +633,16 @@ sgiioc4_ide_setup_pci_device(struct pci_dev *dev)
return -ENOMEM;
}
- if (hwif->io_ports[IDE_DATA_OFFSET] != cmd_base) {
- hw_regs_t hw;
-
- /* Initialize the IO registers */
- memset(&hw, 0, sizeof(hw));
- sgiioc4_init_hwif_ports(&hw, cmd_base, ctl, irqport);
- memcpy(hwif->io_ports, hw.io_ports, sizeof(hwif->io_ports));
- hwif->noprobe = !hwif->io_ports[IDE_DATA_OFFSET];
- }
+ /* Initialize the IO registers */
+ memset(&hw, 0, sizeof(hw));
+ sgiioc4_init_hwif_ports(&hw, cmd_base, ctl, irqport);
+ hw.irq = dev->irq;
+ hw.chipset = ide_pci;
+ hw.dev = &dev->dev;
+ ide_init_port_hw(hwif, &hw);
- hwif->irq = dev->irq;
- hwif->chipset = ide_pci;
hwif->pci_dev = dev;
hwif->channel = 0; /* Single Channel chip */
- hwif->gendev.parent = &dev->dev;/* setup proper ancestral information */
/* The IOC4 uses MMIO rather than Port IO. */
default_hwif_mmiops(hwif);
diff --git a/drivers/ide/pci/siimage.c b/drivers/ide/pci/siimage.c
index 7b45eaf5afd9..908f37b4e0ee 100644
--- a/drivers/ide/pci/siimage.c
+++ b/drivers/ide/pci/siimage.c
@@ -713,9 +713,6 @@ static int is_dev_seagate_sata(ide_drive_t *drive)
const char *s = &drive->id->model[0];
unsigned len;
- if (!drive->present)
- return 0;
-
len = strnlen(s, sizeof(drive->id->model));
if ((len > 4) && (!memcmp(s, "ST", 2))) {
@@ -730,18 +727,20 @@ static int is_dev_seagate_sata(ide_drive_t *drive)
}
/**
- * siimage_fixup - post probe fixups
- * @hwif: interface to fix up
+ * sil_quirkproc - post probe fixups
+ * @drive: drive
*
* Called after drive probe we use this to decide whether the
* Seagate fixup must be applied. This used to be in init_iops but
* that can occur before we know what drives are present.
*/
-static void __devinit siimage_fixup(ide_hwif_t *hwif)
+static void __devinit sil_quirkproc(ide_drive_t *drive)
{
+ ide_hwif_t *hwif = drive->hwif;
+
/* Try and raise the rqsize */
- if (!is_sata(hwif) || !is_dev_seagate_sata(&hwif->drives[0]))
+ if (!is_sata(hwif) || !is_dev_seagate_sata(drive))
hwif->rqsize = 128;
}
@@ -804,6 +803,7 @@ static void __devinit init_hwif_siimage(ide_hwif_t *hwif)
hwif->set_pio_mode = &sil_set_pio_mode;
hwif->set_dma_mode = &sil_set_dma_mode;
+ hwif->quirkproc = &sil_quirkproc;
if (sata) {
static int first = 1;
@@ -842,7 +842,6 @@ static void __devinit init_hwif_siimage(ide_hwif_t *hwif)
.init_chipset = init_chipset_siimage, \
.init_iops = init_iops_siimage, \
.init_hwif = init_hwif_siimage, \
- .fixup = siimage_fixup, \
.host_flags = IDE_HFLAG_BOOTABLE, \
.pio_mask = ATA_PIO4, \
.mwdma_mask = ATA_MWDMA2, \
diff --git a/drivers/ide/pci/sl82c105.c b/drivers/ide/pci/sl82c105.c
index 069f104fdcea..c7a125b66c29 100644
--- a/drivers/ide/pci/sl82c105.c
+++ b/drivers/ide/pci/sl82c105.c
@@ -13,6 +13,7 @@
* -- Benjamin Herrenschmidt (01/11/03) benh@kernel.crashing.org
*
* Copyright (C) 2006-2007 MontaVista Software, Inc. <source@mvista.com>
+ * Copyright (C) 2007 Bartlomiej Zolnierkiewicz
*/
#include <linux/types.h>
@@ -90,14 +91,8 @@ static void sl82c105_set_pio_mode(ide_drive_t *drive, const u8 pio)
drive->drive_data &= 0xffff0000;
drive->drive_data |= drv_ctrl;
- if (!drive->using_dma) {
- /*
- * If we are actually using MW DMA, then we can not
- * reprogram the interface drive control register.
- */
- pci_write_config_word(dev, reg, drv_ctrl);
- pci_read_config_word (dev, reg, &drv_ctrl);
- }
+ pci_write_config_word(dev, reg, drv_ctrl);
+ pci_read_config_word (dev, reg, &drv_ctrl);
printk(KERN_DEBUG "%s: selected %s (%dns) (%04X)\n", drive->name,
ide_xfer_verbose(pio + XFER_PIO_0),
@@ -123,17 +118,6 @@ static void sl82c105_set_dma_mode(ide_drive_t *drive, const u8 speed)
*/
drive->drive_data &= 0x0000ffff;
drive->drive_data |= (unsigned long)drv_ctrl << 16;
-
- /*
- * If we are already using DMA, we just reprogram
- * the drive control register.
- */
- if (drive->using_dma) {
- struct pci_dev *dev = HWIF(drive)->pci_dev;
- int reg = 0x44 + drive->dn * 4;
-
- pci_write_config_word(dev, reg, drv_ctrl);
- }
}
/*
@@ -201,6 +185,11 @@ static void sl82c105_dma_start(ide_drive_t *drive)
{
ide_hwif_t *hwif = HWIF(drive);
struct pci_dev *dev = hwif->pci_dev;
+ int reg = 0x44 + drive->dn * 4;
+
+ DBG(("%s(drive:%s)\n", __FUNCTION__, drive->name));
+
+ pci_write_config_word(dev, reg, drive->drive_data >> 16);
sl82c105_reset_host(dev);
ide_dma_start(drive);
@@ -214,64 +203,24 @@ static void sl82c105_dma_timeout(ide_drive_t *drive)
ide_dma_timeout(drive);
}
-static int sl82c105_ide_dma_on(ide_drive_t *drive)
-{
- struct pci_dev *dev = HWIF(drive)->pci_dev;
- int rc, reg = 0x44 + drive->dn * 4;
-
- DBG(("sl82c105_ide_dma_on(drive:%s)\n", drive->name));
-
- rc = __ide_dma_on(drive);
- if (rc == 0) {
- pci_write_config_word(dev, reg, drive->drive_data >> 16);
-
- printk(KERN_INFO "%s: DMA enabled\n", drive->name);
- }
- return rc;
-}
-
-static void sl82c105_dma_off_quietly(ide_drive_t *drive)
+static int sl82c105_dma_end(ide_drive_t *drive)
{
struct pci_dev *dev = HWIF(drive)->pci_dev;
int reg = 0x44 + drive->dn * 4;
+ int ret;
- DBG(("sl82c105_dma_off_quietly(drive:%s)\n", drive->name));
+ DBG(("%s(drive:%s)\n", __FUNCTION__, drive->name));
- pci_write_config_word(dev, reg, drive->drive_data);
+ ret = __ide_dma_end(drive);
- ide_dma_off_quietly(drive);
-}
+ pci_write_config_word(dev, reg, drive->drive_data);
-/*
- * Ok, that is nasty, but we must make sure the DMA timings
- * won't be used for a PIO access. The solution here is
- * to make sure the 16 bits mode is diabled on the channel
- * when DMA is enabled, thus causing the chip to use PIO0
- * timings for those operations.
- */
-static void sl82c105_selectproc(ide_drive_t *drive)
-{
- ide_hwif_t *hwif = HWIF(drive);
- struct pci_dev *dev = hwif->pci_dev;
- u32 val, old, mask;
-
- //DBG(("sl82c105_selectproc(drive:%s)\n", drive->name));
-
- mask = hwif->channel ? CTRL_P1F16 : CTRL_P0F16;
- old = val = (u32)pci_get_drvdata(dev);
- if (drive->using_dma)
- val &= ~mask;
- else
- val |= mask;
- if (old != val) {
- pci_write_config_dword(dev, 0x40, val);
- pci_set_drvdata(dev, (void *)val);
- }
+ return ret;
}
/*
* ATA reset will clear the 16 bits mode in the control
- * register, we need to update our cache
+ * register, we need to reprogram it
*/
static void sl82c105_resetproc(ide_drive_t *drive)
{
@@ -281,7 +230,8 @@ static void sl82c105_resetproc(ide_drive_t *drive)
DBG(("sl82c105_resetproc(drive:%s)\n", drive->name));
pci_read_config_dword(dev, 0x40, &val);
- pci_set_drvdata(dev, (void *)val);
+ val |= (CTRL_P1F16 | CTRL_P0F16);
+ pci_write_config_dword(dev, 0x40, val);
}
/*
@@ -334,7 +284,6 @@ static unsigned int __devinit init_chipset_sl82c105(struct pci_dev *dev, const c
pci_read_config_dword(dev, 0x40, &val);
val |= CTRL_P0EN | CTRL_P0F16 | CTRL_P1F16;
pci_write_config_dword(dev, 0x40, val);
- pci_set_drvdata(dev, (void *)val);
return dev->irq;
}
@@ -350,7 +299,6 @@ static void __devinit init_hwif_sl82c105(ide_hwif_t *hwif)
hwif->set_pio_mode = &sl82c105_set_pio_mode;
hwif->set_dma_mode = &sl82c105_set_dma_mode;
- hwif->selectproc = &sl82c105_selectproc;
hwif->resetproc = &sl82c105_resetproc;
if (!hwif->dma_base)
@@ -369,10 +317,9 @@ static void __devinit init_hwif_sl82c105(ide_hwif_t *hwif)
hwif->mwdma_mask = ATA_MWDMA2;
- hwif->ide_dma_on = &sl82c105_ide_dma_on;
- hwif->dma_off_quietly = &sl82c105_dma_off_quietly;
hwif->dma_lost_irq = &sl82c105_dma_lost_irq;
hwif->dma_start = &sl82c105_dma_start;
+ hwif->ide_dma_end = &sl82c105_dma_end;
hwif->dma_timeout = &sl82c105_dma_timeout;
if (hwif->mate)
diff --git a/drivers/ide/pci/trm290.c b/drivers/ide/pci/trm290.c
index 0151d7fdfb8a..04cd893e1ab0 100644
--- a/drivers/ide/pci/trm290.c
+++ b/drivers/ide/pci/trm290.c
@@ -241,11 +241,7 @@ static int trm290_ide_dma_test_irq (ide_drive_t *drive)
return (status == 0x00ff);
}
-static void trm290_dma_host_on(ide_drive_t *drive)
-{
-}
-
-static void trm290_dma_host_off(ide_drive_t *drive)
+static void trm290_dma_host_set(ide_drive_t *drive, int on)
{
}
@@ -289,8 +285,7 @@ static void __devinit init_hwif_trm290(ide_hwif_t *hwif)
ide_setup_dma(hwif, (hwif->config_data + 4) ^ (hwif->channel ? 0x0080 : 0x0000), 3);
- hwif->dma_host_off = &trm290_dma_host_off;
- hwif->dma_host_on = &trm290_dma_host_on;
+ hwif->dma_host_set = &trm290_dma_host_set;
hwif->dma_setup = &trm290_dma_setup;
hwif->dma_exec_cmd = &trm290_dma_exec_cmd;
hwif->dma_start = &trm290_dma_start;
Copyright © 1996 – 2023 Jason A. Donenfeld. All Rights Reverse Engineered.