diff options
Diffstat (limited to 'drivers/iio/gyro')
| -rw-r--r-- | drivers/iio/gyro/adxrs290.c | 6 | ||||
| -rw-r--r-- | drivers/iio/gyro/bmg160_core.c | 12 | ||||
| -rw-r--r-- | drivers/iio/gyro/mpu3050-core.c | 28 |
3 files changed, 22 insertions, 24 deletions
diff --git a/drivers/iio/gyro/adxrs290.c b/drivers/iio/gyro/adxrs290.c index ca6fc234076e..c45d8226cc2b 100644 --- a/drivers/iio/gyro/adxrs290.c +++ b/drivers/iio/gyro/adxrs290.c @@ -478,7 +478,7 @@ static int adxrs290_data_rdy_trigger_set_state(struct iio_trigger *trig, return ret; } -static int adxrs290_reset_trig(struct iio_trigger *trig) +static void adxrs290_reset_trig(struct iio_trigger *trig) { struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig); int val; @@ -491,14 +491,12 @@ static int adxrs290_reset_trig(struct iio_trigger *trig) */ adxrs290_get_rate_data(indio_dev, ADXRS290_READ_REG(ADXRS290_REG_DATAY0), &val); - - return 0; } static const struct iio_trigger_ops adxrs290_trigger_ops = { .set_trigger_state = &adxrs290_data_rdy_trigger_set_state, .validate_device = &iio_trigger_validate_own_device, - .try_reenable = &adxrs290_reset_trig, + .reenable = &adxrs290_reset_trig, }; static irqreturn_t adxrs290_trigger_handler(int irq, void *p) diff --git a/drivers/iio/gyro/bmg160_core.c b/drivers/iio/gyro/bmg160_core.c index 8ddda96455fc..2d5015801a75 100644 --- a/drivers/iio/gyro/bmg160_core.c +++ b/drivers/iio/gyro/bmg160_core.c @@ -893,7 +893,7 @@ err: return IRQ_HANDLED; } -static int bmg160_trig_try_reen(struct iio_trigger *trig) +static void bmg160_trig_reen(struct iio_trigger *trig) { struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig); struct bmg160_data *data = iio_priv(indio_dev); @@ -902,18 +902,14 @@ static int bmg160_trig_try_reen(struct iio_trigger *trig) /* new data interrupts don't need ack */ if (data->dready_trigger_on) - return 0; + return; /* Set latched mode interrupt and clear any latched interrupt */ ret = regmap_write(data->regmap, BMG160_REG_INT_RST_LATCH, BMG160_INT_MODE_LATCH_INT | BMG160_INT_MODE_LATCH_RESET); - if (ret < 0) { + if (ret < 0) dev_err(dev, "Error writing reg_rst_latch\n"); - return ret; - } - - return 0; } static int bmg160_data_rdy_trigger_set_state(struct iio_trigger *trig, @@ -961,7 +957,7 @@ static int bmg160_data_rdy_trigger_set_state(struct iio_trigger *trig, static const struct iio_trigger_ops bmg160_trigger_ops = { .set_trigger_state = bmg160_data_rdy_trigger_set_state, - .try_reenable = bmg160_trig_try_reen, + .reenable = bmg160_trig_reen, }; static irqreturn_t bmg160_event_handler(int irq, void *private) diff --git a/drivers/iio/gyro/mpu3050-core.c b/drivers/iio/gyro/mpu3050-core.c index 00e58060968c..dfa31a23500f 100644 --- a/drivers/iio/gyro/mpu3050-core.c +++ b/drivers/iio/gyro/mpu3050-core.c @@ -13,6 +13,7 @@ * TODO: add support for setting up the low pass 3dB frequency. */ +#include <linux/bitfield.h> #include <linux/bitops.h> #include <linux/delay.h> #include <linux/err.h> @@ -784,7 +785,8 @@ static int mpu3050_read_mem(struct mpu3050 *mpu3050, static int mpu3050_hw_init(struct mpu3050 *mpu3050) { int ret; - u8 otp[8]; + __le64 otp_le; + u64 otp; /* Reset */ ret = regmap_update_bits(mpu3050->map, @@ -815,29 +817,31 @@ static int mpu3050_hw_init(struct mpu3050 *mpu3050) MPU3050_MEM_USER_BANK | MPU3050_MEM_OTP_BANK_0), 0, - sizeof(otp), - otp); + sizeof(otp_le), + (u8 *)&otp_le); if (ret) return ret; /* This is device-unique data so it goes into the entropy pool */ - add_device_randomness(otp, sizeof(otp)); + add_device_randomness(&otp_le, sizeof(otp_le)); + + otp = le64_to_cpu(otp_le); dev_info(mpu3050->dev, - "die ID: %04X, wafer ID: %02X, A lot ID: %04X, " - "W lot ID: %03X, WP ID: %01X, rev ID: %02X\n", + "die ID: %04llX, wafer ID: %02llX, A lot ID: %04llX, " + "W lot ID: %03llX, WP ID: %01llX, rev ID: %02llX\n", /* Die ID, bits 0-12 */ - (otp[1] << 8 | otp[0]) & 0x1fff, + FIELD_GET(GENMASK_ULL(12, 0), otp), /* Wafer ID, bits 13-17 */ - ((otp[2] << 8 | otp[1]) & 0x03e0) >> 5, + FIELD_GET(GENMASK_ULL(17, 13), otp), /* A lot ID, bits 18-33 */ - ((otp[4] << 16 | otp[3] << 8 | otp[2]) & 0x3fffc) >> 2, + FIELD_GET(GENMASK_ULL(33, 18), otp), /* W lot ID, bits 34-45 */ - ((otp[5] << 8 | otp[4]) & 0x3ffc) >> 2, + FIELD_GET(GENMASK_ULL(45, 34), otp), /* WP ID, bits 47-49 */ - ((otp[6] << 8 | otp[5]) & 0x0380) >> 7, + FIELD_GET(GENMASK_ULL(49, 47), otp), /* rev ID, bits 50-55 */ - otp[6] >> 2); + FIELD_GET(GENMASK_ULL(55, 50), otp)); return 0; } |