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Diffstat (limited to 'drivers/media/i2c/adv748x/adv748x.h')
-rw-r--r--drivers/media/i2c/adv748x/adv748x.h28
1 files changed, 27 insertions, 1 deletions
diff --git a/drivers/media/i2c/adv748x/adv748x.h b/drivers/media/i2c/adv748x/adv748x.h
index 39c2fdc3b416..5042f9e94aee 100644
--- a/drivers/media/i2c/adv748x/adv748x.h
+++ b/drivers/media/i2c/adv748x/adv748x.h
@@ -39,7 +39,6 @@ enum adv748x_page {
ADV748X_PAGE_MAX,
/* Fake pages for register sequences */
- ADV748X_PAGE_WAIT, /* Wait x msec */
ADV748X_PAGE_EOR, /* End Mark */
};
@@ -79,17 +78,23 @@ struct adv748x_csi2 {
struct v4l2_mbus_framefmt format;
unsigned int page;
unsigned int port;
+ unsigned int num_lanes;
struct media_pad pads[ADV748X_CSI2_NR_PADS];
struct v4l2_ctrl_handler ctrl_hdl;
struct v4l2_ctrl *pixel_rate;
+ struct v4l2_subdev *src;
struct v4l2_subdev sd;
};
#define notifier_to_csi2(n) container_of(n, struct adv748x_csi2, notifier)
#define adv748x_sd_to_csi2(sd) container_of(sd, struct adv748x_csi2, sd)
+
#define is_tx_enabled(_tx) ((_tx)->state->endpoints[(_tx)->port] != NULL)
#define is_txa(_tx) ((_tx) == &(_tx)->state->txa)
+#define is_txb(_tx) ((_tx) == &(_tx)->state->txb)
+#define is_tx(_tx) (is_txa(_tx) || is_txb(_tx))
+
#define is_afe_enabled(_state) \
((_state)->endpoints[ADV748X_PORT_AIN0] != NULL || \
(_state)->endpoints[ADV748X_PORT_AIN1] != NULL || \
@@ -116,6 +121,8 @@ struct adv748x_hdmi {
struct v4l2_dv_timings timings;
struct v4l2_fract aspect_ratio;
+ struct adv748x_csi2 *tx;
+
struct {
u8 edid[512];
u32 present;
@@ -146,6 +153,8 @@ struct adv748x_afe {
struct v4l2_subdev sd;
struct v4l2_mbus_framefmt format;
+ struct adv748x_csi2 *tx;
+
bool streaming;
v4l2_std_id curr_norm;
unsigned int input;
@@ -201,6 +210,11 @@ struct adv748x_state {
#define ADV748X_IO_PD 0x00 /* power down controls */
#define ADV748X_IO_PD_RX_EN BIT(6)
+#define ADV748X_IO_REG_01 0x01 /* pwrdn{2}b, prog_xtal_freq */
+#define ADV748X_IO_REG_01_PWRDN_MASK (BIT(7) | BIT(6))
+#define ADV748X_IO_REG_01_PWRDN2B BIT(7) /* CEC Wakeup Support */
+#define ADV748X_IO_REG_01_PWRDNB BIT(6) /* CEC Wakeup Support */
+
#define ADV748X_IO_REG_04 0x04
#define ADV748X_IO_REG_04_FORCE_FR BIT(0) /* Force CP free-run */
@@ -214,12 +228,24 @@ struct adv748x_state {
#define ADV748X_IO_10_CSI4_EN BIT(7)
#define ADV748X_IO_10_CSI1_EN BIT(6)
#define ADV748X_IO_10_PIX_OUT_EN BIT(5)
+#define ADV748X_IO_10_CSI4_IN_SEL_AFE BIT(3)
#define ADV748X_IO_CHIP_REV_ID_1 0xdf
#define ADV748X_IO_CHIP_REV_ID_2 0xe0
+#define ADV748X_IO_REG_F2 0xf2
+#define ADV748X_IO_REG_F2_READ_AUTO_INC BIT(0)
+
+/* For PAGE slave address offsets */
#define ADV748X_IO_SLAVE_ADDR_BASE 0xf2
+/*
+ * The ADV748x_Recommended_Settings_PrA_2014-08-20.pdf details both 0x80 and
+ * 0xff as examples for performing a software reset.
+ */
+#define ADV748X_IO_REG_FF 0xff
+#define ADV748X_IO_REG_FF_MAIN_RESET 0xff
+
/* HDMI RX Map */
#define ADV748X_HDMI_LW1 0x07 /* line width_1 */
#define ADV748X_HDMI_LW1_VERT_FILTER BIT(7)