diff options
Diffstat (limited to 'drivers/net/dsa/mv88e6xxx.c')
| -rw-r--r-- | drivers/net/dsa/mv88e6xxx.c | 141 |
1 files changed, 56 insertions, 85 deletions
diff --git a/drivers/net/dsa/mv88e6xxx.c b/drivers/net/dsa/mv88e6xxx.c index a2c62c2f30ee..17314ed9456d 100644 --- a/drivers/net/dsa/mv88e6xxx.c +++ b/drivers/net/dsa/mv88e6xxx.c @@ -8,6 +8,8 @@ * (at your option) any later version. */ +#include <linux/delay.h> +#include <linux/jiffies.h> #include <linux/list.h> #include <linux/module.h> #include <linux/netdevice.h> @@ -15,8 +17,7 @@ #include <net/dsa.h> #include "mv88e6xxx.h" -/* - * If the switch's ADDR[4:0] strap pins are strapped to zero, it will +/* If the switch's ADDR[4:0] strap pins are strapped to zero, it will * use all 32 SMI bus addresses on its SMI bus, and all switch registers * will be directly accessible on some {device address,register address} * pair. If the ADDR[4:0] pins are not strapped to zero, the switch @@ -48,30 +49,22 @@ int __mv88e6xxx_reg_read(struct mii_bus *bus, int sw_addr, int addr, int reg) if (sw_addr == 0) return mdiobus_read(bus, addr, reg); - /* - * Wait for the bus to become free. - */ + /* Wait for the bus to become free. */ ret = mv88e6xxx_reg_wait_ready(bus, sw_addr); if (ret < 0) return ret; - /* - * Transmit the read command. - */ + /* Transmit the read command. */ ret = mdiobus_write(bus, sw_addr, 0, 0x9800 | (addr << 5) | reg); if (ret < 0) return ret; - /* - * Wait for the read command to complete. - */ + /* Wait for the read command to complete. */ ret = mv88e6xxx_reg_wait_ready(bus, sw_addr); if (ret < 0) return ret; - /* - * Read the data. - */ + /* Read the data. */ ret = mdiobus_read(bus, sw_addr, 1); if (ret < 0) return ret; @@ -100,30 +93,22 @@ int __mv88e6xxx_reg_write(struct mii_bus *bus, int sw_addr, int addr, if (sw_addr == 0) return mdiobus_write(bus, addr, reg, val); - /* - * Wait for the bus to become free. - */ + /* Wait for the bus to become free. */ ret = mv88e6xxx_reg_wait_ready(bus, sw_addr); if (ret < 0) return ret; - /* - * Transmit the data to write. - */ + /* Transmit the data to write. */ ret = mdiobus_write(bus, sw_addr, 1, val); if (ret < 0) return ret; - /* - * Transmit the write command. - */ + /* Transmit the write command. */ ret = mdiobus_write(bus, sw_addr, 0, 0x9400 | (addr << 5) | reg); if (ret < 0) return ret; - /* - * Wait for the write command to complete. - */ + /* Wait for the write command to complete. */ ret = mv88e6xxx_reg_wait_ready(bus, sw_addr); if (ret < 0) return ret; @@ -146,9 +131,7 @@ int mv88e6xxx_reg_write(struct dsa_switch *ds, int addr, int reg, u16 val) int mv88e6xxx_config_prio(struct dsa_switch *ds) { - /* - * Configure the IP ToS mapping registers. - */ + /* Configure the IP ToS mapping registers. */ REG_WRITE(REG_GLOBAL, 0x10, 0x0000); REG_WRITE(REG_GLOBAL, 0x11, 0x0000); REG_WRITE(REG_GLOBAL, 0x12, 0x5555); @@ -158,9 +141,7 @@ int mv88e6xxx_config_prio(struct dsa_switch *ds) REG_WRITE(REG_GLOBAL, 0x16, 0xffff); REG_WRITE(REG_GLOBAL, 0x17, 0xffff); - /* - * Configure the IEEE 802.1p priority mapping register. - */ + /* Configure the IEEE 802.1p priority mapping register. */ REG_WRITE(REG_GLOBAL, 0x18, 0xfa41); return 0; @@ -183,14 +164,10 @@ int mv88e6xxx_set_addr_indirect(struct dsa_switch *ds, u8 *addr) for (i = 0; i < 6; i++) { int j; - /* - * Write the MAC address byte. - */ + /* Write the MAC address byte. */ REG_WRITE(REG_GLOBAL2, 0x0d, 0x8000 | (i << 8) | addr[i]); - /* - * Wait for the write to complete. - */ + /* Wait for the write to complete. */ for (j = 0; j < 16; j++) { ret = REG_READ(REG_GLOBAL2, 0x0d); if ((ret & 0x8000) == 0) @@ -221,16 +198,17 @@ int mv88e6xxx_phy_write(struct dsa_switch *ds, int addr, int regnum, u16 val) static int mv88e6xxx_ppu_disable(struct dsa_switch *ds) { int ret; - int i; + unsigned long timeout; ret = REG_READ(REG_GLOBAL, 0x04); REG_WRITE(REG_GLOBAL, 0x04, ret & ~0x4000); - for (i = 0; i < 1000; i++) { - ret = REG_READ(REG_GLOBAL, 0x00); - msleep(1); - if ((ret & 0xc000) != 0xc000) - return 0; + timeout = jiffies + 1 * HZ; + while (time_before(jiffies, timeout)) { + ret = REG_READ(REG_GLOBAL, 0x00); + usleep_range(1000, 2000); + if ((ret & 0xc000) != 0xc000) + return 0; } return -ETIMEDOUT; @@ -239,16 +217,17 @@ static int mv88e6xxx_ppu_disable(struct dsa_switch *ds) static int mv88e6xxx_ppu_enable(struct dsa_switch *ds) { int ret; - int i; + unsigned long timeout; ret = REG_READ(REG_GLOBAL, 0x04); REG_WRITE(REG_GLOBAL, 0x04, ret | 0x4000); - for (i = 0; i < 1000; i++) { - ret = REG_READ(REG_GLOBAL, 0x00); - msleep(1); - if ((ret & 0xc000) == 0xc000) - return 0; + timeout = jiffies + 1 * HZ; + while (time_before(jiffies, timeout)) { + ret = REG_READ(REG_GLOBAL, 0x00); + usleep_range(1000, 2000); + if ((ret & 0xc000) == 0xc000) + return 0; } return -ETIMEDOUT; @@ -260,11 +239,11 @@ static void mv88e6xxx_ppu_reenable_work(struct work_struct *ugly) ps = container_of(ugly, struct mv88e6xxx_priv_state, ppu_work); if (mutex_trylock(&ps->ppu_mutex)) { - struct dsa_switch *ds = ((struct dsa_switch *)ps) - 1; + struct dsa_switch *ds = ((struct dsa_switch *)ps) - 1; - if (mv88e6xxx_ppu_enable(ds) == 0) - ps->ppu_disabled = 0; - mutex_unlock(&ps->ppu_mutex); + if (mv88e6xxx_ppu_enable(ds) == 0) + ps->ppu_disabled = 0; + mutex_unlock(&ps->ppu_mutex); } } @@ -282,22 +261,21 @@ static int mv88e6xxx_ppu_access_get(struct dsa_switch *ds) mutex_lock(&ps->ppu_mutex); - /* - * If the PHY polling unit is enabled, disable it so that + /* If the PHY polling unit is enabled, disable it so that * we can access the PHY registers. If it was already * disabled, cancel the timer that is going to re-enable * it. */ if (!ps->ppu_disabled) { - ret = mv88e6xxx_ppu_disable(ds); - if (ret < 0) { - mutex_unlock(&ps->ppu_mutex); - return ret; - } - ps->ppu_disabled = 1; + ret = mv88e6xxx_ppu_disable(ds); + if (ret < 0) { + mutex_unlock(&ps->ppu_mutex); + return ret; + } + ps->ppu_disabled = 1; } else { - del_timer(&ps->ppu_timer); - ret = 0; + del_timer(&ps->ppu_timer); + ret = 0; } return ret; @@ -307,9 +285,7 @@ static void mv88e6xxx_ppu_access_put(struct dsa_switch *ds) { struct mv88e6xxx_priv_state *ps = (void *)(ds + 1); - /* - * Schedule a timer to re-enable the PHY polling unit. - */ + /* Schedule a timer to re-enable the PHY polling unit. */ mod_timer(&ps->ppu_timer, jiffies + msecs_to_jiffies(10)); mutex_unlock(&ps->ppu_mutex); } @@ -331,8 +307,8 @@ int mv88e6xxx_phy_read_ppu(struct dsa_switch *ds, int addr, int regnum) ret = mv88e6xxx_ppu_access_get(ds); if (ret >= 0) { - ret = mv88e6xxx_reg_read(ds, addr, regnum); - mv88e6xxx_ppu_access_put(ds); + ret = mv88e6xxx_reg_read(ds, addr, regnum); + mv88e6xxx_ppu_access_put(ds); } return ret; @@ -345,8 +321,8 @@ int mv88e6xxx_phy_write_ppu(struct dsa_switch *ds, int addr, ret = mv88e6xxx_ppu_access_get(ds); if (ret >= 0) { - ret = mv88e6xxx_reg_write(ds, addr, regnum, val); - mv88e6xxx_ppu_access_put(ds); + ret = mv88e6xxx_reg_write(ds, addr, regnum, val); + mv88e6xxx_ppu_access_put(ds); } return ret; @@ -380,7 +356,7 @@ void mv88e6xxx_poll_link(struct dsa_switch *ds) if (!link) { if (netif_carrier_ok(dev)) { - printk(KERN_INFO "%s: link down\n", dev->name); + netdev_info(dev, "link down\n"); netif_carrier_off(dev); } continue; @@ -404,10 +380,11 @@ void mv88e6xxx_poll_link(struct dsa_switch *ds) fc = (port_status & 0x8000) ? 1 : 0; if (!netif_carrier_ok(dev)) { - printk(KERN_INFO "%s: link up, %d Mb/s, %s duplex, " - "flow control %sabled\n", dev->name, - speed, duplex ? "full" : "half", - fc ? "en" : "dis"); + netdev_info(dev, + "link up, %d Mb/s, %s duplex, flow control %sabled\n", + speed, + duplex ? "full" : "half", + fc ? "en" : "dis"); netif_carrier_on(dev); } } @@ -431,14 +408,10 @@ static int mv88e6xxx_stats_snapshot(struct dsa_switch *ds, int port) { int ret; - /* - * Snapshot the hardware statistics counters for this port. - */ + /* Snapshot the hardware statistics counters for this port. */ REG_WRITE(REG_GLOBAL, 0x1d, 0xdc00 | port); - /* - * Wait for the snapshotting to complete. - */ + /* Wait for the snapshotting to complete. */ ret = mv88e6xxx_stats_wait(ds); if (ret < 0) return ret; @@ -502,9 +475,7 @@ void mv88e6xxx_get_ethtool_stats(struct dsa_switch *ds, return; } - /* - * Read each of the counters. - */ + /* Read each of the counters. */ for (i = 0; i < nr_stats; i++) { struct mv88e6xxx_hw_stat *s = stats + i; u32 low; |