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path: root/drivers/staging/bcm/DDRInit.c
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-rw-r--r--drivers/staging/bcm/DDRInit.c338
1 files changed, 227 insertions, 111 deletions
diff --git a/drivers/staging/bcm/DDRInit.c b/drivers/staging/bcm/DDRInit.c
index f1d7cb82fd7e..4226c931cd45 100644
--- a/drivers/staging/bcm/DDRInit.c
+++ b/drivers/staging/bcm/DDRInit.c
@@ -7,7 +7,8 @@
/* DDR INIT-133Mhz */
#define T3_SKIP_CLOCK_PROGRAM_DUMP_133MHZ 12 /* index for 0x0F007000 */
-static struct bcm_ddr_setting asT3_DDRSetting133MHz[] = { /* DPLL Clock Setting */
+static struct bcm_ddr_setting asT3_DDRSetting133MHz[] = {
+ /* DPLL Clock Setting */
{0x0F000800, 0x00007212},
{0x0f000820, 0x07F13FFF},
{0x0f000810, 0x00000F95},
@@ -65,7 +66,8 @@ static struct bcm_ddr_setting asT3_DDRSetting133MHz[] = { /* DPLL Clock Setting
};
/* 80Mhz */
#define T3_SKIP_CLOCK_PROGRAM_DUMP_80MHZ 10 /* index for 0x0F007000 */
-static struct bcm_ddr_setting asT3_DDRSetting80MHz[] = { /* DPLL Clock Setting */
+static struct bcm_ddr_setting asT3_DDRSetting80MHz[] = {
+ /* DPLL Clock Setting */
{0x0f000810, 0x00000F95},
{0x0f000820, 0x07f1ffff},
{0x0f000860, 0x00000000},
@@ -117,7 +119,8 @@ static struct bcm_ddr_setting asT3_DDRSetting80MHz[] = { /* DPLL Clock Setting
};
/* 100Mhz */
#define T3_SKIP_CLOCK_PROGRAM_DUMP_100MHZ 13 /* index for 0x0F007000 */
-static struct bcm_ddr_setting asT3_DDRSetting100MHz[] = { /* DPLL Clock Setting */
+static struct bcm_ddr_setting asT3_DDRSetting100MHz[] = {
+ /* DPLL Clock Setting */
{0x0F000800, 0x00007008},
{0x0f000810, 0x00000F95},
{0x0f000820, 0x07F13E3F},
@@ -189,7 +192,8 @@ static struct bcm_ddr_setting asDPLL_266MHZ[] = {
};
#define T3B_SKIP_CLOCK_PROGRAM_DUMP_133MHZ 11 /* index for 0x0F007000 */
-static struct bcm_ddr_setting asT3B_DDRSetting133MHz[] = { /* DPLL Clock Setting */
+static struct bcm_ddr_setting asT3B_DDRSetting133MHz[] = {
+ /* DPLL Clock Setting */
{0x0f000810, 0x00000F95},
{0x0f000810, 0x00000F95},
{0x0f000810, 0x00000F95},
@@ -247,7 +251,8 @@ static struct bcm_ddr_setting asT3B_DDRSetting133MHz[] = { /* DPLL Clock Settin
};
#define T3B_SKIP_CLOCK_PROGRAM_DUMP_80MHZ 9 /* index for 0x0F007000 */
-static struct bcm_ddr_setting asT3B_DDRSetting80MHz[] = { /* DPLL Clock Setting */
+static struct bcm_ddr_setting asT3B_DDRSetting80MHz[] = {
+ /* DPLL Clock Setting */
{0x0f000810, 0x00000F95},
{0x0f000820, 0x07F13FFF},
{0x0f000840, 0x0FFF1F00},
@@ -301,7 +306,8 @@ static struct bcm_ddr_setting asT3B_DDRSetting80MHz[] = { /* DPLL Clock Setting
/* 100Mhz */
#define T3B_SKIP_CLOCK_PROGRAM_DUMP_100MHZ 9 /* index for 0x0F007000 */
-static struct bcm_ddr_setting asT3B_DDRSetting100MHz[] = { /* DPLL Clock Setting */
+static struct bcm_ddr_setting asT3B_DDRSetting100MHz[] = {
+ /* DPLL Clock Setting */
{0x0f000810, 0x00000F95},
{0x0f000820, 0x07F1369B},
{0x0f000840, 0x0FFF0800},
@@ -356,7 +362,8 @@ static struct bcm_ddr_setting asT3B_DDRSetting100MHz[] = { /* DPLL Clock Settin
#define T3LP_SKIP_CLOCK_PROGRAM_DUMP_133MHZ 9 /* index for 0x0F007000 */
-static struct bcm_ddr_setting asT3LP_DDRSetting133MHz[] = { /* DPLL Clock Setting */
+static struct bcm_ddr_setting asT3LP_DDRSetting133MHz[] = {
+ /* DPLL Clock Setting */
{0x0f000820, 0x03F1365B},
{0x0f000810, 0x00002F95},
{0x0f000880, 0x000003DD},
@@ -416,7 +423,8 @@ static struct bcm_ddr_setting asT3LP_DDRSetting133MHz[] = { /* DPLL Clock Setti
};
#define T3LP_SKIP_CLOCK_PROGRAM_DUMP_100MHZ 11 /* index for 0x0F007000 */
-static struct bcm_ddr_setting asT3LP_DDRSetting100MHz[] = { /* DPLL Clock Setting */
+static struct bcm_ddr_setting asT3LP_DDRSetting100MHz[] = {
+ /* DPLL Clock Setting */
{0x0f000810, 0x00002F95},
{0x0f000820, 0x03F1369B},
{0x0f000840, 0x0fff0000},
@@ -476,7 +484,8 @@ static struct bcm_ddr_setting asT3LP_DDRSetting100MHz[] = { /* DPLL Clock Setti
};
#define T3LP_SKIP_CLOCK_PROGRAM_DUMP_80MHZ 9 /* index for 0x0F007000 */
-static struct bcm_ddr_setting asT3LP_DDRSetting80MHz[] = { /* DPLL Clock Setting */
+static struct bcm_ddr_setting asT3LP_DDRSetting80MHz[] = {
+ /* DPLL Clock Setting */
{0x0f000820, 0x07F13FFF},
{0x0f000810, 0x00002F95},
{0x0f000860, 0x00000000},
@@ -536,7 +545,8 @@ static struct bcm_ddr_setting asT3LP_DDRSetting80MHz[] = { /* DPLL Clock Settin
/* T3 LP-B (UMA-B) */
#define T3LPB_SKIP_CLOCK_PROGRAM_DUMP_160MHZ 7 /* index for 0x0F007000 */
-static struct bcm_ddr_setting asT3LPB_DDRSetting160MHz[] = { /* DPLL Clock Setting */
+static struct bcm_ddr_setting asT3LPB_DDRSetting160MHz[] = {
+ /* DPLL Clock Setting */
{0x0f000820, 0x03F137DB},
{0x0f000810, 0x01842795},
{0x0f000860, 0x00000000},
@@ -544,7 +554,8 @@ static struct bcm_ddr_setting asT3LPB_DDRSetting160MHz[] = { /* DPLL Clock Sett
{0x0f000840, 0x0FFF0400},
{0x0F00a044, 0x1fffffff},
{0x0F00a040, 0x1f000000},
- {0x0f003050, 0x00000021}, /* this is flash/eeprom clock divisor which set the flash clock to 20 MHz */
+ {0x0f003050, 0x00000021}, /* this is flash/eeprom clock divisor which
+ * set the flash clock to 20 MHz */
{0x0F00a084, 0x1Cffffff}, /* Now dump from her in internal memory */
{0x0F00a080, 0x1C000000},
{0x0F00A000, 0x00000016},
@@ -593,7 +604,8 @@ static struct bcm_ddr_setting asT3LPB_DDRSetting160MHz[] = { /* DPLL Clock Sett
#define T3LPB_SKIP_CLOCK_PROGRAM_DUMP_133MHZ 7 /* index for 0x0F007000 */
-static struct bcm_ddr_setting asT3LPB_DDRSetting133MHz[] = { /* DPLL Clock Setting */
+static struct bcm_ddr_setting asT3LPB_DDRSetting133MHz[] = {
+ /* DPLL Clock Setting */
{0x0f000820, 0x03F1365B},
{0x0f000810, 0x00002F95},
{0x0f000880, 0x000003DD},
@@ -602,7 +614,8 @@ static struct bcm_ddr_setting asT3LPB_DDRSetting133MHz[] = { /* DPLL Clock Sett
{0x0f000860, 0x00000000},
{0x0F00a044, 0x1fffffff},
{0x0F00a040, 0x1f000000},
- {0x0f003050, 0x00000021}, /* flash/eeprom clock divisor which set the flash clock to 20 MHz */
+ {0x0f003050, 0x00000021}, /* flash/eeprom clock divisor which
+ * set the flash clock to 20 MHz */
{0x0F00a084, 0x1Cffffff}, /* dump from here in internal memory */
{0x0F00a080, 0x1C000000},
{0x0F00A000, 0x00000016},
@@ -654,7 +667,8 @@ static struct bcm_ddr_setting asT3LPB_DDRSetting133MHz[] = { /* DPLL Clock Sett
};
#define T3LPB_SKIP_CLOCK_PROGRAM_DUMP_100MHZ 8 /* index for 0x0F007000 */
-static struct bcm_ddr_setting asT3LPB_DDRSetting100MHz[] = { /* DPLL Clock Setting */
+static struct bcm_ddr_setting asT3LPB_DDRSetting100MHz[] = {
+ /* DPLL Clock Setting */
{0x0f000810, 0x00002F95},
{0x0f000820, 0x03F1369B},
{0x0f000840, 0x0fff0000},
@@ -664,7 +678,8 @@ static struct bcm_ddr_setting asT3LPB_DDRSetting100MHz[] = { /* DPLL Clock Sett
{0x0f000840, 0x0FFF0000},
{0x0F00a044, 0x1fffffff},
{0x0F00a040, 0x1f000000},
- {0x0f003050, 0x00000021}, /* flash/eeprom clock divisor which set the flash clock to 20 MHz */
+ {0x0f003050, 0x00000021}, /* flash/eeprom clock divisor which
+ * set the flash clock to 20 MHz */
{0x0F00a084, 0x1Cffffff}, /* dump from here in internal memory */
{0x0F00a080, 0x1C000000},
/* Memcontroller Default values */
@@ -715,7 +730,8 @@ static struct bcm_ddr_setting asT3LPB_DDRSetting100MHz[] = { /* DPLL Clock Sett
};
#define T3LPB_SKIP_CLOCK_PROGRAM_DUMP_80MHZ 7 /* index for 0x0F007000 */
-static struct bcm_ddr_setting asT3LPB_DDRSetting80MHz[] = { /* DPLL Clock Setting */
+static struct bcm_ddr_setting asT3LPB_DDRSetting80MHz[] = {
+ /* DPLL Clock Setting */
{0x0f000820, 0x07F13FFF},
{0x0f000810, 0x00002F95},
{0x0f000860, 0x00000000},
@@ -723,7 +739,8 @@ static struct bcm_ddr_setting asT3LPB_DDRSetting80MHz[] = { /* DPLL Clock Setti
{0x0f000840, 0x0FFF1F00},
{0x0F00a044, 0x1fffffff},
{0x0F00a040, 0x1f000000},
- {0x0f003050, 0x00000021}, /* flash/eeprom clock divisor which set the flash clock to 20 MHz */
+ {0x0f003050, 0x00000021}, /* flash/eeprom clock divisor
+ * which set the flash clock to 20 MHz */
{0x0F00a084, 0x1Cffffff}, /* dump from here in internal memory */
{0x0F00a080, 0x1C000000},
{0x0F00A000, 0x00000016},
@@ -776,7 +793,7 @@ int ddr_init(struct bcm_mini_adapter *Adapter)
struct bcm_ddr_setting *psDDRSetting = NULL;
ULONG RegCount = 0;
UINT value = 0;
- UINT uiResetValue = 0;
+ UINT uiResetValue = 0;
UINT uiClockSetting = 0;
int retval = STATUS_SUCCESS;
@@ -785,18 +802,18 @@ int ddr_init(struct bcm_mini_adapter *Adapter)
switch (Adapter->DDRSetting) {
case DDR_80_MHZ:
psDDRSetting = asT3LP_DDRSetting80MHz;
- RegCount = (sizeof(asT3LP_DDRSetting80MHz)/
- sizeof(struct bcm_ddr_setting));
+ RegCount = (sizeof(asT3LP_DDRSetting80MHz) /
+ sizeof(struct bcm_ddr_setting));
break;
case DDR_100_MHZ:
psDDRSetting = asT3LP_DDRSetting100MHz;
- RegCount = (sizeof(asT3LP_DDRSetting100MHz)/
- sizeof(struct bcm_ddr_setting));
+ RegCount = (sizeof(asT3LP_DDRSetting100MHz) /
+ sizeof(struct bcm_ddr_setting));
break;
case DDR_133_MHZ:
psDDRSetting = asT3LP_DDRSetting133MHz;
- RegCount = (sizeof(asT3LP_DDRSetting133MHz)/
- sizeof(struct bcm_ddr_setting));
+ RegCount = (sizeof(asT3LP_DDRSetting133MHz) /
+ sizeof(struct bcm_ddr_setting));
if (Adapter->bMipsConfig == MIPS_200_MHZ)
uiClockSetting = 0x03F13652;
else
@@ -818,15 +835,21 @@ int ddr_init(struct bcm_mini_adapter *Adapter)
if ((Adapter->chip_id != BCS220_2) &&
(Adapter->chip_id != BCS220_2BC) &&
(Adapter->chip_id != BCS220_3)) {
- retval = rdmalt(Adapter, (UINT)0x0f000830, &uiResetValue, sizeof(uiResetValue));
+ retval = rdmalt(Adapter, (UINT)0x0f000830, &uiResetValue,
+ sizeof(uiResetValue));
if (retval < 0) {
- BCM_DEBUG_PRINT(Adapter, CMHOST, RDM, DBG_LVL_ALL, "%s:%d RDM failed\n", __func__, __LINE__);
+ BCM_DEBUG_PRINT(Adapter, CMHOST, RDM, DBG_LVL_ALL,
+ "%s:%d RDM failed\n",
+ __func__, __LINE__);
return retval;
}
uiResetValue |= 0x44;
- retval = wrmalt(Adapter, (UINT)0x0f000830, &uiResetValue, sizeof(uiResetValue));
+ retval = wrmalt(Adapter, (UINT)0x0f000830, &uiResetValue,
+ sizeof(uiResetValue));
if (retval < 0) {
- BCM_DEBUG_PRINT(Adapter, CMHOST, RDM, DBG_LVL_ALL, "%s:%d RDM failed\n", __func__, __LINE__);
+ BCM_DEBUG_PRINT(Adapter, CMHOST, RDM, DBG_LVL_ALL,
+ "%s:%d RDM failed\n",
+ __func__, __LINE__);
return retval;
}
}
@@ -836,18 +859,18 @@ int ddr_init(struct bcm_mini_adapter *Adapter)
case DDR_80_MHZ:
psDDRSetting = asT3LPB_DDRSetting80MHz;
- RegCount = (sizeof(asT3B_DDRSetting80MHz)/
- sizeof(struct bcm_ddr_setting));
+ RegCount = (sizeof(asT3B_DDRSetting80MHz) /
+ sizeof(struct bcm_ddr_setting));
break;
case DDR_100_MHZ:
psDDRSetting = asT3LPB_DDRSetting100MHz;
- RegCount = (sizeof(asT3B_DDRSetting100MHz)/
- sizeof(struct bcm_ddr_setting));
+ RegCount = (sizeof(asT3B_DDRSetting100MHz) /
+ sizeof(struct bcm_ddr_setting));
break;
case DDR_133_MHZ:
psDDRSetting = asT3LPB_DDRSetting133MHz;
- RegCount = (sizeof(asT3B_DDRSetting133MHz)/
- sizeof(struct bcm_ddr_setting));
+ RegCount = (sizeof(asT3B_DDRSetting133MHz) /
+ sizeof(struct bcm_ddr_setting));
if (Adapter->bMipsConfig == MIPS_200_MHZ)
uiClockSetting = 0x03F13652;
@@ -857,7 +880,8 @@ int ddr_init(struct bcm_mini_adapter *Adapter)
case DDR_160_MHZ:
psDDRSetting = asT3LPB_DDRSetting160MHz;
- RegCount = sizeof(asT3LPB_DDRSetting160MHz)/sizeof(struct bcm_ddr_setting);
+ RegCount = sizeof(asT3LPB_DDRSetting160MHz) /
+ sizeof(struct bcm_ddr_setting);
if (Adapter->bMipsConfig == MIPS_200_MHZ)
uiClockSetting = 0x03F137D2;
@@ -871,22 +895,23 @@ int ddr_init(struct bcm_mini_adapter *Adapter)
case 0xbece0121:
case 0xbece0130:
case 0xbece0300:
- BCM_DEBUG_PRINT(Adapter, DBG_TYPE_INITEXIT, DRV_ENTRY, DBG_LVL_ALL, "DDR Setting: %x\n", Adapter->DDRSetting);
+ BCM_DEBUG_PRINT(Adapter, DBG_TYPE_INITEXIT, DRV_ENTRY, DBG_LVL_ALL,
+ "DDR Setting: %x\n", Adapter->DDRSetting);
switch (Adapter->DDRSetting) {
case DDR_80_MHZ:
psDDRSetting = asT3_DDRSetting80MHz;
- RegCount = (sizeof(asT3_DDRSetting80MHz)/
- sizeof(struct bcm_ddr_setting));
+ RegCount = (sizeof(asT3_DDRSetting80MHz) /
+ sizeof(struct bcm_ddr_setting));
break;
case DDR_100_MHZ:
psDDRSetting = asT3_DDRSetting100MHz;
- RegCount = (sizeof(asT3_DDRSetting100MHz)/
- sizeof(struct bcm_ddr_setting));
+ RegCount = (sizeof(asT3_DDRSetting100MHz) /
+ sizeof(struct bcm_ddr_setting));
break;
case DDR_133_MHZ:
psDDRSetting = asT3_DDRSetting133MHz;
- RegCount = (sizeof(asT3_DDRSetting133MHz)/
- sizeof(struct bcm_ddr_setting));
+ RegCount = (sizeof(asT3_DDRSetting133MHz) /
+ sizeof(struct bcm_ddr_setting));
break;
default:
return -EINVAL;
@@ -896,26 +921,27 @@ int ddr_init(struct bcm_mini_adapter *Adapter)
switch (Adapter->DDRSetting) {
case DDR_80_MHZ:
psDDRSetting = asT3B_DDRSetting80MHz;
- RegCount = (sizeof(asT3B_DDRSetting80MHz)/
- sizeof(struct bcm_ddr_setting));
+ RegCount = (sizeof(asT3B_DDRSetting80MHz) /
+ sizeof(struct bcm_ddr_setting));
break;
case DDR_100_MHZ:
psDDRSetting = asT3B_DDRSetting100MHz;
- RegCount = (sizeof(asT3B_DDRSetting100MHz)/
- sizeof(struct bcm_ddr_setting));
+ RegCount = (sizeof(asT3B_DDRSetting100MHz) /
+ sizeof(struct bcm_ddr_setting));
break;
case DDR_133_MHZ:
- if (Adapter->bDPLLConfig == PLL_266_MHZ) { /* 266Mhz PLL selected. */
+ /* 266Mhz PLL selected. */
+ if (Adapter->bDPLLConfig == PLL_266_MHZ) {
memcpy(asT3B_DDRSetting133MHz, asDPLL_266MHZ,
- sizeof(asDPLL_266MHZ));
+ sizeof(asDPLL_266MHZ));
psDDRSetting = asT3B_DDRSetting133MHz;
- RegCount = (sizeof(asT3B_DDRSetting133MHz)/
- sizeof(struct bcm_ddr_setting));
+ RegCount = (sizeof(asT3B_DDRSetting133MHz) /
+ sizeof(struct bcm_ddr_setting));
} else {
psDDRSetting = asT3B_DDRSetting133MHz;
- RegCount = (sizeof(asT3B_DDRSetting133MHz)/
- sizeof(struct bcm_ddr_setting));
+ RegCount = (sizeof(asT3B_DDRSetting133MHz) /
+ sizeof(struct bcm_ddr_setting));
if (Adapter->bMipsConfig == MIPS_200_MHZ)
uiClockSetting = 0x07F13652;
else
@@ -933,15 +959,19 @@ int ddr_init(struct bcm_mini_adapter *Adapter)
}
value = 0;
- BCM_DEBUG_PRINT(Adapter, DBG_TYPE_INITEXIT, DRV_ENTRY, DBG_LVL_ALL, "Register Count is =%lu\n", RegCount);
+ BCM_DEBUG_PRINT(Adapter, DBG_TYPE_INITEXIT, DRV_ENTRY, DBG_LVL_ALL,
+ "Register Count is =%lu\n", RegCount);
while (RegCount && !retval) {
- if (uiClockSetting && psDDRSetting->ulRegAddress == MIPS_CLOCK_REG)
+ if (uiClockSetting
+ && psDDRSetting->ulRegAddress == MIPS_CLOCK_REG)
value = uiClockSetting;
else
value = psDDRSetting->ulRegValue;
- retval = wrmalt(Adapter, psDDRSetting->ulRegAddress, &value, sizeof(value));
+ retval = wrmalt(Adapter, psDDRSetting->ulRegAddress, &value,
+ sizeof(value));
if (STATUS_SUCCESS != retval) {
- BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "%s:%d\n", __func__, __LINE__);
+ BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0,
+ "%s:%d\n", __func__, __LINE__);
break;
}
@@ -957,27 +987,47 @@ int ddr_init(struct bcm_mini_adapter *Adapter)
(Adapter->chip_id != BCS220_3)) {
/* drive MDDR to half in case of UMA-B: */
uiResetValue = 0x01010001;
- retval = wrmalt(Adapter, (UINT)0x0F007018, &uiResetValue, sizeof(uiResetValue));
+ retval = wrmalt(Adapter, (UINT)0x0F007018,
+ &uiResetValue, sizeof(uiResetValue));
if (retval < 0) {
- BCM_DEBUG_PRINT(Adapter, CMHOST, RDM, DBG_LVL_ALL, "%s:%d RDM failed\n", __func__, __LINE__);
+ BCM_DEBUG_PRINT(Adapter, CMHOST, RDM,
+ DBG_LVL_ALL,
+ "%s:%d RDM failed\n",
+ __func__,
+ __LINE__);
return retval;
}
uiResetValue = 0x00040020;
- retval = wrmalt(Adapter, (UINT)0x0F007094, &uiResetValue, sizeof(uiResetValue));
+ retval = wrmalt(Adapter, (UINT)0x0F007094,
+ &uiResetValue, sizeof(uiResetValue));
if (retval < 0) {
- BCM_DEBUG_PRINT(Adapter, CMHOST, RDM, DBG_LVL_ALL, "%s:%d RDM failed\n", __func__, __LINE__);
+ BCM_DEBUG_PRINT(Adapter, CMHOST, RDM,
+ DBG_LVL_ALL,
+ "%s:%d RDM failed\n",
+ __func__,
+ __LINE__);
return retval;
}
uiResetValue = 0x01020101;
- retval = wrmalt(Adapter, (UINT)0x0F00701c, &uiResetValue, sizeof(uiResetValue));
+ retval = wrmalt(Adapter, (UINT)0x0F00701c,
+ &uiResetValue, sizeof(uiResetValue));
if (retval < 0) {
- BCM_DEBUG_PRINT(Adapter, CMHOST, RDM, DBG_LVL_ALL, "%s:%d RDM failed\n", __func__, __LINE__);
+ BCM_DEBUG_PRINT(Adapter, CMHOST, RDM,
+ DBG_LVL_ALL,
+ "%s:%d RDM failed\n",
+ __func__,
+ __LINE__);
return retval;
}
uiResetValue = 0x01010000;
- retval = wrmalt(Adapter, (UINT)0x0F007018, &uiResetValue, sizeof(uiResetValue));
+ retval = wrmalt(Adapter, (UINT)0x0F007018,
+ &uiResetValue, sizeof(uiResetValue));
if (retval < 0) {
- BCM_DEBUG_PRINT(Adapter, CMHOST, RDM, DBG_LVL_ALL, "%s:%d RDM failed\n", __func__, __LINE__);
+ BCM_DEBUG_PRINT(Adapter, CMHOST, RDM,
+ DBG_LVL_ALL,
+ "%s:%d RDM failed\n",
+ __func__,
+ __LINE__);
return retval;
}
}
@@ -986,74 +1036,135 @@ int ddr_init(struct bcm_mini_adapter *Adapter)
/* DC/DC standby change...
* This is to be done only for Hybrid PMU mode.
* with the current h/w there is no way to detect this.
- * and since we dont have internal PMU lets do it under UMA-B chip id.
- * we will change this when we will have internal PMU.
+ * and since we dont have internal PMU lets do it under
+ * UMA-B chip id. we will change this when we will have
+ * internal PMU.
*/
if (Adapter->PmuMode == HYBRID_MODE_7C) {
- retval = rdmalt(Adapter, (UINT)0x0f000c00, &uiResetValue, sizeof(uiResetValue));
+ retval = rdmalt(Adapter, (UINT)0x0f000c00,
+ &uiResetValue, sizeof(uiResetValue));
if (retval < 0) {
- BCM_DEBUG_PRINT(Adapter, CMHOST, RDM, DBG_LVL_ALL, "%s:%d RDM failed\n", __func__, __LINE__);
+ BCM_DEBUG_PRINT(Adapter, CMHOST, RDM,
+ DBG_LVL_ALL,
+ "%s:%d RDM failed\n",
+ __func__,
+ __LINE__);
return retval;
}
- retval = rdmalt(Adapter, (UINT)0x0f000c00, &uiResetValue, sizeof(uiResetValue));
+ retval = rdmalt(Adapter, (UINT)0x0f000c00,
+ &uiResetValue, sizeof(uiResetValue));
if (retval < 0) {
- BCM_DEBUG_PRINT(Adapter, CMHOST, RDM, DBG_LVL_ALL, "%s:%d RDM failed\n", __func__, __LINE__);
+ BCM_DEBUG_PRINT(Adapter, CMHOST, RDM,
+ DBG_LVL_ALL,
+ "%s:%d RDM failed\n",
+ __func__,
+ __LINE__);
return retval;
}
uiResetValue = 0x1322a8;
- retval = wrmalt(Adapter, (UINT)0x0f000d1c, &uiResetValue, sizeof(uiResetValue));
+ retval = wrmalt(Adapter, (UINT)0x0f000d1c,
+ &uiResetValue, sizeof(uiResetValue));
if (retval < 0) {
- BCM_DEBUG_PRINT(Adapter, CMHOST, RDM, DBG_LVL_ALL, "%s:%d RDM failed\n", __func__, __LINE__);
+ BCM_DEBUG_PRINT(Adapter, CMHOST, RDM,
+ DBG_LVL_ALL,
+ "%s:%d RDM failed\n",
+ __func__,
+ __LINE__);
return retval;
}
- retval = rdmalt(Adapter, (UINT)0x0f000c00, &uiResetValue, sizeof(uiResetValue));
+ retval = rdmalt(Adapter, (UINT)0x0f000c00,
+ &uiResetValue, sizeof(uiResetValue));
if (retval < 0) {
- BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, RDM, DBG_LVL_ALL, "%s:%d RDM failed\n", __func__, __LINE__);
+ BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, RDM,
+ DBG_LVL_ALL,
+ "%s:%d RDM failed\n",
+ __func__,
+ __LINE__);
return retval;
}
- retval = rdmalt(Adapter, (UINT)0x0f000c00, &uiResetValue, sizeof(uiResetValue));
+ retval = rdmalt(Adapter, (UINT)0x0f000c00,
+ &uiResetValue, sizeof(uiResetValue));
if (retval < 0) {
- BCM_DEBUG_PRINT(Adapter, CMHOST, RDM, DBG_LVL_ALL, "%s:%d RDM failed\n", __func__, __LINE__);
+ BCM_DEBUG_PRINT(Adapter, CMHOST, RDM,
+ DBG_LVL_ALL,
+ "%s:%d RDM failed\n",
+ __func__,
+ __LINE__);
return retval;
}
uiResetValue = 0x132296;
- retval = wrmalt(Adapter, (UINT)0x0f000d14, &uiResetValue, sizeof(uiResetValue));
+ retval = wrmalt(Adapter, (UINT)0x0f000d14,
+ &uiResetValue, sizeof(uiResetValue));
if (retval < 0) {
- BCM_DEBUG_PRINT(Adapter, CMHOST, RDM, DBG_LVL_ALL, "%s:%d RDM failed\n", __func__, __LINE__);
+ BCM_DEBUG_PRINT(Adapter, CMHOST, RDM,
+ DBG_LVL_ALL,
+ "%s:%d RDM failed\n",
+ __func__,
+ __LINE__);
return retval;
}
} else if (Adapter->PmuMode == HYBRID_MODE_6) {
- retval = rdmalt(Adapter, (UINT)0x0f000c00, &uiResetValue, sizeof(uiResetValue));
+ retval = rdmalt(Adapter, (UINT)0x0f000c00,
+ &uiResetValue, sizeof(uiResetValue));
if (retval < 0) {
- BCM_DEBUG_PRINT(Adapter, CMHOST, RDM, DBG_LVL_ALL, "%s:%d RDM failed\n", __func__, __LINE__);
+ BCM_DEBUG_PRINT(Adapter, CMHOST, RDM,
+ DBG_LVL_ALL,
+ "%s:%d RDM failed\n",
+ __func__,
+ __LINE__);
return retval;
}
- retval = rdmalt(Adapter, (UINT)0x0f000c00, &uiResetValue, sizeof(uiResetValue));
+ retval = rdmalt(Adapter, (UINT)0x0f000c00,
+ &uiResetValue, sizeof(uiResetValue));
if (retval < 0) {
- BCM_DEBUG_PRINT(Adapter, CMHOST, RDM, DBG_LVL_ALL, "%s:%d RDM failed\n", __func__, __LINE__);
+ BCM_DEBUG_PRINT(Adapter, CMHOST, RDM,
+ DBG_LVL_ALL,
+ "%s:%d RDM failed\n",
+ __func__,
+ __LINE__);
return retval;
}
uiResetValue = 0x6003229a;
- retval = wrmalt(Adapter, (UINT)0x0f000d14, &uiResetValue, sizeof(uiResetValue));
+ retval = wrmalt(Adapter, (UINT)0x0f000d14,
+ &uiResetValue, sizeof(uiResetValue));
if (retval < 0) {
- BCM_DEBUG_PRINT(Adapter, CMHOST, RDM, DBG_LVL_ALL, "%s:%d RDM failed\n", __func__, __LINE__);
+ BCM_DEBUG_PRINT(Adapter, CMHOST, RDM,
+ DBG_LVL_ALL,
+ "%s:%d RDM failed\n",
+ __func__,
+ __LINE__);
return retval;
}
- retval = rdmalt(Adapter, (UINT)0x0f000c00, &uiResetValue, sizeof(uiResetValue));
+ retval = rdmalt(Adapter, (UINT)0x0f000c00,
+ &uiResetValue, sizeof(uiResetValue));
if (retval < 0) {
- BCM_DEBUG_PRINT(Adapter, CMHOST, RDM, DBG_LVL_ALL, "%s:%d RDM failed\n", __func__, __LINE__);
+ BCM_DEBUG_PRINT(Adapter, CMHOST, RDM,
+ DBG_LVL_ALL,
+ "%s:%d RDM failed\n",
+ __func__,
+ __LINE__);
return retval;
}
- retval = rdmalt(Adapter, (UINT)0x0f000c00, &uiResetValue, sizeof(uiResetValue));
+ retval = rdmalt(Adapter, (UINT)0x0f000c00,
+ &uiResetValue, sizeof(uiResetValue));
if (retval < 0) {
- BCM_DEBUG_PRINT(Adapter, CMHOST, RDM, DBG_LVL_ALL, "%s:%d RDM failed\n", __func__, __LINE__);
+ BCM_DEBUG_PRINT(Adapter, CMHOST, RDM,
+ DBG_LVL_ALL,
+ "%s:%d RDM failed\n",
+ __func__,
+ __LINE__);
return retval;
}
uiResetValue = 0x1322a8;
- retval = wrmalt(Adapter, (UINT)0x0f000d1c, &uiResetValue, sizeof(uiResetValue));
+ retval = wrmalt(Adapter, (UINT)0x0f000d1c,
+ &uiResetValue, sizeof(uiResetValue));
if (retval < 0) {
- BCM_DEBUG_PRINT(Adapter, CMHOST, RDM, DBG_LVL_ALL, "%s:%d RDM failed\n", __func__, __LINE__);
+ BCM_DEBUG_PRINT(Adapter, CMHOST, RDM,
+ DBG_LVL_ALL,
+ "%s:%d RDM failed\n",
+ __func__,
+ __LINE__);
return retval;
}
}
@@ -1067,8 +1178,9 @@ int download_ddr_settings(struct bcm_mini_adapter *Adapter)
{
struct bcm_ddr_setting *psDDRSetting = NULL;
ULONG RegCount = 0;
- unsigned long ul_ddr_setting_load_addr = DDR_DUMP_INTERNAL_DEVICE_MEMORY;
- UINT value = 0;
+ unsigned long ul_ddr_setting_load_addr =
+ DDR_DUMP_INTERNAL_DEVICE_MEMORY;
+ UINT value = 0;
int retval = STATUS_SUCCESS;
bool bOverrideSelfRefresh = false;
@@ -1191,18 +1303,22 @@ int download_ddr_settings(struct bcm_mini_adapter *Adapter)
}
/* total number of Register that has to be dumped */
value = RegCount;
- retval = wrmalt(Adapter, ul_ddr_setting_load_addr, &value, sizeof(value));
+ retval = wrmalt(Adapter, ul_ddr_setting_load_addr, &value,
+ sizeof(value));
if (retval) {
- BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "%s:%d\n", __func__, __LINE__);
+ BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0,
+ "%s:%d\n", __func__, __LINE__);
return retval;
}
ul_ddr_setting_load_addr += sizeof(ULONG);
/* signature */
value = (0x1d1e0dd0);
- retval = wrmalt(Adapter, ul_ddr_setting_load_addr, &value, sizeof(value));
+ retval = wrmalt(Adapter, ul_ddr_setting_load_addr, &value,
+ sizeof(value));
if (retval) {
- BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "%s:%d\n", __func__, __LINE__);
+ BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0,
+ "%s:%d\n", __func__, __LINE__);
return retval;
}
@@ -1211,29 +1327,29 @@ int download_ddr_settings(struct bcm_mini_adapter *Adapter)
while (RegCount && !retval) {
value = psDDRSetting->ulRegAddress;
- retval = wrmalt(Adapter, ul_ddr_setting_load_addr, &value, sizeof(value));
+ retval = wrmalt(Adapter, ul_ddr_setting_load_addr, &value,
+ sizeof(value));
ul_ddr_setting_load_addr += sizeof(ULONG);
if (!retval) {
- if (bOverrideSelfRefresh && (psDDRSetting->ulRegAddress == 0x0F007018)) {
+ if (bOverrideSelfRefresh
+ && (psDDRSetting->ulRegAddress
+ == 0x0F007018))
value = (psDDRSetting->ulRegValue | (1<<8));
- if (STATUS_SUCCESS != wrmalt(Adapter, ul_ddr_setting_load_addr,
- &value, sizeof(value))) {
- BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "%s:%d\n", __func__, __LINE__);
- break;
- }
- } else {
- value = psDDRSetting->ulRegValue;
+ else
+ value = psDDRSetting->ulRegValue;
- if (STATUS_SUCCESS != wrmalt(Adapter, ul_ddr_setting_load_addr ,
- &value, sizeof(value))) {
- BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "%s:%d\n", __func__, __LINE__);
- break;
- }
+ if (STATUS_SUCCESS != wrmalt(Adapter,
+ ul_ddr_setting_load_addr,
+ &value,
+ sizeof(value))) {
+ BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0,
+ "%s:%d\n", __func__, __LINE__);
+ break;
}
}
ul_ddr_setting_load_addr += sizeof(ULONG);
RegCount--;
psDDRSetting++;
}
- return retval;
+ return retval;
}
Copyright © 1996 – 2023 Jason A. Donenfeld. All Rights Reverse Engineered.