aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/staging/brcm80211/include/sbsdpcmdev.h
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/staging/brcm80211/include/sbsdpcmdev.h')
-rw-r--r--drivers/staging/brcm80211/include/sbsdpcmdev.h80
1 files changed, 40 insertions, 40 deletions
diff --git a/drivers/staging/brcm80211/include/sbsdpcmdev.h b/drivers/staging/brcm80211/include/sbsdpcmdev.h
index ac68e150c881..afd35811d4a5 100644
--- a/drivers/staging/brcm80211/include/sbsdpcmdev.h
+++ b/drivers/staging/brcm80211/include/sbsdpcmdev.h
@@ -26,38 +26,38 @@
typedef volatile struct {
dma64regs_t xmt; /* dma tx */
- uint32 PAD[2];
+ u32 PAD[2];
dma64regs_t rcv; /* dma rx */
- uint32 PAD[2];
+ u32 PAD[2];
} dma64p_t;
/* dma64 sdiod corerev >= 1 */
typedef volatile struct {
dma64p_t dma64regs[2];
dma64diag_t dmafifo; /* DMA Diagnostic Regs, 0x280-0x28c */
- uint32 PAD[92];
+ u32 PAD[92];
} sdiodma64_t;
/* dma32 sdiod corerev == 0 */
typedef volatile struct {
dma32regp_t dma32regs[2]; /* dma tx & rx, 0x200-0x23c */
dma32diag_t dmafifo; /* DMA Diagnostic Regs, 0x240-0x24c */
- uint32 PAD[108];
+ u32 PAD[108];
} sdiodma32_t;
/* dma32 regs for pcmcia core */
typedef volatile struct {
dma32regp_t dmaregs; /* DMA Regs, 0x200-0x21c, rev8 */
dma32diag_t dmafifo; /* DMA Diagnostic Regs, 0x220-0x22c */
- uint32 PAD[116];
+ u32 PAD[116];
} pcmdma32_t;
/* core registers */
typedef volatile struct {
- uint32 corecontrol; /* CoreControl, 0x000, rev8 */
- uint32 corestatus; /* CoreStatus, 0x004, rev8 */
- uint32 PAD[1];
- uint32 biststatus; /* BistStatus, 0x00c, rev8 */
+ u32 corecontrol; /* CoreControl, 0x000, rev8 */
+ u32 corestatus; /* CoreStatus, 0x004, rev8 */
+ u32 PAD[1];
+ u32 biststatus; /* BistStatus, 0x00c, rev8 */
/* PCMCIA access */
u16 pcmciamesportaladdr; /* PcmciaMesPortalAddr, 0x010, rev8 */
@@ -70,21 +70,21 @@ typedef volatile struct {
u16 PAD[1];
/* interrupt */
- uint32 intstatus; /* IntStatus, 0x020, rev8 */
- uint32 hostintmask; /* IntHostMask, 0x024, rev8 */
- uint32 intmask; /* IntSbMask, 0x028, rev8 */
- uint32 sbintstatus; /* SBIntStatus, 0x02c, rev8 */
- uint32 sbintmask; /* SBIntMask, 0x030, rev8 */
- uint32 funcintmask; /* SDIO Function Interrupt Mask, SDIO rev4 */
- uint32 PAD[2];
- uint32 tosbmailbox; /* ToSBMailbox, 0x040, rev8 */
- uint32 tohostmailbox; /* ToHostMailbox, 0x044, rev8 */
- uint32 tosbmailboxdata; /* ToSbMailboxData, 0x048, rev8 */
- uint32 tohostmailboxdata; /* ToHostMailboxData, 0x04c, rev8 */
+ u32 intstatus; /* IntStatus, 0x020, rev8 */
+ u32 hostintmask; /* IntHostMask, 0x024, rev8 */
+ u32 intmask; /* IntSbMask, 0x028, rev8 */
+ u32 sbintstatus; /* SBIntStatus, 0x02c, rev8 */
+ u32 sbintmask; /* SBIntMask, 0x030, rev8 */
+ u32 funcintmask; /* SDIO Function Interrupt Mask, SDIO rev4 */
+ u32 PAD[2];
+ u32 tosbmailbox; /* ToSBMailbox, 0x040, rev8 */
+ u32 tohostmailbox; /* ToHostMailbox, 0x044, rev8 */
+ u32 tosbmailboxdata; /* ToSbMailboxData, 0x048, rev8 */
+ u32 tohostmailboxdata; /* ToHostMailboxData, 0x04c, rev8 */
/* synchronized access to registers in SDIO clock domain */
- uint32 sdioaccess; /* SdioAccess, 0x050, rev8 */
- uint32 PAD[3];
+ u32 sdioaccess; /* SdioAccess, 0x050, rev8 */
+ u32 PAD[3];
/* PCMCIA frame control */
u8 pcmciaframectrl; /* pcmciaFrameCtrl, 0x060, rev8 */
@@ -93,25 +93,25 @@ typedef volatile struct {
u8 PAD[155];
/* interrupt batching control */
- uint32 intrcvlazy; /* IntRcvLazy, 0x100, rev8 */
- uint32 PAD[3];
+ u32 intrcvlazy; /* IntRcvLazy, 0x100, rev8 */
+ u32 PAD[3];
/* counters */
- uint32 cmd52rd; /* Cmd52RdCount, 0x110, rev8, SDIO: cmd52 reads */
- uint32 cmd52wr; /* Cmd52WrCount, 0x114, rev8, SDIO: cmd52 writes */
- uint32 cmd53rd; /* Cmd53RdCount, 0x118, rev8, SDIO: cmd53 reads */
- uint32 cmd53wr; /* Cmd53WrCount, 0x11c, rev8, SDIO: cmd53 writes */
- uint32 abort; /* AbortCount, 0x120, rev8, SDIO: aborts */
- uint32 datacrcerror; /* DataCrcErrorCount, 0x124, rev8, SDIO: frames w/bad CRC */
- uint32 rdoutofsync; /* RdOutOfSyncCount, 0x128, rev8, SDIO/PCMCIA: Rd Frm OOS */
- uint32 wroutofsync; /* RdOutOfSyncCount, 0x12c, rev8, SDIO/PCMCIA: Wr Frm OOS */
- uint32 writebusy; /* WriteBusyCount, 0x130, rev8, SDIO: dev asserted "busy" */
- uint32 readwait; /* ReadWaitCount, 0x134, rev8, SDIO: read: no data avail */
- uint32 readterm; /* ReadTermCount, 0x138, rev8, SDIO: rd frm terminates */
- uint32 writeterm; /* WriteTermCount, 0x13c, rev8, SDIO: wr frm terminates */
- uint32 PAD[40];
- uint32 clockctlstatus; /* ClockCtlStatus, 0x1e0, rev8 */
- uint32 PAD[7];
+ u32 cmd52rd; /* Cmd52RdCount, 0x110, rev8, SDIO: cmd52 reads */
+ u32 cmd52wr; /* Cmd52WrCount, 0x114, rev8, SDIO: cmd52 writes */
+ u32 cmd53rd; /* Cmd53RdCount, 0x118, rev8, SDIO: cmd53 reads */
+ u32 cmd53wr; /* Cmd53WrCount, 0x11c, rev8, SDIO: cmd53 writes */
+ u32 abort; /* AbortCount, 0x120, rev8, SDIO: aborts */
+ u32 datacrcerror; /* DataCrcErrorCount, 0x124, rev8, SDIO: frames w/bad CRC */
+ u32 rdoutofsync; /* RdOutOfSyncCount, 0x128, rev8, SDIO/PCMCIA: Rd Frm OOS */
+ u32 wroutofsync; /* RdOutOfSyncCount, 0x12c, rev8, SDIO/PCMCIA: Wr Frm OOS */
+ u32 writebusy; /* WriteBusyCount, 0x130, rev8, SDIO: dev asserted "busy" */
+ u32 readwait; /* ReadWaitCount, 0x134, rev8, SDIO: read: no data avail */
+ u32 readterm; /* ReadTermCount, 0x138, rev8, SDIO: rd frm terminates */
+ u32 writeterm; /* WriteTermCount, 0x13c, rev8, SDIO: wr frm terminates */
+ u32 PAD[40];
+ u32 clockctlstatus; /* ClockCtlStatus, 0x1e0, rev8 */
+ u32 PAD[7];
/* DMA engines */
volatile union {
@@ -141,7 +141,7 @@ typedef volatile struct {
/* sprom "size" & "blank" info */
u16 spromstatus; /* SPROMStatus, 0x7BE, rev2 */
- uint32 PAD[464];
+ u32 PAD[464];
/* Sonics SiliconBackplane registers */
sbconfig_t sbconfig; /* SbConfig Regs, 0xf00-0xfff, rev8 */