diff options
Diffstat (limited to 'drivers/staging/comedi/drivers/gsc_hpdi.c')
-rw-r--r-- | drivers/staging/comedi/drivers/gsc_hpdi.c | 87 |
1 files changed, 43 insertions, 44 deletions
diff --git a/drivers/staging/comedi/drivers/gsc_hpdi.c b/drivers/staging/comedi/drivers/gsc_hpdi.c index 63b5cbc44bda..af4b4175af4d 100644 --- a/drivers/staging/comedi/drivers/gsc_hpdi.c +++ b/drivers/staging/comedi/drivers/gsc_hpdi.c @@ -158,10 +158,7 @@ static void gsc_hpdi_drain_dma(struct comedi_device *dev, unsigned int channel) unsigned int size; unsigned int next; - if (channel) - next = readl(devpriv->plx9080_mmio + PLX_DMA1_PCI_ADDRESS_REG); - else - next = readl(devpriv->plx9080_mmio + PLX_DMA0_PCI_ADDRESS_REG); + next = readl(devpriv->plx9080_mmio + PLX_REG_DMAPADR(channel)); idx = devpriv->dma_desc_index; start = le32_to_cpu(devpriv->dma_desc[idx].pci_start_addr); @@ -201,8 +198,9 @@ static irqreturn_t gsc_hpdi_interrupt(int irq, void *d) if (!dev->attached) return IRQ_NONE; - plx_status = readl(devpriv->plx9080_mmio + PLX_INTRCS_REG); - if ((plx_status & (ICS_DMA0_A | ICS_DMA1_A | ICS_LIA)) == 0) + plx_status = readl(devpriv->plx9080_mmio + PLX_REG_INTCSR); + if ((plx_status & + (PLX_INTCSR_DMA0IA | PLX_INTCSR_DMA1IA | PLX_INTCSR_PLIA)) == 0) return IRQ_NONE; hpdi_intr_status = readl(dev->mmio + INTERRUPT_STATUS_REG); @@ -213,32 +211,32 @@ static irqreturn_t gsc_hpdi_interrupt(int irq, void *d) /* spin lock makes sure no one else changes plx dma control reg */ spin_lock_irqsave(&dev->spinlock, flags); - dma0_status = readb(devpriv->plx9080_mmio + PLX_DMA0_CS_REG); - if (plx_status & ICS_DMA0_A) { + dma0_status = readb(devpriv->plx9080_mmio + PLX_REG_DMACSR0); + if (plx_status & PLX_INTCSR_DMA0IA) { /* dma chan 0 interrupt */ - writeb((dma0_status & PLX_DMA_EN_BIT) | PLX_CLEAR_DMA_INTR_BIT, - devpriv->plx9080_mmio + PLX_DMA0_CS_REG); + writeb((dma0_status & PLX_DMACSR_ENABLE) | PLX_DMACSR_CLEARINTR, + devpriv->plx9080_mmio + PLX_REG_DMACSR0); - if (dma0_status & PLX_DMA_EN_BIT) + if (dma0_status & PLX_DMACSR_ENABLE) gsc_hpdi_drain_dma(dev, 0); } spin_unlock_irqrestore(&dev->spinlock, flags); /* spin lock makes sure no one else changes plx dma control reg */ spin_lock_irqsave(&dev->spinlock, flags); - dma1_status = readb(devpriv->plx9080_mmio + PLX_DMA1_CS_REG); - if (plx_status & ICS_DMA1_A) { + dma1_status = readb(devpriv->plx9080_mmio + PLX_REG_DMACSR1); + if (plx_status & PLX_INTCSR_DMA1IA) { /* XXX */ /* dma chan 1 interrupt */ - writeb((dma1_status & PLX_DMA_EN_BIT) | PLX_CLEAR_DMA_INTR_BIT, - devpriv->plx9080_mmio + PLX_DMA1_CS_REG); + writeb((dma1_status & PLX_DMACSR_ENABLE) | PLX_DMACSR_CLEARINTR, + devpriv->plx9080_mmio + PLX_REG_DMACSR1); } spin_unlock_irqrestore(&dev->spinlock, flags); /* clear possible plx9080 interrupt sources */ - if (plx_status & ICS_LDIA) { + if (plx_status & PLX_INTCSR_LDBIA) { /* clear local doorbell interrupt */ - plx_bits = readl(devpriv->plx9080_mmio + PLX_DBR_OUT_REG); - writel(plx_bits, devpriv->plx9080_mmio + PLX_DBR_OUT_REG); + plx_bits = readl(devpriv->plx9080_mmio + PLX_REG_L2PDBELL); + writel(plx_bits, devpriv->plx9080_mmio + PLX_REG_L2PDBELL); } if (hpdi_board_status & RX_OVERRUN_BIT) { @@ -307,19 +305,19 @@ static int gsc_hpdi_cmd(struct comedi_device *dev, * occasionally cause problems with transfer of first dma * block. Initializing them to zero seems to fix the problem. */ - writel(0, devpriv->plx9080_mmio + PLX_DMA0_TRANSFER_SIZE_REG); - writel(0, devpriv->plx9080_mmio + PLX_DMA0_PCI_ADDRESS_REG); - writel(0, devpriv->plx9080_mmio + PLX_DMA0_LOCAL_ADDRESS_REG); + writel(0, devpriv->plx9080_mmio + PLX_REG_DMASIZ0); + writel(0, devpriv->plx9080_mmio + PLX_REG_DMAPADR0); + writel(0, devpriv->plx9080_mmio + PLX_REG_DMALADR0); /* give location of first dma descriptor */ - bits = devpriv->dma_desc_phys_addr | PLX_DESC_IN_PCI_BIT | - PLX_INTR_TERM_COUNT | PLX_XFER_LOCAL_TO_PCI; - writel(bits, devpriv->plx9080_mmio + PLX_DMA0_DESCRIPTOR_REG); + bits = devpriv->dma_desc_phys_addr | PLX_DMADPR_DESCPCI | + PLX_DMADPR_TCINTR | PLX_DMADPR_XFERL2P; + writel(bits, devpriv->plx9080_mmio + PLX_REG_DMADPR0); /* enable dma transfer */ spin_lock_irqsave(&dev->spinlock, flags); - writeb(PLX_DMA_EN_BIT | PLX_DMA_START_BIT | PLX_CLEAR_DMA_INTR_BIT, - devpriv->plx9080_mmio + PLX_DMA0_CS_REG); + writeb(PLX_DMACSR_ENABLE | PLX_DMACSR_START | PLX_DMACSR_CLEARINTR, + devpriv->plx9080_mmio + PLX_REG_DMACSR0); spin_unlock_irqrestore(&dev->spinlock, flags); if (cmd->stop_src == TRIG_COUNT) @@ -424,8 +422,8 @@ static int gsc_hpdi_setup_dma_descriptors(struct comedi_device *dev, { struct hpdi_private *devpriv = dev->private; dma_addr_t phys_addr = devpriv->dma_desc_phys_addr; - u32 next_bits = PLX_DESC_IN_PCI_BIT | PLX_INTR_TERM_COUNT | - PLX_XFER_LOCAL_TO_PCI; + u32 next_bits = PLX_DMADPR_DESCPCI | PLX_DMADPR_TCINTR | + PLX_DMADPR_XFERL2P; unsigned int offset = 0; unsigned int idx = 0; unsigned int i; @@ -536,9 +534,10 @@ static int gsc_hpdi_init(struct comedi_device *dev) /* enable interrupts */ plx_intcsr_bits = - ICS_AERR | ICS_PERR | ICS_PIE | ICS_PLIE | ICS_PAIE | ICS_LIE | - ICS_DMA0_E; - writel(plx_intcsr_bits, devpriv->plx9080_mmio + PLX_INTRCS_REG); + PLX_INTCSR_LSEABORTEN | PLX_INTCSR_LSEPARITYEN | PLX_INTCSR_PIEN | + PLX_INTCSR_PLIEN | PLX_INTCSR_PABORTIEN | PLX_INTCSR_LIOEN | + PLX_INTCSR_DMA0IEN; + writel(plx_intcsr_bits, devpriv->plx9080_mmio + PLX_REG_INTCSR); return 0; } @@ -550,13 +549,13 @@ static void gsc_hpdi_init_plx9080(struct comedi_device *dev) void __iomem *plx_iobase = devpriv->plx9080_mmio; #ifdef __BIG_ENDIAN - bits = BIGEND_DMA0 | BIGEND_DMA1; + bits = PLX_BIGEND_DMA0 | PLX_BIGEND_DMA1; #else bits = 0; #endif - writel(bits, devpriv->plx9080_mmio + PLX_BIGEND_REG); + writel(bits, devpriv->plx9080_mmio + PLX_REG_BIGEND); - writel(0, devpriv->plx9080_mmio + PLX_INTRCS_REG); + writel(0, devpriv->plx9080_mmio + PLX_REG_INTCSR); gsc_hpdi_abort_dma(dev, 0); gsc_hpdi_abort_dma(dev, 1); @@ -564,27 +563,27 @@ static void gsc_hpdi_init_plx9080(struct comedi_device *dev) /* configure dma0 mode */ bits = 0; /* enable ready input */ - bits |= PLX_DMA_EN_READYIN_BIT; + bits |= PLX_DMAMODE_READYIEN; /* enable dma chaining */ - bits |= PLX_EN_CHAIN_BIT; + bits |= PLX_DMAMODE_CHAINEN; /* * enable interrupt on dma done * (probably don't need this, since chain never finishes) */ - bits |= PLX_EN_DMA_DONE_INTR_BIT; + bits |= PLX_DMAMODE_DONEIEN; /* * don't increment local address during transfers * (we are transferring from a fixed fifo register) */ - bits |= PLX_LOCAL_ADDR_CONST_BIT; + bits |= PLX_DMAMODE_LACONST; /* route dma interrupt to pci bus */ - bits |= PLX_DMA_INTR_PCI_BIT; + bits |= PLX_DMAMODE_INTRPCI; /* enable demand mode */ - bits |= PLX_DEMAND_MODE_BIT; + bits |= PLX_DMAMODE_DEMAND; /* enable local burst mode */ - bits |= PLX_DMA_LOCAL_BURST_EN_BIT; - bits |= PLX_LOCAL_BUS_32_WIDE_BITS; - writel(bits, plx_iobase + PLX_DMA0_MODE_REG); + bits |= PLX_DMAMODE_BURSTEN; + bits |= PLX_DMAMODE_WIDTH32; + writel(bits, plx_iobase + PLX_REG_DMAMODE0); } static int gsc_hpdi_auto_attach(struct comedi_device *dev, @@ -680,7 +679,7 @@ static void gsc_hpdi_detach(struct comedi_device *dev) free_irq(dev->irq, dev); if (devpriv) { if (devpriv->plx9080_mmio) { - writel(0, devpriv->plx9080_mmio + PLX_INTRCS_REG); + writel(0, devpriv->plx9080_mmio + PLX_REG_INTCSR); iounmap(devpriv->plx9080_mmio); } if (dev->mmio) |