diff options
Diffstat (limited to 'drivers/staging/comedi/drivers/mite.h')
| -rw-r--r-- | drivers/staging/comedi/drivers/mite.h | 88 |
1 files changed, 45 insertions, 43 deletions
diff --git a/drivers/staging/comedi/drivers/mite.h b/drivers/staging/comedi/drivers/mite.h index b3ca7fc3a31e..c32d4e4ddccc 100644 --- a/drivers/staging/comedi/drivers/mite.h +++ b/drivers/staging/comedi/drivers/mite.h @@ -1,32 +1,35 @@ /* - module/mite.h - Hardware driver for NI Mite PCI interface chip - - COMEDI - Linux Control and Measurement Device Interface - Copyright (C) 1999 David A. Schleef <ds@schleef.org> - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. -*/ + * module/mite.h + * Hardware driver for NI Mite PCI interface chip + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 1999 David A. Schleef <ds@schleef.org> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ #ifndef _MITE_H_ #define _MITE_H_ +#include <linux/io.h> #include <linux/log2.h> -#include <linux/slab.h> -#include "../comedi_pci.h" - -#define PCIMIO_COMPAT +#include <linux/spinlock.h> #define MAX_MITE_DMA_CHANNELS 8 +struct comedi_device; +struct comedi_subdevice; +struct device; +struct pci_dev; + struct mite_dma_descriptor { __le32 count; __le32 addr; @@ -74,16 +77,13 @@ static inline int mite_setup(struct comedi_device *dev, void mite_detach(struct mite_struct *mite); struct mite_dma_descriptor_ring *mite_alloc_ring(struct mite_struct *mite); void mite_free_ring(struct mite_dma_descriptor_ring *ring); -struct mite_channel *mite_request_channel_in_range(struct mite_struct *mite, - struct - mite_dma_descriptor_ring - *ring, unsigned min_channel, - unsigned max_channel); -static inline struct mite_channel *mite_request_channel(struct mite_struct - *mite, - struct - mite_dma_descriptor_ring - *ring) +struct mite_channel * +mite_request_channel_in_range(struct mite_struct *mite, + struct mite_dma_descriptor_ring *ring, + unsigned min_channel, unsigned max_channel); +static inline struct mite_channel * +mite_request_channel(struct mite_struct *mite, + struct mite_dma_descriptor_ring *ring) { return mite_request_channel_in_range(mite, ring, 0, mite->num_channels - 1); @@ -112,12 +112,14 @@ int mite_buf_change(struct mite_dma_descriptor_ring *ring, struct comedi_subdevice *s); enum mite_registers { - /* The bits 0x90180700 in MITE_UNKNOWN_DMA_BURST_REG can be - written and read back. The bits 0x1f always read as 1. - The rest always read as zero. */ + /* + * The bits 0x90180700 in MITE_UNKNOWN_DMA_BURST_REG can be + * written and read back. The bits 0x1f always read as 1. + * The rest always read as zero. + */ MITE_UNKNOWN_DMA_BURST_REG = 0x28, MITE_IODWBSR = 0xc0, /* IO Device Window Base Size Register */ - MITE_IODWBSR_1 = 0xc4, /* IO Device Window Base Size Register 1 */ + MITE_IODWBSR_1 = 0xc4, /* IO Device Window Base Size Register 1 */ MITE_IODWCR_1 = 0xf4, MITE_PCI_CONFIG_OFFSET = 0x300, MITE_CSIGR = 0x460 /* chip signature */ @@ -143,7 +145,7 @@ enum mite_registers { #define MITE_FCR(x) (0x40 + MITE_CHAN(x)) /* fifo count */ enum MITE_IODWBSR_bits { - WENAB = 0x80, /* window enable */ + WENAB = 0x80, /* window enable */ }; static inline unsigned MITE_IODWBSR_1_WSIZE_bits(unsigned size) @@ -166,27 +168,27 @@ static inline int mite_csigr_version(u32 csigr_bits) }; static inline int mite_csigr_type(u32 csigr_bits) -{ /* original mite = 0, minimite = 1 */ +{ /* original mite = 0, minimite = 1 */ return (csigr_bits >> 4) & 0xf; }; static inline int mite_csigr_mmode(u32 csigr_bits) -{ /* mite mode, minimite = 1 */ +{ /* mite mode, minimite = 1 */ return (csigr_bits >> 8) & 0x3; }; static inline int mite_csigr_imode(u32 csigr_bits) -{ /* cpu port interface mode, pci = 0x3 */ +{ /* cpu port interface mode, pci = 0x3 */ return (csigr_bits >> 12) & 0x3; }; static inline int mite_csigr_dmac(u32 csigr_bits) -{ /* number of dma channels */ +{ /* number of dma channels */ return (csigr_bits >> 16) & 0xf; }; static inline int mite_csigr_wpdep(u32 csigr_bits) -{ /* write post fifo depth */ +{ /* write post fifo depth */ unsigned int wpdep_bits = (csigr_bits >> 20) & 0x7; return (wpdep_bits) ? (1 << (wpdep_bits - 1)) : 0; @@ -198,7 +200,7 @@ static inline int mite_csigr_wins(u32 csigr_bits) }; static inline int mite_csigr_iowins(u32 csigr_bits) -{ /* number of io windows */ +{ /* number of io windows */ return (csigr_bits >> 29) & 0x7; }; @@ -280,6 +282,7 @@ enum ConfigRegister_bits { CR_PORTMXI = (3 << 6), CR_AMDEVICE = (1 << 0), }; + static inline int CR_REQS(int source) { return (source & 0x7) << 16; @@ -287,8 +290,7 @@ static inline int CR_REQS(int source) static inline int CR_REQSDRQ(unsigned drq_line) { - /* This also works on m-series when - using channels (drq_line) 4 or 5. */ + /* This also works on m-series when using channels (drq_line) 4 or 5. */ return CR_REQS((drq_line & 0x3) | 0x4); } |