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path: root/drivers/staging/comedi/drivers/ni_tio.c
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Diffstat (limited to 'drivers/staging/comedi/drivers/ni_tio.c')
-rw-r--r--drivers/staging/comedi/drivers/ni_tio.c19
1 files changed, 12 insertions, 7 deletions
diff --git a/drivers/staging/comedi/drivers/ni_tio.c b/drivers/staging/comedi/drivers/ni_tio.c
index 7043eb0543f6..15cb4088467b 100644
--- a/drivers/staging/comedi/drivers/ni_tio.c
+++ b/drivers/staging/comedi/drivers/ni_tio.c
@@ -207,7 +207,8 @@ static int ni_tio_clock_period_ps(const struct ni_gpct *counter,
* clock period is specified by user with prescaling
* already taken into account.
*/
- return counter->clock_period_ps;
+ *period_ps = counter->clock_period_ps;
+ return 0;
}
switch (generic_clock_source & NI_GPCT_PRESCALE_MODE_CLOCK_SRC_MASK) {
@@ -451,8 +452,9 @@ static void ni_tio_set_sync_mode(struct ni_gpct *counter)
unsigned int bits = 0;
unsigned int reg;
unsigned int mode;
- unsigned int clk_src;
- u64 ps;
+ unsigned int clk_src = 0;
+ u64 ps = 0;
+ int ret;
bool force_alt_sync;
/* only m series and 660x variants have counting mode registers */
@@ -482,9 +484,12 @@ static void ni_tio_set_sync_mode(struct ni_gpct *counter)
break;
}
- ni_tio_generic_clock_src_select(counter, &clk_src);
- ni_tio_clock_period_ps(counter, clk_src, &ps);
-
+ ret = ni_tio_generic_clock_src_select(counter, &clk_src);
+ if (ret)
+ return;
+ ret = ni_tio_clock_period_ps(counter, clk_src, &ps);
+ if (ret)
+ return;
/*
* It's not clear what we should do if clock_period is unknown, so we
* are not using the alt sync bit in that case.
@@ -808,7 +813,7 @@ static int ni_tio_get_clock_src(struct ni_gpct *counter,
unsigned int *clock_source,
unsigned int *period_ns)
{
- u64 temp64;
+ u64 temp64 = 0;
int ret;
ret = ni_tio_generic_clock_src_select(counter, clock_source);