aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/staging/et131x/et1310_tx.h
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/staging/et131x/et1310_tx.h')
-rw-r--r--drivers/staging/et131x/et1310_tx.h218
1 files changed, 70 insertions, 148 deletions
diff --git a/drivers/staging/et131x/et1310_tx.h b/drivers/staging/et131x/et1310_tx.h
index ad0372121de0..4f0ea81978f5 100644
--- a/drivers/staging/et131x/et1310_tx.h
+++ b/drivers/staging/et131x/et1310_tx.h
@@ -63,167 +63,89 @@
/* Typedefs for Tx Descriptor Ring */
/*
- * TXDESC_WORD2_t structure holds part of the control bits in the Tx Descriptor
- * ring for the ET-1310
+ * word 2 of the control bits in the Tx Descriptor ring for the ET-1310
+ *
+ * 0-15: length of packet
+ * 16-27: VLAN tag
+ * 28: VLAN CFI
+ * 29-31: VLAN priority
+ *
+ * word 3 of the control bits in the Tx Descriptor ring for the ET-1310
+ *
+ * 0: last packet in the sequence
+ * 1: first packet in the sequence
+ * 2: interrupt the processor when this pkt sent
+ * 3: Control word - no packet data
+ * 4: Issue half-duplex backpressure : XON/XOFF
+ * 5: send pause frame
+ * 6: Tx frame has error
+ * 7: append CRC
+ * 8: MAC override
+ * 9: pad packet
+ * 10: Packet is a Huge packet
+ * 11: append VLAN tag
+ * 12: IP checksum assist
+ * 13: TCP checksum assist
+ * 14: UDP checksum assist
*/
-typedef union _txdesc_word2_t {
- u32 value;
- struct {
-#ifdef _BIT_FIELDS_HTOL
- u32 vlan_prio:3; /* bits 29-31(VLAN priority) */
- u32 vlan_cfi:1; /* bit 28(cfi) */
- u32 vlan_tag:12; /* bits 16-27(VLAN tag) */
- u32 length_in_bytes:16; /* bits 0-15(packet length) */
-#else
- u32 length_in_bytes:16; /* bits 0-15(packet length) */
- u32 vlan_tag:12; /* bits 16-27(VLAN tag) */
- u32 vlan_cfi:1; /* bit 28(cfi) */
- u32 vlan_prio:3; /* bits 29-31(VLAN priority) */
-#endif /* _BIT_FIELDS_HTOL */
- } bits;
-} TXDESC_WORD2_t, *PTXDESC_WORD2_t;
-/*
- * TXDESC_WORD3_t structure holds part of the control bits in the Tx Descriptor
- * ring for the ET-1310
- */
-typedef union _txdesc_word3_t {
- u32 value;
- struct {
-#ifdef _BIT_FIELDS_HTOL
- u32 unused:17; /* bits 15-31 */
- u32 udpa:1; /* bit 14(UDP checksum assist) */
- u32 tcpa:1; /* bit 13(TCP checksum assist) */
- u32 ipa:1; /* bit 12(IP checksum assist) */
- u32 vlan:1; /* bit 11(append VLAN tag) */
- u32 hp:1; /* bit 10(Packet is a Huge packet) */
- u32 pp:1; /* bit 9(pad packet) */
- u32 mac:1; /* bit 8(MAC override) */
- u32 crc:1; /* bit 7(append CRC) */
- u32 e:1; /* bit 6(Tx frame has error) */
- u32 pf:1; /* bit 5(send pause frame) */
- u32 bp:1; /* bit 4(Issue half-duplex backpressure (XON/XOFF) */
- u32 cw:1; /* bit 3(Control word - no packet data) */
- u32 ir:1; /* bit 2(interrupt the processor when this pkt sent) */
- u32 f:1; /* bit 1(first packet in the sequence) */
- u32 l:1; /* bit 0(last packet in the sequence) */
-#else
- u32 l:1; /* bit 0(last packet in the sequence) */
- u32 f:1; /* bit 1(first packet in the sequence) */
- u32 ir:1; /* bit 2(interrupt the processor when this pkt sent) */
- u32 cw:1; /* bit 3(Control word - no packet data) */
- u32 bp:1; /* bit 4(Issue half-duplex backpressure (XON/XOFF) */
- u32 pf:1; /* bit 5(send pause frame) */
- u32 e:1; /* bit 6(Tx frame has error) */
- u32 crc:1; /* bit 7(append CRC) */
- u32 mac:1; /* bit 8(MAC override) */
- u32 pp:1; /* bit 9(pad packet) */
- u32 hp:1; /* bit 10(Packet is a Huge packet) */
- u32 vlan:1; /* bit 11(append VLAN tag) */
- u32 ipa:1; /* bit 12(IP checksum assist) */
- u32 tcpa:1; /* bit 13(TCP checksum assist) */
- u32 udpa:1; /* bit 14(UDP checksum assist) */
- u32 unused:17; /* bits 15-31 */
-#endif /* _BIT_FIELDS_HTOL */
- } bits;
-} TXDESC_WORD3_t, *PTXDESC_WORD3_t;
-
-/* TX_DESC_ENTRY_t is sructure representing each descriptor on the ring */
-typedef struct _tx_desc_entry_t {
- u32 DataBufferPtrHigh;
- u32 DataBufferPtrLow;
- TXDESC_WORD2_t word2; /* control words how to xmit the */
- TXDESC_WORD3_t word3; /* data (detailed above) */
-} TX_DESC_ENTRY_t, *PTX_DESC_ENTRY_t;
-
-
-/* Typedefs for Tx DMA engine status writeback */
+/* struct tx_desc represents each descriptor on the ring */
+struct tx_desc {
+ u32 addr_hi;
+ u32 addr_lo;
+ u32 len_vlan; /* control words how to xmit the */
+ u32 flags; /* data (detailed above) */
+};
/*
- * TX_STATUS_BLOCK_t is sructure representing the status of the Tx DMA engine
- * it sits in free memory, and is pointed to by 0x101c / 0x1020
+ * The status of the Tx DMA engine it sits in free memory, and is pointed to
+ * by 0x101c / 0x1020. This is a DMA10 type
*/
-typedef union _tx_status_block_t {
- u32 value;
- struct {
-#ifdef _BIT_FIELDS_HTOL
- u32 unused:21; /* bits 11-31 */
- u32 serv_cpl_wrap:1; /* bit 10 */
- u32 serv_cpl:10; /* bits 0-9 */
-#else
- u32 serv_cpl:10; /* bits 0-9 */
- u32 serv_cpl_wrap:1; /* bit 10 */
- u32 unused:21; /* bits 11-31 */
-#endif
- } bits;
-} TX_STATUS_BLOCK_t, *PTX_STATUS_BLOCK_t;
-
-/* TCB (Transmit Control Block) */
-typedef struct _MP_TCB {
- struct _MP_TCB *Next;
- u32 Flags;
- u32 Count;
- u32 PacketStaleCount;
- struct sk_buff *Packet;
- u32 PacketLength;
- u32 WrIndex;
- u32 WrIndexStart;
-} MP_TCB, *PMP_TCB;
-
-/* Structure to hold the skb's in a list */
-typedef struct tx_skb_list_elem {
- struct list_head skb_list_elem;
- struct sk_buff *skb;
-} TX_SKB_LIST_ELEM, *PTX_SKB_LIST_ELEM;
-
-/* TX_RING_t is sructure representing our local reference(s) to the ring */
-typedef struct _tx_ring_t {
+
+/* TCB (Transmit Control Block: Host Side) */
+struct tcb {
+ struct tcb *next; /* Next entry in ring */
+ u32 flags; /* Our flags for the packet */
+ u32 count; /* Used to spot stuck/lost packets */
+ u32 stale; /* Used to spot stuck/lost packets */
+ struct sk_buff *skb; /* Network skb we are tied to */
+ u32 index; /* Ring indexes */
+ u32 index_start;
+};
+
+/* Structure representing our local reference(s) to the ring */
+struct tx_ring {
/* TCB (Transmit Control Block) memory and lists */
- PMP_TCB MpTcbMem;
+ struct tcb *tcb_ring;
/* List of TCBs that are ready to be used */
- PMP_TCB TCBReadyQueueHead;
- PMP_TCB TCBReadyQueueTail;
+ struct tcb *tcb_qhead;
+ struct tcb *tcb_qtail;
/* list of TCBs that are currently being sent. NOTE that access to all
- * three of these (including nBusySend) are controlled via the
+ * three of these (including used) are controlled via the
* TCBSendQLock. This lock should be secured prior to incementing /
- * decrementing nBusySend, or any queue manipulation on CurrSendHead /
- * Tail
+ * decrementing used, or any queue manipulation on send_head /
+ * tail
*/
- PMP_TCB CurrSendHead;
- PMP_TCB CurrSendTail;
- int32_t nBusySend;
-
- /* List of packets (not TCBs) that were queued for lack of resources */
- struct list_head SendWaitQueue;
- int32_t nWaitSend;
+ struct tcb *send_head;
+ struct tcb *send_tail;
+ int used;
/* The actual descriptor ring */
- PTX_DESC_ENTRY_t pTxDescRingVa;
- dma_addr_t pTxDescRingPa;
- uint64_t pTxDescRingAdjustedPa;
- uint64_t TxDescOffset;
+ struct tx_desc *tx_desc_ring;
+ dma_addr_t tx_desc_ring_pa;
- /* ReadyToSend indicates where we last wrote to in the descriptor ring. */
- u32 txDmaReadyToSend;
+ /* send_idx indicates where we last wrote to in the descriptor ring. */
+ u32 send_idx;
/* The location of the write-back status block */
- PTX_STATUS_BLOCK_t pTxStatusVa;
- dma_addr_t pTxStatusPa;
-
- /* A Block of zeroes used to pad packets that are less than 60 bytes */
- void *pTxDummyBlkVa;
- dma_addr_t pTxDummyBlkPa;
-
- TXMAC_ERR_t TxMacErr;
-
- /* Variables to track the Tx interrupt coalescing features */
- int32_t TxPacketsSinceLastinterrupt;
-} TX_RING_t, *PTX_RING_t;
+ u32 *tx_status;
+ dma_addr_t tx_status_pa;
-/* Forward declaration of the frag-list for the following prototypes */
-typedef struct _MP_FRAG_LIST MP_FRAG_LIST, *PMP_FRAG_LIST;
+ /* Packets since the last IRQ: used for interrupt coalescing */
+ int since_irq;
+};
/* Forward declaration of the private adapter structure */
struct et131x_adapter;
@@ -231,12 +153,12 @@ struct et131x_adapter;
/* PROTOTYPES for et1310_tx.c */
int et131x_tx_dma_memory_alloc(struct et131x_adapter *adapter);
void et131x_tx_dma_memory_free(struct et131x_adapter *adapter);
-void ConfigTxDmaRegs(struct et131x_adapter *pAdapter);
+void ConfigTxDmaRegs(struct et131x_adapter *adapter);
void et131x_init_send(struct et131x_adapter *adapter);
-void et131x_tx_dma_disable(struct et131x_adapter *pAdapter);
-void et131x_tx_dma_enable(struct et131x_adapter *pAdapter);
-void et131x_handle_send_interrupt(struct et131x_adapter *pAdapter);
-void et131x_free_busy_send_packets(struct et131x_adapter *pAdapter);
+void et131x_tx_dma_disable(struct et131x_adapter *adapter);
+void et131x_tx_dma_enable(struct et131x_adapter *adapter);
+void et131x_handle_send_interrupt(struct et131x_adapter *adapter);
+void et131x_free_busy_send_packets(struct et131x_adapter *adapter);
int et131x_send_packets(struct sk_buff *skb, struct net_device *netdev);
#endif /* __ET1310_TX_H__ */