diff options
Diffstat (limited to 'drivers/staging/fbtft')
37 files changed, 806 insertions, 444 deletions
diff --git a/drivers/staging/fbtft/Kconfig b/drivers/staging/fbtft/Kconfig index 995a9101a080..6cf0c58f538b 100644 --- a/drivers/staging/fbtft/Kconfig +++ b/drivers/staging/fbtft/Kconfig @@ -38,6 +38,12 @@ config FB_TFT_HX8353D help Generic Framebuffer support for HX8353D +config FB_TFT_ILI9163 + tristate "FB driver for the ILI9163 LCD Controller" + depends on FB_TFT + help + Generic Framebuffer support for ILI9163 + config FB_TFT_ILI9320 tristate "FB driver for the ILI9320 LCD Controller" depends on FB_TFT diff --git a/drivers/staging/fbtft/Makefile b/drivers/staging/fbtft/Makefile index e773f0fdcfe8..9e73beee23f4 100644 --- a/drivers/staging/fbtft/Makefile +++ b/drivers/staging/fbtft/Makefile @@ -8,6 +8,7 @@ obj-$(CONFIG_FB_TFT_BD663474) += fb_bd663474.o obj-$(CONFIG_FB_TFT_HX8340BN) += fb_hx8340bn.o obj-$(CONFIG_FB_TFT_HX8347D) += fb_hx8347d.o obj-$(CONFIG_FB_TFT_HX8353D) += fb_hx8353d.o +obj-$(CONFIG_FB_TFT_ILI9163) += fb_ili9163.o obj-$(CONFIG_FB_TFT_ILI9320) += fb_ili9320.o obj-$(CONFIG_FB_TFT_ILI9325) += fb_ili9325.o obj-$(CONFIG_FB_TFT_ILI9340) += fb_ili9340.o diff --git a/drivers/staging/fbtft/README b/drivers/staging/fbtft/README index bc89b5805f7b..ba4c74c92e4c 100644 --- a/drivers/staging/fbtft/README +++ b/drivers/staging/fbtft/README @@ -9,20 +9,20 @@ Development is done on a Raspberry Pi running the Raspbian "wheezy" distribution INSTALLATION Download kernel sources - From Linux 3.15 + From Linux 3.15 cd drivers/video/fbdev/fbtft git clone https://github.com/notro/fbtft.git - + Add to drivers/video/fbdev/Kconfig: source "drivers/video/fbdev/fbtft/Kconfig" Add to drivers/video/fbdev/Makefile: obj-y += fbtft/ - - Before Linux 3.15 + + Before Linux 3.15 cd drivers/video git clone https://github.com/notro/fbtft.git - + Add to drivers/video/Kconfig: source "drivers/video/fbtft/Kconfig" Add to drivers/video/Makefile: obj-y += fbtft/ - + Enable driver(s) in menuconfig and build the kernel diff --git a/drivers/staging/fbtft/fb_agm1264k-fl.c b/drivers/staging/fbtft/fb_agm1264k-fl.c index 9cc7d25cf0e5..8f5af1db852c 100644 --- a/drivers/staging/fbtft/fb_agm1264k-fl.c +++ b/drivers/staging/fbtft/fb_agm1264k-fl.c @@ -174,7 +174,7 @@ request_gpios_match(struct fbtft_par *par, const struct fbtft_gpio *gpio) /* This function oses to enter commands * first byte - destination controller 0 or 1 - * folowing - commands + * following - commands */ static void write_reg8_bus8(struct fbtft_par *par, int len, ...) { @@ -198,8 +198,8 @@ static void write_reg8_bus8(struct fbtft_par *par, int len, ...) if (*buf > 1) { va_end(args); - dev_err(par->info->device, "%s: Incorrect chip sellect request (%d)\n", - __func__, *buf); + dev_err(par->info->device, + "Incorrect chip select request (%d)\n", *buf); return; } @@ -224,8 +224,8 @@ static void write_reg8_bus8(struct fbtft_par *par, int len, ...) ret = par->fbtftops.write(par, par->buf, len * (sizeof(u8))); if (ret < 0) { va_end(args); - dev_err(par->info->device, "%s: write() failed and returned %d\n", - __func__, ret); + dev_err(par->info->device, + "write() failed and returned %d\n", ret); return; } } @@ -278,10 +278,13 @@ static int write_vmem(struct fbtft_par *par, size_t offset, size_t len) int x, y; int ret = 0; - /* buffer to convert RGB565 -> grayscale16 -> Ditherd image 1bpp */ + /* buffer to convert RGB565 -> grayscale16 -> Dithered image 1bpp */ signed short *convert_buf = kmalloc(par->info->var.xres * par->info->var.yres * sizeof(signed short), GFP_NOIO); + if (!convert_buf) + return -ENOMEM; + fbtft_par_dbg(DEBUG_WRITE_VMEM, par, "%s()\n", __func__); /* converting to grayscale16 */ @@ -376,8 +379,8 @@ static int write_vmem(struct fbtft_par *par, size_t offset, size_t len) ret = par->fbtftops.write(par, buf, len); if (ret < 0) dev_err(par->info->device, - "%s: write failed and returned: %d\n", - __func__, ret); + "write failed and returned: %d\n", + ret); } /* right half of display */ if (addr_win.xe >= par->info->var.xres / 2) { @@ -390,7 +393,7 @@ static int write_vmem(struct fbtft_par *par, size_t offset, size_t len) /* select right side (sc1) * set addr */ - write_reg(par, 0x01, (1 << 6)); + write_reg(par, 0x01, 1 << 6); write_reg(par, 0x01, (0x17 << 3) | (u8)y); /* write bitmap */ @@ -398,8 +401,8 @@ static int write_vmem(struct fbtft_par *par, size_t offset, size_t len) par->fbtftops.write(par, buf, len); if (ret < 0) dev_err(par->info->device, - "%s: write failed and returned: %d\n", - __func__, ret); + "write failed and returned: %d\n", + ret); } } kfree(convert_buf); diff --git a/drivers/staging/fbtft/fb_bd663474.c b/drivers/staging/fbtft/fb_bd663474.c index 7e00c609c7fe..17a2162a7e5b 100644 --- a/drivers/staging/fbtft/fb_bd663474.c +++ b/drivers/staging/fbtft/fb_bd663474.c @@ -47,49 +47,49 @@ static int init_display(struct fbtft_par *par) /* Initialization sequence from Lib_UTFT */ /* oscillator start */ - write_reg(par, 0x000,0x0001); /*oscillator 0: stop, 1: operation */ + write_reg(par, 0x000, 0x0001); /*oscillator 0: stop, 1: operation */ mdelay(10); /* Power settings */ - write_reg(par, 0x100, 0x0000 ); /* power supply setup */ - write_reg(par, 0x101, 0x0000 ); - write_reg(par, 0x102, 0x3110 ); - write_reg(par, 0x103, 0xe200 ); - write_reg(par, 0x110, 0x009d ); - write_reg(par, 0x111, 0x0022 ); - write_reg(par, 0x100, 0x0120 ); - mdelay( 20 ); - - write_reg(par, 0x100, 0x3120 ); - mdelay( 80 ); + write_reg(par, 0x100, 0x0000); /* power supply setup */ + write_reg(par, 0x101, 0x0000); + write_reg(par, 0x102, 0x3110); + write_reg(par, 0x103, 0xe200); + write_reg(par, 0x110, 0x009d); + write_reg(par, 0x111, 0x0022); + write_reg(par, 0x100, 0x0120); + mdelay(20); + + write_reg(par, 0x100, 0x3120); + mdelay(80); /* Display control */ - write_reg(par, 0x001, 0x0100 ); - write_reg(par, 0x002, 0x0000 ); - write_reg(par, 0x003, 0x1230 ); - write_reg(par, 0x006, 0x0000 ); - write_reg(par, 0x007, 0x0101 ); - write_reg(par, 0x008, 0x0808 ); - write_reg(par, 0x009, 0x0000 ); - write_reg(par, 0x00b, 0x0000 ); - write_reg(par, 0x00c, 0x0000 ); - write_reg(par, 0x00d, 0x0018 ); + write_reg(par, 0x001, 0x0100); + write_reg(par, 0x002, 0x0000); + write_reg(par, 0x003, 0x1230); + write_reg(par, 0x006, 0x0000); + write_reg(par, 0x007, 0x0101); + write_reg(par, 0x008, 0x0808); + write_reg(par, 0x009, 0x0000); + write_reg(par, 0x00b, 0x0000); + write_reg(par, 0x00c, 0x0000); + write_reg(par, 0x00d, 0x0018); /* LTPS control settings */ - write_reg(par, 0x012, 0x0000 ); - write_reg(par, 0x013, 0x0000 ); - write_reg(par, 0x018, 0x0000 ); - write_reg(par, 0x019, 0x0000 ); - - write_reg(par, 0x203, 0x0000 ); - write_reg(par, 0x204, 0x0000 ); - - write_reg(par, 0x210, 0x0000 ); - write_reg(par, 0x211, 0x00ef ); - write_reg(par, 0x212, 0x0000 ); - write_reg(par, 0x213, 0x013f ); - write_reg(par, 0x214, 0x0000 ); - write_reg(par, 0x215, 0x0000 ); - write_reg(par, 0x216, 0x0000 ); - write_reg(par, 0x217, 0x0000 ); + write_reg(par, 0x012, 0x0000); + write_reg(par, 0x013, 0x0000); + write_reg(par, 0x018, 0x0000); + write_reg(par, 0x019, 0x0000); + + write_reg(par, 0x203, 0x0000); + write_reg(par, 0x204, 0x0000); + + write_reg(par, 0x210, 0x0000); + write_reg(par, 0x211, 0x00ef); + write_reg(par, 0x212, 0x0000); + write_reg(par, 0x213, 0x013f); + write_reg(par, 0x214, 0x0000); + write_reg(par, 0x215, 0x0000); + write_reg(par, 0x216, 0x0000); + write_reg(par, 0x217, 0x0000); /* Gray scale settings */ write_reg(par, 0x300, 0x5343); @@ -104,18 +104,18 @@ static int init_display(struct fbtft_par *par) write_reg(par, 0x309, 0x050a); /* RAM access settings */ - write_reg(par, 0x400, 0x4027 ); - write_reg(par, 0x401, 0x0000 ); - write_reg(par, 0x402, 0x0000 ); /* First screen drive position (1) */ - write_reg(par, 0x403, 0x013f ); /* First screen drive position (2) */ - write_reg(par, 0x404, 0x0000 ); - - write_reg(par, 0x200, 0x0000 ); - write_reg(par, 0x201, 0x0000 ); - write_reg(par, 0x100, 0x7120 ); - write_reg(par, 0x007, 0x0103 ); - mdelay( 10 ); - write_reg(par, 0x007, 0x0113 ); + write_reg(par, 0x400, 0x4027); + write_reg(par, 0x401, 0x0000); + write_reg(par, 0x402, 0x0000); /* First screen drive position (1) */ + write_reg(par, 0x403, 0x013f); /* First screen drive position (2) */ + write_reg(par, 0x404, 0x0000); + + write_reg(par, 0x200, 0x0000); + write_reg(par, 0x201, 0x0000); + write_reg(par, 0x100, 0x7120); + write_reg(par, 0x007, 0x0103); + mdelay(10); + write_reg(par, 0x007, 0x0113); return 0; } diff --git a/drivers/staging/fbtft/fb_hx8340bn.c b/drivers/staging/fbtft/fb_hx8340bn.c index 3939502f2c81..54528aa0c0ef 100644 --- a/drivers/staging/fbtft/fb_hx8340bn.c +++ b/drivers/staging/fbtft/fb_hx8340bn.c @@ -4,7 +4,7 @@ * This display uses 9-bit SPI: Data/Command bit + 8 data bits * For platforms that doesn't support 9-bit, the driver is capable * of emulating this using 8-bit transfer. - * This is done by transfering eight 9-bit words in 9 bytes. + * This is done by transferring eight 9-bit words in 9 bytes. * * Copyright (C) 2013 Noralf Tronnes * @@ -47,8 +47,6 @@ MODULE_PARM_DESC(emulate, "Force emulation in 9-bit mode"); static int init_display(struct fbtft_par *par) { - fbtft_par_dbg(DEBUG_INIT_DISPLAY, par, "%s()\n", __func__); - par->fbtftops.reset(par); /* BTL221722-276L startup sequence, from datasheet */ @@ -108,11 +106,8 @@ static int init_display(struct fbtft_par *par) return 0; } -void set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye) +static void set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye) { - fbtft_par_dbg(DEBUG_SET_ADDR_WIN, par, - "%s(xs=%d, ys=%d, xe=%d, ye=%d)\n", __func__, xs, ys, xe, ye); - write_reg(par, FBTFT_CASET, 0x00, xs, 0x00, xe); write_reg(par, FBTFT_RASET, 0x00, ys, 0x00, ye); write_reg(par, FBTFT_RAMWR); @@ -120,8 +115,6 @@ void set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye) static int set_var(struct fbtft_par *par) { - fbtft_par_dbg(DEBUG_INIT_DISPLAY, par, "%s()\n", __func__); - /* MADCTL - Memory data access control */ /* RGB/BGR can be set with H/W pin SRGB and MADCTL BGR bit */ #define MY (1 << 7) @@ -129,7 +122,7 @@ static int set_var(struct fbtft_par *par) #define MV (1 << 5) switch (par->info->var.rotate) { case 0: - write_reg(par, 0x36, (par->bgr << 3)); + write_reg(par, 0x36, par->bgr << 3); break; case 270: write_reg(par, 0x36, MX | MV | (par->bgr << 3)); @@ -156,14 +149,12 @@ static int set_var(struct fbtft_par *par) static int set_gamma(struct fbtft_par *par, unsigned long *curves) { unsigned long mask[] = { - 0b1111, 0b1111, 0b11111, 0b1111, 0b1111, 0b1111, 0b11111, - 0b111, 0b111, 0b111, 0b111, 0b111, 0b111, 0b11, 0b11, - 0b1111, 0b1111, 0b11111, 0b1111, 0b1111, 0b1111, 0b11111, - 0b111, 0b111, 0b111, 0b111, 0b111, 0b111, 0b0, 0b0 }; + 0x0f, 0x0f, 0x1f, 0x0f, 0x0f, 0x0f, 0x1f, 0x07, 0x07, 0x07, + 0x07, 0x07, 0x07, 0x03, 0x03, 0x0f, 0x0f, 0x1f, 0x0f, 0x0f, + 0x0f, 0x1f, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x00, 0x00, + }; int i, j; - fbtft_par_dbg(DEBUG_INIT_DISPLAY, par, "%s()\n", __func__); - /* apply mask */ for (i = 0; i < par->gamma.num_curves; i++) for (j = 0; j < par->gamma.num_values; j++) diff --git a/drivers/staging/fbtft/fb_hx8347d.c b/drivers/staging/fbtft/fb_hx8347d.c index 8139a8f587b7..03ae95b4f79e 100644 --- a/drivers/staging/fbtft/fb_hx8347d.c +++ b/drivers/staging/fbtft/fb_hx8347d.c @@ -115,10 +115,9 @@ static void set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye) static int set_gamma(struct fbtft_par *par, unsigned long *curves) { unsigned long mask[] = { - 0b111111, 0b111111, 0b111111, 0b111111, 0b111111, 0b111111, - 0b1111111, 0b1111111, - 0b11111, 0b11111, 0b11111, 0b11111, 0b11111, - 0b1111}; + 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x7f, 0x7f, 0x1f, 0x1f, + 0x1f, 0x1f, 0x1f, 0x0f, + }; int i, j; int acc = 0; diff --git a/drivers/staging/fbtft/fb_hx8353d.c b/drivers/staging/fbtft/fb_hx8353d.c index c9512dc5f4d3..d7f4308e1249 100644 --- a/drivers/staging/fbtft/fb_hx8353d.c +++ b/drivers/staging/fbtft/fb_hx8353d.c @@ -84,7 +84,7 @@ static void set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye) /* column address */ write_reg(par, 0x2a, xs >> 8, xs & 0xff, xe >> 8, xe & 0xff); - /* row adress */ + /* Row address */ write_reg(par, 0x2b, ys >> 8, ys & 0xff, ye >> 8, ye & 0xff); /* memory write */ @@ -112,7 +112,7 @@ static int set_var(struct fbtft_par *par) write_reg(par, 0x36, my | mv | (par->bgr << 3)); break; case 180: - write_reg(par, 0x36, (par->bgr << 3)); + write_reg(par, 0x36, par->bgr << 3); break; case 90: write_reg(par, 0x36, mx | mv | (par->bgr << 3)); diff --git a/drivers/staging/fbtft/fb_ili9163.c b/drivers/staging/fbtft/fb_ili9163.c new file mode 100644 index 000000000000..ed92a64306ff --- /dev/null +++ b/drivers/staging/fbtft/fb_ili9163.c @@ -0,0 +1,303 @@ +/* + * FB driver for the ILI9163 LCD Controller + * + * Copyright (C) 2015 Kozhevnikov Anatoly + * + * Based on ili9325.c by Noralf Tronnes and + * .S.U.M.O.T.O.Y. by Max MC Costa (https://github.com/sumotoy/TFT_ILI9163C). + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <linux/module.h> +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/gpio.h> +#include <linux/delay.h> + +#include "fbtft.h" + +#define DRVNAME "fb_ili9163" +#define WIDTH 128 +#define HEIGHT 128 +#define BPP 16 +#define FPS 30 + +#ifdef GAMMA_ADJ +#define GAMMA_LEN 15 +#define GAMMA_NUM 1 +#define DEFAULT_GAMMA "36 29 12 22 1C 15 42 B7 2F 13 12 0A 11 0B 06\n" +#endif + +/* ILI9163C commands */ +#define CMD_NOP 0x00 /* Non operation*/ +#define CMD_SWRESET 0x01 /* Soft Reset */ +#define CMD_SLPIN 0x10 /* Sleep ON */ +#define CMD_SLPOUT 0x11 /* Sleep OFF */ +#define CMD_PTLON 0x12 /* Partial Mode ON */ +#define CMD_NORML 0x13 /* Normal Display ON */ +#define CMD_DINVOF 0x20 /* Display Inversion OFF */ +#define CMD_DINVON 0x21 /* Display Inversion ON */ +#define CMD_GAMMASET 0x26 /* Gamma Set (0x01[1],0x02[2],0x04[3],0x08[4]) */ +#define CMD_DISPOFF 0x28 /* Display OFF */ +#define CMD_DISPON 0x29 /* Display ON */ +#define CMD_IDLEON 0x39 /* Idle Mode ON */ +#define CMD_IDLEOF 0x38 /* Idle Mode OFF */ +#define CMD_CLMADRS 0x2A /* Column Address Set */ +#define CMD_PGEADRS 0x2B /* Page Address Set */ + +#define CMD_RAMWR 0x2C /* Memory Write */ +#define CMD_RAMRD 0x2E /* Memory Read */ +#define CMD_CLRSPACE 0x2D /* Color Space : 4K/65K/262K */ +#define CMD_PARTAREA 0x30 /* Partial Area */ +#define CMD_VSCLLDEF 0x33 /* Vertical Scroll Definition */ +#define CMD_TEFXLON 0x34 /* Tearing Effect Line ON */ +#define CMD_TEFXLOF 0x35 /* Tearing Effect Line OFF */ +#define CMD_MADCTL 0x36 /* Memory Access Control */ + +#define CMD_PIXFMT 0x3A /* Interface Pixel Format */ +#define CMD_FRMCTR1 0xB1 /* Frame Rate Control + (In normal mode/Full colors) */ +#define CMD_FRMCTR2 0xB2 /* Frame Rate Control (In Idle mode/8-colors) */ +#define CMD_FRMCTR3 0xB3 /* Frame Rate Control + (In Partial mode/full colors) */ +#define CMD_DINVCTR 0xB4 /* Display Inversion Control */ +#define CMD_RGBBLK 0xB5 /* RGB Interface Blanking Porch setting */ +#define CMD_DFUNCTR 0xB6 /* Display Function set 5 */ +#define CMD_SDRVDIR 0xB7 /* Source Driver Direction Control */ +#define CMD_GDRVDIR 0xB8 /* Gate Driver Direction Control */ + +#define CMD_PWCTR1 0xC0 /* Power_Control1 */ +#define CMD_PWCTR2 0xC1 /* Power_Control2 */ +#define CMD_PWCTR3 0xC2 /* Power_Control3 */ +#define CMD_PWCTR4 0xC3 /* Power_Control4 */ +#define CMD_PWCTR5 0xC4 /* Power_Control5 */ +#define CMD_VCOMCTR1 0xC5 /* VCOM_Control 1 */ +#define CMD_VCOMCTR2 0xC6 /* VCOM_Control 2 */ +#define CMD_VCOMOFFS 0xC7 /* VCOM Offset Control */ +#define CMD_PGAMMAC 0xE0 /* Positive Gamma Correction Setting */ +#define CMD_NGAMMAC 0xE1 /* Negative Gamma Correction Setting */ +#define CMD_GAMRSEL 0xF2 /* GAM_R_SEL */ + +/* +This display: +http://www.ebay.com/itm/Replace-Nokia-5110-LCD-1-44-Red-Serial-128X128-SPI-Color-TFT-LCD-Display-Module-/271422122271 +This particular display has a design error! The controller has 3 pins to +configure to constrain the memory and resolution to a fixed dimension (in +that case 128x128) but they leaved those pins configured for 128x160 so +there was several pixel memory addressing problems. +I solved by setup several parameters that dinamically fix the resolution as +needit so below the parameters for this display. If you have a strain or a +correct display (can happen with chinese) you can copy those parameters and +create setup for different displays. +*/ + +#ifdef RED +#define __OFFSET 32 /*see note 2 - this is the red version */ +#else +#define __OFFSET 0 /*see note 2 - this is the black version */ +#endif + +static int init_display(struct fbtft_par *par) +{ + fbtft_par_dbg(DEBUG_INIT_DISPLAY, par, "%s()\n", __func__); + + par->fbtftops.reset(par); + + if (par->gpio.cs != -1) + gpio_set_value(par->gpio.cs, 0); /* Activate chip */ + + write_reg(par, CMD_SWRESET); /* software reset */ + mdelay(500); + write_reg(par, CMD_SLPOUT); /* exit sleep */ + mdelay(5); + write_reg(par, CMD_PIXFMT, 0x05); /* Set Color Format 16bit */ + write_reg(par, CMD_GAMMASET, 0x02); /* default gamma curve 3 */ +#ifdef GAMMA_ADJ + write_reg(par, CMD_GAMRSEL, 0x01); /* Enable Gamma adj */ +#endif + write_reg(par, CMD_NORML); + write_reg(par, CMD_DFUNCTR, 0xff, 0x06); + /* Frame Rate Control (In normal mode/Full colors) */ + write_reg(par, CMD_FRMCTR1, 0x08, 0x02); + write_reg(par, CMD_DINVCTR, 0x07); /* display inversion */ + /* Set VRH1[4:0] & VC[2:0] for VCI1 & GVDD */ + write_reg(par, CMD_PWCTR1, 0x0A, 0x02); + /* Set BT[2:0] for AVDD & VCL & VGH & VGL */ + write_reg(par, CMD_PWCTR2, 0x02); + /* Set VMH[6:0] & VML[6:0] for VOMH & VCOML */ + write_reg(par, CMD_VCOMCTR1, 0x50, 0x63); + write_reg(par, CMD_VCOMOFFS, 0); + + write_reg(par, CMD_CLMADRS, 0, 0, 0, WIDTH); /* Set Column Address */ + write_reg(par, CMD_PGEADRS, 0, 0, 0, HEIGHT); /* Set Page Address */ + + write_reg(par, CMD_DISPON); /* display ON */ + write_reg(par, CMD_RAMWR); /* Memory Write */ + + return 0; +} + +static void set_addr_win(struct fbtft_par *par, int xs, int ys, + int xe, int ye) +{ + fbtft_par_dbg(DEBUG_SET_ADDR_WIN, par, + "%s(xs=%d, ys=%d, xe=%d, ye=%d)\n", __func__, xs, ys, xe, ye); + + switch (par->info->var.rotate) { + case 0: + write_reg(par, CMD_CLMADRS, xs >> 8, xs & 0xff, xe >> 8, + xe & 0xff); + write_reg(par, CMD_PGEADRS, + (ys + __OFFSET) >> 8, (ys + __OFFSET) & 0xff, + (ye + __OFFSET) >> 8, (ye + __OFFSET) & 0xff); + break; + case 90: + write_reg(par, CMD_CLMADRS, + (xs + __OFFSET) >> 8, (xs + __OFFSET) & 0xff, + (xe + __OFFSET) >> 8, (xe + __OFFSET) & 0xff); + write_reg(par, CMD_PGEADRS, ys >> 8, ys & 0xff, ye >> 8, + ye & 0xff); + break; + case 180: + case 270: + write_reg(par, CMD_CLMADRS, xs >> 8, xs & 0xff, xe >> 8, + xe & 0xff); + write_reg(par, CMD_PGEADRS, ys >> 8, ys & 0xff, ye >> 8, + ye & 0xff); + break; + default: + par->info->var.rotate = 0; /* Fix incorrect setting */ + } + write_reg(par, CMD_RAMWR); /* Write Data to GRAM mode */ +} + +/* +7) MY: 1(bottom to top), 0(top to bottom) Row Address Order +6) MX: 1(R to L), 0(L to R) Column Address Order +5) MV: 1(Exchanged), 0(normal) Row/Column exchange +4) ML: 1(bottom to top), 0(top to bottom) Vertical Refresh Order +3) RGB: 1(BGR), 0(RGB) Color Space +2) MH: 1(R to L), 0(L to R) Horizontal Refresh Order +1) +0) + + MY, MX, MV, ML,RGB, MH, D1, D0 + 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 //normal + 1 | 0 | 0 | 0 | 1 | 0 | 0 | 0 //Y-Mirror + 0 | 1 | 0 | 0 | 1 | 0 | 0 | 0 //X-Mirror + 1 | 1 | 0 | 0 | 1 | 0 | 0 | 0 //X-Y-Mirror + 0 | 0 | 1 | 0 | 1 | 0 | 0 | 0 //X-Y Exchange + 1 | 0 | 1 | 0 | 1 | 0 | 0 | 0 //X-Y Exchange, Y-Mirror + 0 | 1 | 1 | 0 | 1 | 0 | 0 | 0 //XY exchange + 1 | 1 | 1 | 0 | 1 | 0 | 0 | 0 +*/ +static int set_var(struct fbtft_par *par) +{ + u8 mactrl_data = 0; /* Avoid compiler warning */ + + fbtft_par_dbg(DEBUG_INIT_DISPLAY, par, "%s()\n", __func__); + + switch (par->info->var.rotate) { + case 0: + mactrl_data = 0x08; + break; + case 180: + mactrl_data = 0xC8; + break; + case 270: + mactrl_data = 0xA8; + break; + case 90: + mactrl_data = 0x68; + break; + } + + /* Colorspcae */ + if (par->bgr) + mactrl_data |= (1 << 2); + write_reg(par, CMD_MADCTL, mactrl_data); + write_reg(par, CMD_RAMWR); /* Write Data to GRAM mode */ + return 0; +} + +#ifdef GAMMA_ADJ +#define CURVE(num, idx) curves[num*par->gamma.num_values + idx] +static int gamma_adj(struct fbtft_par *par, unsigned long *curves) +{ + unsigned long mask[] = { + 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, + 0x1f, 0x3f, 0x0f, 0x0f, 0x7f, 0x1f, + 0x3F, 0x3F, 0x3F, 0x3F, 0x3F}; + int i, j; + + fbtft_par_dbg(DEBUG_INIT_DISPLAY, par, "%s()\n", __func__); + + for (i = 0; i < GAMMA_NUM; i++) + for (j = 0; j < GAMMA_LEN; j++) + CURVE(i, j) &= mask[i*par->gamma.num_values + j]; + + write_reg(par, CMD_PGAMMAC, + CURVE(0, 0), + CURVE(0, 1), + CURVE(0, 2), + CURVE(0, 3), + CURVE(0, 4), + CURVE(0, 5), + CURVE(0, 6), + (CURVE(0, 7) << 4) | CURVE(0, 8), + CURVE(0, 9), + CURVE(0, 10), + CURVE(0, 11), + CURVE(0, 12), + CURVE(0, 13), + CURVE(0, 14), + CURVE(0, 15) + ); + + write_reg(par, CMD_RAMWR); /* Write Data to GRAM mode */ + + return 0; +} +#undef CURVE +#endif + +static struct fbtft_display display = { + .regwidth = 8, + .width = WIDTH, + .height = HEIGHT, + .bpp = BPP, + .fps = FPS, +#ifdef GAMMA_ADJ + .gamma_num = GAMMA_NUM, + .gamma_len = GAMMA_LEN, + .gamma = DEFAULT_GAMMA, +#endif + .fbtftops = { + .init_display = init_display, + .set_addr_win = set_addr_win, + .set_var = set_var, +#ifdef GAMMA_ADJ + .set_gamma = gamma_adj, +#endif + }, +}; + +FBTFT_REGISTER_DRIVER(DRVNAME, "ilitek,ili9163", &display); + +MODULE_ALIAS("spi:" DRVNAME); +MODULE_ALIAS("platform:" DRVNAME); +MODULE_ALIAS("spi:ili9163"); +MODULE_ALIAS("platform:ili9163"); + +MODULE_DESCRIPTION("FB driver for the ILI9163 LCD Controller"); +MODULE_AUTHOR("Kozhevnikov Anatoly"); +MODULE_LICENSE("GPL"); diff --git a/drivers/staging/fbtft/fb_ili9320.c b/drivers/staging/fbtft/fb_ili9320.c index b26d89368da7..3a02edd447d4 100644 --- a/drivers/staging/fbtft/fb_ili9320.c +++ b/drivers/staging/fbtft/fb_ili9320.c @@ -47,6 +47,7 @@ static unsigned read_devicecode(struct fbtft_par *par) static int init_display(struct fbtft_par *par) { unsigned devcode; + fbtft_par_dbg(DEBUG_INIT_DISPLAY, par, "%s()\n", __func__); par->fbtftops.reset(par); @@ -178,10 +179,9 @@ static int set_var(struct fbtft_par *par) static int set_gamma(struct fbtft_par *par, unsigned long *curves) { unsigned long mask[] = { - 0b11111, 0b11111, 0b111, 0b111, 0b111, - 0b111, 0b111, 0b111, 0b111, 0b111, - 0b11111, 0b11111, 0b111, 0b111, 0b111, - 0b111, 0b111, 0b111, 0b111, 0b111 }; + 0x1f, 0x1f, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, + 0x1f, 0x1f, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, + }; int i, j; fbtft_par_dbg(DEBUG_INIT_DISPLAY, par, "%s()\n", __func__); diff --git a/drivers/staging/fbtft/fb_ili9325.c b/drivers/staging/fbtft/fb_ili9325.c index 5f88145fac9b..19d254e9a420 100644 --- a/drivers/staging/fbtft/fb_ili9325.c +++ b/drivers/staging/fbtft/fb_ili9325.c @@ -41,22 +41,22 @@ static unsigned bt = 6; /* VGL=Vci*4 , VGH=Vci*4 */ module_param(bt, uint, 0); MODULE_PARM_DESC(bt, "Sets the factor used in the step-up circuits"); -static unsigned vc = 0b011; /* Vci1=Vci*0.80 */ +static unsigned vc = 0x03; /* Vci1=Vci*0.80 */ module_param(vc, uint, 0); MODULE_PARM_DESC(vc, "Sets the ratio factor of Vci to generate the reference voltages Vci1"); -static unsigned vrh = 0b1101; /* VREG1OUT=Vci*1.85 */ +static unsigned vrh = 0x0d; /* VREG1OUT=Vci*1.85 */ module_param(vrh, uint, 0); MODULE_PARM_DESC(vrh, "Set the amplifying rate (1.6 ~ 1.9) of Vci applied to output the VREG1OUT"); -static unsigned vdv = 0b10010; /* VCOMH amplitude=VREG1OUT*0.98 */ +static unsigned vdv = 0x12; /* VCOMH amplitude=VREG1OUT*0.98 */ module_param(vdv, uint, 0); MODULE_PARM_DESC(vdv, "Select the factor of VREG1OUT to set the amplitude of Vcom"); -static unsigned vcm = 0b001010; /* VCOMH=VREG1OUT*0.735 */ +static unsigned vcm = 0x0a; /* VCOMH=VREG1OUT*0.735 */ module_param(vcm, uint, 0); MODULE_PARM_DESC(vcm, "Set the internal VcomH voltage"); @@ -108,11 +108,11 @@ static int init_display(struct fbtft_par *par) if (par->gpio.cs != -1) gpio_set_value(par->gpio.cs, 0); /* Activate chip */ - bt &= 0b111; - vc &= 0b111; - vrh &= 0b1111; - vdv &= 0b11111; - vcm &= 0b111111; + bt &= 0x07; + vc &= 0x07; + vrh &= 0x0f; + vdv &= 0x1f; + vcm &= 0x3f; /* Initialization sequence from ILI9325 Application Notes */ @@ -137,7 +137,7 @@ static int init_display(struct fbtft_par *par) write_reg(par, 0x0013, 0x0000); /* VDV[4:0] for VCOM amplitude */ mdelay(200); /* Dis-charge capacitor power voltage */ write_reg(par, 0x0010, /* SAP, BT[3:0], AP, DSTB, SLP, STB */ - (1 << 12) | (bt << 8) | (1 << 7) | (0b001 << 4)); + (1 << 12) | (bt << 8) | (1 << 7) | (0x01 << 4)); write_reg(par, 0x0011, 0x220 | vc); /* DC1[2:0], DC0[2:0], VC[2:0] */ mdelay(50); /* Delay 50ms */ write_reg(par, 0x0012, vrh); /* Internal reference voltage= Vci; */ @@ -233,10 +233,9 @@ static int set_var(struct fbtft_par *par) static int set_gamma(struct fbtft_par *par, unsigned long *curves) { unsigned long mask[] = { - 0b11111, 0b11111, 0b111, 0b111, 0b111, - 0b111, 0b111, 0b111, 0b111, 0b111, - 0b11111, 0b11111, 0b111, 0b111, 0b111, - 0b111, 0b111, 0b111, 0b111, 0b111 }; + 0x1f, 0x1f, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, + 0x1f, 0x1f, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, + }; int i, j; fbtft_par_dbg(DEBUG_INIT_DISPLAY, par, "%s()\n", __func__); diff --git a/drivers/staging/fbtft/fb_ili9340.c b/drivers/staging/fbtft/fb_ili9340.c index 985687d94ec2..0f4a42f89e5e 100644 --- a/drivers/staging/fbtft/fb_ili9340.c +++ b/drivers/staging/fbtft/fb_ili9340.c @@ -39,12 +39,12 @@ static int init_display(struct fbtft_par *par) par->fbtftops.reset(par); write_reg(par, 0xEF, 0x03, 0x80, 0x02); - write_reg(par, 0xCF, 0x00 , 0XC1 , 0X30); - write_reg(par, 0xED, 0x64 , 0x03 , 0X12 , 0X81); - write_reg(par, 0xE8, 0x85 , 0x00 , 0x78); - write_reg(par, 0xCB, 0x39 , 0x2C , 0x00 , 0x34 , 0x02); + write_reg(par, 0xCF, 0x00, 0XC1, 0X30); + write_reg(par, 0xED, 0x64, 0x03, 0X12, 0X81); + write_reg(par, 0xE8, 0x85, 0x00, 0x78); + write_reg(par, 0xCB, 0x39, 0x2C, 0x00, 0x34, 0x02); write_reg(par, 0xF7, 0x20); - write_reg(par, 0xEA, 0x00 , 0x00); + write_reg(par, 0xEA, 0x00, 0x00); /* Power Control 1 */ write_reg(par, 0xC0, 0x23); @@ -104,7 +104,7 @@ static void set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye) /* Column address */ write_reg(par, 0x2A, xs >> 8, xs & 0xFF, xe >> 8, xe & 0xFF); - /* Row adress */ + /* Row address */ write_reg(par, 0x2B, ys >> 8, ys & 0xFF, ye >> 8, ye & 0xFF); /* Memory write */ diff --git a/drivers/staging/fbtft/fb_ili9341.c b/drivers/staging/fbtft/fb_ili9341.c index 225b2d84371f..709492e560b6 100644 --- a/drivers/staging/fbtft/fb_ili9341.c +++ b/drivers/staging/fbtft/fb_ili9341.c @@ -4,7 +4,7 @@ * This display uses 9-bit SPI: Data/Command bit + 8 data bits * For platforms that doesn't support 9-bit, the driver is capable * of emulating this using 8-bit transfer. - * This is done by transfering eight 9-bit words in 9 bytes. + * This is done by transferring eight 9-bit words in 9 bytes. * * Copyright (C) 2013 Christian Vogelgsang * Based on adafruit22fb.c by Noralf Tronnes @@ -89,7 +89,7 @@ static void set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye) write_reg(par, 0x2A, (xs >> 8) & 0xFF, xs & 0xFF, (xe >> 8) & 0xFF, xe & 0xFF); - /* Row adress set */ + /* Row address set */ write_reg(par, 0x2B, (ys >> 8) & 0xFF, ys & 0xFF, (ye >> 8) & 0xFF, ye & 0xFF); diff --git a/drivers/staging/fbtft/fb_ili9481.c b/drivers/staging/fbtft/fb_ili9481.c index 725157a1ac41..8bae09c2d5ce 100644 --- a/drivers/staging/fbtft/fb_ili9481.c +++ b/drivers/staging/fbtft/fb_ili9481.c @@ -63,7 +63,7 @@ static void set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye) /* column address */ write_reg(par, 0x2a, xs >> 8, xs & 0xff, xe >> 8, xe & 0xff); - /* row adress */ + /* Row address */ write_reg(par, 0x2b, ys >> 8, ys & 0xff, ye >> 8, ye & 0xff); /* memory write */ diff --git a/drivers/staging/fbtft/fb_ili9486.c b/drivers/staging/fbtft/fb_ili9486.c index 95b89999d32a..dd4ddca384ad 100644 --- a/drivers/staging/fbtft/fb_ili9486.c +++ b/drivers/staging/fbtft/fb_ili9486.c @@ -44,13 +44,13 @@ static int default_init_sequence[] = { -1, 0xC5, 0x00, 0x00, 0x00, 0x00, /* PGAMCTRL(Positive Gamma Control) */ -1, 0xE0, 0x0F, 0x1F, 0x1C, 0x0C, 0x0F, 0x08, 0x48, 0x98, - 0x37, 0x0A, 0x13, 0x04, 0x11, 0x0D, 0x00, + 0x37, 0x0A, 0x13, 0x04, 0x11, 0x0D, 0x00, /* NGAMCTRL(Negative Gamma Control) */ -1, 0xE1, 0x0F, 0x32, 0x2E, 0x0B, 0x0D, 0x05, 0x47, 0x75, - 0x37, 0x06, 0x10, 0x03, 0x24, 0x20, 0x00, + 0x37, 0x06, 0x10, 0x03, 0x24, 0x20, 0x00, /* Digital Gamma Control 1 */ -1, 0xE2, 0x0F, 0x32, 0x2E, 0x0B, 0x0D, 0x05, 0x47, 0x75, - 0x37, 0x06, 0x10, 0x03, 0x24, 0x20, 0x00, + 0x37, 0x06, 0x10, 0x03, 0x24, 0x20, 0x00, /* Sleep OUT */ -1, 0x11, /* Display ON */ @@ -67,7 +67,7 @@ static void set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye) /* Column address */ write_reg(par, 0x2A, xs >> 8, xs & 0xFF, xe >> 8, xe & 0xFF); - /* Row adress */ + /* Row address */ write_reg(par, 0x2B, ys >> 8, ys & 0xFF, ye >> 8, ye & 0xFF); /* Memory write */ diff --git a/drivers/staging/fbtft/fb_pcd8544.c b/drivers/staging/fbtft/fb_pcd8544.c index 8b9ebfb49ef8..15da0ec77513 100644 --- a/drivers/staging/fbtft/fb_pcd8544.c +++ b/drivers/staging/fbtft/fb_pcd8544.c @@ -34,7 +34,7 @@ #define WIDTH 84 #define HEIGHT 48 #define TXBUFLEN (84*6) -#define DEFAULT_GAMMA "40" /* gamma is used to control contrast in this driver */ +#define DEFAULT_GAMMA "40" /* gamma controls the contrast in this driver */ static unsigned tc; module_param(tc, uint, 0); @@ -51,61 +51,73 @@ static int init_display(struct fbtft_par *par) par->fbtftops.reset(par); - /* Function set */ - write_reg(par, 0x21); /* 5:1 1 - 2:0 PD - Powerdown control: chip is active - 1:0 V - Entry mode: horizontal addressing - 0:1 H - Extended instruction set control: extended - */ - - /* H=1 Temperature control */ - write_reg(par, 0x04 | (tc & 0x3)); /* - 2:1 1 - 1:x TC1 - Temperature Coefficient: 0x10 - 0:x TC0 - */ - - /* H=1 Bias system */ - write_reg(par, 0x10 | (bs & 0x7)); /* - 4:1 1 - 3:0 0 - 2:x BS2 - Bias System - 1:x BS1 - 0:x BS0 - */ - - /* Function set */ - write_reg(par, 0x22); /* 5:1 1 - 2:0 PD - Powerdown control: chip is active - 1:1 V - Entry mode: vertical addressing - 0:0 H - Extended instruction set control: basic - */ - - /* H=0 Display control */ - write_reg(par, 0x08 | 4); /* - 3:1 1 - 2:1 D - DE: 10=normal mode - 1:0 0 - 0:0 E - */ + /* Function set + * + * 5:1 1 + * 2:0 PD - Powerdown control: chip is active + * 1:0 V - Entry mode: horizontal addressing + * 0:1 H - Extended instruction set control: extended + */ + write_reg(par, 0x21); + + /* H=1 Temperature control + * + * 2:1 1 + * 1:x TC1 - Temperature Coefficient: 0x10 + * 0:x TC0 + */ + write_reg(par, 0x04 | (tc & 0x3)); + + /* H=1 Bias system + * + * 4:1 1 + * 3:0 0 + * 2:x BS2 - Bias System + * 1:x BS1 + * 0:x BS0 + */ + write_reg(par, 0x10 | (bs & 0x7)); + + /* Function set + * + * 5:1 1 + * 2:0 PD - Powerdown control: chip is active + * 1:1 V - Entry mode: vertical addressing + * 0:0 H - Extended instruction set control: basic + */ + write_reg(par, 0x22); + + /* H=0 Display control + * + * 3:1 1 + * 2:1 D - DE: 10=normal mode + * 1:0 0 + * 0:0 E + */ + write_reg(par, 0x08 | 4); return 0; } static void set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye) { - fbtft_par_dbg(DEBUG_SET_ADDR_WIN, par, "%s(xs=%d, ys=%d, xe=%d, ye=%d)\n", __func__, xs, ys, xe, ye); - - /* H=0 Set X address of RAM */ - write_reg(par, 0x80); /* 7:1 1 - 6-0: X[6:0] - 0x00 - */ - - /* H=0 Set Y address of RAM */ - write_reg(par, 0x40); /* 7:0 0 - 6:1 1 - 2-0: Y[2:0] - 0x0 - */ + fbtft_par_dbg(DEBUG_SET_ADDR_WIN, par, "%s(xs=%d, ys=%d, xe=%d, ye=%d)\n", + __func__, xs, ys, xe, ye); + + /* H=0 Set X address of RAM + * + * 7:1 1 + * 6-0: X[6:0] - 0x00 + */ + write_reg(par, 0x80); + + /* H=0 Set Y address of RAM + * + * 7:0 0 + * 6:1 1 + * 2-0: Y[2:0] - 0x0 + */ + write_reg(par, 0x40); } static int write_vmem(struct fbtft_par *par, size_t offset, size_t len) @@ -120,9 +132,8 @@ static int write_vmem(struct fbtft_par *par, size_t offset, size_t len) for (x = 0; x < 84; x++) { for (y = 0; y < 6; y++) { *buf = 0x00; - for (i = 0; i < 8; i++) { + for (i = 0; i < 8; i++) *buf |= (vmem16[(y*8+i)*84+x] ? 1 : 0) << i; - } buf++; } } @@ -131,7 +142,8 @@ static int write_vmem(struct fbtft_par *par, size_t offset, size_t len) gpio_set_value(par->gpio.dc, 1); ret = par->fbtftops.write(par, par->txbuf.buf, 6*84); if (ret < 0) - dev_err(par->info->device, "%s: write failed and returned: %d\n", __func__, ret); + dev_err(par->info->device, "write failed and returned: %d\n", + ret); return ret; } diff --git a/drivers/staging/fbtft/fb_ra8875.c b/drivers/staging/fbtft/fb_ra8875.c index c323c06344fd..2c4d4dc70c51 100644 --- a/drivers/staging/fbtft/fb_ra8875.c +++ b/drivers/staging/fbtft/fb_ra8875.c @@ -11,7 +11,7 @@ ***** * * Date : 10.06.2014 * * Version : V1.13 ***** - Revison : 5 + Revision : 5 ******************************************************************************* * This program is free software; you can redistribute it and/or modify @@ -79,112 +79,112 @@ static int init_display(struct fbtft_par *par) if ((par->info->var.xres == 320) && (par->info->var.yres == 240)) { /* PLL clock frequency */ - write_reg(par, 0x88 , 0x0A); - write_reg(par, 0x89 , 0x02); + write_reg(par, 0x88, 0x0A); + write_reg(par, 0x89, 0x02); mdelay(10); /* color deep / MCU Interface */ - write_reg(par, 0x10 , 0x0C); + write_reg(par, 0x10, 0x0C); /* pixel clock period */ - write_reg(par, 0x04 , 0x03); + write_reg(par, 0x04, 0x03); mdelay(1); /* horizontal settings */ - write_reg(par, 0x14 , 0x27); - write_reg(par, 0x15 , 0x00); - write_reg(par, 0x16 , 0x05); - write_reg(par, 0x17 , 0x04); - write_reg(par, 0x18 , 0x03); + write_reg(par, 0x14, 0x27); + write_reg(par, 0x15, 0x00); + write_reg(par, 0x16, 0x05); + write_reg(par, 0x17, 0x04); + write_reg(par, 0x18, 0x03); /* vertical settings */ - write_reg(par, 0x19 , 0xEF); - write_reg(par, 0x1A , 0x00); - write_reg(par, 0x1B , 0x05); - write_reg(par, 0x1C , 0x00); - write_reg(par, 0x1D , 0x0E); - write_reg(par, 0x1E , 0x00); - write_reg(par, 0x1F , 0x02); + write_reg(par, 0x19, 0xEF); + write_reg(par, 0x1A, 0x00); + write_reg(par, 0x1B, 0x05); + write_reg(par, 0x1C, 0x00); + write_reg(par, 0x1D, 0x0E); + write_reg(par, 0x1E, 0x00); + write_reg(par, 0x1F, 0x02); } else if ((par->info->var.xres == 480) && (par->info->var.yres == 272)) { /* PLL clock frequency */ - write_reg(par, 0x88 , 0x0A); - write_reg(par, 0x89 , 0x02); + write_reg(par, 0x88, 0x0A); + write_reg(par, 0x89, 0x02); mdelay(10); /* color deep / MCU Interface */ - write_reg(par, 0x10 , 0x0C); + write_reg(par, 0x10, 0x0C); /* pixel clock period */ - write_reg(par, 0x04 , 0x82); + write_reg(par, 0x04, 0x82); mdelay(1); /* horizontal settings */ - write_reg(par, 0x14 , 0x3B); - write_reg(par, 0x15 , 0x00); - write_reg(par, 0x16 , 0x01); - write_reg(par, 0x17 , 0x00); - write_reg(par, 0x18 , 0x05); + write_reg(par, 0x14, 0x3B); + write_reg(par, 0x15, 0x00); + write_reg(par, 0x16, 0x01); + write_reg(par, 0x17, 0x00); + write_reg(par, 0x18, 0x05); /* vertical settings */ - write_reg(par, 0x19 , 0x0F); - write_reg(par, 0x1A , 0x01); - write_reg(par, 0x1B , 0x02); - write_reg(par, 0x1C , 0x00); - write_reg(par, 0x1D , 0x07); - write_reg(par, 0x1E , 0x00); - write_reg(par, 0x1F , 0x09); + write_reg(par, 0x19, 0x0F); + write_reg(par, 0x1A, 0x01); + write_reg(par, 0x1B, 0x02); + write_reg(par, 0x1C, 0x00); + write_reg(par, 0x1D, 0x07); + write_reg(par, 0x1E, 0x00); + write_reg(par, 0x1F, 0x09); } else if ((par->info->var.xres == 640) && (par->info->var.yres == 480)) { /* PLL clock frequency */ - write_reg(par, 0x88 , 0x0B); - write_reg(par, 0x89 , 0x02); + write_reg(par, 0x88, 0x0B); + write_reg(par, 0x89, 0x02); mdelay(10); /* color deep / MCU Interface */ - write_reg(par, 0x10 , 0x0C); + write_reg(par, 0x10, 0x0C); /* pixel clock period */ - write_reg(par, 0x04 , 0x01); + write_reg(par, 0x04, 0x01); mdelay(1); /* horizontal settings */ - write_reg(par, 0x14 , 0x4F); - write_reg(par, 0x15 , 0x05); - write_reg(par, 0x16 , 0x0F); - write_reg(par, 0x17 , 0x01); - write_reg(par, 0x18 , 0x00); + write_reg(par, 0x14, 0x4F); + write_reg(par, 0x15, 0x05); + write_reg(par, 0x16, 0x0F); + write_reg(par, 0x17, 0x01); + write_reg(par, 0x18, 0x00); /* vertical settings */ - write_reg(par, 0x19 , 0xDF); - write_reg(par, 0x1A , 0x01); - write_reg(par, 0x1B , 0x0A); - write_reg(par, 0x1C , 0x00); - write_reg(par, 0x1D , 0x0E); - write_reg(par, 0x1E , 0x00); - write_reg(par, 0x1F , 0x01); + write_reg(par, 0x19, 0xDF); + write_reg(par, 0x1A, 0x01); + write_reg(par, 0x1B, 0x0A); + write_reg(par, 0x1C, 0x00); + write_reg(par, 0x1D, 0x0E); + write_reg(par, 0x1E, 0x00); + write_reg(par, 0x1F, 0x01); } else if ((par->info->var.xres == 800) && (par->info->var.yres == 480)) { /* PLL clock frequency */ - write_reg(par, 0x88 , 0x0B); - write_reg(par, 0x89 , 0x02); + write_reg(par, 0x88, 0x0B); + write_reg(par, 0x89, 0x02); mdelay(10); /* color deep / MCU Interface */ - write_reg(par, 0x10 , 0x0C); + write_reg(par, 0x10, 0x0C); /* pixel clock period */ - write_reg(par, 0x04 , 0x81); + write_reg(par, 0x04, 0x81); mdelay(1); /* horizontal settings */ - write_reg(par, 0x14 , 0x63); - write_reg(par, 0x15 , 0x03); - write_reg(par, 0x16 , 0x03); - write_reg(par, 0x17 , 0x02); - write_reg(par, 0x18 , 0x00); + write_reg(par, 0x14, 0x63); + write_reg(par, 0x15, 0x03); + write_reg(par, 0x16, 0x03); + write_reg(par, 0x17, 0x02); + write_reg(par, 0x18, 0x00); /* vertical settings */ - write_reg(par, 0x19 , 0xDF); - write_reg(par, 0x1A , 0x01); - write_reg(par, 0x1B , 0x14); - write_reg(par, 0x1C , 0x00); - write_reg(par, 0x1D , 0x06); - write_reg(par, 0x1E , 0x00); - write_reg(par, 0x1F , 0x01); + write_reg(par, 0x19, 0xDF); + write_reg(par, 0x1A, 0x01); + write_reg(par, 0x1B, 0x14); + write_reg(par, 0x1C, 0x00); + write_reg(par, 0x1D, 0x06); + write_reg(par, 0x1E, 0x00); + write_reg(par, 0x1F, 0x01); } else { dev_err(par->info->device, "display size is not supported!!"); return -1; } /* PWM clock */ - write_reg(par, 0x8a , 0x81); - write_reg(par, 0x8b , 0xFF); + write_reg(par, 0x8a, 0x81); + write_reg(par, 0x8b, 0xFF); mdelay(10); /* Display ON */ - write_reg(par, 0x01 , 0x80); + write_reg(par, 0x01, 0x80); mdelay(10); return 0; @@ -196,14 +196,14 @@ static void set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye) "%s(xs=%d, ys=%d, xe=%d, ye=%d)\n", __func__, xs, ys, xe, ye); /* Set_Active_Window */ - write_reg(par, 0x30 , xs & 0x00FF); - write_reg(par, 0x31 , (xs & 0xFF00) >> 8); - write_reg(par, 0x32 , ys & 0x00FF); - write_reg(par, 0x33 , (ys & 0xFF00) >> 8); - write_reg(par, 0x34 , (xs+xe) & 0x00FF); - write_reg(par, 0x35 , ((xs+xe) & 0xFF00) >> 8); - write_reg(par, 0x36 , (ys+ye) & 0x00FF); - write_reg(par, 0x37 , ((ys+ye) & 0xFF00) >> 8); + write_reg(par, 0x30, xs & 0x00FF); + write_reg(par, 0x31, (xs & 0xFF00) >> 8); + write_reg(par, 0x32, ys & 0x00FF); + write_reg(par, 0x33, (ys & 0xFF00) >> 8); + write_reg(par, 0x34, (xs+xe) & 0x00FF); + write_reg(par, 0x35, ((xs+xe) & 0xFF00) >> 8); + write_reg(par, 0x36, (ys+ye) & 0x00FF); + write_reg(par, 0x37, ((ys+ye) & 0xFF00) >> 8); /* Set_Memory_Write_Cursor */ write_reg(par, 0x46, xs & 0xff); @@ -238,8 +238,8 @@ static void write_reg8_bus8(struct fbtft_par *par, int len, ...) ret = par->fbtftops.write(par, par->buf, 2); if (ret < 0) { va_end(args); - dev_err(par->info->device, "%s: write() failed and returned %dn", - __func__, ret); + dev_err(par->info->device, "write() failed and returned %dn", + ret); return; } len--; @@ -256,8 +256,8 @@ static void write_reg8_bus8(struct fbtft_par *par, int len, ...) ret = par->fbtftops.write(par, par->buf, len + 1); if (ret < 0) { va_end(args); - dev_err(par->info->device, "%s: write() failed and returned %dn", - __func__, ret); + dev_err(par->info->device, + "write() failed and returned %dn", ret); return; } } diff --git a/drivers/staging/fbtft/fb_s6d02a1.c b/drivers/staging/fbtft/fb_s6d02a1.c index e412a42443e5..f3302525ec00 100644 --- a/drivers/staging/fbtft/fb_s6d02a1.c +++ b/drivers/staging/fbtft/fb_s6d02a1.c @@ -108,7 +108,7 @@ static void set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye) /* Column address */ write_reg(par, 0x2A, xs >> 8, xs & 0xFF, xe >> 8, xe & 0xFF); - /* Row adress */ + /* Row address */ write_reg(par, 0x2B, ys >> 8, ys & 0xFF, ye >> 8, ye & 0xFF); /* Memory write */ @@ -136,7 +136,7 @@ static int set_var(struct fbtft_par *par) write_reg(par, 0x36, MY | MV | (par->bgr << 3)); break; case 180: - write_reg(par, 0x36, (par->bgr << 3)); + write_reg(par, 0x36, par->bgr << 3); break; case 90: write_reg(par, 0x36, MX | MV | (par->bgr << 3)); diff --git a/drivers/staging/fbtft/fb_s6d1121.c b/drivers/staging/fbtft/fb_s6d1121.c index 1ef8c1ad827e..2e1b72ad54aa 100644 --- a/drivers/staging/fbtft/fb_s6d1121.c +++ b/drivers/staging/fbtft/fb_s6d1121.c @@ -143,12 +143,10 @@ static int set_var(struct fbtft_par *par) static int set_gamma(struct fbtft_par *par, unsigned long *curves) { unsigned long mask[] = { - 0b111111, 0b111111, 0b111111, 0b111111, 0b111111, 0b111111, - 0b111111, 0b111111, 0b111111, 0b111111, 0b111111, 0b111111, - 0b11111, 0b11111, - 0b111111, 0b111111, 0b111111, 0b111111, 0b111111, 0b111111, - 0b111111, 0b111111, 0b111111, 0b111111, 0b111111, 0b111111, - 0b11111, 0b11111 }; + 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, + 0x3f, 0x3f, 0x1f, 0x1f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, + 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x1f, 0x1f, + }; int i, j; fbtft_par_dbg(DEBUG_INIT_DISPLAY, par, "%s()\n", __func__); diff --git a/drivers/staging/fbtft/fb_ssd1289.c b/drivers/staging/fbtft/fb_ssd1289.c index ef46fbca2700..17a77e061498 100644 --- a/drivers/staging/fbtft/fb_ssd1289.c +++ b/drivers/staging/fbtft/fb_ssd1289.c @@ -126,16 +126,16 @@ static int set_var(struct fbtft_par *par) switch (par->info->var.rotate) { case 0: - write_reg(par, 0x11, reg11 | 0b110000); + write_reg(par, 0x11, reg11 | 0x30); break; case 270: - write_reg(par, 0x11, reg11 | 0b101000); + write_reg(par, 0x11, reg11 | 0x28); break; case 180: - write_reg(par, 0x11, reg11 | 0b000000); + write_reg(par, 0x11, reg11 | 0x00); break; case 90: - write_reg(par, 0x11, reg11 | 0b011000); + write_reg(par, 0x11, reg11 | 0x18); break; } @@ -151,10 +151,9 @@ static int set_var(struct fbtft_par *par) static int set_gamma(struct fbtft_par *par, unsigned long *curves) { unsigned long mask[] = { - 0b11111, 0b11111, 0b111, 0b111, 0b111, - 0b111, 0b111, 0b111, 0b111, 0b111, - 0b11111, 0b11111, 0b111, 0b111, 0b111, - 0b111, 0b111, 0b111, 0b111, 0b111 }; + 0x1f, 0x1f, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, + 0x1f, 0x1f, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, + }; int i, j; fbtft_par_dbg(DEBUG_INIT_DISPLAY, par, "%s()\n", __func__); diff --git a/drivers/staging/fbtft/fb_ssd1306.c b/drivers/staging/fbtft/fb_ssd1306.c index 5ea195b0de1b..15ee44dd130b 100644 --- a/drivers/staging/fbtft/fb_ssd1306.c +++ b/drivers/staging/fbtft/fb_ssd1306.c @@ -193,8 +193,8 @@ static int write_vmem(struct fbtft_par *par, size_t offset, size_t len) ret = par->fbtftops.write(par, par->txbuf.buf, par->info->var.xres*par->info->var.yres/8); if (ret < 0) - dev_err(par->info->device, - "%s: write failed and returned: %d\n", __func__, ret); + dev_err(par->info->device, "write failed and returned: %d\n", + ret); return ret; } diff --git a/drivers/staging/fbtft/fb_ssd1331.c b/drivers/staging/fbtft/fb_ssd1331.c index da7464f90e37..5bb741046c85 100644 --- a/drivers/staging/fbtft/fb_ssd1331.c +++ b/drivers/staging/fbtft/fb_ssd1331.c @@ -29,24 +29,24 @@ static int init_display(struct fbtft_par *par) write_reg(par, 0xae); /* Display Off */ write_reg(par, 0xa0, 0x70 | (par->bgr << 2)); /* Set Colour Depth */ - write_reg(par, 0x72); // RGB colour + write_reg(par, 0x72); /* RGB colour */ write_reg(par, 0xa1, 0x00); /* Set Display Start Line */ write_reg(par, 0xa2, 0x00); /* Set Display Offset */ write_reg(par, 0xa4); /* NORMALDISPLAY */ - write_reg(par, 0xa8, 0x3f); // Set multiplex - write_reg(par, 0xad, 0x8e); // Set master - // write_reg(par, 0xb0, 0x0b); // Set power mode - write_reg(par, 0xb1, 0x31); // Precharge - write_reg(par, 0xb3, 0xf0); // Clock div - write_reg(par, 0x8a, 0x64); // Precharge A - write_reg(par, 0x8b, 0x78); // Precharge B - write_reg(par, 0x8c, 0x64); // Precharge C - write_reg(par, 0xbb, 0x3a); // Precharge level - write_reg(par, 0xbe, 0x3e); // vcomh - write_reg(par, 0x87, 0x06); // Master current - write_reg(par, 0x81, 0x91); // Contrast A - write_reg(par, 0x82, 0x50); // Contrast B - write_reg(par, 0x83, 0x7d); // Contrast C + write_reg(par, 0xa8, 0x3f); /* Set multiplex */ + write_reg(par, 0xad, 0x8e); /* Set master */ + /* write_reg(par, 0xb0, 0x0b); Set power mode */ + write_reg(par, 0xb1, 0x31); /* Precharge */ + write_reg(par, 0xb3, 0xf0); /* Clock div */ + write_reg(par, 0x8a, 0x64); /* Precharge A */ + write_reg(par, 0x8b, 0x78); /* Precharge B */ + write_reg(par, 0x8c, 0x64); /* Precharge C */ + write_reg(par, 0xbb, 0x3a); /* Precharge level */ + write_reg(par, 0xbe, 0x3e); /* vcomh */ + write_reg(par, 0x87, 0x06); /* Master current */ + write_reg(par, 0x81, 0x91); /* Contrast A */ + write_reg(par, 0x82, 0x50); /* Contrast B */ + write_reg(par, 0x83, 0x7d); /* Contrast C */ write_reg(par, 0xaf); /* Set Sleep Mode Display On */ return 0; @@ -69,9 +69,8 @@ static void write_reg8_bus8(struct fbtft_par *par, int len, ...) if (unlikely(par->debug & DEBUG_WRITE_REGISTER)) { va_start(args, len); - for (i = 0; i < len; i++) { + for (i = 0; i < len; i++) buf[i] = (u8)va_arg(args, unsigned int); - } va_end(args); fbtft_par_dbg_hex(DEBUG_WRITE_REGISTER, par, par->info->device, u8, buf, len, "%s: ", __func__); } @@ -84,20 +83,21 @@ static void write_reg8_bus8(struct fbtft_par *par, int len, ...) ret = par->fbtftops.write(par, par->buf, sizeof(u8)); if (ret < 0) { va_end(args); - dev_err(par->info->device, "%s: write() failed and returned %d\n", __func__, ret); + dev_err(par->info->device, + "write() failed and returned %d\n", ret); return; } len--; if (len) { i = len; - while (i--) { + while (i--) *buf++ = (u8)va_arg(args, unsigned int); - } ret = par->fbtftops.write(par, par->buf, len * (sizeof(u8))); if (ret < 0) { va_end(args); - dev_err(par->info->device, "%s: write() failed and returned %d\n", __func__, ret); + dev_err(par->info->device, + "write() failed and returned %d\n", ret); return; } } diff --git a/drivers/staging/fbtft/fb_ssd1351.c b/drivers/staging/fbtft/fb_ssd1351.c index 062d98660f63..9bcd7a0aeed4 100644 --- a/drivers/staging/fbtft/fb_ssd1351.c +++ b/drivers/staging/fbtft/fb_ssd1351.c @@ -72,6 +72,7 @@ static void set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye) static int set_var(struct fbtft_par *par) { unsigned remap; + fbtft_par_dbg(DEBUG_INIT_DISPLAY, par, "%s()\n", __func__); if (par->fbtftops.init_display != init_display) { @@ -86,16 +87,16 @@ static int set_var(struct fbtft_par *par) switch (par->info->var.rotate) { case 0: - write_reg(par, 0xA0, remap | 0b00 | 1<<4); + write_reg(par, 0xA0, remap | 0x00 | 1<<4); break; case 270: - write_reg(par, 0xA0, remap | 0b11 | 1<<4); + write_reg(par, 0xA0, remap | 0x03 | 1<<4); break; case 180: - write_reg(par, 0xA0, remap | 0b10); + write_reg(par, 0xA0, remap | 0x02); break; case 90: - write_reg(par, 0xA0, remap | 0b01); + write_reg(par, 0xA0, remap | 0x01); break; } @@ -217,12 +218,8 @@ static void register_onboard_backlight(struct fbtft_par *par) bl_ops = devm_kzalloc(par->info->device, sizeof(struct backlight_ops), GFP_KERNEL); - if (!bl_ops) { - dev_err(par->info->device, - "%s: could not allocate memory for backlight operations.\n", - __func__); + if (!bl_ops) return; - } bl_ops->update_status = update_onboard_backlight; bl_props.type = BACKLIGHT_RAW; diff --git a/drivers/staging/fbtft/fb_st7735r.c b/drivers/staging/fbtft/fb_st7735r.c index b63aa38e51cf..9d874308447e 100644 --- a/drivers/staging/fbtft/fb_st7735r.c +++ b/drivers/staging/fbtft/fb_st7735r.c @@ -31,20 +31,20 @@ static int default_init_sequence[] = { /* SWRESET - Software reset */ - -1, 0x01, + -1, 0x01, -2, 150, /* delay */ /* SLPOUT - Sleep out & booster on */ - -1, 0x11, + -1, 0x11, -2, 500, /* delay */ /* FRMCTR1 - frame rate control: normal mode frame rate = fosc / (1 x 2 + 40) * (LINE + 2C + 2D) */ - -1, 0xB1, 0x01, 0x2C, 0x2D, + -1, 0xB1, 0x01, 0x2C, 0x2D, /* FRMCTR2 - frame rate control: idle mode frame rate = fosc / (1 x 2 + 40) * (LINE + 2C + 2D) */ - -1, 0xB2, 0x01, 0x2C, 0x2D, + -1, 0xB2, 0x01, 0x2C, 0x2D, /* FRMCTR3 - frame rate control - partial mode dot inversion mode, line inversion mode */ @@ -68,7 +68,7 @@ static int default_init_sequence[] = { /* PWCTR4 - Power Control BCLK/2, Opamp current small & Medium low */ - -1, 0xC3,0x8A,0x2A, + -1, 0xC3, 0x8A, 0x2A, /* PWCTR5 - Power Control */ -1, 0xC4, 0x8A, 0xEE, @@ -91,7 +91,7 @@ static int default_init_sequence[] = { -2, 10, /* delay */ /* end marker */ - -3 + -3 }; static void set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye) @@ -102,7 +102,7 @@ static void set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye) /* Column address */ write_reg(par, 0x2A, xs >> 8, xs & 0xFF, xe >> 8, xe & 0xFF); - /* Row adress */ + /* Row address */ write_reg(par, 0x2B, ys >> 8, ys & 0xFF, ye >> 8, ye & 0xFF); /* Memory write */ @@ -130,7 +130,7 @@ static int set_var(struct fbtft_par *par) write_reg(par, 0x36, MY | MV | (par->bgr << 3)); break; case 180: - write_reg(par, 0x36, (par->bgr << 3)); + write_reg(par, 0x36, par->bgr << 3); break; case 90: write_reg(par, 0x36, MX | MV | (par->bgr << 3)); @@ -148,21 +148,21 @@ static int set_var(struct fbtft_par *par) #define CURVE(num, idx) curves[num*par->gamma.num_values + idx] static int set_gamma(struct fbtft_par *par, unsigned long *curves) { - int i,j; + int i, j; fbtft_par_dbg(DEBUG_INIT_DISPLAY, par, "%s()\n", __func__); /* apply mask */ for (i = 0; i < par->gamma.num_curves; i++) for (j = 0; j < par->gamma.num_values; j++) - CURVE(i,j) &= 0b111111; + CURVE(i, j) &= 0x3f; for (i = 0; i < par->gamma.num_curves; i++) write_reg(par, 0xE0 + i, CURVE(i, 0), CURVE(i, 1), CURVE(i, 2), CURVE(i, 3), CURVE(i, 4), CURVE(i, 5), CURVE(i, 6), CURVE(i, 7), CURVE(i, 8), CURVE(i, 9), CURVE(i, 10), CURVE(i, 11), - CURVE(i, 12), CURVE(i, 13), CURVE(i, 14), CURVE(i,15)); + CURVE(i, 12), CURVE(i, 13), CURVE(i, 14), CURVE(i, 15)); return 0; } diff --git a/drivers/staging/fbtft/fb_tinylcd.c b/drivers/staging/fbtft/fb_tinylcd.c index ca98bfb5c7df..c0b1a337fafd 100644 --- a/drivers/staging/fbtft/fb_tinylcd.c +++ b/drivers/staging/fbtft/fb_tinylcd.c @@ -70,7 +70,7 @@ static void set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye) /* Column address */ write_reg(par, 0x2A, xs >> 8, xs & 0xFF, xe >> 8, xe & 0xFF); - /* Row adress */ + /* Row address */ write_reg(par, 0x2B, ys >> 8, ys & 0xFF, ye >> 8, ye & 0xFF); /* Memory write */ diff --git a/drivers/staging/fbtft/fb_tls8204.c b/drivers/staging/fbtft/fb_tls8204.c index 8738c7a7bfda..fcd38bf2ed79 100644 --- a/drivers/staging/fbtft/fb_tls8204.c +++ b/drivers/staging/fbtft/fb_tls8204.c @@ -127,7 +127,7 @@ static int write_vmem(struct fbtft_par *par, size_t offset, size_t len) ret = par->fbtftops.write(par, par->txbuf.buf, WIDTH); if (ret < 0) { dev_err(par->info->device, - "%s: write failed and returned: %d\n", __func__, ret); + "write failed and returned: %d\n", ret); break; } } diff --git a/drivers/staging/fbtft/fb_uc1701.c b/drivers/staging/fbtft/fb_uc1701.c index d70ac524278c..26d669b57916 100644 --- a/drivers/staging/fbtft/fb_uc1701.c +++ b/drivers/staging/fbtft/fb_uc1701.c @@ -183,7 +183,8 @@ static int write_vmem(struct fbtft_par *par, size_t offset, size_t len) } if (ret < 0) - dev_err(par->info->device, "%s: write failed and returned: %d\n", __func__, ret); + dev_err(par->info->device, "write failed and returned: %d\n", + ret); return ret; } diff --git a/drivers/staging/fbtft/fb_upd161704.c b/drivers/staging/fbtft/fb_upd161704.c index fff57b330ba2..176c2106d724 100644 --- a/drivers/staging/fbtft/fb_upd161704.c +++ b/drivers/staging/fbtft/fb_upd161704.c @@ -47,84 +47,84 @@ static int init_display(struct fbtft_par *par) /* Initialization sequence from Lib_UTFT */ /* register reset */ - write_reg(par, 0x0003,0x0001); /* Soft reset */ + write_reg(par, 0x0003, 0x0001); /* Soft reset */ /* oscillator start */ - write_reg(par, 0x003A,0x0001); /*Oscillator 0: stop, 1: operation */ + write_reg(par, 0x003A, 0x0001); /*Oscillator 0: stop, 1: operation */ udelay(100); /* y-setting */ - write_reg(par, 0x0024,0x007B); /* amplitude setting */ + write_reg(par, 0x0024, 0x007B); /* amplitude setting */ udelay(10); - write_reg(par, 0x0025,0x003B); /* amplitude setting */ - write_reg(par, 0x0026,0x0034); /* amplitude setting */ + write_reg(par, 0x0025, 0x003B); /* amplitude setting */ + write_reg(par, 0x0026, 0x0034); /* amplitude setting */ udelay(10); - write_reg(par, 0x0027,0x0004); /* amplitude setting */ - write_reg(par, 0x0052,0x0025); /* circuit setting 1 */ + write_reg(par, 0x0027, 0x0004); /* amplitude setting */ + write_reg(par, 0x0052, 0x0025); /* circuit setting 1 */ udelay(10); - write_reg(par, 0x0053,0x0033); /* circuit setting 2 */ - write_reg(par, 0x0061,0x001C); /* adjustment V10 positive polarity */ + write_reg(par, 0x0053, 0x0033); /* circuit setting 2 */ + write_reg(par, 0x0061, 0x001C); /* adjustment V10 positive polarity */ udelay(10); - write_reg(par, 0x0062,0x002C); /* adjustment V9 negative polarity */ - write_reg(par, 0x0063,0x0022); /* adjustment V34 positive polarity */ + write_reg(par, 0x0062, 0x002C); /* adjustment V9 negative polarity */ + write_reg(par, 0x0063, 0x0022); /* adjustment V34 positive polarity */ udelay(10); - write_reg(par, 0x0064,0x0027); /* adjustment V31 negative polarity */ + write_reg(par, 0x0064, 0x0027); /* adjustment V31 negative polarity */ udelay(10); - write_reg(par, 0x0065,0x0014); /* adjustment V61 negative polarity */ + write_reg(par, 0x0065, 0x0014); /* adjustment V61 negative polarity */ udelay(10); - write_reg(par, 0x0066,0x0010); /* adjustment V61 negative polarity */ - + write_reg(par, 0x0066, 0x0010); /* adjustment V61 negative polarity */ + /* Basical clock for 1 line (BASECOUNT[7:0]) number specified */ - write_reg(par, 0x002E,0x002D); - + write_reg(par, 0x002E, 0x002D); + /* Power supply setting */ - write_reg(par, 0x0019,0x0000); /* DC/DC output setting */ + write_reg(par, 0x0019, 0x0000); /* DC/DC output setting */ udelay(200); - write_reg(par, 0x001A,0x1000); /* DC/DC frequency setting */ - write_reg(par, 0x001B,0x0023); /* DC/DC rising setting */ - write_reg(par, 0x001C,0x0C01); /* Regulator voltage setting */ - write_reg(par, 0x001D,0x0000); /* Regulator current setting */ - write_reg(par, 0x001E,0x0009); /* VCOM output setting */ - write_reg(par, 0x001F,0x0035); /* VCOM amplitude setting */ - write_reg(par, 0x0020,0x0015); /* VCOMM cencter setting */ - write_reg(par, 0x0018,0x1E7B); /* DC/DC operation setting */ + write_reg(par, 0x001A, 0x1000); /* DC/DC frequency setting */ + write_reg(par, 0x001B, 0x0023); /* DC/DC rising setting */ + write_reg(par, 0x001C, 0x0C01); /* Regulator voltage setting */ + write_reg(par, 0x001D, 0x0000); /* Regulator current setting */ + write_reg(par, 0x001E, 0x0009); /* VCOM output setting */ + write_reg(par, 0x001F, 0x0035); /* VCOM amplitude setting */ + write_reg(par, 0x0020, 0x0015); /* VCOMM cencter setting */ + write_reg(par, 0x0018, 0x1E7B); /* DC/DC operation setting */ /* windows setting */ - write_reg(par, 0x0008,0x0000); /* Minimum X address */ - write_reg(par, 0x0009,0x00EF); /* Maximum X address */ - write_reg(par, 0x000a,0x0000); /* Minimum Y address */ - write_reg(par, 0x000b,0x013F); /* Maximum Y address */ + write_reg(par, 0x0008, 0x0000); /* Minimum X address */ + write_reg(par, 0x0009, 0x00EF); /* Maximum X address */ + write_reg(par, 0x000a, 0x0000); /* Minimum Y address */ + write_reg(par, 0x000b, 0x013F); /* Maximum Y address */ /* LCD display area setting */ - write_reg(par, 0x0029,0x0000); /* [LCDSIZE] X MIN. size set */ - write_reg(par, 0x002A,0x0000); /* [LCDSIZE] Y MIN. size set */ - write_reg(par, 0x002B,0x00EF); /* [LCDSIZE] X MAX. size set */ - write_reg(par, 0x002C,0x013F); /* [LCDSIZE] Y MAX. size set */ + write_reg(par, 0x0029, 0x0000); /* [LCDSIZE] X MIN. size set */ + write_reg(par, 0x002A, 0x0000); /* [LCDSIZE] Y MIN. size set */ + write_reg(par, 0x002B, 0x00EF); /* [LCDSIZE] X MAX. size set */ + write_reg(par, 0x002C, 0x013F); /* [LCDSIZE] Y MAX. size set */ /* Gate scan setting */ - write_reg(par, 0x0032,0x0002); - + write_reg(par, 0x0032, 0x0002); + /* n line inversion line number */ - write_reg(par, 0x0033,0x0000); + write_reg(par, 0x0033, 0x0000); /* Line inversion/frame inversion/interlace setting */ - write_reg(par, 0x0037,0x0000); - + write_reg(par, 0x0037, 0x0000); + /* Gate scan operation setting register */ - write_reg(par, 0x003B,0x0001); - + write_reg(par, 0x003B, 0x0001); + /* Color mode */ /*GS = 0: 260-k color (64 gray scale), GS = 1: 8 color (2 gray scale) */ - write_reg(par, 0x0004,0x0000); + write_reg(par, 0x0004, 0x0000); /* RAM control register */ - write_reg(par, 0x0005,0x0000); /*Window access 00:Normal, 10:Window */ + write_reg(par, 0x0005, 0x0000); /*Window access 00:Normal, 10:Window */ /* Display setting register 2 */ - write_reg(par, 0x0001,0x0000); + write_reg(par, 0x0001, 0x0000); /* display setting */ - write_reg(par, 0x0000,0x0000); /* display on */ + write_reg(par, 0x0000, 0x0000); /* display on */ return 0; } diff --git a/drivers/staging/fbtft/fb_watterott.c b/drivers/staging/fbtft/fb_watterott.c index 975b579359f3..88fb2c0132d5 100644 --- a/drivers/staging/fbtft/fb_watterott.c +++ b/drivers/staging/fbtft/fb_watterott.c @@ -65,7 +65,7 @@ static void write_reg8_bus8(struct fbtft_par *par, int len, ...) ret = par->fbtftops.write(par, par->buf, len); if (ret < 0) { dev_err(par->info->device, - "%s: write() failed and returned %d\n", __func__, ret); + "write() failed and returned %d\n", ret); return; } } diff --git a/drivers/staging/fbtft/fbtft-bus.c b/drivers/staging/fbtft/fbtft-bus.c index b3cddb0b3d69..52af9cbbc2a6 100644 --- a/drivers/staging/fbtft/fbtft-bus.c +++ b/drivers/staging/fbtft/fbtft-bus.c @@ -111,7 +111,7 @@ void fbtft_write_reg8_bus9(struct fbtft_par *par, int len, ...) ret = par->fbtftops.write(par, par->buf, (len + pad) * sizeof(u16)); if (ret < 0) { dev_err(par->info->device, - "%s: write() failed and returned %d\n", __func__, ret); + "write() failed and returned %d\n", ret); return; } } diff --git a/drivers/staging/fbtft/fbtft-core.c b/drivers/staging/fbtft/fbtft-core.c index 37dcf7eb191a..53b748be2712 100644 --- a/drivers/staging/fbtft/fbtft-core.c +++ b/drivers/staging/fbtft/fbtft-core.c @@ -41,15 +41,10 @@ #include <linux/of_gpio.h> #include "fbtft.h" - -extern void fbtft_sysfs_init(struct fbtft_par *par); -extern void fbtft_sysfs_exit(struct fbtft_par *par); -extern void fbtft_expand_debug_value(unsigned long *debug); -extern int fbtft_gamma_parse_str(struct fbtft_par *par, unsigned long *curves, - const char *str, int size); +#include "internal.h" static unsigned long debug; -module_param(debug, ulong , 0); +module_param(debug, ulong, 0); MODULE_PARM_DESC(debug, "override device debug level"); static bool dma = true; @@ -302,12 +297,8 @@ void fbtft_register_backlight(struct fbtft_par *par) bl_ops = devm_kzalloc(par->info->device, sizeof(struct backlight_ops), GFP_KERNEL); - if (!bl_ops) { - dev_err(par->info->device, - "%s: could not allocate memeory for backlight operations.\n", - __func__); + if (!bl_ops) return; - } bl_ops->get_brightness = fbtft_backlight_get_brightness; bl_ops->update_status = fbtft_backlight_update_status; @@ -347,7 +338,7 @@ static void fbtft_set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, write_reg(par, 0x2A, (xs >> 8) & 0xFF, xs & 0xFF, (xe >> 8) & 0xFF, xe & 0xFF); - /* Row adress set */ + /* Row address set */ write_reg(par, 0x2B, (ys >> 8) & 0xFF, ys & 0xFF, (ye >> 8) & 0xFF, ye & 0xFF); @@ -379,7 +370,7 @@ static void fbtft_update_display(struct fbtft_par *par, unsigned start_line, int ret = 0; if (unlikely(par->debug & (DEBUG_TIME_FIRST_UPDATE | DEBUG_TIME_EACH_UPDATE))) { - if ((par->debug & DEBUG_TIME_EACH_UPDATE) || \ + if ((par->debug & DEBUG_TIME_EACH_UPDATE) || ((par->debug & DEBUG_TIME_FIRST_UPDATE) && !par->first_update_done)) { getnstimeofday(&ts_start); timeit = true; @@ -707,9 +698,8 @@ struct fb_info *fbtft_framebuffer_alloc(struct fbtft_display *display, /* sanity check */ if (display->gamma_num * display->gamma_len > FBTFT_GAMMA_MAX_VALUES_TOTAL) { - dev_err(dev, - "%s: FBTFT_GAMMA_MAX_VALUES_TOTAL=%d is exceeded\n", - __func__, FBTFT_GAMMA_MAX_VALUES_TOTAL); + dev_err(dev, "FBTFT_GAMMA_MAX_VALUES_TOTAL=%d is exceeded\n", + FBTFT_GAMMA_MAX_VALUES_TOTAL); return NULL; } @@ -1000,7 +990,7 @@ int fbtft_register_framebuffer(struct fb_info *fb_info) fbtft_sysfs_init(par); if (par->txbuf.buf) - sprintf(text1, ", %d KiB %sbuffer memory", + sprintf(text1, ", %zu KiB %sbuffer memory", par->txbuf.len >> 10, par->txbuf.dma ? "DMA " : ""); if (spi) sprintf(text2, ", spi%d.%d at %d MHz", spi->master->bus_num, @@ -1046,7 +1036,6 @@ int fbtft_unregister_framebuffer(struct fb_info *fb_info) { struct fbtft_par *par = fb_info->par; struct spi_device *spi = par->spi; - int ret; if (spi) spi_set_drvdata(spi, NULL); @@ -1055,8 +1044,7 @@ int fbtft_unregister_framebuffer(struct fb_info *fb_info) if (par->fbtftops.unregister_backlight) par->fbtftops.unregister_backlight(par); fbtft_sysfs_exit(par); - ret = unregister_framebuffer(fb_info); - return ret; + return unregister_framebuffer(fb_info); } EXPORT_SYMBOL(fbtft_unregister_framebuffer); @@ -1278,7 +1266,7 @@ static int fbtft_verify_gpios(struct fbtft_par *par) fbtft_par_dbg(DEBUG_VERIFY_GPIOS, par, "%s()\n", __func__); pdata = par->info->device->platform_data; - if (pdata->display.buswidth != 9 && par->startbyte == 0 && \ + if (pdata->display.buswidth != 9 && par->startbyte == 0 && par->gpio.dc < 0) { dev_err(par->info->device, "Missing info about 'dc' gpio. Aborting.\n"); diff --git a/drivers/staging/fbtft/fbtft-io.c b/drivers/staging/fbtft/fbtft-io.c index 32155a7b2a62..a6f091fb975c 100644 --- a/drivers/staging/fbtft/fbtft-io.c +++ b/drivers/staging/fbtft/fbtft-io.c @@ -59,8 +59,7 @@ int fbtft_write_spi_emulate_9(struct fbtft_par *par, void *buf, size_t len) } if ((len % 8) != 0) { dev_err(par->info->device, - "%s: error: len=%d must be divisible by 8\n", - __func__, len); + "error: len=%zu must be divisible by 8\n", len); return -EINVAL; } @@ -106,8 +105,8 @@ int fbtft_read_spi(struct fbtft_par *par, void *buf, size_t len) if (par->startbyte) { if (len > 32) { dev_err(par->info->device, - "%s: len=%d can't be larger than 32 when using 'startbyte'\n", - __func__, len); + "len=%zu can't be larger than 32 when using 'startbyte'\n", + len); return -EINVAL; } txbuf[0] = par->startbyte | 0x3; @@ -155,14 +154,14 @@ int fbtft_write_gpio8_wr(struct fbtft_par *par, void *buf, size_t len) for (i = 0; i < 8; i++) { if ((data & 1) != (prev_data & 1)) gpio_set_value(par->gpio.db[i], - (data & 1)); + data & 1); data >>= 1; prev_data >>= 1; } } #else for (i = 0; i < 8; i++) { - gpio_set_value(par->gpio.db[i], (data & 1)); + gpio_set_value(par->gpio.db[i], data & 1); data >>= 1; } #endif @@ -205,14 +204,14 @@ int fbtft_write_gpio16_wr(struct fbtft_par *par, void *buf, size_t len) for (i = 0; i < 16; i++) { if ((data & 1) != (prev_data & 1)) gpio_set_value(par->gpio.db[i], - (data & 1)); + data & 1); data >>= 1; prev_data >>= 1; } } #else for (i = 0; i < 16; i++) { - gpio_set_value(par->gpio.db[i], (data & 1)); + gpio_set_value(par->gpio.db[i], data & 1); data >>= 1; } #endif diff --git a/drivers/staging/fbtft/fbtft-sysfs.c b/drivers/staging/fbtft/fbtft-sysfs.c index 45f8de3d11ad..c4cc452f9f2b 100644 --- a/drivers/staging/fbtft/fbtft-sysfs.c +++ b/drivers/staging/fbtft/fbtft-sysfs.c @@ -1,5 +1,5 @@ #include "fbtft.h" - +#include "internal.h" static int get_next_ulong(char **str_p, unsigned long *val, char *sep, int base) { @@ -37,10 +37,9 @@ int fbtft_gamma_parse_str(struct fbtft_par *par, unsigned long *curves, fbtft_par_dbg(DEBUG_SYSFS, par, "%s\n", str); - tmp = kmalloc(size+1, GFP_KERNEL); + tmp = kmemdup(str, size + 1, GFP_KERNEL); if (!tmp) return -ENOMEM; - memcpy(tmp, str, size+1); /* replace optional separators */ str_p = tmp; @@ -153,7 +152,7 @@ static struct device_attribute gamma_device_attrs[] = { void fbtft_expand_debug_value(unsigned long *debug) { - switch (*debug & 0b111) { + switch (*debug & 0x7) { case 1: *debug |= DEBUG_LEVEL_1; break; diff --git a/drivers/staging/fbtft/fbtft.h b/drivers/staging/fbtft/fbtft.h index 0dbf3f95fe78..9fd98cb53418 100644 --- a/drivers/staging/fbtft/fbtft.h +++ b/drivers/staging/fbtft/fbtft.h @@ -147,7 +147,7 @@ struct fbtft_display { /** * struct fbtft_platform_data - Passes display specific data to the driver * @display: Display properties - * @gpios: Pointer to an array of piname to gpio mappings + * @gpios: Pointer to an array of pinname to gpio mappings * @rotate: Display rotation angle * @bgr: LCD Controller BGR bit * @fps: Frames per second (this will go away, use @fps in @fbtft_display) @@ -200,7 +200,7 @@ struct fbtft_platform_data { * @gpio.cs: LCD Chip Select with parallel interface bus * @gpio.db[16]: Parallel databus * @gpio.led[16]: Led control signals - * @gpio.aux[16]: Auxillary signals, not used by core + * @gpio.aux[16]: Auxiliary signals, not used by core * @init_sequence: Pointer to LCD initialization array * @gamma.lock: Mutex for Gamma curve locking * @gamma.curves: Pointer to Gamma curve array @@ -259,9 +259,7 @@ struct fbtft_par { #define NUMARGS(...) (sizeof((int[]){__VA_ARGS__})/sizeof(int)) #define write_reg(par, ...) \ -do { \ - par->fbtftops.write_register(par, NUMARGS(__VA_ARGS__), __VA_ARGS__); \ -} while (0) + par->fbtftops.write_register(par, NUMARGS(__VA_ARGS__), __VA_ARGS__) /* fbtft-core.c */ extern void fbtft_dbg_hex(const struct device *dev, @@ -326,8 +324,8 @@ static int fbtft_driver_remove_pdev(struct platform_device *pdev) \ } \ \ static const struct of_device_id dt_ids[] = { \ - { .compatible = _compatible }, \ - {}, \ + { .compatible = _compatible }, \ + {}, \ }; \ \ MODULE_DEVICE_TABLE(of, dt_ids); \ @@ -337,7 +335,7 @@ static struct spi_driver fbtft_driver_spi_driver = { \ .driver = { \ .name = _name, \ .owner = THIS_MODULE, \ - .of_match_table = of_match_ptr(dt_ids), \ + .of_match_table = of_match_ptr(dt_ids), \ }, \ .probe = fbtft_driver_probe_spi, \ .remove = fbtft_driver_remove_spi, \ @@ -347,7 +345,7 @@ static struct platform_driver fbtft_driver_platform_driver = { \ .driver = { \ .name = _name, \ .owner = THIS_MODULE, \ - .of_match_table = of_match_ptr(dt_ids), \ + .of_match_table = of_match_ptr(dt_ids), \ }, \ .probe = fbtft_driver_probe_pdev, \ .remove = fbtft_driver_remove_pdev, \ diff --git a/drivers/staging/fbtft/fbtft_device.c b/drivers/staging/fbtft/fbtft_device.c index b9f4c30e39c6..df6cd775ac1e 100644 --- a/drivers/staging/fbtft/fbtft_device.c +++ b/drivers/staging/fbtft/fbtft_device.c @@ -29,8 +29,8 @@ #define MAX_GPIOS 32 -struct spi_device *spi_device; -struct platform_device *p_device; +static struct spi_device *spi_device; +static struct platform_device *p_device; static char *name; module_param(name, charp, 0); @@ -109,7 +109,7 @@ module_param_array(init, int, &init_num, 0); MODULE_PARM_DESC(init, "Init sequence, used with the custom argument"); static unsigned long debug; -module_param(debug, ulong , 0); +module_param(debug, ulong, 0); MODULE_PARM_DESC(debug, "level: 0-7 (the remaining 29 bits is for advanced usage)"); @@ -136,43 +136,69 @@ static void adafruit18_green_tab_set_addr_win(struct fbtft_par *par, "03 1d 07 06 2E 2C 29 2D 2E 2E 37 3F 00 00 02 10" static int hy28b_init_sequence[] = { - -1,0x00e7,0x0010,-1,0x0000,0x0001,-1,0x0001,0x0100,-1,0x0002,0x0700, - -1,0x0003,0x1030,-1,0x0004,0x0000,-1,0x0008,0x0207,-1,0x0009,0x0000, - -1,0x000a,0x0000,-1,0x000c,0x0001,-1,0x000d,0x0000,-1,0x000f,0x0000, - -1,0x0010,0x0000,-1,0x0011,0x0007,-1,0x0012,0x0000,-1,0x0013,0x0000, - -2,50,-1,0x0010,0x1590,-1,0x0011,0x0227,-2,50,-1,0x0012,0x009c,-2,50, - -1,0x0013,0x1900,-1,0x0029,0x0023,-1,0x002b,0x000e,-2,50, - -1,0x0020,0x0000,-1,0x0021,0x0000,-2,50,-1,0x0050,0x0000, - -1,0x0051,0x00ef,-1,0x0052,0x0000,-1,0x0053,0x013f,-1,0x0060,0xa700, - -1,0x0061,0x0001,-1,0x006a,0x0000,-1,0x0080,0x0000,-1,0x0081,0x0000, - -1,0x0082,0x0000,-1,0x0083,0x0000,-1,0x0084,0x0000,-1,0x0085,0x0000, - -1,0x0090,0x0010,-1,0x0092,0x0000,-1,0x0093,0x0003,-1,0x0095,0x0110, - -1,0x0097,0x0000,-1,0x0098,0x0000,-1,0x0007,0x0133,-1,0x0020,0x0000, - -1,0x0021,0x0000,-2,100,-3 }; + -1, 0x00e7, 0x0010, -1, 0x0000, 0x0001, + -1, 0x0001, 0x0100, -1, 0x0002, 0x0700, + -1, 0x0003, 0x1030, -1, 0x0004, 0x0000, + -1, 0x0008, 0x0207, -1, 0x0009, 0x0000, + -1, 0x000a, 0x0000, -1, 0x000c, 0x0001, + -1, 0x000d, 0x0000, -1, 0x000f, 0x0000, + -1, 0x0010, 0x0000, -1, 0x0011, 0x0007, + -1, 0x0012, 0x0000, -1, 0x0013, 0x0000, + -2, 50, -1, 0x0010, 0x1590, -1, 0x0011, + 0x0227, -2, 50, -1, 0x0012, 0x009c, -2, 50, + -1, 0x0013, 0x1900, -1, 0x0029, 0x0023, + -1, 0x002b, 0x000e, -2, 50, + -1, 0x0020, 0x0000, -1, 0x0021, 0x0000, + -2, 50, -1, 0x0050, 0x0000, + -1, 0x0051, 0x00ef, -1, 0x0052, 0x0000, + -1, 0x0053, 0x013f, -1, 0x0060, 0xa700, + -1, 0x0061, 0x0001, -1, 0x006a, 0x0000, + -1, 0x0080, 0x0000, -1, 0x0081, 0x0000, + -1, 0x0082, 0x0000, -1, 0x0083, 0x0000, + -1, 0x0084, 0x0000, -1, 0x0085, 0x0000, + -1, 0x0090, 0x0010, -1, 0x0092, 0x0000, + -1, 0x0093, 0x0003, -1, 0x0095, 0x0110, + -1, 0x0097, 0x0000, -1, 0x0098, 0x0000, + -1, 0x0007, 0x0133, -1, 0x0020, 0x0000, + -1, 0x0021, 0x0000, -2, 100, -3 }; #define HY28B_GAMMA \ "04 1F 4 7 7 0 7 7 6 0\n" \ "0F 00 1 7 4 0 0 0 6 7" static int pitft_init_sequence[] = { - -1,0x01,-2,5,-1,0x28,-1,0xEF,0x03,0x80,0x02,-1,0xCF,0x00,0xC1,0x30, - -1,0xED,0x64,0x03,0x12,0x81,-1,0xE8,0x85,0x00,0x78, - -1,0xCB,0x39,0x2C,0x00,0x34,0x02,-1,0xF7,0x20,-1,0xEA,0x00,0x00, - -1,0xC0,0x23,-1,0xC1,0x10,-1,0xC5,0x3e,0x28,-1,0xC7,0x86,-1,0x3A,0x55, - -1,0xB1,0x00,0x18,-1,0xB6,0x08,0x82,0x27,-1,0xF2,0x00,-1,0x26,0x01, - -1,0xE0,0x0F,0x31,0x2B,0x0C,0x0E,0x08,0x4E,0xF1,0x37,0x07,0x10,0x03, - 0x0E,0x09,0x00,-1,0xE1,0x00,0x0E,0x14,0x03,0x11,0x07,0x31,0xC1,0x48, - 0x08,0x0F,0x0C,0x31,0x36,0x0F,-1,0x11,-2,100,-1,0x29,-2,20,-3 }; + -1, 0x01, -2, 5, -1, 0x28, -1, 0xEF, + 0x03, 0x80, 0x02, -1, 0xCF, 0x00, 0xC1, 0x30, + -1, 0xED, 0x64, 0x03, 0x12, 0x81, + -1, 0xE8, 0x85, 0x00, 0x78, + -1, 0xCB, 0x39, 0x2C, 0x00, 0x34, 0x02, + -1, 0xF7, 0x20, -1, 0xEA, 0x00, 0x00, + -1, 0xC0, 0x23, -1, 0xC1, 0x10, -1, 0xC5, + 0x3e, 0x28, -1, 0xC7, 0x86, -1, 0x3A, 0x55, + -1, 0xB1, 0x00, 0x18, -1, 0xB6, 0x08, 0x82, + 0x27, -1, 0xF2, 0x00, -1, 0x26, 0x01, + -1, 0xE0, 0x0F, 0x31, 0x2B, 0x0C, 0x0E, 0x08, + 0x4E, 0xF1, 0x37, 0x07, 0x10, 0x03, + 0x0E, 0x09, 0x00, -1, 0xE1, 0x00, 0x0E, 0x14, + 0x03, 0x11, 0x07, 0x31, 0xC1, 0x48, + 0x08, 0x0F, 0x0C, 0x31, 0x36, 0x0F, -1, + 0x11, -2, 100, -1, 0x29, -2, 20, -3 }; static int waveshare32b_init_sequence[] = { - -1,0xCB,0x39,0x2C,0x00,0x34,0x02,-1,0xCF,0x00,0xC1,0x30, - -1,0xE8,0x85,0x00,0x78,-1,0xEA,0x00,0x00,-1,0xED,0x64,0x03,0x12,0x81, - -1,0xF7,0x20,-1,0xC0,0x23,-1,0xC1,0x10,-1,0xC5,0x3e,0x28,-1,0xC7,0x86, - -1,0x36,0x28,-1,0x3A,0x55,-1,0xB1,0x00,0x18,-1,0xB6,0x08,0x82,0x27, - -1,0xF2,0x00,-1,0x26,0x01, - -1,0xE0,0x0F,0x31,0x2B,0x0C,0x0E,0x08,0x4E,0xF1,0x37,0x07,0x10,0x03,0x0E,0x09,0x00, - -1,0xE1,0x00,0x0E,0x14,0x03,0x11,0x07,0x31,0xC1,0x48,0x08,0x0F,0x0C,0x31,0x36,0x0F, - -1,0x11,-2,120,-1,0x29,-1,0x2c,-3 }; + -1, 0xCB, 0x39, 0x2C, 0x00, 0x34, 0x02, + -1, 0xCF, 0x00, 0xC1, 0x30, + -1, 0xE8, 0x85, 0x00, 0x78, -1, 0xEA, 0x00, + 0x00, -1, 0xED, 0x64, 0x03, 0x12, 0x81, + -1, 0xF7, 0x20, -1, 0xC0, 0x23, -1, 0xC1, + 0x10, -1, 0xC5, 0x3e, 0x28, -1, 0xC7, 0x86, + -1, 0x36, 0x28, -1, 0x3A, 0x55, -1, 0xB1, 0x00, + 0x18, -1, 0xB6, 0x08, 0x82, 0x27, + -1, 0xF2, 0x00, -1, 0x26, 0x01, + -1, 0xE0, 0x0F, 0x31, 0x2B, 0x0C, 0x0E, 0x08, 0x4E, + 0xF1, 0x37, 0x07, 0x10, 0x03, 0x0E, 0x09, 0x00, + -1, 0xE1, 0x00, 0x0E, 0x14, 0x03, 0x11, 0x07, 0x31, + 0xC1, 0x48, 0x08, 0x0F, 0x0C, 0x31, 0x36, 0x0F, + -1, 0x11, -2, 120, -1, 0x29, -1, 0x2c, -3 }; /* Supported displays in alphabetical order */ static struct fbtft_device_display displays[] = { @@ -463,7 +489,7 @@ static struct fbtft_device_display displays[] = { .buswidth = 8, .backlight = 1, }, - .startbyte = 0b01110000, + .startbyte = 0x70, .bgr = true, .gpios = (const struct fbtft_gpio []) { { "reset", 25 }, @@ -484,9 +510,9 @@ static struct fbtft_device_display displays[] = { .backlight = 1, .init_sequence = hy28b_init_sequence, }, - .startbyte = 0b01110000, + .startbyte = 0x70, .bgr = true, - .fps= 50, + .fps = 50, .gpios = (const struct fbtft_gpio []) { { "reset", 25 }, { "led", 18 }, @@ -597,7 +623,7 @@ static struct fbtft_device_display displays[] = { .buswidth = 8, .backlight = 1, }, - .startbyte = 0b01110000, + .startbyte = 0x70, .bgr = true, .gpios = (const struct fbtft_gpio []) { { "reset", 25 }, @@ -676,6 +702,24 @@ static struct fbtft_device_display displays[] = { } } }, { + .name = "nokia5110", + .spi = &(struct spi_board_info) { + .modalias = "fb_ili9163", + .max_speed_hz = 12000000, + .mode = SPI_MODE_0, + .platform_data = &(struct fbtft_platform_data) { + .display = { + .buswidth = 8, + .backlight = 1, + }, + .bgr = true, + .gpios = (const struct fbtft_gpio []) { + {}, + }, + } + } + }, { + .name = "piscreen", .spi = &(struct spi_board_info) { .modalias = "fb_ili9486", @@ -1100,14 +1144,14 @@ static int write_gpio16_wr_slow(struct fbtft_par *par, void *buf, size_t len) for (i = 0; i < 16; i++) { if ((data & 1) != (prev_data & 1)) gpio_set_value(par->gpio.db[i], - (data & 1)); + data & 1); data >>= 1; prev_data >>= 1; } } #else for (i = 0; i < 16; i++) { - gpio_set_value(par->gpio.db[i], (data & 1)); + gpio_set_value(par->gpio.db[i], data & 1); data >>= 1; } #endif diff --git a/drivers/staging/fbtft/flexfb.c b/drivers/staging/fbtft/flexfb.c index 90832c36e557..ca39fe90d1b8 100644 --- a/drivers/staging/fbtft/flexfb.c +++ b/drivers/staging/fbtft/flexfb.c @@ -423,7 +423,7 @@ static int flexfb_probe_common(struct spi_device *sdev, struct platform_device * } par->fbtftops.write_register = fbtft_write_reg8_bus9; par->fbtftops.write_vmem = fbtft_write_vmem16_bus9; - sdev->bits_per_word=9; + sdev->bits_per_word = 9; ret = sdev->master->setup(sdev); if (ret) { dev_warn(dev, diff --git a/drivers/staging/fbtft/internal.h b/drivers/staging/fbtft/internal.h new file mode 100644 index 000000000000..f69db8289151 --- /dev/null +++ b/drivers/staging/fbtft/internal.h @@ -0,0 +1,25 @@ +/* + * Copyright (C) 2013 Noralf Tronnes + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef __LINUX_FBTFT__INTERNAL_H +#define __LINUX_FBTFT_INTERNAL_H + +void fbtft_sysfs_init(struct fbtft_par *par); +void fbtft_sysfs_exit(struct fbtft_par *par); +void fbtft_expand_debug_value(unsigned long *debug); +int fbtft_gamma_parse_str(struct fbtft_par *par, unsigned long *curves, + const char *str, int size); + +#endif /* __LINUX_FBTFT_INTERNAL_H */ |