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Diffstat (limited to 'drivers/staging/mt7621-dts/mt7621.dtsi')
-rw-r--r--drivers/staging/mt7621-dts/mt7621.dtsi55
1 files changed, 50 insertions, 5 deletions
diff --git a/drivers/staging/mt7621-dts/mt7621.dtsi b/drivers/staging/mt7621-dts/mt7621.dtsi
index 280ec33c8540..a4c08110094b 100644
--- a/drivers/staging/mt7621-dts/mt7621.dtsi
+++ b/drivers/staging/mt7621-dts/mt7621.dtsi
@@ -1,4 +1,5 @@
#include <dt-bindings/interrupt-controller/mips-gic.h>
+#include <dt-bindings/gpio/gpio.h>
/ {
#address-cells = <1>;
@@ -42,6 +43,30 @@
clock-frequency = <220000000>;
};
+ mmc_clock: mmc_clock@0 {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <48000000>;
+ };
+
+ mmc_fixed_3v3: fixedregulator@0 {
+ compatible = "regulator-fixed";
+ regulator-name = "mmc_power";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ enable-active-high;
+ regulator-always-on;
+ };
+
+ mmc_fixed_1v8_io: fixedregulator@1 {
+ compatible = "regulator-fixed";
+ regulator-name = "mmc_io";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ enable-active-high;
+ regulator-always-on;
+ };
+
palmbus: palmbus@1E000000 {
compatible = "palmbus";
reg = <0x1E000000 0x100000>;
@@ -298,9 +323,24 @@
sdhci: sdhci@1E130000 {
status = "disabled";
- compatible = "ralink,mt7620-sdhci";
+ compatible = "mediatek,mt7620-mmc";
reg = <0x1E130000 0x4000>;
+ bus-width = <4>;
+ max-frequency = <48000000>;
+ cap-sd-highspeed;
+ cap-mmc-highspeed;
+ vmmc-supply = <&mmc_fixed_3v3>;
+ vqmmc-supply = <&mmc_fixed_1v8_io>;
+ disable-wp;
+
+ pinctrl-names = "default", "state_uhs";
+ pinctrl-0 = <&sdhci_pins>;
+ pinctrl-1 = <&sdhci_pins>;
+
+ clocks = <&mmc_clock &mmc_clock>;
+ clock-names = "source", "hclk";
+
interrupt-parent = <&gic>;
interrupts = <GIC_SHARED 20 IRQ_TYPE_LEVEL_HIGH>;
};
@@ -387,16 +427,20 @@
compatible = "mediatek,eth-mac";
reg = <1>;
status = "off";
- phy-mode = "rgmii";
- phy-handle = <&phy5>;
+ phy-mode = "rgmii-rxid";
+ phy-handle = <&phy_external>;
};
mdio-bus {
#address-cells = <1>;
#size-cells = <0>;
- phy5: ethernet-phy@5 {
+ phy_external: ethernet-phy@5 {
+ status = "off";
reg = <5>;
- phy-mode = "rgmii";
+ phy-mode = "rgmii-rxid";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&rgmii2_pins>;
};
switch0: switch0@0 {
@@ -468,6 +512,7 @@
#address-cells = <3>;
#size-cells = <2>;
+ perst-gpio = <&gpio 19 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pcie_pins>;