diff options
Diffstat (limited to 'drivers/staging/r8188eu/hal/HalPwrSeqCmd.c')
| -rw-r--r-- | drivers/staging/r8188eu/hal/HalPwrSeqCmd.c | 84 |
1 files changed, 39 insertions, 45 deletions
diff --git a/drivers/staging/r8188eu/hal/HalPwrSeqCmd.c b/drivers/staging/r8188eu/hal/HalPwrSeqCmd.c index 0fd11aca7ac7..47ad4ea273cc 100644 --- a/drivers/staging/r8188eu/hal/HalPwrSeqCmd.c +++ b/drivers/staging/r8188eu/hal/HalPwrSeqCmd.c @@ -25,8 +25,7 @@ Major Change History: * Assumption: * We should follow specific format which was released from HW SD. */ -u8 HalPwrSeqCmdParsing(struct adapter *padapter, u8 cut_vers, u8 fab_vers, - u8 ifacetype, struct wl_pwr_cfg pwrseqcmd[]) +u8 HalPwrSeqCmdParsing(struct adapter *padapter, struct wl_pwr_cfg pwrseqcmd[]) { struct wl_pwr_cfg pwrcfgcmd = {0}; u8 poll_bit = false; @@ -39,54 +38,49 @@ u8 HalPwrSeqCmdParsing(struct adapter *padapter, u8 cut_vers, u8 fab_vers, do { pwrcfgcmd = pwrseqcmd[aryidx]; - /* 2 Only Handle the command whose FAB, CUT, and Interface are matched */ - if ((GET_PWR_CFG_FAB_MASK(pwrcfgcmd) & fab_vers) && - (GET_PWR_CFG_CUT_MASK(pwrcfgcmd) & cut_vers) && - (GET_PWR_CFG_INTF_MASK(pwrcfgcmd) & ifacetype)) { - switch (GET_PWR_CFG_CMD(pwrcfgcmd)) { - case PWR_CMD_WRITE: - offset = GET_PWR_CFG_OFFSET(pwrcfgcmd); + switch (GET_PWR_CFG_CMD(pwrcfgcmd)) { + case PWR_CMD_WRITE: + offset = GET_PWR_CFG_OFFSET(pwrcfgcmd); - /* Read the value from system register */ - value = rtw_read8(padapter, offset); - - value &= ~(GET_PWR_CFG_MASK(pwrcfgcmd)); - value |= (GET_PWR_CFG_VALUE(pwrcfgcmd) & GET_PWR_CFG_MASK(pwrcfgcmd)); + /* Read the value from system register */ + value = rtw_read8(padapter, offset); - /* Write the value back to system register */ - rtw_write8(padapter, offset, value); - break; - case PWR_CMD_POLLING: - poll_bit = false; - offset = GET_PWR_CFG_OFFSET(pwrcfgcmd); - do { - value = rtw_read8(padapter, offset); + value &= ~(GET_PWR_CFG_MASK(pwrcfgcmd)); + value |= (GET_PWR_CFG_VALUE(pwrcfgcmd) & GET_PWR_CFG_MASK(pwrcfgcmd)); - value &= GET_PWR_CFG_MASK(pwrcfgcmd); - if (value == (GET_PWR_CFG_VALUE(pwrcfgcmd) & GET_PWR_CFG_MASK(pwrcfgcmd))) - poll_bit = true; - else - udelay(10); + /* Write the value back to system register */ + rtw_write8(padapter, offset, value); + break; + case PWR_CMD_POLLING: + poll_bit = false; + offset = GET_PWR_CFG_OFFSET(pwrcfgcmd); + do { + value = rtw_read8(padapter, offset); - if (poll_count++ > max_poll_count) { - DBG_88E("Fail to polling Offset[%#x]\n", offset); - return false; - } - } while (!poll_bit); - break; - case PWR_CMD_DELAY: - if (GET_PWR_CFG_VALUE(pwrcfgcmd) == PWRSEQ_DELAY_US) - udelay(GET_PWR_CFG_OFFSET(pwrcfgcmd)); + value &= GET_PWR_CFG_MASK(pwrcfgcmd); + if (value == (GET_PWR_CFG_VALUE(pwrcfgcmd) & GET_PWR_CFG_MASK(pwrcfgcmd))) + poll_bit = true; else - udelay(GET_PWR_CFG_OFFSET(pwrcfgcmd) * 1000); - break; - case PWR_CMD_END: - /* When this command is parsed, end the process */ - return true; - break; - default: - break; - } + udelay(10); + + if (poll_count++ > max_poll_count) { + DBG_88E("Fail to polling Offset[%#x]\n", offset); + return false; + } + } while (!poll_bit); + break; + case PWR_CMD_DELAY: + if (GET_PWR_CFG_VALUE(pwrcfgcmd) == PWRSEQ_DELAY_US) + udelay(GET_PWR_CFG_OFFSET(pwrcfgcmd)); + else + udelay(GET_PWR_CFG_OFFSET(pwrcfgcmd) * 1000); + break; + case PWR_CMD_END: + /* When this command is parsed, end the process */ + return true; + break; + default: + break; } aryidx++;/* Add Array Index */ |