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path: root/drivers/staging/ralink-gdma/ralink-gdma.c
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Diffstat (limited to 'drivers/staging/ralink-gdma/ralink-gdma.c')
-rw-r--r--drivers/staging/ralink-gdma/ralink-gdma.c105
1 files changed, 47 insertions, 58 deletions
diff --git a/drivers/staging/ralink-gdma/ralink-gdma.c b/drivers/staging/ralink-gdma/ralink-gdma.c
index d78042eba6dd..de3e357b2640 100644
--- a/drivers/staging/ralink-gdma/ralink-gdma.c
+++ b/drivers/staging/ralink-gdma/ralink-gdma.c
@@ -1,12 +1,7 @@
+// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2013, Lars-Peter Clausen <lars@metafoo.de>
* GDMA4740 DMAC support
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
*/
#include <linux/dmaengine.h>
@@ -164,17 +159,11 @@ static inline uint32_t gdma_dma_read(struct gdma_dma_dev *dma_dev,
}
static inline void gdma_dma_write(struct gdma_dma_dev *dma_dev,
- unsigned reg, uint32_t val)
+ unsigned int reg, uint32_t val)
{
writel(val, dma_dev->base + reg);
}
-static struct gdma_dma_desc *gdma_dma_alloc_desc(unsigned int num_sgs)
-{
- return kzalloc(sizeof(struct gdma_dma_desc) +
- sizeof(struct gdma_dma_sg) * num_sgs, GFP_ATOMIC);
-}
-
static enum gdma_dma_transfer_size gdma_dma_maxburst(u32 maxburst)
{
if (maxburst < 2)
@@ -268,14 +257,14 @@ static int gdma_dma_terminate_all(struct dma_chan *c)
static void rt305x_dump_reg(struct gdma_dma_dev *dma_dev, int id)
{
- dev_dbg(dma_dev->ddev.dev, "chan %d, src %08x, dst %08x, ctr0 %08x, " \
- "ctr1 %08x, intr %08x, signal %08x\n", id,
- gdma_dma_read(dma_dev, GDMA_REG_SRC_ADDR(id)),
- gdma_dma_read(dma_dev, GDMA_REG_DST_ADDR(id)),
- gdma_dma_read(dma_dev, GDMA_REG_CTRL0(id)),
- gdma_dma_read(dma_dev, GDMA_REG_CTRL1(id)),
- gdma_dma_read(dma_dev, GDMA_RT305X_STATUS_INT),
- gdma_dma_read(dma_dev, GDMA_RT305X_STATUS_SIGNAL));
+ dev_dbg(dma_dev->ddev.dev, "chan %d, src %08x, dst %08x, ctr0 %08x, ctr1 %08x, intr %08x, signal %08x\n",
+ id,
+ gdma_dma_read(dma_dev, GDMA_REG_SRC_ADDR(id)),
+ gdma_dma_read(dma_dev, GDMA_REG_DST_ADDR(id)),
+ gdma_dma_read(dma_dev, GDMA_REG_CTRL0(id)),
+ gdma_dma_read(dma_dev, GDMA_REG_CTRL1(id)),
+ gdma_dma_read(dma_dev, GDMA_RT305X_STATUS_INT),
+ gdma_dma_read(dma_dev, GDMA_RT305X_STATUS_SIGNAL));
}
static int rt305x_gdma_start_transfer(struct gdma_dmaengine_chan *chan)
@@ -283,7 +272,7 @@ static int rt305x_gdma_start_transfer(struct gdma_dmaengine_chan *chan)
struct gdma_dma_dev *dma_dev = gdma_dma_chan_get_dev(chan);
dma_addr_t src_addr, dst_addr;
struct gdma_dma_sg *sg;
- uint32_t ctrl0, ctrl1;
+ u32 ctrl0, ctrl1;
/* verify chan is already stopped */
ctrl0 = gdma_dma_read(dma_dev, GDMA_REG_CTRL0(chan->id));
@@ -298,14 +287,14 @@ static int rt305x_gdma_start_transfer(struct gdma_dmaengine_chan *chan)
if (chan->desc->direction == DMA_MEM_TO_DEV) {
src_addr = sg->src_addr;
dst_addr = chan->fifo_addr;
- ctrl0 = GDMA_REG_CTRL0_DST_ADDR_FIXED | \
- (8 << GDMA_RT305X_CTRL0_SRC_REQ_SHIFT) | \
+ ctrl0 = GDMA_REG_CTRL0_DST_ADDR_FIXED |
+ (8 << GDMA_RT305X_CTRL0_SRC_REQ_SHIFT) |
(chan->slave_id << GDMA_RT305X_CTRL0_DST_REQ_SHIFT);
} else if (chan->desc->direction == DMA_DEV_TO_MEM) {
src_addr = chan->fifo_addr;
dst_addr = sg->dst_addr;
- ctrl0 = GDMA_REG_CTRL0_SRC_ADDR_FIXED | \
- (chan->slave_id << GDMA_RT305X_CTRL0_SRC_REQ_SHIFT) | \
+ ctrl0 = GDMA_REG_CTRL0_SRC_ADDR_FIXED |
+ (chan->slave_id << GDMA_RT305X_CTRL0_SRC_REQ_SHIFT) |
(8 << GDMA_RT305X_CTRL0_DST_REQ_SHIFT);
} else if (chan->desc->direction == DMA_MEM_TO_MEM) {
/*
@@ -314,8 +303,8 @@ static int rt305x_gdma_start_transfer(struct gdma_dmaengine_chan *chan)
*/
src_addr = sg->src_addr;
dst_addr = sg->dst_addr;
- ctrl0 = GDMA_REG_CTRL0_SW_MODE | \
- (8 << GDMA_REG_CTRL1_SRC_REQ_SHIFT) | \
+ ctrl0 = GDMA_REG_CTRL0_SW_MODE |
+ (8 << GDMA_REG_CTRL1_SRC_REQ_SHIFT) |
(8 << GDMA_REG_CTRL1_DST_REQ_SHIFT);
} else {
dev_err(dma_dev->ddev.dev, "direction type %d error\n",
@@ -323,8 +312,8 @@ static int rt305x_gdma_start_transfer(struct gdma_dmaengine_chan *chan)
return -EINVAL;
}
- ctrl0 |= (sg->len << GDMA_REG_CTRL0_TX_SHIFT) | \
- (chan->burst_size << GDMA_REG_CTRL0_BURST_SHIFT) | \
+ ctrl0 |= (sg->len << GDMA_REG_CTRL0_TX_SHIFT) |
+ (chan->burst_size << GDMA_REG_CTRL0_BURST_SHIFT) |
GDMA_REG_CTRL0_DONE_INT | GDMA_REG_CTRL0_ENABLE;
ctrl1 = chan->id << GDMA_REG_CTRL1_NEXT_SHIFT;
@@ -342,18 +331,17 @@ static int rt305x_gdma_start_transfer(struct gdma_dmaengine_chan *chan)
static void rt3883_dump_reg(struct gdma_dma_dev *dma_dev, int id)
{
- dev_dbg(dma_dev->ddev.dev, "chan %d, src %08x, dst %08x, ctr0 %08x, " \
- "ctr1 %08x, unmask %08x, done %08x, " \
- "req %08x, ack %08x, fin %08x\n", id,
- gdma_dma_read(dma_dev, GDMA_REG_SRC_ADDR(id)),
- gdma_dma_read(dma_dev, GDMA_REG_DST_ADDR(id)),
- gdma_dma_read(dma_dev, GDMA_REG_CTRL0(id)),
- gdma_dma_read(dma_dev, GDMA_REG_CTRL1(id)),
- gdma_dma_read(dma_dev, GDMA_REG_UNMASK_INT),
- gdma_dma_read(dma_dev, GDMA_REG_DONE_INT),
- gdma_dma_read(dma_dev, GDMA_REG_REQSTS),
- gdma_dma_read(dma_dev, GDMA_REG_ACKSTS),
- gdma_dma_read(dma_dev, GDMA_REG_FINSTS));
+ dev_dbg(dma_dev->ddev.dev, "chan %d, src %08x, dst %08x, ctr0 %08x, ctr1 %08x, unmask %08x, done %08x, req %08x, ack %08x, fin %08x\n",
+ id,
+ gdma_dma_read(dma_dev, GDMA_REG_SRC_ADDR(id)),
+ gdma_dma_read(dma_dev, GDMA_REG_DST_ADDR(id)),
+ gdma_dma_read(dma_dev, GDMA_REG_CTRL0(id)),
+ gdma_dma_read(dma_dev, GDMA_REG_CTRL1(id)),
+ gdma_dma_read(dma_dev, GDMA_REG_UNMASK_INT),
+ gdma_dma_read(dma_dev, GDMA_REG_DONE_INT),
+ gdma_dma_read(dma_dev, GDMA_REG_REQSTS),
+ gdma_dma_read(dma_dev, GDMA_REG_ACKSTS),
+ gdma_dma_read(dma_dev, GDMA_REG_FINSTS));
}
static int rt3883_gdma_start_transfer(struct gdma_dmaengine_chan *chan)
@@ -361,7 +349,7 @@ static int rt3883_gdma_start_transfer(struct gdma_dmaengine_chan *chan)
struct gdma_dma_dev *dma_dev = gdma_dma_chan_get_dev(chan);
dma_addr_t src_addr, dst_addr;
struct gdma_dma_sg *sg;
- uint32_t ctrl0, ctrl1;
+ u32 ctrl0, ctrl1;
/* verify chan is already stopped */
ctrl0 = gdma_dma_read(dma_dev, GDMA_REG_CTRL0(chan->id));
@@ -377,21 +365,21 @@ static int rt3883_gdma_start_transfer(struct gdma_dmaengine_chan *chan)
src_addr = sg->src_addr;
dst_addr = chan->fifo_addr;
ctrl0 = GDMA_REG_CTRL0_DST_ADDR_FIXED;
- ctrl1 = (32 << GDMA_REG_CTRL1_SRC_REQ_SHIFT) | \
+ ctrl1 = (32 << GDMA_REG_CTRL1_SRC_REQ_SHIFT) |
(chan->slave_id << GDMA_REG_CTRL1_DST_REQ_SHIFT);
} else if (chan->desc->direction == DMA_DEV_TO_MEM) {
src_addr = chan->fifo_addr;
dst_addr = sg->dst_addr;
ctrl0 = GDMA_REG_CTRL0_SRC_ADDR_FIXED;
- ctrl1 = (chan->slave_id << GDMA_REG_CTRL1_SRC_REQ_SHIFT) | \
- (32 << GDMA_REG_CTRL1_DST_REQ_SHIFT) | \
+ ctrl1 = (chan->slave_id << GDMA_REG_CTRL1_SRC_REQ_SHIFT) |
+ (32 << GDMA_REG_CTRL1_DST_REQ_SHIFT) |
GDMA_REG_CTRL1_COHERENT;
} else if (chan->desc->direction == DMA_MEM_TO_MEM) {
src_addr = sg->src_addr;
dst_addr = sg->dst_addr;
ctrl0 = GDMA_REG_CTRL0_SW_MODE;
- ctrl1 = (32 << GDMA_REG_CTRL1_SRC_REQ_SHIFT) | \
- (32 << GDMA_REG_CTRL1_DST_REQ_SHIFT) | \
+ ctrl1 = (32 << GDMA_REG_CTRL1_SRC_REQ_SHIFT) |
+ (32 << GDMA_REG_CTRL1_DST_REQ_SHIFT) |
GDMA_REG_CTRL1_COHERENT;
} else {
dev_err(dma_dev->ddev.dev, "direction type %d error\n",
@@ -399,8 +387,8 @@ static int rt3883_gdma_start_transfer(struct gdma_dmaengine_chan *chan)
return -EINVAL;
}
- ctrl0 |= (sg->len << GDMA_REG_CTRL0_TX_SHIFT) | \
- (chan->burst_size << GDMA_REG_CTRL0_BURST_SHIFT) | \
+ ctrl0 |= (sg->len << GDMA_REG_CTRL0_TX_SHIFT) |
+ (chan->burst_size << GDMA_REG_CTRL0_BURST_SHIFT) |
GDMA_REG_CTRL0_DONE_INT | GDMA_REG_CTRL0_ENABLE;
ctrl1 |= chan->id << GDMA_REG_CTRL1_NEXT_SHIFT;
@@ -532,7 +520,7 @@ static struct dma_async_tx_descriptor *gdma_dma_prep_slave_sg(
struct scatterlist *sg;
unsigned int i;
- desc = gdma_dma_alloc_desc(sg_len);
+ desc = kzalloc(struct_size(desc, sg, sg_len), GFP_ATOMIC);
if (!desc) {
dev_err(c->device->dev, "alloc sg decs error\n");
return NULL;
@@ -587,7 +575,7 @@ static struct dma_async_tx_descriptor *gdma_dma_prep_dma_memcpy(
xfer_count = GDMA_REG_CTRL0_TX_MASK;
num_periods = DIV_ROUND_UP(len, xfer_count);
- desc = gdma_dma_alloc_desc(num_periods);
+ desc = kzalloc(struct_size(desc, sg, num_periods), GFP_ATOMIC);
if (!desc) {
dev_err(c->device->dev, "alloc memcpy decs error\n");
return NULL;
@@ -632,7 +620,7 @@ static struct dma_async_tx_descriptor *gdma_dma_prep_dma_cyclic(
}
num_periods = buf_len / period_len;
- desc = gdma_dma_alloc_desc(num_periods);
+ desc = kzalloc(struct_size(desc, sg, num_periods), GFP_ATOMIC);
if (!desc) {
dev_err(c->device->dev, "alloc cyclic decs error\n");
return NULL;
@@ -741,7 +729,9 @@ static void gdma_dma_tasklet(unsigned long arg)
atomic_inc(&dma_dev->cnt);
gdma_start_transfer(dma_dev, chan);
} else {
- dev_dbg(dma_dev->ddev.dev, "chan %d no desc to issue\n", chan->id);
+ dev_dbg(dma_dev->ddev.dev,
+ "chan %d no desc to issue\n",
+ chan->id);
}
if (!dma_dev->chan_issued)
break;
@@ -753,7 +743,7 @@ static void gdma_dma_tasklet(unsigned long arg)
static void rt305x_gdma_init(struct gdma_dma_dev *dma_dev)
{
- uint32_t gct;
+ u32 gct;
/* all chans round robin */
gdma_dma_write(dma_dev, GDMA_RT305X_GCT, GDMA_REG_GCT_ARBIT_RR);
@@ -767,7 +757,7 @@ static void rt305x_gdma_init(struct gdma_dma_dev *dma_dev)
static void rt3883_gdma_init(struct gdma_dma_dev *dma_dev)
{
- uint32_t gct;
+ u32 gct;
/* all chans round robin */
gdma_dma_write(dma_dev, GDMA_REG_GCT, GDMA_REG_GCT_ARBIT_RR);
@@ -819,13 +809,12 @@ static int gdma_dma_probe(struct platform_device *pdev)
match = of_match_device(gdma_of_match_table, &pdev->dev);
if (!match)
return -EINVAL;
- data = (struct gdma_data *) match->data;
+ data = (struct gdma_data *)match->data;
dma_dev = devm_kzalloc(&pdev->dev,
struct_size(dma_dev, chan, data->chancnt),
GFP_KERNEL);
if (!dma_dev) {
- dev_err(&pdev->dev, "alloc dma device failed\n");
return -EINVAL;
}
dma_dev->data = data;
Copyright © 1996 – 2023 Jason A. Donenfeld. All Rights Reverse Engineered.