diff options
Diffstat (limited to 'drivers/staging/rtl8188eu/hal/odm.c')
| -rw-r--r-- | drivers/staging/rtl8188eu/hal/odm.c | 918 |
1 files changed, 150 insertions, 768 deletions
diff --git a/drivers/staging/rtl8188eu/hal/odm.c b/drivers/staging/rtl8188eu/hal/odm.c index 285475f9613c..3555ffaa4e06 100644 --- a/drivers/staging/rtl8188eu/hal/odm.c +++ b/drivers/staging/rtl8188eu/hal/odm.c @@ -182,22 +182,16 @@ void ODM_DMInit(struct odm_dm_struct *pDM_Odm) odm_DIGInit(pDM_Odm); odm_RateAdaptiveMaskInit(pDM_Odm); - if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) { - ; - } else if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) { - odm_PrimaryCCA_Init(pDM_Odm); /* Gary */ - odm_DynamicBBPowerSavingInit(pDM_Odm); - odm_DynamicTxPowerInit(pDM_Odm); - odm_TXPowerTrackingInit(pDM_Odm); - ODM_EdcaTurboInit(pDM_Odm); - ODM_RAInfo_Init_all(pDM_Odm); - if ((pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) || - (pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV) || - (pDM_Odm->AntDivType == CG_TRX_SMART_ANTDIV)) - odm_InitHybridAntDiv(pDM_Odm); - else if (pDM_Odm->AntDivType == CGCS_RX_SW_ANTDIV) - odm_SwAntDivInit(pDM_Odm); - } + odm_PrimaryCCA_Init(pDM_Odm); /* Gary */ + odm_DynamicBBPowerSavingInit(pDM_Odm); + odm_DynamicTxPowerInit(pDM_Odm); + odm_TXPowerTrackingInit(pDM_Odm); + ODM_EdcaTurboInit(pDM_Odm); + ODM_RAInfo_Init_all(pDM_Odm); + if ((pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) || + (pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV) || + (pDM_Odm->AntDivType == CG_TRX_SMART_ANTDIV)) + odm_InitHybridAntDiv(pDM_Odm); } /* 2011/09/20 MH This is the entry pointer for all team to execute HW out source DM. */ @@ -206,27 +200,14 @@ void ODM_DMInit(struct odm_dm_struct *pDM_Odm) void ODM_DMWatchdog(struct odm_dm_struct *pDM_Odm) { /* 2012.05.03 Luke: For all IC series */ - odm_GlobalAdapterCheck(); odm_CmnInfoHook_Debug(pDM_Odm); odm_CmnInfoUpdate_Debug(pDM_Odm); odm_CommonInfoSelfUpdate(pDM_Odm); odm_FalseAlarmCounterStatistics(pDM_Odm); odm_RSSIMonitorCheck(pDM_Odm); - /* For CE Platform(SPRD or Tablet) */ - /* 8723A or 8189ES platform */ - /* NeilChen--2012--08--24-- */ /* Fix Leave LPS issue */ - if ((pDM_Odm->Adapter->pwrctrlpriv.pwr_mode != PS_MODE_ACTIVE) &&/* in LPS mode */ - ((pDM_Odm->SupportICType & (ODM_RTL8723A)) || - (pDM_Odm->SupportICType & (ODM_RTL8188E) && - ((pDM_Odm->SupportInterface == ODM_ITRF_SDIO))))) { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("----Step1: odm_DIG is in LPS mode\n")); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("---Step2: 8723AS is in LPS mode\n")); - odm_DIGbyRSSI_LPS(pDM_Odm); - } else { - odm_DIG(pDM_Odm); - } + odm_DIG(pDM_Odm); odm_CCKPacketDetectionThresh(pDM_Odm); if (*(pDM_Odm->pbPowerSaving)) @@ -240,17 +221,10 @@ void ODM_DMWatchdog(struct odm_dm_struct *pDM_Odm) (pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV) || (pDM_Odm->AntDivType == CG_TRX_SMART_ANTDIV)) odm_HwAntDiv(pDM_Odm); - else if (pDM_Odm->AntDivType == CGCS_RX_SW_ANTDIV) - odm_SwAntDivChkAntSwitch(pDM_Odm, SWAW_STEP_PEAK); - - if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) { - ; - } else if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) { - ODM_TXPowerTrackingCheck(pDM_Odm); - odm_EdcaTurboCheck(pDM_Odm); - odm_DynamicTxPower(pDM_Odm); - } - odm_dtc(pDM_Odm); + + ODM_TXPowerTrackingCheck(pDM_Odm); + odm_EdcaTurboCheck(pDM_Odm); + odm_DynamicTxPower(pDM_Odm); } /* Init /.. Fixed HW value. Only init time. */ @@ -457,12 +431,10 @@ void ODM_CmnInfoUpdate(struct odm_dm_struct *pDM_Odm, u32 CmnInfo, u64 Value) void odm_CommonInfoSelfInit(struct odm_dm_struct *pDM_Odm) { - pDM_Odm->bCckHighPower = (bool) ODM_GetBBReg(pDM_Odm, 0x824, BIT9); - pDM_Odm->RFPathRxEnable = (u8) ODM_GetBBReg(pDM_Odm, 0xc04, 0x0F); - if (pDM_Odm->SupportICType & (ODM_RTL8192C|ODM_RTL8192D)) - pDM_Odm->AntDivType = CG_TRX_HW_ANTDIV; - if (pDM_Odm->SupportICType & (ODM_RTL8723A)) - pDM_Odm->AntDivType = CGCS_RX_SW_ANTDIV; + struct adapter *adapter = pDM_Odm->Adapter; + + pDM_Odm->bCckHighPower = (bool) PHY_QueryBBReg(adapter, 0x824, BIT9); + pDM_Odm->RFPathRxEnable = (u8) PHY_QueryBBReg(adapter, 0xc04, 0x0F); ODM_InitDebugSetting(pDM_Odm); } @@ -526,9 +498,6 @@ void odm_CmnInfoHook_Debug(struct odm_dm_struct *pDM_Odm) ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("pbScanInProcess=%d\n", *(pDM_Odm->pbScanInProcess))); ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("pbPowerSaving=%d\n", *(pDM_Odm->pbPowerSaving))); - - if (pDM_Odm->SupportPlatform & (ODM_AP|ODM_ADSL)) - ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("pOnePathCCA=%d\n", *(pDM_Odm->pOnePathCCA))); } void odm_CmnInfoUpdate_Debug(struct odm_dm_struct *pDM_Odm) @@ -540,53 +509,17 @@ void odm_CmnInfoUpdate_Debug(struct odm_dm_struct *pDM_Odm) ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("RSSI_Min=%d\n", pDM_Odm->RSSI_Min)); } -static int getIGIForDiff(int value_IGI) -{ - #define ONERCCA_LOW_TH 0x30 - #define ONERCCA_LOW_DIFF 8 - - if (value_IGI < ONERCCA_LOW_TH) { - if ((ONERCCA_LOW_TH - value_IGI) < ONERCCA_LOW_DIFF) - return ONERCCA_LOW_TH; - else - return value_IGI + ONERCCA_LOW_DIFF; - } else { - return value_IGI; - } -} - void ODM_Write_DIG(struct odm_dm_struct *pDM_Odm, u8 CurrentIGI) { struct rtw_dig *pDM_DigTable = &pDM_Odm->DM_DigTable; + struct adapter *adapter = pDM_Odm->Adapter; ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("ODM_REG(IGI_A,pDM_Odm)=0x%x, ODM_BIT(IGI,pDM_Odm)=0x%x\n", ODM_REG(IGI_A, pDM_Odm), ODM_BIT(IGI, pDM_Odm))); if (pDM_DigTable->CurIGValue != CurrentIGI) { - if (pDM_Odm->SupportPlatform & (ODM_CE|ODM_MP)) { - ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_A, pDM_Odm), ODM_BIT(IGI, pDM_Odm), CurrentIGI); - if (pDM_Odm->SupportICType != ODM_RTL8188E) - ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_B, pDM_Odm), ODM_BIT(IGI, pDM_Odm), CurrentIGI); - } else if (pDM_Odm->SupportPlatform & (ODM_AP|ODM_ADSL)) { - switch (*(pDM_Odm->pOnePathCCA)) { - case ODM_CCA_2R: - ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_A, pDM_Odm), ODM_BIT(IGI, pDM_Odm), CurrentIGI); - if (pDM_Odm->SupportICType != ODM_RTL8188E) - ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_B, pDM_Odm), ODM_BIT(IGI, pDM_Odm), CurrentIGI); - break; - case ODM_CCA_1R_A: - ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_A, pDM_Odm), ODM_BIT(IGI, pDM_Odm), CurrentIGI); - if (pDM_Odm->SupportICType != ODM_RTL8188E) - ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_B, pDM_Odm), ODM_BIT(IGI, pDM_Odm), getIGIForDiff(CurrentIGI)); - break; - case ODM_CCA_1R_B: - ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_A, pDM_Odm), ODM_BIT(IGI, pDM_Odm), getIGIForDiff(CurrentIGI)); - if (pDM_Odm->SupportICType != ODM_RTL8188E) - ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_B, pDM_Odm), ODM_BIT(IGI, pDM_Odm), CurrentIGI); - break; - } - } + PHY_SetBBReg(adapter, ODM_REG(IGI_A, pDM_Odm), ODM_BIT(IGI, pDM_Odm), CurrentIGI); ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("CurrentIGI(0x%02x).\n", CurrentIGI)); /* pDM_DigTable->PreIGValue = pDM_DigTable->CurIGValue; */ pDM_DigTable->CurIGValue = CurrentIGI; @@ -607,9 +540,6 @@ void odm_DIGbyRSSI_LPS(struct odm_dm_struct *pDM_Odm) u8 bFwCurrentInPSMode = false; u8 CurrentIGI = pDM_Odm->RSSI_Min; - if (!(pDM_Odm->SupportICType & (ODM_RTL8723A | ODM_RTL8188E))) - return; - CurrentIGI = CurrentIGI + RSSI_OFFSET_DIG; bFwCurrentInPSMode = pAdapter->pwrctrlpriv.bFwCurrentInPSMode; @@ -646,9 +576,10 @@ void odm_DIGbyRSSI_LPS(struct odm_dm_struct *pDM_Odm) void odm_DIGInit(struct odm_dm_struct *pDM_Odm) { + struct adapter *adapter = pDM_Odm->Adapter; struct rtw_dig *pDM_DigTable = &pDM_Odm->DM_DigTable; - pDM_DigTable->CurIGValue = (u8) ODM_GetBBReg(pDM_Odm, ODM_REG(IGI_A, pDM_Odm), ODM_BIT(IGI, pDM_Odm)); + pDM_DigTable->CurIGValue = (u8) PHY_QueryBBReg(adapter, ODM_REG(IGI_A, pDM_Odm), ODM_BIT(IGI, pDM_Odm)); pDM_DigTable->RssiLowThresh = DM_DIG_THRESH_LOW; pDM_DigTable->RssiHighThresh = DM_DIG_THRESH_HIGH; pDM_DigTable->FALowThresh = DM_false_ALARM_THRESH_LOW; @@ -705,102 +636,47 @@ void odm_DIG(struct odm_dm_struct *pDM_Odm) return; } - if (pDM_Odm->SupportICType == ODM_RTL8192D) { - if (*(pDM_Odm->pMacPhyMode) == ODM_DMSP) { - if (*(pDM_Odm->pbMasterOfDMSP)) { - DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_0; - FirstConnect = (pDM_Odm->bLinked) && (!pDM_DigTable->bMediaConnect_0); - FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0); - } else { - DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_1; - FirstConnect = (pDM_Odm->bLinked) && (!pDM_DigTable->bMediaConnect_1); - FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_1); - } - } else { - if (*(pDM_Odm->pBandType) == ODM_BAND_5G) { - DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_0; - FirstConnect = (pDM_Odm->bLinked) && (!pDM_DigTable->bMediaConnect_0); - FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0); - } else { - DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_1; - FirstConnect = (pDM_Odm->bLinked) && (!pDM_DigTable->bMediaConnect_1); - FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_1); - } - } - } else { - DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_0; - FirstConnect = (pDM_Odm->bLinked) && (!pDM_DigTable->bMediaConnect_0); - FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0); - } + DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_0; + FirstConnect = (pDM_Odm->bLinked) && (!pDM_DigTable->bMediaConnect_0); + FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0); /* 1 Boundary Decision */ - if ((pDM_Odm->SupportICType & (ODM_RTL8192C|ODM_RTL8723A)) && - ((pDM_Odm->BoardType == ODM_BOARD_HIGHPWR) || pDM_Odm->ExtLNA)) { - if (pDM_Odm->SupportPlatform & (ODM_AP|ODM_ADSL)) { - dm_dig_max = DM_DIG_MAX_AP_HP; - dm_dig_min = DM_DIG_MIN_AP_HP; - } else { - dm_dig_max = DM_DIG_MAX_NIC_HP; - dm_dig_min = DM_DIG_MIN_NIC_HP; - } - DIG_MaxOfMin = DM_DIG_MAX_AP_HP; - } else { - if (pDM_Odm->SupportPlatform & (ODM_AP|ODM_ADSL)) { - dm_dig_max = DM_DIG_MAX_AP; - dm_dig_min = DM_DIG_MIN_AP; - DIG_MaxOfMin = dm_dig_max; - } else { - dm_dig_max = DM_DIG_MAX_NIC; - dm_dig_min = DM_DIG_MIN_NIC; - DIG_MaxOfMin = DM_DIG_MAX_AP; - } - } + dm_dig_max = DM_DIG_MAX_NIC; + dm_dig_min = DM_DIG_MIN_NIC; + DIG_MaxOfMin = DM_DIG_MAX_AP; + if (pDM_Odm->bLinked) { - /* 2 8723A Series, offset need to be 10 */ - if (pDM_Odm->SupportICType == (ODM_RTL8723A)) { - /* 2 Upper Bound */ - if ((pDM_Odm->RSSI_Min + 10) > DM_DIG_MAX_NIC) - pDM_DigTable->rx_gain_range_max = DM_DIG_MAX_NIC; - else if ((pDM_Odm->RSSI_Min + 10) < DM_DIG_MIN_NIC) - pDM_DigTable->rx_gain_range_max = DM_DIG_MIN_NIC; - else - pDM_DigTable->rx_gain_range_max = pDM_Odm->RSSI_Min + 10; - /* 2 If BT is Concurrent, need to set Lower Bound */ - DIG_Dynamic_MIN = DM_DIG_MIN_NIC; - } else { - /* 2 Modify DIG upper bound */ - if ((pDM_Odm->RSSI_Min + 20) > dm_dig_max) - pDM_DigTable->rx_gain_range_max = dm_dig_max; - else if ((pDM_Odm->RSSI_Min + 20) < dm_dig_min) - pDM_DigTable->rx_gain_range_max = dm_dig_min; - else - pDM_DigTable->rx_gain_range_max = pDM_Odm->RSSI_Min + 20; - /* 2 Modify DIG lower bound */ - if (pDM_Odm->bOneEntryOnly) { - if (pDM_Odm->RSSI_Min < dm_dig_min) - DIG_Dynamic_MIN = dm_dig_min; - else if (pDM_Odm->RSSI_Min > DIG_MaxOfMin) - DIG_Dynamic_MIN = DIG_MaxOfMin; - else - DIG_Dynamic_MIN = pDM_Odm->RSSI_Min; - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, - ("odm_DIG() : bOneEntryOnly=true, DIG_Dynamic_MIN=0x%x\n", - DIG_Dynamic_MIN)); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, - ("odm_DIG() : pDM_Odm->RSSI_Min=%d\n", - pDM_Odm->RSSI_Min)); - } else if ((pDM_Odm->SupportICType == ODM_RTL8188E) && - (pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)) { - /* 1 Lower Bound for 88E AntDiv */ - if (pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) { - DIG_Dynamic_MIN = (u8) pDM_DigTable->AntDiv_RSSI_max; - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, - ("odm_DIG(): pDM_DigTable->AntDiv_RSSI_max=%d\n", - pDM_DigTable->AntDiv_RSSI_max)); - } - } else { + /* 2 Modify DIG upper bound */ + if ((pDM_Odm->RSSI_Min + 20) > dm_dig_max) + pDM_DigTable->rx_gain_range_max = dm_dig_max; + else if ((pDM_Odm->RSSI_Min + 20) < dm_dig_min) + pDM_DigTable->rx_gain_range_max = dm_dig_min; + else + pDM_DigTable->rx_gain_range_max = pDM_Odm->RSSI_Min + 20; + /* 2 Modify DIG lower bound */ + if (pDM_Odm->bOneEntryOnly) { + if (pDM_Odm->RSSI_Min < dm_dig_min) DIG_Dynamic_MIN = dm_dig_min; + else if (pDM_Odm->RSSI_Min > DIG_MaxOfMin) + DIG_Dynamic_MIN = DIG_MaxOfMin; + else + DIG_Dynamic_MIN = pDM_Odm->RSSI_Min; + ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, + ("odm_DIG() : bOneEntryOnly=true, DIG_Dynamic_MIN=0x%x\n", + DIG_Dynamic_MIN)); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, + ("odm_DIG() : pDM_Odm->RSSI_Min=%d\n", + pDM_Odm->RSSI_Min)); + } else if (pDM_Odm->SupportAbility & ODM_BB_ANT_DIV) { + /* 1 Lower Bound for 88E AntDiv */ + if (pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) { + DIG_Dynamic_MIN = (u8) pDM_DigTable->AntDiv_RSSI_max; + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, + ("odm_DIG(): pDM_DigTable->AntDiv_RSSI_max=%d\n", + pDM_DigTable->AntDiv_RSSI_max)); } + } else { + DIG_Dynamic_MIN = dm_dig_min; } } else { pDM_DigTable->rx_gain_range_max = dm_dig_max; @@ -858,21 +734,12 @@ void odm_DIG(struct odm_dm_struct *pDM_Odm) CurrentIGI = pDM_Odm->RSSI_Min; ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("DIG: First Connect\n")); } else { - if (pDM_Odm->SupportICType == ODM_RTL8192D) { - if (pFalseAlmCnt->Cnt_all > DM_DIG_FA_TH2_92D) - CurrentIGI = CurrentIGI + 2;/* pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+2; */ - else if (pFalseAlmCnt->Cnt_all > DM_DIG_FA_TH1_92D) - CurrentIGI = CurrentIGI + 1; /* pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+1; */ - else if (pFalseAlmCnt->Cnt_all < DM_DIG_FA_TH0_92D) - CurrentIGI = CurrentIGI - 1;/* pDM_DigTable->CurIGValue =pDM_DigTable->PreIGValue-1; */ - } else { - if (pFalseAlmCnt->Cnt_all > DM_DIG_FA_TH2) - CurrentIGI = CurrentIGI + 4;/* pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+2; */ - else if (pFalseAlmCnt->Cnt_all > DM_DIG_FA_TH1) - CurrentIGI = CurrentIGI + 2;/* pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+1; */ - else if (pFalseAlmCnt->Cnt_all < DM_DIG_FA_TH0) - CurrentIGI = CurrentIGI - 2;/* pDM_DigTable->CurIGValue =pDM_DigTable->PreIGValue-1; */ - } + if (pFalseAlmCnt->Cnt_all > DM_DIG_FA_TH2) + CurrentIGI = CurrentIGI + 4;/* pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+2; */ + else if (pFalseAlmCnt->Cnt_all > DM_DIG_FA_TH1) + CurrentIGI = CurrentIGI + 2;/* pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+1; */ + else if (pFalseAlmCnt->Cnt_all < DM_DIG_FA_TH0) + CurrentIGI = CurrentIGI - 2;/* pDM_DigTable->CurIGValue =pDM_DigTable->PreIGValue-1; */ } } else { ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): DIG BeforeLink\n")); @@ -916,102 +783,69 @@ void odm_DIG(struct odm_dm_struct *pDM_Odm) void odm_FalseAlarmCounterStatistics(struct odm_dm_struct *pDM_Odm) { + struct adapter *adapter = pDM_Odm->Adapter; u32 ret_value; struct false_alarm_stats *FalseAlmCnt = &(pDM_Odm->FalseAlmCnt); if (!(pDM_Odm->SupportAbility & ODM_BB_FA_CNT)) return; - if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) { - /* hold ofdm counter */ - ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_HOLDC_11N, BIT31, 1); /* hold page C counter */ - ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTD_11N, BIT31, 1); /* hold page D counter */ - - ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_TYPE1_11N, bMaskDWord); - FalseAlmCnt->Cnt_Fast_Fsync = (ret_value&0xffff); - FalseAlmCnt->Cnt_SB_Search_fail = ((ret_value&0xffff0000)>>16); - ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_TYPE2_11N, bMaskDWord); - FalseAlmCnt->Cnt_OFDM_CCA = (ret_value&0xffff); - FalseAlmCnt->Cnt_Parity_Fail = ((ret_value&0xffff0000)>>16); - ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_TYPE3_11N, bMaskDWord); - FalseAlmCnt->Cnt_Rate_Illegal = (ret_value&0xffff); - FalseAlmCnt->Cnt_Crc8_fail = ((ret_value&0xffff0000)>>16); - ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_TYPE4_11N, bMaskDWord); - FalseAlmCnt->Cnt_Mcs_fail = (ret_value&0xffff); - - FalseAlmCnt->Cnt_Ofdm_fail = FalseAlmCnt->Cnt_Parity_Fail + FalseAlmCnt->Cnt_Rate_Illegal + - FalseAlmCnt->Cnt_Crc8_fail + FalseAlmCnt->Cnt_Mcs_fail + - FalseAlmCnt->Cnt_Fast_Fsync + FalseAlmCnt->Cnt_SB_Search_fail; - - if (pDM_Odm->SupportICType == ODM_RTL8188E) { - ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_SC_CNT_11N, bMaskDWord); - FalseAlmCnt->Cnt_BW_LSC = (ret_value&0xffff); - FalseAlmCnt->Cnt_BW_USC = ((ret_value&0xffff0000)>>16); - } - - /* hold cck counter */ - ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT12, 1); - ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT14, 1); - - ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_CCK_FA_LSB_11N, bMaskByte0); - FalseAlmCnt->Cnt_Cck_fail = ret_value; - ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_CCK_FA_MSB_11N, bMaskByte3); - FalseAlmCnt->Cnt_Cck_fail += (ret_value & 0xff)<<8; - - ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_CCK_CCA_CNT_11N, bMaskDWord); - FalseAlmCnt->Cnt_CCK_CCA = ((ret_value&0xFF)<<8) | ((ret_value&0xFF00)>>8); - - FalseAlmCnt->Cnt_all = (FalseAlmCnt->Cnt_Fast_Fsync + - FalseAlmCnt->Cnt_SB_Search_fail + - FalseAlmCnt->Cnt_Parity_Fail + - FalseAlmCnt->Cnt_Rate_Illegal + - FalseAlmCnt->Cnt_Crc8_fail + - FalseAlmCnt->Cnt_Mcs_fail + - FalseAlmCnt->Cnt_Cck_fail); - - FalseAlmCnt->Cnt_CCA_all = FalseAlmCnt->Cnt_OFDM_CCA + FalseAlmCnt->Cnt_CCK_CCA; - - if (pDM_Odm->SupportICType >= ODM_RTL8723A) { - /* reset false alarm counter registers */ - ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTC_11N, BIT31, 1); - ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTC_11N, BIT31, 0); - ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTD_11N, BIT27, 1); - ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTD_11N, BIT27, 0); - /* update ofdm counter */ - ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_HOLDC_11N, BIT31, 0); /* update page C counter */ - ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTD_11N, BIT31, 0); /* update page D counter */ - - /* reset CCK CCA counter */ - ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT13|BIT12, 0); - ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT13|BIT12, 2); - /* reset CCK FA counter */ - ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT15|BIT14, 0); - ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT15|BIT14, 2); - } - - ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Enter odm_FalseAlarmCounterStatistics\n")); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, - ("Cnt_Fast_Fsync=%d, Cnt_SB_Search_fail=%d\n", - FalseAlmCnt->Cnt_Fast_Fsync, FalseAlmCnt->Cnt_SB_Search_fail)); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, - ("Cnt_Parity_Fail=%d, Cnt_Rate_Illegal=%d\n", - FalseAlmCnt->Cnt_Parity_Fail, FalseAlmCnt->Cnt_Rate_Illegal)); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, - ("Cnt_Crc8_fail=%d, Cnt_Mcs_fail=%d\n", - FalseAlmCnt->Cnt_Crc8_fail, FalseAlmCnt->Cnt_Mcs_fail)); - } else { /* FOR ODM_IC_11AC_SERIES */ - /* read OFDM FA counter */ - FalseAlmCnt->Cnt_Ofdm_fail = ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_11AC, bMaskLWord); - FalseAlmCnt->Cnt_Cck_fail = ODM_GetBBReg(pDM_Odm, ODM_REG_CCK_FA_11AC, bMaskLWord); - FalseAlmCnt->Cnt_all = FalseAlmCnt->Cnt_Ofdm_fail + FalseAlmCnt->Cnt_Cck_fail; - - /* reset OFDM FA coutner */ - ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RST_11AC, BIT17, 1); - ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RST_11AC, BIT17, 0); - /* reset CCK FA counter */ - ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11AC, BIT15, 0); - ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11AC, BIT15, 1); - } + /* hold ofdm counter */ + PHY_SetBBReg(adapter, ODM_REG_OFDM_FA_HOLDC_11N, BIT31, 1); /* hold page C counter */ + PHY_SetBBReg(adapter, ODM_REG_OFDM_FA_RSTD_11N, BIT31, 1); /* hold page D counter */ + + ret_value = PHY_QueryBBReg(adapter, ODM_REG_OFDM_FA_TYPE1_11N, bMaskDWord); + FalseAlmCnt->Cnt_Fast_Fsync = (ret_value&0xffff); + FalseAlmCnt->Cnt_SB_Search_fail = ((ret_value&0xffff0000)>>16); + ret_value = PHY_QueryBBReg(adapter, ODM_REG_OFDM_FA_TYPE2_11N, bMaskDWord); + FalseAlmCnt->Cnt_OFDM_CCA = (ret_value&0xffff); + FalseAlmCnt->Cnt_Parity_Fail = ((ret_value&0xffff0000)>>16); + ret_value = PHY_QueryBBReg(adapter, ODM_REG_OFDM_FA_TYPE3_11N, bMaskDWord); + FalseAlmCnt->Cnt_Rate_Illegal = (ret_value&0xffff); + FalseAlmCnt->Cnt_Crc8_fail = ((ret_value&0xffff0000)>>16); + ret_value = PHY_QueryBBReg(adapter, ODM_REG_OFDM_FA_TYPE4_11N, bMaskDWord); + FalseAlmCnt->Cnt_Mcs_fail = (ret_value&0xffff); + + FalseAlmCnt->Cnt_Ofdm_fail = FalseAlmCnt->Cnt_Parity_Fail + FalseAlmCnt->Cnt_Rate_Illegal + + FalseAlmCnt->Cnt_Crc8_fail + FalseAlmCnt->Cnt_Mcs_fail + + FalseAlmCnt->Cnt_Fast_Fsync + FalseAlmCnt->Cnt_SB_Search_fail; + + ret_value = PHY_QueryBBReg(adapter, ODM_REG_SC_CNT_11N, bMaskDWord); + FalseAlmCnt->Cnt_BW_LSC = (ret_value&0xffff); + FalseAlmCnt->Cnt_BW_USC = ((ret_value&0xffff0000)>>16); + + /* hold cck counter */ + PHY_SetBBReg(adapter, ODM_REG_CCK_FA_RST_11N, BIT12, 1); + PHY_SetBBReg(adapter, ODM_REG_CCK_FA_RST_11N, BIT14, 1); + + ret_value = PHY_QueryBBReg(adapter, ODM_REG_CCK_FA_LSB_11N, bMaskByte0); + FalseAlmCnt->Cnt_Cck_fail = ret_value; + ret_value = PHY_QueryBBReg(adapter, ODM_REG_CCK_FA_MSB_11N, bMaskByte3); + FalseAlmCnt->Cnt_Cck_fail += (ret_value & 0xff)<<8; + + ret_value = PHY_QueryBBReg(adapter, ODM_REG_CCK_CCA_CNT_11N, bMaskDWord); + FalseAlmCnt->Cnt_CCK_CCA = ((ret_value&0xFF)<<8) | ((ret_value&0xFF00)>>8); + + FalseAlmCnt->Cnt_all = (FalseAlmCnt->Cnt_Fast_Fsync + + FalseAlmCnt->Cnt_SB_Search_fail + + FalseAlmCnt->Cnt_Parity_Fail + + FalseAlmCnt->Cnt_Rate_Illegal + + FalseAlmCnt->Cnt_Crc8_fail + + FalseAlmCnt->Cnt_Mcs_fail + + FalseAlmCnt->Cnt_Cck_fail); + + FalseAlmCnt->Cnt_CCA_all = FalseAlmCnt->Cnt_OFDM_CCA + FalseAlmCnt->Cnt_CCK_CCA; + + ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Enter odm_FalseAlarmCounterStatistics\n")); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, + ("Cnt_Fast_Fsync=%d, Cnt_SB_Search_fail=%d\n", + FalseAlmCnt->Cnt_Fast_Fsync, FalseAlmCnt->Cnt_SB_Search_fail)); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, + ("Cnt_Parity_Fail=%d, Cnt_Rate_Illegal=%d\n", + FalseAlmCnt->Cnt_Parity_Fail, FalseAlmCnt->Cnt_Rate_Illegal)); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, + ("Cnt_Crc8_fail=%d, Cnt_Mcs_fail=%d\n", + FalseAlmCnt->Cnt_Crc8_fail, FalseAlmCnt->Cnt_Mcs_fail)); ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Cnt_Cck_fail=%d\n", FalseAlmCnt->Cnt_Cck_fail)); ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Cnt_Ofdm_fail=%d\n", FalseAlmCnt->Cnt_Ofdm_fail)); ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Total False Alarm=%d\n", FalseAlmCnt->Cnt_all)); @@ -1077,26 +911,11 @@ void odm_DynamicBBPowerSavingInit(struct odm_dm_struct *pDM_Odm) void odm_DynamicBBPowerSaving(struct odm_dm_struct *pDM_Odm) { - if ((pDM_Odm->SupportICType != ODM_RTL8192C) && (pDM_Odm->SupportICType != ODM_RTL8723A)) - return; - if (!(pDM_Odm->SupportAbility & ODM_BB_PWR_SAVE)) - return; - if (!(pDM_Odm->SupportPlatform & (ODM_MP|ODM_CE))) - return; - - /* 1 2.Power Saving for 92C */ - if ((pDM_Odm->SupportICType == ODM_RTL8192C) && (pDM_Odm->RFType == ODM_2T2R)) { - odm_1R_CCA(pDM_Odm); - } else { - /* 20100628 Joseph: Turn off BB power save for 88CE because it makesthroughput unstable. */ - /* 20100831 Joseph: Turn ON BB power save again after modifying AGC delay from 900ns ot 600ns. */ - /* 1 3.Power Saving for 88C */ - ODM_RF_Saving(pDM_Odm, false); - } } void odm_1R_CCA(struct odm_dm_struct *pDM_Odm) { + struct adapter *adapter = pDM_Odm->Adapter; struct rtl_ps *pDM_PSTable = &pDM_Odm->DM_PSTable; if (pDM_Odm->RSSI_Min != 0xFF) { @@ -1118,11 +937,11 @@ void odm_1R_CCA(struct odm_dm_struct *pDM_Odm) if (pDM_PSTable->PreCCAState != pDM_PSTable->CurCCAState) { if (pDM_PSTable->CurCCAState == CCA_1R) { if (pDM_Odm->RFType == ODM_2T2R) - ODM_SetBBReg(pDM_Odm, 0xc04, bMaskByte0, 0x13); + PHY_SetBBReg(adapter, 0xc04, bMaskByte0, 0x13); else - ODM_SetBBReg(pDM_Odm, 0xc04, bMaskByte0, 0x23); + PHY_SetBBReg(adapter, 0xc04, bMaskByte0, 0x23); } else { - ODM_SetBBReg(pDM_Odm, 0xc04, bMaskByte0, 0x33); + PHY_SetBBReg(adapter, 0xc04, bMaskByte0, 0x33); } pDM_PSTable->PreCCAState = pDM_PSTable->CurCCAState; } @@ -1130,6 +949,7 @@ void odm_1R_CCA(struct odm_dm_struct *pDM_Odm) void ODM_RF_Saving(struct odm_dm_struct *pDM_Odm, u8 bForceInNormal) { + struct adapter *adapter = pDM_Odm->Adapter; struct rtl_ps *pDM_PSTable = &pDM_Odm->DM_PSTable; u8 Rssi_Up_bound = 30; u8 Rssi_Low_bound = 25; @@ -1139,10 +959,10 @@ void ODM_RF_Saving(struct odm_dm_struct *pDM_Odm, u8 bForceInNormal) Rssi_Low_bound = 45; } if (pDM_PSTable->initialize == 0) { - pDM_PSTable->Reg874 = (ODM_GetBBReg(pDM_Odm, 0x874, bMaskDWord)&0x1CC000)>>14; - pDM_PSTable->RegC70 = (ODM_GetBBReg(pDM_Odm, 0xc70, bMaskDWord)&BIT3)>>3; - pDM_PSTable->Reg85C = (ODM_GetBBReg(pDM_Odm, 0x85c, bMaskDWord)&0xFF000000)>>24; - pDM_PSTable->RegA74 = (ODM_GetBBReg(pDM_Odm, 0xa74, bMaskDWord)&0xF000)>>12; + pDM_PSTable->Reg874 = (PHY_QueryBBReg(adapter, 0x874, bMaskDWord)&0x1CC000)>>14; + pDM_PSTable->RegC70 = (PHY_QueryBBReg(adapter, 0xc70, bMaskDWord)&BIT3)>>3; + pDM_PSTable->Reg85C = (PHY_QueryBBReg(adapter, 0x85c, bMaskDWord)&0xFF000000)>>24; + pDM_PSTable->RegA74 = (PHY_QueryBBReg(adapter, 0xa74, bMaskDWord)&0xF000)>>12; pDM_PSTable->initialize = 1; } @@ -1168,26 +988,19 @@ void ODM_RF_Saving(struct odm_dm_struct *pDM_Odm, u8 bForceInNormal) if (pDM_PSTable->PreRFState != pDM_PSTable->CurRFState) { if (pDM_PSTable->CurRFState == RF_Save) { - /* <tynli_note> 8723 RSSI report will be wrong. Set 0x874[5]=1 when enter BB power saving mode. */ - /* Suggested by SD3 Yu-Nan. 2011.01.20. */ - if (pDM_Odm->SupportICType == ODM_RTL8723A) - ODM_SetBBReg(pDM_Odm, 0x874 , BIT5, 0x1); /* Reg874[5]=1b'1 */ - ODM_SetBBReg(pDM_Odm, 0x874 , 0x1C0000, 0x2); /* Reg874[20:18]=3'b010 */ - ODM_SetBBReg(pDM_Odm, 0xc70, BIT3, 0); /* RegC70[3]=1'b0 */ - ODM_SetBBReg(pDM_Odm, 0x85c, 0xFF000000, 0x63); /* Reg85C[31:24]=0x63 */ - ODM_SetBBReg(pDM_Odm, 0x874, 0xC000, 0x2); /* Reg874[15:14]=2'b10 */ - ODM_SetBBReg(pDM_Odm, 0xa74, 0xF000, 0x3); /* RegA75[7:4]=0x3 */ - ODM_SetBBReg(pDM_Odm, 0x818, BIT28, 0x0); /* Reg818[28]=1'b0 */ - ODM_SetBBReg(pDM_Odm, 0x818, BIT28, 0x1); /* Reg818[28]=1'b1 */ + PHY_SetBBReg(adapter, 0x874 , 0x1C0000, 0x2); /* Reg874[20:18]=3'b010 */ + PHY_SetBBReg(adapter, 0xc70, BIT3, 0); /* RegC70[3]=1'b0 */ + PHY_SetBBReg(adapter, 0x85c, 0xFF000000, 0x63); /* Reg85C[31:24]=0x63 */ + PHY_SetBBReg(adapter, 0x874, 0xC000, 0x2); /* Reg874[15:14]=2'b10 */ + PHY_SetBBReg(adapter, 0xa74, 0xF000, 0x3); /* RegA75[7:4]=0x3 */ + PHY_SetBBReg(adapter, 0x818, BIT28, 0x0); /* Reg818[28]=1'b0 */ + PHY_SetBBReg(adapter, 0x818, BIT28, 0x1); /* Reg818[28]=1'b1 */ } else { - ODM_SetBBReg(pDM_Odm, 0x874 , 0x1CC000, pDM_PSTable->Reg874); - ODM_SetBBReg(pDM_Odm, 0xc70, BIT3, pDM_PSTable->RegC70); - ODM_SetBBReg(pDM_Odm, 0x85c, 0xFF000000, pDM_PSTable->Reg85C); - ODM_SetBBReg(pDM_Odm, 0xa74, 0xF000, pDM_PSTable->RegA74); - ODM_SetBBReg(pDM_Odm, 0x818, BIT28, 0x0); - - if (pDM_Odm->SupportICType == ODM_RTL8723A) - ODM_SetBBReg(pDM_Odm, 0x874, BIT5, 0x0); /* Reg874[5]=1b'0 */ + PHY_SetBBReg(adapter, 0x874 , 0x1CC000, pDM_PSTable->Reg874); + PHY_SetBBReg(adapter, 0xc70, BIT3, pDM_PSTable->RegC70); + PHY_SetBBReg(adapter, 0x85c, 0xFF000000, pDM_PSTable->Reg85C); + PHY_SetBBReg(adapter, 0xa74, 0xF000, pDM_PSTable->RegA74); + PHY_SetBBReg(adapter, 0x818, BIT28, 0x0); } pDM_PSTable->PreRFState = pDM_PSTable->CurRFState; } @@ -1316,18 +1129,7 @@ void odm_RefreshRateAdaptiveMask(struct odm_dm_struct *pDM_Odm) /* at the same time. In the stage2/3, we need to prive universal interface and merge all */ /* HW dynamic mechanism. */ /* */ - switch (pDM_Odm->SupportPlatform) { - case ODM_MP: - odm_RefreshRateAdaptiveMaskMP(pDM_Odm); - break; - case ODM_CE: - odm_RefreshRateAdaptiveMaskCE(pDM_Odm); - break; - case ODM_AP: - case ODM_ADSL: - odm_RefreshRateAdaptiveMaskAPADSL(pDM_Odm); - break; - } + odm_RefreshRateAdaptiveMaskCE(pDM_Odm); } void odm_RefreshRateAdaptiveMaskMP(struct odm_dm_struct *pDM_Odm) @@ -1440,32 +1242,11 @@ void odm_DynamicTxPower(struct odm_dm_struct *pDM_Odm) /* 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate */ /* at the same time. In the stage2/3, we need to prive universal interface and merge all */ /* HW dynamic mechanism. */ - switch (pDM_Odm->SupportPlatform) { - case ODM_MP: - case ODM_CE: - odm_DynamicTxPowerNIC(pDM_Odm); - break; - case ODM_AP: - odm_DynamicTxPowerAP(pDM_Odm); - break; - case ODM_ADSL: - break; - } + odm_DynamicTxPowerNIC(pDM_Odm); } void odm_DynamicTxPowerNIC(struct odm_dm_struct *pDM_Odm) { - if (!(pDM_Odm->SupportAbility & ODM_BB_DYNAMIC_TXPWR)) - return; - - if (pDM_Odm->SupportICType == ODM_RTL8188E) { - /* ??? */ - /* This part need to be redefined. */ - } -} - -void odm_DynamicTxPowerAP(struct odm_dm_struct *pDM_Odm) -{ } /* 3============================================================ */ @@ -1482,27 +1263,9 @@ void odm_RSSIMonitorCheck(struct odm_dm_struct *pDM_Odm) /* at the same time. In the stage2/3, we need to prive universal interface and merge all */ /* HW dynamic mechanism. */ /* */ - switch (pDM_Odm->SupportPlatform) { - case ODM_MP: - odm_RSSIMonitorCheckMP(pDM_Odm); - break; - case ODM_CE: - odm_RSSIMonitorCheckCE(pDM_Odm); - break; - case ODM_AP: - odm_RSSIMonitorCheckAP(pDM_Odm); - break; - case ODM_ADSL: - /* odm_DIGAP(pDM_Odm); */ - break; - } - + odm_RSSIMonitorCheckCE(pDM_Odm); } /* odm_RSSIMonitorCheck */ -void odm_RSSIMonitorCheckMP(struct odm_dm_struct *pDM_Odm) -{ -} - static void FindMinimumRSSI(struct adapter *pAdapter) { struct hal_data_8188e *pHalData = GET_HAL_DATA(pAdapter); @@ -1575,28 +1338,6 @@ void odm_RSSIMonitorCheckCE(struct odm_dm_struct *pDM_Odm) ODM_CmnInfoUpdate(&pHalData->odmpriv , ODM_CMNINFO_RSSI_MIN, pdmpriv->MinUndecoratedPWDBForDM); } -void odm_RSSIMonitorCheckAP(struct odm_dm_struct *pDM_Odm) -{ -} - -void ODM_InitAllTimers(struct odm_dm_struct *pDM_Odm) -{ - ODM_InitializeTimer(pDM_Odm, &pDM_Odm->DM_SWAT_Table.SwAntennaSwitchTimer, - (void *)odm_SwAntDivChkAntSwitchCallback, NULL, "SwAntennaSwitchTimer"); -} - -void ODM_CancelAllTimers(struct odm_dm_struct *pDM_Odm) -{ - ODM_CancelTimer(pDM_Odm, &pDM_Odm->DM_SWAT_Table.SwAntennaSwitchTimer); -} - -void ODM_ReleaseAllTimers(struct odm_dm_struct *pDM_Odm) -{ - ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->DM_SWAT_Table.SwAntennaSwitchTimer); - - ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->FastAntTrainingTimer); -} - /* 3============================================================ */ /* 3 Tx Power Tracking */ /* 3============================================================ */ @@ -1623,19 +1364,7 @@ void ODM_TXPowerTrackingCheck(struct odm_dm_struct *pDM_Odm) /* 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate */ /* at the same time. In the stage2/3, we need to prive universal interface and merge all */ /* HW dynamic mechanism. */ - switch (pDM_Odm->SupportPlatform) { - case ODM_MP: - odm_TXPowerTrackingCheckMP(pDM_Odm); - break; - case ODM_CE: - odm_TXPowerTrackingCheckCE(pDM_Odm); - break; - case ODM_AP: - odm_TXPowerTrackingCheckAP(pDM_Odm); - break; - case ODM_ADSL: - break; - } + odm_TXPowerTrackingCheckCE(pDM_Odm); } void odm_TXPowerTrackingCheckCE(struct odm_dm_struct *pDM_Odm) @@ -1656,14 +1385,6 @@ void odm_TXPowerTrackingCheckCE(struct odm_dm_struct *pDM_Odm) } } -void odm_TXPowerTrackingCheckMP(struct odm_dm_struct *pDM_Odm) -{ -} - -void odm_TXPowerTrackingCheckAP(struct odm_dm_struct *pDM_Odm) -{ -} - /* antenna mapping info */ /* 1: right-side antenna */ /* 2/0: left-side antenna */ @@ -1675,21 +1396,6 @@ void odm_TXPowerTrackingCheckAP(struct odm_dm_struct *pDM_Odm) /* 3============================================================ */ /* 3 SW Antenna Diversity */ /* 3============================================================ */ -void odm_SwAntDivInit(struct odm_dm_struct *pDM_Odm) -{ -} - -void ODM_SwAntDivChkPerPktRssi(struct odm_dm_struct *pDM_Odm, u8 StationID, struct odm_phy_status_info *pPhyInfo) -{ -} - -void odm_SwAntDivChkAntSwitch(struct odm_dm_struct *pDM_Odm, u8 Step) -{ -} - -void ODM_SwAntDivRestAfterLink(struct odm_dm_struct *pDM_Odm) -{ -} void odm_SwAntDivChkAntSwitchCallback(void *FunctionContext) { @@ -1706,31 +1412,7 @@ void odm_InitHybridAntDiv(struct odm_dm_struct *pDM_Odm) return; } - if (pDM_Odm->SupportICType & (ODM_RTL8192C | ODM_RTL8192D)) - ; - else if (pDM_Odm->SupportICType == ODM_RTL8188E) - ODM_AntennaDiversityInit_88E(pDM_Odm); -} - -void ODM_AntselStatistics_88C(struct odm_dm_struct *pDM_Odm, u8 MacId, u32 PWDBAll, bool isCCKrate) -{ - struct sw_ant_switch *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; - - if (pDM_SWAT_Table->antsel == 1) { - if (isCCKrate) { - pDM_SWAT_Table->CCK_Ant1_Cnt[MacId]++; - } else { - pDM_SWAT_Table->OFDM_Ant1_Cnt[MacId]++; - pDM_SWAT_Table->RSSI_Ant1_Sum[MacId] += PWDBAll; - } - } else { - if (isCCKrate) { - pDM_SWAT_Table->CCK_Ant2_Cnt[MacId]++; - } else { - pDM_SWAT_Table->OFDM_Ant2_Cnt[MacId]++; - pDM_SWAT_Table->RSSI_Ant2_Sum[MacId] += PWDBAll; - } - } + ODM_AntennaDiversityInit_88E(pDM_Odm); } void odm_HwAntDiv(struct odm_dm_struct *pDM_Odm) @@ -1740,8 +1422,7 @@ void odm_HwAntDiv(struct odm_dm_struct *pDM_Odm) return; } - if (pDM_Odm->SupportICType == ODM_RTL8188E) - ODM_AntennaDiversity_88E(pDM_Odm); + ODM_AntennaDiversity_88E(pDM_Odm); } /* EDCA Turbo */ @@ -1768,16 +1449,7 @@ void odm_EdcaTurboCheck(struct odm_dm_struct *pDM_Odm) if (!(pDM_Odm->SupportAbility & ODM_MAC_EDCA_TURBO)) return; - switch (pDM_Odm->SupportPlatform) { - case ODM_MP: - break; - case ODM_CE: - odm_EdcaTurboCheckCE(pDM_Odm); - break; - case ODM_AP: - case ODM_ADSL: - break; - } + odm_EdcaTurboCheckCE(pDM_Odm); ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("<========================odm_EdcaTurboCheck\n")); } /* odm_CheckEdcaTurbo */ @@ -1855,29 +1527,6 @@ dm_CheckEdcaTurbo_EXIT: precvpriv->last_rx_bytes = precvpriv->rx_bytes; } -/* need to ODM CE Platform */ -/* move to here for ANT detection mechanism using */ - -u32 GetPSDData(struct odm_dm_struct *pDM_Odm, unsigned int point, u8 initial_gain_psd) -{ - u32 psd_report; - - /* Set DCO frequency index, offset=(40MHz/SamplePts)*point */ - ODM_SetBBReg(pDM_Odm, 0x808, 0x3FF, point); - - /* Start PSD calculation, Reg808[22]=0->1 */ - ODM_SetBBReg(pDM_Odm, 0x808, BIT22, 1); - /* Need to wait for HW PSD report */ - ODM_StallExecution(30); - ODM_SetBBReg(pDM_Odm, 0x808, BIT22, 0); - /* Read PSD report, Reg8B4[15:0] */ - psd_report = ODM_GetBBReg(pDM_Odm, 0x8B4, bMaskDWord) & 0x0000FFFF; - - psd_report = (u32) (ConvertTo_dB(psd_report))+(u32)(initial_gain_psd-0x1c); - - return psd_report; -} - u32 ConvertTo_dB(u32 Value) { u8 i; @@ -1902,270 +1551,3 @@ u32 ConvertTo_dB(u32 Value) return dB; } - -/* 2011/09/22 MH Add for 92D global spin lock utilization. */ -void odm_GlobalAdapterCheck(void) -{ -} /* odm_GlobalAdapterCheck */ - -/* Description: */ -/* Set Single/Dual Antenna default setting for products that do not do detection in advance. */ -/* Added by Joseph, 2012.03.22 */ -void ODM_SingleDualAntennaDefaultSetting(struct odm_dm_struct *pDM_Odm) -{ - struct sw_ant_switch *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; - - pDM_SWAT_Table->ANTA_ON = true; - pDM_SWAT_Table->ANTB_ON = true; -} - - -/* 2 8723A ANT DETECT */ - -static void odm_PHY_SaveAFERegisters(struct odm_dm_struct *pDM_Odm, u32 *AFEReg, u32 *AFEBackup, u32 RegisterNum) -{ - u32 i; - - /* RTPRINT(FINIT, INIT_IQK, ("Save ADDA parameters.\n")); */ - for (i = 0; i < RegisterNum; i++) - AFEBackup[i] = ODM_GetBBReg(pDM_Odm, AFEReg[i], bMaskDWord); -} - -static void odm_PHY_ReloadAFERegisters(struct odm_dm_struct *pDM_Odm, u32 *AFEReg, u32 *AFEBackup, u32 RegiesterNum) -{ - u32 i; - - for (i = 0; i < RegiesterNum; i++) - ODM_SetBBReg(pDM_Odm, AFEReg[i], bMaskDWord, AFEBackup[i]); -} - -/* 2 8723A ANT DETECT */ -/* Description: */ -/* Implement IQK single tone for RF DPK loopback and BB PSD scanning. */ -/* This function is cooperated with BB team Neil. */ -bool ODM_SingleDualAntennaDetection(struct odm_dm_struct *pDM_Odm, u8 mode) -{ - struct sw_ant_switch *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; - u32 CurrentChannel, RfLoopReg; - u8 n; - u32 Reg88c, Regc08, Reg874, Regc50; - u8 initial_gain = 0x5a; - u32 PSD_report_tmp; - u32 AntA_report = 0x0, AntB_report = 0x0, AntO_report = 0x0; - bool bResult = true; - u32 AFE_Backup[16]; - u32 AFE_REG_8723A[16] = { - rRx_Wait_CCA, rTx_CCK_RFON, - rTx_CCK_BBON, rTx_OFDM_RFON, - rTx_OFDM_BBON, rTx_To_Rx, - rTx_To_Tx, rRx_CCK, - rRx_OFDM, rRx_Wait_RIFS, - rRx_TO_Rx, rStandby, - rSleep, rPMPD_ANAEN, - rFPGA0_XCD_SwitchControl, rBlue_Tooth}; - - if (!(pDM_Odm->SupportICType & (ODM_RTL8723A|ODM_RTL8192C))) - return bResult; - - if (!(pDM_Odm->SupportAbility&ODM_BB_ANT_DIV)) - return bResult; - - if (pDM_Odm->SupportICType == ODM_RTL8192C) { - /* Which path in ADC/DAC is turnned on for PSD: both I/Q */ - ODM_SetBBReg(pDM_Odm, 0x808, BIT10|BIT11, 0x3); - /* Ageraged number: 8 */ - ODM_SetBBReg(pDM_Odm, 0x808, BIT12|BIT13, 0x1); - /* pts = 128; */ - ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x0); - } - - /* 1 Backup Current RF/BB Settings */ - - CurrentChannel = ODM_GetRFReg(pDM_Odm, RF_PATH_A, ODM_CHANNEL, bRFRegOffsetMask); - RfLoopReg = ODM_GetRFReg(pDM_Odm, RF_PATH_A, 0x00, bRFRegOffsetMask); - ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, ODM_DPDT, Antenna_A); /* change to Antenna A */ - /* Step 1: USE IQK to transmitter single tone */ - - ODM_StallExecution(10); - - /* Store A Path Register 88c, c08, 874, c50 */ - Reg88c = ODM_GetBBReg(pDM_Odm, rFPGA0_AnalogParameter4, bMaskDWord); - Regc08 = ODM_GetBBReg(pDM_Odm, rOFDM0_TRMuxPar, bMaskDWord); - Reg874 = ODM_GetBBReg(pDM_Odm, rFPGA0_XCD_RFInterfaceSW, bMaskDWord); - Regc50 = ODM_GetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskDWord); - - /* Store AFE Registers */ - odm_PHY_SaveAFERegisters(pDM_Odm, AFE_REG_8723A, AFE_Backup, 16); - - /* Set PSD 128 pts */ - ODM_SetBBReg(pDM_Odm, rFPGA0_PSDFunction, BIT14|BIT15, 0x0); /* 128 pts */ - - /* To SET CH1 to do */ - ODM_SetRFReg(pDM_Odm, RF_PATH_A, ODM_CHANNEL, bRFRegOffsetMask, 0x01); /* Channel 1 */ - - /* AFE all on step */ - ODM_SetBBReg(pDM_Odm, rRx_Wait_CCA, bMaskDWord, 0x6FDB25A4); - ODM_SetBBReg(pDM_Odm, rTx_CCK_RFON, bMaskDWord, 0x6FDB25A4); - ODM_SetBBReg(pDM_Odm, rTx_CCK_BBON, bMaskDWord, 0x6FDB25A4); - ODM_SetBBReg(pDM_Odm, rTx_OFDM_RFON, bMaskDWord, 0x6FDB25A4); - ODM_SetBBReg(pDM_Odm, rTx_OFDM_BBON, bMaskDWord, 0x6FDB25A4); - ODM_SetBBReg(pDM_Odm, rTx_To_Rx, bMaskDWord, 0x6FDB25A4); - ODM_SetBBReg(pDM_Odm, rTx_To_Tx, bMaskDWord, 0x6FDB25A4); - ODM_SetBBReg(pDM_Odm, rRx_CCK, bMaskDWord, 0x6FDB25A4); - ODM_SetBBReg(pDM_Odm, rRx_OFDM, bMaskDWord, 0x6FDB25A4); - ODM_SetBBReg(pDM_Odm, rRx_Wait_RIFS, bMaskDWord, 0x6FDB25A4); - ODM_SetBBReg(pDM_Odm, rRx_TO_Rx, bMaskDWord, 0x6FDB25A4); - ODM_SetBBReg(pDM_Odm, rStandby, bMaskDWord, 0x6FDB25A4); - ODM_SetBBReg(pDM_Odm, rSleep, bMaskDWord, 0x6FDB25A4); - ODM_SetBBReg(pDM_Odm, rPMPD_ANAEN, bMaskDWord, 0x6FDB25A4); - ODM_SetBBReg(pDM_Odm, rFPGA0_XCD_SwitchControl, bMaskDWord, 0x6FDB25A4); - ODM_SetBBReg(pDM_Odm, rBlue_Tooth, bMaskDWord, 0x6FDB25A4); - - /* 3 wire Disable */ - ODM_SetBBReg(pDM_Odm, rFPGA0_AnalogParameter4, bMaskDWord, 0xCCF000C0); - - /* BB IQK Setting */ - ODM_SetBBReg(pDM_Odm, rOFDM0_TRMuxPar, bMaskDWord, 0x000800E4); - ODM_SetBBReg(pDM_Odm, rFPGA0_XCD_RFInterfaceSW, bMaskDWord, 0x22208000); - - /* IQK setting tone@ 4.34Mhz */ - ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_A, bMaskDWord, 0x10008C1C); - ODM_SetBBReg(pDM_Odm, rTx_IQK, bMaskDWord, 0x01007c00); - - - /* Page B init */ - ODM_SetBBReg(pDM_Odm, rConfig_AntA, bMaskDWord, 0x00080000); - ODM_SetBBReg(pDM_Odm, rConfig_AntA, bMaskDWord, 0x0f600000); - ODM_SetBBReg(pDM_Odm, rRx_IQK, bMaskDWord, 0x01004800); - ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_A, bMaskDWord, 0x10008c1f); - ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_A, bMaskDWord, 0x82150008); - ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_A, bMaskDWord, 0x28150008); - ODM_SetBBReg(pDM_Odm, rIQK_AGC_Rsp, bMaskDWord, 0x001028d0); - - /* RF loop Setting */ - ODM_SetRFReg(pDM_Odm, RF_PATH_A, 0x0, 0xFFFFF, 0x50008); - - /* IQK Single tone start */ - ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x80800000); - ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf8000000); - ODM_StallExecution(1000); - PSD_report_tmp = 0x0; - - for (n = 0; n < 2; n++) { - PSD_report_tmp = GetPSDData(pDM_Odm, 14, initial_gain); - if (PSD_report_tmp > AntA_report) - AntA_report = PSD_report_tmp; - } - - PSD_report_tmp = 0x0; - - ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, 0x300, Antenna_B); /* change to Antenna B */ - ODM_StallExecution(10); - - - for (n = 0; n < 2; n++) { - PSD_report_tmp = GetPSDData(pDM_Odm, 14, initial_gain); - if (PSD_report_tmp > AntB_report) - AntB_report = PSD_report_tmp; - } - - /* change to open case */ - ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, 0x300, 0); /* change to Ant A and B all open case */ - ODM_StallExecution(10); - - for (n = 0; n < 2; n++) { - PSD_report_tmp = GetPSDData(pDM_Odm, 14, initial_gain); - if (PSD_report_tmp > AntO_report) - AntO_report = PSD_report_tmp; - } - - /* Close IQK Single Tone function */ - ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x00000000); - PSD_report_tmp = 0x0; - - /* 1 Return to antanna A */ - ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, 0x300, Antenna_A); - ODM_SetBBReg(pDM_Odm, rFPGA0_AnalogParameter4, bMaskDWord, Reg88c); - ODM_SetBBReg(pDM_Odm, rOFDM0_TRMuxPar, bMaskDWord, Regc08); - ODM_SetBBReg(pDM_Odm, rFPGA0_XCD_RFInterfaceSW, bMaskDWord, Reg874); - ODM_SetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, 0x7F, 0x40); - ODM_SetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskDWord, Regc50); - ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, CurrentChannel); - ODM_SetRFReg(pDM_Odm, RF_PATH_A, 0x00, bRFRegOffsetMask, RfLoopReg); - - /* Reload AFE Registers */ - odm_PHY_ReloadAFERegisters(pDM_Odm, AFE_REG_8723A, AFE_Backup, 16); - - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("psd_report_A[%d]= %d\n", 2416, AntA_report)); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("psd_report_B[%d]= %d\n", 2416, AntB_report)); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("psd_report_O[%d]= %d\n", 2416, AntO_report)); - - - if (pDM_Odm->SupportICType == ODM_RTL8723A) { - /* 2 Test Ant B based on Ant A is ON */ - if (mode == ANTTESTB) { - if (AntA_report >= 100) { - if (AntB_report > (AntA_report+1)) { - pDM_SWAT_Table->ANTB_ON = false; - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Single Antenna A\n")); - } else { - pDM_SWAT_Table->ANTB_ON = true; - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Dual Antenna is A and B\n")); - } - } else { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Need to check again\n")); - pDM_SWAT_Table->ANTB_ON = false; /* Set Antenna B off as default */ - bResult = false; - } - } else if (mode == ANTTESTALL) { - /* 2 Test Ant A and B based on DPDT Open */ - if ((AntO_report >= 100)&(AntO_report < 118)) { - if (AntA_report > (AntO_report+1)) { - pDM_SWAT_Table->ANTA_ON = false; - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Ant A is OFF")); - } else { - pDM_SWAT_Table->ANTA_ON = true; - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Ant A is ON")); - } - - if (AntB_report > (AntO_report+2)) { - pDM_SWAT_Table->ANTB_ON = false; - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Ant B is OFF")); - } else { - pDM_SWAT_Table->ANTB_ON = true; - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Ant B is ON")); - } - } - } - } else if (pDM_Odm->SupportICType == ODM_RTL8192C) { - if (AntA_report >= 100) { - if (AntB_report > (AntA_report+2)) { - pDM_SWAT_Table->ANTA_ON = false; - pDM_SWAT_Table->ANTB_ON = true; - ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, 0x300, Antenna_B); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Single Antenna B\n")); - } else if (AntA_report > (AntB_report+2)) { - pDM_SWAT_Table->ANTA_ON = true; - pDM_SWAT_Table->ANTB_ON = false; - ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, 0x300, Antenna_A); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Single Antenna A\n")); - } else { - pDM_SWAT_Table->ANTA_ON = true; - pDM_SWAT_Table->ANTB_ON = true; - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, - ("ODM_SingleDualAntennaDetection(): Dual Antenna\n")); - } - } else { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Need to check again\n")); - pDM_SWAT_Table->ANTA_ON = true; /* Set Antenna A on as default */ - pDM_SWAT_Table->ANTB_ON = false; /* Set Antenna B off as default */ - bResult = false; - } - } - return bResult; -} - -/* Justin: According to the current RRSI to adjust Response Frame TX power, 2012/11/05 */ -void odm_dtc(struct odm_dm_struct *pDM_Odm) -{ -} |