diff options
Diffstat (limited to 'drivers/staging/rtl8188eu/include/Hal8188EPhyCfg.h')
| -rw-r--r-- | drivers/staging/rtl8188eu/include/Hal8188EPhyCfg.h | 33 |
1 files changed, 22 insertions, 11 deletions
diff --git a/drivers/staging/rtl8188eu/include/Hal8188EPhyCfg.h b/drivers/staging/rtl8188eu/include/Hal8188EPhyCfg.h index 550ad62e7064..4e5d7fc6de07 100644 --- a/drivers/staging/rtl8188eu/include/Hal8188EPhyCfg.h +++ b/drivers/staging/rtl8188eu/include/Hal8188EPhyCfg.h @@ -75,7 +75,8 @@ enum rf_radio_path { #define CHANNEL_MAX_NUMBER 14 /* 14 is the max chnl number */ #define MAX_CHNL_GROUP_24G 6 /* ch1~2, ch3~5, ch6~8, *ch9~11, ch12~13, CH 14 - * total three groups */ + * total three groups + */ #define CHANNEL_GROUP_MAX_88E 6 enum wireless_mode { @@ -116,35 +117,45 @@ struct bb_reg_def { /* 0x80c~0x80f [4 bytes] */ u32 rfHSSIPara1; /* wire parameter control1 : */ /* 0x820~0x823,0x828~0x82b, - * 0x830~0x833, 0x838~0x83b [16 bytes] */ + * 0x830~0x833, 0x838~0x83b [16 bytes] + */ u32 rfHSSIPara2; /* wire parameter control2 : */ /* 0x824~0x827,0x82c~0x82f, 0x834~0x837, - * 0x83c~0x83f [16 bytes] */ + * 0x83c~0x83f [16 bytes] + */ u32 rfSwitchControl; /* Tx Rx antenna control : */ /* 0x858~0x85f [16 bytes] */ u32 rfAGCControl1; /* AGC parameter control1 : */ /* 0xc50~0xc53,0xc58~0xc5b, 0xc60~0xc63, - * 0xc68~0xc6b [16 bytes] */ + * 0xc68~0xc6b [16 bytes] + */ u32 rfAGCControl2; /* AGC parameter control2 : */ /* 0xc54~0xc57,0xc5c~0xc5f, 0xc64~0xc67, - * 0xc6c~0xc6f [16 bytes] */ + * 0xc6c~0xc6f [16 bytes] + */ u32 rfRxIQImbalance; /* OFDM Rx IQ imbalance matrix : */ /* 0xc14~0xc17,0xc1c~0xc1f, 0xc24~0xc27, - * 0xc2c~0xc2f [16 bytes] */ + * 0xc2c~0xc2f [16 bytes] + */ u32 rfRxAFE; /* Rx IQ DC ofset and Rx digital filter, - * Rx DC notch filter : */ + * Rx DC notch filter : + */ /* 0xc10~0xc13,0xc18~0xc1b, 0xc20~0xc23, - * 0xc28~0xc2b [16 bytes] */ + * 0xc28~0xc2b [16 bytes] + */ u32 rfTxIQImbalance; /* OFDM Tx IQ imbalance matrix */ /* 0xc80~0xc83,0xc88~0xc8b, 0xc90~0xc93, - * 0xc98~0xc9b [16 bytes] */ + * 0xc98~0xc9b [16 bytes] + */ u32 rfTxAFE; /* Tx IQ DC Offset and Tx DFIR type */ /* 0xc84~0xc87,0xc8c~0xc8f, 0xc94~0xc97, - * 0xc9c~0xc9f [16 bytes] */ + * 0xc9c~0xc9f [16 bytes] + */ u32 rfLSSIReadBack; /* LSSI RF readback data SI mode */ /* 0x8a0~0x8af [16 bytes] */ u32 rfLSSIReadBackPi; /* LSSI RF readback data PI mode 0x8b8-8bc for - * Path A and B */ + * Path A and B + */ }; /*------------------------------Define structure----------------------------*/ |