diff options
Diffstat (limited to 'drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c')
| -rw-r--r-- | drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c | 37 |
1 files changed, 12 insertions, 25 deletions
diff --git a/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c b/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c index 73497d559b77..5215a0b5fd45 100644 --- a/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c +++ b/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c @@ -1,18 +1,9 @@ -/****************************************************************************** +// SPDX-License-Identifier: GPL-2.0 +/* * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved. * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * The full GNU General Public License is included in this distribution in the - * file called LICENSE. - * - * Contact Information: - * wlanfae <wlanfae@realtek.com> - *****************************************************************************/ - + * Contact Information: wlanfae <wlanfae@realtek.com> + */ #include <linux/bitops.h> #include "rtl_core.h" #include "r8192E_hw.h" @@ -81,8 +72,7 @@ void rtl92e_set_bb_reg(struct net_device *dev, u32 dwRegAddr, u32 dwBitMask, if (dwBitMask != bMaskDWord) { OriginalValue = rtl92e_readl(dev, dwRegAddr); BitShift = _rtl92e_calculate_bit_shift(dwBitMask); - NewValue = (((OriginalValue) & (~dwBitMask)) | - (dwData << BitShift)); + NewValue = (OriginalValue & ~dwBitMask) | (dwData << BitShift); rtl92e_writel(dev, dwRegAddr, NewValue); } else rtl92e_writel(dev, dwRegAddr, dwData); @@ -188,7 +178,7 @@ static void _rtl92e_phy_rf_write(struct net_device *dev, NewOffset = Offset; } - DataAndAddr = (Data<<16) | (NewOffset&0x3f); + DataAndAddr = (NewOffset & 0x3f) | (Data << 16); rtl92e_set_bb_reg(dev, pPhyReg->rf3wireOffset, bMaskDWord, DataAndAddr); @@ -223,8 +213,7 @@ void rtl92e_set_rf_reg(struct net_device *dev, enum rf90_radio_path eRFPath, Original_Value = _rtl92e_phy_rf_fw_read(dev, eRFPath, RegAddr); BitShift = _rtl92e_calculate_bit_shift(BitMask); - New_Value = (((Original_Value) & (~BitMask)) | - (Data << BitShift)); + New_Value = (Original_Value & ~BitMask) | (Data << BitShift); _rtl92e_phy_rf_fw_write(dev, eRFPath, RegAddr, New_Value); @@ -237,8 +226,7 @@ void rtl92e_set_rf_reg(struct net_device *dev, enum rf90_radio_path eRFPath, Original_Value = _rtl92e_phy_rf_read(dev, eRFPath, RegAddr); BitShift = _rtl92e_calculate_bit_shift(BitMask); - New_Value = (((Original_Value) & (~BitMask)) | - (Data << BitShift)); + New_Value = (Original_Value & ~BitMask) | (Data << BitShift); _rtl92e_phy_rf_write(dev, eRFPath, RegAddr, New_Value); } else @@ -571,9 +559,9 @@ static bool _rtl92e_bb_config_para_file(struct net_device *dev) if (priv->IC_Cut > VERSION_8190_BD) { if (priv->rf_type == RF_2T4R) - dwRegValue = (priv->AntennaTxPwDiff[2]<<8 | + dwRegValue = priv->AntennaTxPwDiff[2]<<8 | priv->AntennaTxPwDiff[1]<<4 | - priv->AntennaTxPwDiff[0]); + priv->AntennaTxPwDiff[0]; else dwRegValue = 0x0; rtl92e_set_bb_reg(dev, rFPGA0_TxGainStage, @@ -655,9 +643,9 @@ void rtl92e_set_tx_power(struct net_device *dev, u8 channel) priv->AntennaTxPwDiff[1] = (u8)(ant_pwr_diff); priv->AntennaTxPwDiff[0] = 0; - u4RegValue = (priv->AntennaTxPwDiff[2]<<8 | + u4RegValue = priv->AntennaTxPwDiff[2]<<8 | priv->AntennaTxPwDiff[1]<<4 | - priv->AntennaTxPwDiff[0]); + priv->AntennaTxPwDiff[0]; rtl92e_set_bb_reg(dev, rFPGA0_TxGainStage, (bXBTxAGC|bXCTxAGC|bXDTxAGC), @@ -1631,5 +1619,4 @@ void rtl92e_scan_op_backup(struct net_device *dev, u8 Operation) break; } } - } |