diff options
Diffstat (limited to 'drivers/staging/rtl8192su/ieee80211/ieee80211_r8192s.h')
| -rw-r--r-- | drivers/staging/rtl8192su/ieee80211/ieee80211_r8192s.h | 43 |
1 files changed, 27 insertions, 16 deletions
diff --git a/drivers/staging/rtl8192su/ieee80211/ieee80211_r8192s.h b/drivers/staging/rtl8192su/ieee80211/ieee80211_r8192s.h index 1824cda790d8..7e7fbb269800 100644 --- a/drivers/staging/rtl8192su/ieee80211/ieee80211_r8192s.h +++ b/drivers/staging/rtl8192su/ieee80211/ieee80211_r8192s.h @@ -339,28 +339,39 @@ enum { }; /* Firmware related CMD IO. */ -typedef enum _FW_CMD_IO_TYPE { - FW_CMD_DIG_ENABLE = 0, /* for DIG DM */ +typedef enum _FW_CMD_IO_TYPE{ + FW_CMD_DIG_ENABLE = 0, /* for DIG DM */ FW_CMD_DIG_DISABLE = 1, FW_CMD_DIG_HALT = 2, FW_CMD_DIG_RESUME = 3, - FW_CMD_HIGH_PWR_ENABLE = 4, /* for High Power DM */ + FW_CMD_HIGH_PWR_ENABLE = 4, /* for DIG DM */ FW_CMD_HIGH_PWR_DISABLE = 5, - FW_CMD_RA_RESET = 6, /* for Rate adaptive DM */ - FW_CMD_RA_ACTIVE = 7, - FW_CMD_RA_REFRESH_N = 8, - FW_CMD_RA_REFRESH_BG = 9, - FW_CMD_IQK_ENABLE = 10, /* for FW supported IQK */ - FW_CMD_TXPWR_TRACK_ENABLE = 11, /* Tx power tracking switch */ - FW_CMD_TXPWR_TRACK_DISABLE = 12,/* Tx power tracking switch */ - FW_CMD_PAUSE_DM_BY_SCAN = 13, - FW_CMD_RESUME_DM_BY_SCAN = 14, - FW_CMD_MID_HIGH_PWR_ENABLE = 15, + FW_CMD_RA_RESET = 6, /* for DIG DM */ + FW_CMD_RA_ACTIVE= 7, + FW_CMD_RA_REFRESH_N= 8, + FW_CMD_RA_REFRESH_BG= 9, + FW_CMD_RA_INIT= 10, /* for FW supported IQK */ + FW_CMD_IQK_ENABLE = 11, /* Tx power tracking switch */ + FW_CMD_TXPWR_TRACK_ENABLE = 12, /* Tx power tracking switch */ + FW_CMD_TXPWR_TRACK_DISABLE = 13, + FW_CMD_TXPWR_TRACK_THERMAL = 14, + FW_CMD_PAUSE_DM_BY_SCAN = 15, /* indicate firmware that driver enters LPS, for PS-Poll hardware bug */ - FW_CMD_LPS_ENTER = 16, + FW_CMD_RESUME_DM_BY_SCAN = 16, /* indicate firmware that driver leave LPS */ - FW_CMD_LPS_LEAVE = 17, -} FW_CMD_IO_TYPE; + FW_CMD_RA_REFRESH_N_COMB = 17, + FW_CMD_RA_REFRESH_BG_COMB = 18, + FW_CMD_ANTENNA_SW_ENABLE = 19, + FW_CMD_ANTENNA_SW_DISABLE = 20, + FW_CMD_TX_FEEDBACK_CCX_ENABLE = 21, + FW_CMD_LPS_ENTER = 22, + FW_CMD_LPS_LEAVE = 23, + FW_CMD_DIG_MODE_SS = 24, + FW_CMD_DIG_MODE_FA = 25, + FW_CMD_ADD_A2_ENTRY = 26, + FW_CMD_CTRL_DM_BY_DRIVER = 27, + FW_CMD_CTRL_DM_BY_DRIVER_NEW = 28, +}FW_CMD_IO_TYPE,*PFW_CMD_IO_TYPE; #define RT_MAX_LD_SLOT_NUM 10 struct rt_link_detect { |