diff options
Diffstat (limited to 'drivers/staging/rtl8192u/r8190_rtl8256.c')
| -rw-r--r-- | drivers/staging/rtl8192u/r8190_rtl8256.c | 42 |
1 files changed, 20 insertions, 22 deletions
diff --git a/drivers/staging/rtl8192u/r8190_rtl8256.c b/drivers/staging/rtl8192u/r8190_rtl8256.c index 92de92a3325a..b169460b9f26 100644 --- a/drivers/staging/rtl8192u/r8190_rtl8256.c +++ b/drivers/staging/rtl8192u/r8190_rtl8256.c @@ -42,9 +42,9 @@ void phy_set_rf8256_bandwidth(struct net_device *dev, enum ht_channel_width Band switch (Bandwidth) { case HT_CHANNEL_WIDTH_20: - if (priv->card_8192_version == VERSION_819XU_A - || priv->card_8192_version - == VERSION_819XU_B) { /* 8256 D-cut, E-cut, xiong: consider it later! */ + if (priv->card_8192_version == VERSION_819XU_A || + priv->card_8192_version == + VERSION_819XU_B) { /* 8256 D-cut, E-cut, xiong: consider it later! */ rtl8192_phy_SetRFReg(dev, (enum rf90_radio_path_e)eRFPath, 0x0b, bMask12Bits, 0x100); /* phy para:1ba */ @@ -79,10 +79,10 @@ void phy_set_rf8256_bandwidth(struct net_device *dev, enum ht_channel_width Band default: RT_TRACE(COMP_ERR, "phy_set_rf8256_bandwidth(): unknown Bandwidth: %#X\n", Bandwidth); break; - } } } + /*-------------------------------------------------------------------------- * Overview: Interface to config 8256 * Input: struct net_device* dev @@ -101,6 +101,7 @@ void phy_rf8256_config(struct net_device *dev) /* Config BB and RF */ phy_rf8256_config_para_file(dev); } + /*-------------------------------------------------------------------------- * Overview: Interface to config 8256 * Input: struct net_device* dev @@ -137,12 +138,12 @@ static void phy_rf8256_config_para_file(struct net_device *dev) break; case RF90_PATH_B: case RF90_PATH_D: - u4RegValue = rtl8192_QueryBBReg(dev, pPhyReg->rfintfs, bRFSI_RFENV<<16); + u4RegValue = rtl8192_QueryBBReg(dev, pPhyReg->rfintfs, bRFSI_RFENV << 16); break; } /*----Set RF_ENV enable----*/ - rtl8192_setBBreg(dev, pPhyReg->rfintfe, bRFSI_RFENV<<16, 0x1); + rtl8192_setBBreg(dev, pPhyReg->rfintfe, bRFSI_RFENV << 16, 0x1); /*----Set RF_ENV output high----*/ rtl8192_setBBreg(dev, pPhyReg->rfintfo, bRFSI_RFENV, 0x1); @@ -151,7 +152,7 @@ static void phy_rf8256_config_para_file(struct net_device *dev) rtl8192_setBBreg(dev, pPhyReg->rfHSSIPara2, b3WireAddressLength, 0x0); /* Set 0 to 4 bits for Z-serial and set 1 to 6 bits for 8258 */ rtl8192_setBBreg(dev, pPhyReg->rfHSSIPara2, b3WireDataLength, 0x0); /* Set 0 to 12 bits for Z-serial and 8258, and set 1 to 14 bits for ??? */ - rtl8192_phy_SetRFReg(dev, (enum rf90_radio_path_e) eRFPath, 0x0, bMask12Bits, 0xbf); + rtl8192_phy_SetRFReg(dev, (enum rf90_radio_path_e)eRFPath, 0x0, bMask12Bits, 0xbf); /* Check RF block (for FPGA platform only)---- * TODO: this function should be removed on ASIC , Emily 2007.2.2 @@ -207,7 +208,7 @@ static void phy_rf8256_config_para_file(struct net_device *dev) break; case RF90_PATH_B: case RF90_PATH_D: - rtl8192_setBBreg(dev, pPhyReg->rfintfs, bRFSI_RFENV<<16, u4RegValue); + rtl8192_setBBreg(dev, pPhyReg->rfintfs, bRFSI_RFENV << 16, u4RegValue); break; } @@ -215,7 +216,6 @@ static void phy_rf8256_config_para_file(struct net_device *dev) RT_TRACE(COMP_ERR, "phy_rf8256_config_para_file():Radio[%d] Fail!!", eRFPath); goto phy_RF8256_Config_ParaFile_Fail; } - } RT_TRACE(COMP_PHY, "PHY Initialization Success\n"); @@ -225,11 +225,11 @@ phy_RF8256_Config_ParaFile_Fail: RT_TRACE(COMP_ERR, "PHY Initialization failed\n"); } - void phy_set_rf8256_cck_tx_power(struct net_device *dev, u8 powerlevel) { u32 TxAGC = 0; struct r8192_priv *priv = ieee80211_priv(dev); + TxAGC = powerlevel; if (priv->bDynamicTxLowPower) { @@ -244,7 +244,6 @@ void phy_set_rf8256_cck_tx_power(struct net_device *dev, u8 powerlevel) rtl8192_setBBreg(dev, rTxAGC_CCK_Mcs32, bTxAGCRateCCK, TxAGC); } - void phy_set_rf8256_ofdm_tx_power(struct net_device *dev, u8 powerlevel) { struct r8192_priv *priv = ieee80211_priv(dev); @@ -255,16 +254,16 @@ void phy_set_rf8256_ofdm_tx_power(struct net_device *dev, u8 powerlevel) u8 byte0, byte1, byte2, byte3; powerBase0 = powerlevel + priv->TxPowerDiff; /* OFDM rates */ - powerBase0 = (powerBase0<<24) | (powerBase0<<16) | (powerBase0<<8) | powerBase0; + powerBase0 = (powerBase0 << 24) | (powerBase0 << 16) | (powerBase0 << 8) | powerBase0; powerBase1 = powerlevel; /* MCS rates */ - powerBase1 = (powerBase1<<24) | (powerBase1<<16) | (powerBase1<<8) | powerBase1; + powerBase1 = (powerBase1 << 24) | (powerBase1 << 16) | (powerBase1 << 8) | powerBase1; for (index = 0; index < 6; index++) { - writeVal = priv->MCSTxPowerLevelOriginalOffset[index] + ((index < 2)?powerBase0:powerBase1); + writeVal = priv->MCSTxPowerLevelOriginalOffset[index] + ((index < 2) ? powerBase0 : powerBase1); byte0 = (u8)(writeVal & 0x7f); - byte1 = (u8)((writeVal & 0x7f00)>>8); - byte2 = (u8)((writeVal & 0x7f0000)>>16); - byte3 = (u8)((writeVal & 0x7f000000)>>24); + byte1 = (u8)((writeVal & 0x7f00) >> 8); + byte2 = (u8)((writeVal & 0x7f0000) >> 16); + byte3 = (u8)((writeVal & 0x7f000000) >> 24); if (byte0 > 0x24) /* Max power index = 0x24 */ @@ -278,7 +277,7 @@ void phy_set_rf8256_ofdm_tx_power(struct net_device *dev, u8 powerlevel) /* for tx power track */ if (index == 3) { - writeVal_tmp = (byte3<<24) | (byte2<<16) | (byte1<<8) | byte0; + writeVal_tmp = (byte3 << 24) | (byte2 << 16) | (byte1 << 8) | byte0; priv->Pwr_Track = writeVal_tmp; } @@ -288,10 +287,9 @@ void phy_set_rf8256_ofdm_tx_power(struct net_device *dev, u8 powerlevel) */ writeVal = 0x03030303; } else { - writeVal = (byte3<<24) | (byte2<<16) | (byte1<<8) | byte0; - } - rtl8192_setBBreg(dev, RegOffset[index], 0x7f7f7f7f, writeVal); + writeVal = (byte3 << 24) | (byte2 << 16) | (byte1 << 8) | byte0; + } + rtl8192_setBBreg(dev, RegOffset[index], 0x7f7f7f7f, writeVal); } return; - } |