diff options
Diffstat (limited to 'drivers/staging/rtl8723au/hal/odm_RegConfig8723A.c')
| -rw-r--r-- | drivers/staging/rtl8723au/hal/odm_RegConfig8723A.c | 52 |
1 files changed, 18 insertions, 34 deletions
diff --git a/drivers/staging/rtl8723au/hal/odm_RegConfig8723A.c b/drivers/staging/rtl8723au/hal/odm_RegConfig8723A.c index 88e0126e855a..342dec3e939f 100644 --- a/drivers/staging/rtl8723au/hal/odm_RegConfig8723A.c +++ b/drivers/staging/rtl8723au/hal/odm_RegConfig8723A.c @@ -14,6 +14,7 @@ ******************************************************************************/ #include "odm_precomp.h" +#include "usb_ops_linux.h" void odm_ConfigRFReg_8723A( @@ -43,62 +44,45 @@ odm_ConfigRFReg_8723A( } } -void odm_ConfigMAC_8723A(struct dm_odm_t *pDM_Odm, - u32 Addr, - u8 Data - ) +void odm_ConfigMAC_8723A(struct dm_odm_t *pDM_Odm, u32 addr, u8 data) { - ODM_Write1Byte(pDM_Odm, Addr, Data); + rtl8723au_write8(pDM_Odm->Adapter, addr, data); ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, - ("===> ODM_ConfigMACWithHeaderFile23a: [MAC_REG] %08X %08X\n", - Addr, Data)); + ("===> %s: [MAC_REG] %08X %08X\n", __func__, addr, data)); } -void -odm_ConfigBB_AGC_8723A( - struct dm_odm_t *pDM_Odm, - u32 Addr, - u32 Bitmask, - u32 Data - ) +void odm_ConfigBB_AGC_8723A(struct dm_odm_t *pDM_Odm, u32 addr, u32 data) { - ODM_SetBBReg(pDM_Odm, Addr, Bitmask, Data); + rtl8723au_write32(pDM_Odm->Adapter, addr, data); /* Add 1us delay between BB/RF register setting. */ udelay(1); ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, - ("===> ODM_ConfigBBWithHeaderFile23a: [AGC_TAB] %08X %08X\n", - Addr, Data)); + ("===> %s: [AGC_TAB] %08X %08X\n", __func__, addr, data)); } void -odm_ConfigBB_PHY_8723A( - struct dm_odm_t *pDM_Odm, - u32 Addr, - u32 Bitmask, - u32 Data - ) +odm_ConfigBB_PHY_8723A(struct dm_odm_t *pDM_Odm, u32 addr, u32 data) { - if (Addr == 0xfe) + if (addr == 0xfe) msleep(50); - else if (Addr == 0xfd) + else if (addr == 0xfd) mdelay(5); - else if (Addr == 0xfc) + else if (addr == 0xfc) mdelay(1); - else if (Addr == 0xfb) + else if (addr == 0xfb) udelay(50); - else if (Addr == 0xfa) + else if (addr == 0xfa) udelay(5); - else if (Addr == 0xf9) + else if (addr == 0xf9) udelay(1); - else if (Addr == 0xa24) - pDM_Odm->RFCalibrateInfo.RegA24 = Data; - ODM_SetBBReg(pDM_Odm, Addr, Bitmask, Data); + else if (addr == 0xa24) + pDM_Odm->RFCalibrateInfo.RegA24 = data; + rtl8723au_write32(pDM_Odm->Adapter, addr, data); /* Add 1us delay between BB/RF register setting. */ udelay(1); ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, - ("===> ODM_ConfigBBWithHeaderFile23a: [PHY_REG] %08X %08X\n", - Addr, Data)); + ("===> %s: [PHY_REG] %08X %08X\n", __func__, addr, data)); } |