diff options
Diffstat (limited to 'drivers/staging/rtl8723au/hal')
21 files changed, 818 insertions, 1215 deletions
diff --git a/drivers/staging/rtl8723au/hal/HalDMOutSrc8723A_CE.c b/drivers/staging/rtl8723au/hal/HalDMOutSrc8723A_CE.c index 179a1ba03029..3f9ec9e00e16 100644 --- a/drivers/staging/rtl8723au/hal/HalDMOutSrc8723A_CE.c +++ b/drivers/staging/rtl8723au/hal/HalDMOutSrc8723A_CE.c @@ -23,9 +23,8 @@ #define DPK_DELTA_MAPPING_NUM 13 #define index_mapping_HP_NUM 15 /* 091212 chiyokolin */ -static void -odm_TXPowerTrackingCallback_ThermalMeter_92C( - struct rtw_adapter *Adapter) +static void +odm_TXPowerTrackingCallback_ThermalMeter_92C(struct rtw_adapter *Adapter) { struct hal_data_8723a *pHalData = GET_HAL_DATA(Adapter); struct dm_priv *pdmpriv = &pHalData->dmpriv; @@ -35,7 +34,6 @@ odm_TXPowerTrackingCallback_ThermalMeter_92C( s8 OFDM_index[2], CCK_index = 0, OFDM_index_old[2] = {0}; s8 CCK_index_old = 0; int i = 0; - bool is2T = IS_92C_SERIAL(pHalData->VersionID); u8 OFDM_min_index = 6, rf; /* OFDM BB Swing should be less than +3.0dB*/ u8 ThermalValue_HP_count = 0; u32 ThermalValue_HP = 0; @@ -60,15 +58,15 @@ odm_TXPowerTrackingCallback_ThermalMeter_92C( rtl8723a_phy_ap_calibrate(Adapter, (ThermalValue - pHalData->EEPROMThermalMeter)); - if (is2T) + if (pHalData->rf_type == RF_2T2R) rf = 2; else rf = 1; if (ThermalValue) { /* Query OFDM path A default setting */ - ele_D = PHY_QueryBBReg(Adapter, rOFDM0_XATxIQImbalance, - bMaskDWord)&bMaskOFDM_D; + ele_D = rtl8723au_read32(Adapter, rOFDM0_XATxIQImbalance) & + bMaskOFDM_D; for (i = 0; i < OFDM_TABLE_SIZE_92C; i++) { /* find the index */ if (ele_D == (OFDMSwingTable23A[i]&bMaskOFDM_D)) { @@ -78,9 +76,10 @@ odm_TXPowerTrackingCallback_ThermalMeter_92C( } /* Query OFDM path B default setting */ - if (is2T) { - ele_D = PHY_QueryBBReg(Adapter, rOFDM0_XBTxIQImbalance, - bMaskDWord)&bMaskOFDM_D; + if (pHalData->rf_type == RF_2T2R) { + ele_D = rtl8723au_read32(Adapter, + rOFDM0_XBTxIQImbalance); + ele_D &= bMaskOFDM_D; for (i = 0; i < OFDM_TABLE_SIZE_92C; i++) { /* find the index */ if (ele_D == (OFDMSwingTable23A[i]&bMaskOFDM_D)) { OFDM_index_old[1] = (u8)i; @@ -90,8 +89,7 @@ odm_TXPowerTrackingCallback_ThermalMeter_92C( } /* Query CCK default setting From 0xa24 */ - TempCCk = PHY_QueryBBReg(Adapter, rCCK0_TxFilter2, - bMaskDWord)&bMaskCCK; + TempCCk = rtl8723au_read32(Adapter, rCCK0_TxFilter2) & bMaskCCK; for (i = 0 ; i < CCK_TABLE_SIZE ; i++) { if (pdmpriv->bCCKinCH14) { if (!memcmp(&TempCCk, @@ -224,12 +222,13 @@ odm_TXPowerTrackingCallback_ThermalMeter_92C( } if (CCK_index > (CCK_TABLE_SIZE-1)) - CCK_index = (CCK_TABLE_SIZE-1); + CCK_index = CCK_TABLE_SIZE-1; else if (CCK_index < 0) CCK_index = 0; } - if (pdmpriv->TxPowerTrackControl && (delta != 0 || delta_HP != 0)) { + if (pdmpriv->TxPowerTrackControl && + (delta != 0 || delta_HP != 0)) { /* Adujst OFDM Ant_A according to IQK result */ ele_D = (OFDMSwingTable23A[OFDM_index[0]] & 0xFFC00000)>>22; X = pdmpriv->RegE94; @@ -247,7 +246,9 @@ odm_TXPowerTrackingCallback_ThermalMeter_92C( /* write new elements A, C, D to regC80 and regC94, element B is always 0 */ value32 = (ele_D<<22)|((ele_C&0x3F)<<16)|ele_A; - PHY_SetBBReg(Adapter, rOFDM0_XATxIQImbalance, bMaskDWord, value32); + rtl8723au_write32(Adapter, + rOFDM0_XATxIQImbalance, + value32); value32 = (ele_C&0x000003C0)>>6; PHY_SetBBReg(Adapter, rOFDM0_XCTxAFE, bMaskH4Bits, value32); @@ -260,9 +261,9 @@ odm_TXPowerTrackingCallback_ThermalMeter_92C( PHY_SetBBReg(Adapter, rOFDM0_ECCAThreshold, BIT(29), value32); } else { - PHY_SetBBReg(Adapter, rOFDM0_XATxIQImbalance, - bMaskDWord, - OFDMSwingTable23A[OFDM_index[0]]); + rtl8723au_write32(Adapter, + rOFDM0_XATxIQImbalance, + OFDMSwingTable23A[OFDM_index[0]]); PHY_SetBBReg(Adapter, rOFDM0_XCTxAFE, bMaskH4Bits, 0x00); PHY_SetBBReg(Adapter, rOFDM0_ECCAThreshold, @@ -290,7 +291,7 @@ odm_TXPowerTrackingCallback_ThermalMeter_92C( rtl8723au_write8(Adapter, 0xa29, CCKSwingTable_Ch1423A[CCK_index][7]); } - if (is2T) { + if (pHalData->rf_type == RF_2T2R) { ele_D = (OFDMSwingTable23A[(u8)OFDM_index[1]] & 0xFFC00000)>>22; /* new element A = element D x X */ @@ -309,7 +310,7 @@ odm_TXPowerTrackingCallback_ThermalMeter_92C( /* write new elements A, C, D to regC88 and regC9C, element B is always 0 */ value32 = (ele_D<<22)|((ele_C&0x3F)<<16) | ele_A; - PHY_SetBBReg(Adapter, rOFDM0_XBTxIQImbalance, bMaskDWord, value32); + rtl8723au_write32(Adapter, rOFDM0_XBTxIQImbalance, value32); value32 = (ele_C&0x000003C0)>>6; PHY_SetBBReg(Adapter, rOFDM0_XDTxAFE, bMaskH4Bits, value32); @@ -324,10 +325,9 @@ odm_TXPowerTrackingCallback_ThermalMeter_92C( rOFDM0_ECCAThreshold, BIT(25), value32); } else { - PHY_SetBBReg(Adapter, - rOFDM0_XBTxIQImbalance, - bMaskDWord, - OFDMSwingTable23A[OFDM_index[1]]); + rtl8723au_write32(Adapter, + rOFDM0_XBTxIQImbalance, + OFDMSwingTable23A[OFDM_index[1]]); PHY_SetBBReg(Adapter, rOFDM0_XDTxAFE, bMaskH4Bits, 0x00); @@ -361,14 +361,10 @@ static void ODM_TXPowerTracking92CDirectCall(struct rtw_adapter *Adapter) odm_TXPowerTrackingCallback_ThermalMeter_92C(Adapter); } -static void odm_CheckTXPowerTracking_ThermalMeter(struct rtw_adapter *Adapter) +void rtl8723a_odm_check_tx_power_tracking(struct rtw_adapter *Adapter) { struct hal_data_8723a *pHalData = GET_HAL_DATA(Adapter); struct dm_priv *pdmpriv = &pHalData->dmpriv; - struct dm_odm_t *podmpriv = &pHalData->odmpriv; - - if (!(podmpriv->SupportAbility & ODM_RF_TX_PWR_TRACK)) - return; if (!pdmpriv->TM_Trigger) { /* at least delay 1 sec */ PHY_SetRFReg(Adapter, RF_PATH_A, RF_T_METER, bRFRegOffsetMask, 0x60); @@ -381,11 +377,6 @@ static void odm_CheckTXPowerTracking_ThermalMeter(struct rtw_adapter *Adapter) } } -void rtl8723a_odm_check_tx_power_tracking(struct rtw_adapter *Adapter) -{ - odm_CheckTXPowerTracking_ThermalMeter(Adapter); -} - /* IQK */ #define MAX_TOLERANCE 5 #define IQK_DELAY_TIME 1 /* ms */ @@ -397,36 +388,37 @@ static u8 _PHY_PathA_IQK(struct rtw_adapter *pAdapter, bool configPathB) struct hal_data_8723a *pHalData = GET_HAL_DATA(pAdapter); /* path-A IQK setting */ - PHY_SetBBReg(pAdapter, rTx_IQK_Tone_A, bMaskDWord, 0x10008c1f); - PHY_SetBBReg(pAdapter, rRx_IQK_Tone_A, bMaskDWord, 0x10008c1f); - PHY_SetBBReg(pAdapter, rTx_IQK_PI_A, bMaskDWord, 0x82140102); + rtl8723au_write32(pAdapter, rTx_IQK_Tone_A, 0x10008c1f); + rtl8723au_write32(pAdapter, rRx_IQK_Tone_A, 0x10008c1f); + rtl8723au_write32(pAdapter, rTx_IQK_PI_A, 0x82140102); - PHY_SetBBReg(pAdapter, rRx_IQK_PI_A, bMaskDWord, configPathB ? 0x28160202 : + rtl8723au_write32(pAdapter, rRx_IQK_PI_A, configPathB ? 0x28160202 : IS_81xxC_VENDOR_UMC_B_CUT(pHalData->VersionID)?0x28160202:0x28160502); /* path-B IQK setting */ if (configPathB) { - PHY_SetBBReg(pAdapter, rTx_IQK_Tone_B, bMaskDWord, 0x10008c22); - PHY_SetBBReg(pAdapter, rRx_IQK_Tone_B, bMaskDWord, 0x10008c22); - PHY_SetBBReg(pAdapter, rTx_IQK_PI_B, bMaskDWord, 0x82140102); - PHY_SetBBReg(pAdapter, rRx_IQK_PI_B, bMaskDWord, 0x28160202); + rtl8723au_write32(pAdapter, rTx_IQK_Tone_B, 0x10008c22); + rtl8723au_write32(pAdapter, rRx_IQK_Tone_B, 0x10008c22); + rtl8723au_write32(pAdapter, rTx_IQK_PI_B, 0x82140102); + rtl8723au_write32(pAdapter, rRx_IQK_PI_B, 0x28160202); } /* LO calibration setting */ - PHY_SetBBReg(pAdapter, rIQK_AGC_Rsp, bMaskDWord, 0x001028d1); + rtl8723au_write32(pAdapter, rIQK_AGC_Rsp, 0x001028d1); /* One shot, path A LOK & IQK */ - PHY_SetBBReg(pAdapter, rIQK_AGC_Pts, bMaskDWord, 0xf9000000); - PHY_SetBBReg(pAdapter, rIQK_AGC_Pts, bMaskDWord, 0xf8000000); + rtl8723au_write32(pAdapter, rIQK_AGC_Pts, 0xf9000000); + rtl8723au_write32(pAdapter, rIQK_AGC_Pts, 0xf8000000); /* delay x ms */ - udelay(IQK_DELAY_TIME*1000);/* PlatformStallExecution(IQK_DELAY_TIME*1000); */ + /* PlatformStallExecution(IQK_DELAY_TIME*1000); */ + udelay(IQK_DELAY_TIME*1000); /* Check failed */ - regEAC = PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_A_2, bMaskDWord); - regE94 = PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_A, bMaskDWord); - regE9C = PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_A, bMaskDWord); - regEA4 = PHY_QueryBBReg(pAdapter, rRx_Power_Before_IQK_A_2, bMaskDWord); + regEAC = rtl8723au_read32(pAdapter, rRx_Power_After_IQK_A_2); + regE94 = rtl8723au_read32(pAdapter, rTx_Power_Before_IQK_A); + regE9C = rtl8723au_read32(pAdapter, rTx_Power_After_IQK_A); + regEA4 = rtl8723au_read32(pAdapter, rRx_Power_Before_IQK_A_2); if (!(regEAC & BIT(28)) && (((regE94 & 0x03FF0000)>>16) != 0x142) && @@ -435,7 +427,7 @@ static u8 _PHY_PathA_IQK(struct rtw_adapter *pAdapter, bool configPathB) else /* if Tx not OK, ignore Rx */ return result; - if (!(regEAC & BIT(27)) && /* if Tx is OK, check whether Rx is OK */ + if (!(regEAC & BIT(27)) && /* if Tx is OK, check whether Rx is OK */ (((regEA4 & 0x03FF0000)>>16) != 0x132) && (((regEAC & 0x03FF0000)>>16) != 0x36)) result |= 0x02; @@ -450,18 +442,18 @@ static u8 _PHY_PathB_IQK(struct rtw_adapter *pAdapter) u8 result = 0x00; /* One shot, path B LOK & IQK */ - PHY_SetBBReg(pAdapter, rIQK_AGC_Cont, bMaskDWord, 0x00000002); - PHY_SetBBReg(pAdapter, rIQK_AGC_Cont, bMaskDWord, 0x00000000); + rtl8723au_write32(pAdapter, rIQK_AGC_Cont, 0x00000002); + rtl8723au_write32(pAdapter, rIQK_AGC_Cont, 0x00000000); /* delay x ms */ udelay(IQK_DELAY_TIME*1000); /* Check failed */ - regEAC = PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_A_2, bMaskDWord); - regEB4 = PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_B, bMaskDWord); - regEBC = PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_B, bMaskDWord); - regEC4 = PHY_QueryBBReg(pAdapter, rRx_Power_Before_IQK_B_2, bMaskDWord); - regECC = PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_B_2, bMaskDWord); + regEAC = rtl8723au_read32(pAdapter, rRx_Power_After_IQK_A_2); + regEB4 = rtl8723au_read32(pAdapter, rTx_Power_Before_IQK_B); + regEBC = rtl8723au_read32(pAdapter, rTx_Power_After_IQK_B); + regEC4 = rtl8723au_read32(pAdapter, rRx_Power_Before_IQK_B_2); + regECC = rtl8723au_read32(pAdapter, rRx_Power_After_IQK_B_2); if (!(regEAC & BIT(31)) && (((regEB4 & 0x03FF0000)>>16) != 0x142) && @@ -494,22 +486,27 @@ static void _PHY_PathAFillIQKMatrix(struct rtw_adapter *pAdapter, if (final_candidate == 0xFF) { return; } else if (bIQKOK) { - Oldval_0 = (PHY_QueryBBReg(pAdapter, rOFDM0_XATxIQImbalance, bMaskDWord) >> 22) & 0x3FF; + Oldval_0 = rtl8723au_read32(pAdapter, rOFDM0_XATxIQImbalance); + Oldval_0 = (Oldval_0 >> 22) & 0x3FF; X = result[final_candidate][0]; if ((X & 0x00000200) != 0) X = X | 0xFFFFFC00; TX0_A = (X * Oldval_0) >> 8; PHY_SetBBReg(pAdapter, rOFDM0_XATxIQImbalance, 0x3FF, TX0_A); - PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(31), ((X * Oldval_0>>7) & 0x1)); + PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(31), + ((X * Oldval_0>>7) & 0x1)); Y = result[final_candidate][1]; if ((Y & 0x00000200) != 0) Y = Y | 0xFFFFFC00; TX0_C = (Y * Oldval_0) >> 8; - PHY_SetBBReg(pAdapter, rOFDM0_XCTxAFE, 0xF0000000, ((TX0_C&0x3C0)>>6)); - PHY_SetBBReg(pAdapter, rOFDM0_XATxIQImbalance, 0x003F0000, (TX0_C&0x3F)); - PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(29), ((Y * Oldval_0>>7) & 0x1)); + PHY_SetBBReg(pAdapter, rOFDM0_XCTxAFE, 0xF0000000, + ((TX0_C&0x3C0)>>6)); + PHY_SetBBReg(pAdapter, rOFDM0_XATxIQImbalance, 0x003F0000, + (TX0_C&0x3F)); + PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(29), + ((Y * Oldval_0>>7) & 0x1)); if (bTxOnly) { DBG_8723A("_PHY_PathAFillIQKMatrix only Tx OK\n"); @@ -537,22 +534,27 @@ static void _PHY_PathBFillIQKMatrix(struct rtw_adapter *pAdapter, bool bIQKOK, i if (final_candidate == 0xFF) { return; } else if (bIQKOK) { - Oldval_1 = (PHY_QueryBBReg(pAdapter, rOFDM0_XBTxIQImbalance, bMaskDWord) >> 22) & 0x3FF; + Oldval_1 = rtl8723au_read32(pAdapter, rOFDM0_XBTxIQImbalance); + Oldval_1 = (Oldval_1 >> 22) & 0x3FF; X = result[final_candidate][4]; if ((X & 0x00000200) != 0) X = X | 0xFFFFFC00; TX1_A = (X * Oldval_1) >> 8; PHY_SetBBReg(pAdapter, rOFDM0_XBTxIQImbalance, 0x3FF, TX1_A); - PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(27), ((X * Oldval_1>>7) & 0x1)); + PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(27), + ((X * Oldval_1 >> 7) & 0x1)); Y = result[final_candidate][5]; if ((Y & 0x00000200) != 0) Y = Y | 0xFFFFFC00; TX1_C = (Y * Oldval_1) >> 8; - PHY_SetBBReg(pAdapter, rOFDM0_XDTxAFE, 0xF0000000, ((TX1_C&0x3C0)>>6)); - PHY_SetBBReg(pAdapter, rOFDM0_XBTxIQImbalance, 0x003F0000, (TX1_C&0x3F)); - PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(25), ((Y * Oldval_1>>7) & 0x1)); + PHY_SetBBReg(pAdapter, rOFDM0_XDTxAFE, 0xF0000000, + ((TX1_C & 0x3C0) >> 6)); + PHY_SetBBReg(pAdapter, rOFDM0_XBTxIQImbalance, 0x003F0000, + (TX1_C & 0x3F)); + PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(25), + ((Y * Oldval_1 >> 7) & 0x1)); if (bTxOnly) return; @@ -573,11 +575,12 @@ static void _PHY_SaveADDARegisters(struct rtw_adapter *pAdapter, u32 *ADDAReg, u u32 i; for (i = 0 ; i < RegisterNum ; i++) { - ADDABackup[i] = PHY_QueryBBReg(pAdapter, ADDAReg[i], bMaskDWord); + ADDABackup[i] = rtl8723au_read32(pAdapter, ADDAReg[i]); } } -static void _PHY_SaveMACRegisters(struct rtw_adapter *pAdapter, u32 *MACReg, u32 *MACBackup) +static void _PHY_SaveMACRegisters(struct rtw_adapter *pAdapter, u32 *MACReg, + u32 *MACBackup) { u32 i; @@ -587,16 +590,19 @@ static void _PHY_SaveMACRegisters(struct rtw_adapter *pAdapter, u32 *MACReg, u32 MACBackup[i] = rtl8723au_read32(pAdapter, MACReg[i]); } -static void _PHY_ReloadADDARegisters(struct rtw_adapter *pAdapter, u32 *ADDAReg, u32 *ADDABackup, u32 RegiesterNum) +static void _PHY_ReloadADDARegisters(struct rtw_adapter *pAdapter, + u32 *ADDAReg, u32 *ADDABackup, + u32 RegiesterNum) { u32 i; for (i = 0 ; i < RegiesterNum ; i++) { - PHY_SetBBReg(pAdapter, ADDAReg[i], bMaskDWord, ADDABackup[i]); + rtl8723au_write32(pAdapter, ADDAReg[i], ADDABackup[i]); } } -static void _PHY_ReloadMACRegisters(struct rtw_adapter *pAdapter, u32 *MACReg, u32 *MACBackup) +static void _PHY_ReloadMACRegisters(struct rtw_adapter *pAdapter, + u32 *MACReg, u32 *MACBackup) { u32 i; @@ -606,7 +612,8 @@ static void _PHY_ReloadMACRegisters(struct rtw_adapter *pAdapter, u32 *MACReg, u rtl8723au_write32(pAdapter, MACReg[i], MACBackup[i]); } -static void _PHY_PathADDAOn(struct rtw_adapter *pAdapter, u32 *ADDAReg, bool isPathAOn, bool is2T) +static void _PHY_PathADDAOn(struct rtw_adapter *pAdapter, u32 *ADDAReg, + bool isPathAOn, bool is2T) { u32 pathOn; u32 i; @@ -614,16 +621,17 @@ static void _PHY_PathADDAOn(struct rtw_adapter *pAdapter, u32 *ADDAReg, bool isP pathOn = isPathAOn ? 0x04db25a4 : 0x0b1b25a4; if (!is2T) { pathOn = 0x0bdb25a0; - PHY_SetBBReg(pAdapter, ADDAReg[0], bMaskDWord, 0x0b1b25a0); + rtl8723au_write32(pAdapter, ADDAReg[0], 0x0b1b25a0); } else { - PHY_SetBBReg(pAdapter, ADDAReg[0], bMaskDWord, pathOn); + rtl8723au_write32(pAdapter, ADDAReg[0], pathOn); } for (i = 1 ; i < IQK_ADDA_REG_NUM ; i++) - PHY_SetBBReg(pAdapter, ADDAReg[i], bMaskDWord, pathOn); + rtl8723au_write32(pAdapter, ADDAReg[i], pathOn); } -static void _PHY_MACSettingCalibration(struct rtw_adapter *pAdapter, u32 *MACReg, u32 *MACBackup) +static void _PHY_MACSettingCalibration(struct rtw_adapter *pAdapter, + u32 *MACReg, u32 *MACBackup) { u32 i = 0; @@ -638,9 +646,9 @@ static void _PHY_MACSettingCalibration(struct rtw_adapter *pAdapter, u32 *MACReg static void _PHY_PathAStandBy(struct rtw_adapter *pAdapter) { - PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x0); - PHY_SetBBReg(pAdapter, 0x840, bMaskDWord, 0x00010000); - PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x80800000); + rtl8723au_write32(pAdapter, rFPGA0_IQK, 0x0); + rtl8723au_write32(pAdapter, 0x840, 0x00010000); + rtl8723au_write32(pAdapter, rFPGA0_IQK, 0x80800000); } static void _PHY_PIModeSwitch(struct rtw_adapter *pAdapter, bool PIMode) @@ -648,8 +656,8 @@ static void _PHY_PIModeSwitch(struct rtw_adapter *pAdapter, bool PIMode) u32 mode; mode = PIMode ? 0x01000100 : 0x01000000; - PHY_SetBBReg(pAdapter, 0x820, bMaskDWord, mode); - PHY_SetBBReg(pAdapter, 0x828, bMaskDWord, mode); + rtl8723au_write32(pAdapter, 0x820, mode); + rtl8723au_write32(pAdapter, 0x828, mode); } /* @@ -660,9 +668,9 @@ static bool _PHY_SimularityCompare(struct rtw_adapter *pAdapter, int result[][8] u32 i, j, diff, SimularityBitMap, bound = 0; struct hal_data_8723a *pHalData = GET_HAL_DATA(pAdapter); u8 final_candidate[2] = {0xFF, 0xFF}; /* for path A and path B */ - bool bResult = true, is2T = IS_92C_SERIAL(pHalData->VersionID); + bool bResult = true; - if (is2T) + if (pHalData->rf_type == RF_2T2R) bound = 8; else bound = 4; @@ -699,7 +707,7 @@ static bool _PHY_SimularityCompare(struct rtw_adapter *pAdapter, int result[][8] for (i = 0; i < 4; i++) result[3][i] = result[c1][i]; return false; - } else if (!(SimularityBitMap & 0xF0) && is2T) { + } else if (!(SimularityBitMap & 0xF0) && pHalData->rf_type == RF_2T2R) { /* path B OK */ for (i = 4; i < 8; i++) result[3][i] = result[c1][i]; @@ -746,7 +754,7 @@ static void _PHY_IQCalibrate(struct rtw_adapter *pAdapter, int result[][8], u8 t u32 bbvalue; if (t == 0) { - bbvalue = PHY_QueryBBReg(pAdapter, rFPGA0_RFMOD, bMaskDWord); + bbvalue = rtl8723au_read32(pAdapter, rFPGA0_RFMOD); /* Save ADDA parameters, turn Path A ADDA on */ _PHY_SaveADDARegisters(pAdapter, ADDA_REG, pdmpriv->ADDA_backup, IQK_ADDA_REG_NUM); @@ -766,48 +774,50 @@ static void _PHY_IQCalibrate(struct rtw_adapter *pAdapter, int result[][8], u8 t } PHY_SetBBReg(pAdapter, rFPGA0_RFMOD, BIT(24), 0x00); - PHY_SetBBReg(pAdapter, rOFDM0_TRxPathEnable, bMaskDWord, 0x03a05600); - PHY_SetBBReg(pAdapter, rOFDM0_TRMuxPar, bMaskDWord, 0x000800e4); - PHY_SetBBReg(pAdapter, rFPGA0_XCD_RFInterfaceSW, bMaskDWord, 0x22204000); + rtl8723au_write32(pAdapter, rOFDM0_TRxPathEnable, 0x03a05600); + rtl8723au_write32(pAdapter, rOFDM0_TRMuxPar, 0x000800e4); + rtl8723au_write32(pAdapter, rFPGA0_XCD_RFInterfaceSW, 0x22204000); PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT(10), 0x01); PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT(26), 0x01); PHY_SetBBReg(pAdapter, rFPGA0_XA_RFInterfaceOE, BIT(10), 0x00); PHY_SetBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT(10), 0x00); if (is2T) { - PHY_SetBBReg(pAdapter, rFPGA0_XA_LSSIParameter, bMaskDWord, 0x00010000); - PHY_SetBBReg(pAdapter, rFPGA0_XB_LSSIParameter, bMaskDWord, 0x00010000); + rtl8723au_write32(pAdapter, + rFPGA0_XA_LSSIParameter, 0x00010000); + rtl8723au_write32(pAdapter, + rFPGA0_XB_LSSIParameter, 0x00010000); } /* MAC settings */ _PHY_MACSettingCalibration(pAdapter, IQK_MAC_REG, pdmpriv->IQK_MAC_backup); /* Page B init */ - PHY_SetBBReg(pAdapter, rConfig_AntA, bMaskDWord, 0x00080000); + rtl8723au_write32(pAdapter, rConfig_AntA, 0x00080000); if (is2T) - PHY_SetBBReg(pAdapter, rConfig_AntB, bMaskDWord, 0x00080000); + rtl8723au_write32(pAdapter, rConfig_AntB, 0x00080000); /* IQ calibration setting */ - PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x80800000); - PHY_SetBBReg(pAdapter, rTx_IQK, bMaskDWord, 0x01007c00); - PHY_SetBBReg(pAdapter, rRx_IQK, bMaskDWord, 0x01004800); + rtl8723au_write32(pAdapter, rFPGA0_IQK, 0x80800000); + rtl8723au_write32(pAdapter, rTx_IQK, 0x01007c00); + rtl8723au_write32(pAdapter, rRx_IQK, 0x01004800); for (i = 0 ; i < retryCount ; i++) { PathAOK = _PHY_PathA_IQK(pAdapter, is2T); if (PathAOK == 0x03) { DBG_8723A("Path A IQK Success!!\n"); - result[t][0] = (PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_A, bMaskDWord)&0x3FF0000)>>16; - result[t][1] = (PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_A, bMaskDWord)&0x3FF0000)>>16; - result[t][2] = (PHY_QueryBBReg(pAdapter, rRx_Power_Before_IQK_A_2, bMaskDWord)&0x3FF0000)>>16; - result[t][3] = (PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_A_2, bMaskDWord)&0x3FF0000)>>16; + result[t][0] = (rtl8723au_read32(pAdapter, rTx_Power_Before_IQK_A)&0x3FF0000)>>16; + result[t][1] = (rtl8723au_read32(pAdapter, rTx_Power_After_IQK_A)&0x3FF0000)>>16; + result[t][2] = (rtl8723au_read32(pAdapter, rRx_Power_Before_IQK_A_2)&0x3FF0000)>>16; + result[t][3] = (rtl8723au_read32(pAdapter, rRx_Power_After_IQK_A_2)&0x3FF0000)>>16; break; } else if (i == (retryCount-1) && PathAOK == 0x01) { /* Tx IQK OK */ DBG_8723A("Path A IQK Only Tx Success!!\n"); - result[t][0] = (PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_A, bMaskDWord)&0x3FF0000)>>16; - result[t][1] = (PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_A, bMaskDWord)&0x3FF0000)>>16; + result[t][0] = (rtl8723au_read32(pAdapter, rTx_Power_Before_IQK_A)&0x3FF0000)>>16; + result[t][1] = (rtl8723au_read32(pAdapter, rTx_Power_After_IQK_A)&0x3FF0000)>>16; } } @@ -825,16 +835,16 @@ static void _PHY_IQCalibrate(struct rtw_adapter *pAdapter, int result[][8], u8 t PathBOK = _PHY_PathB_IQK(pAdapter); if (PathBOK == 0x03) { DBG_8723A("Path B IQK Success!!\n"); - result[t][4] = (PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_B, bMaskDWord)&0x3FF0000)>>16; - result[t][5] = (PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_B, bMaskDWord)&0x3FF0000)>>16; - result[t][6] = (PHY_QueryBBReg(pAdapter, rRx_Power_Before_IQK_B_2, bMaskDWord)&0x3FF0000)>>16; - result[t][7] = (PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_B_2, bMaskDWord)&0x3FF0000)>>16; + result[t][4] = (rtl8723au_read32(pAdapter, rTx_Power_Before_IQK_B)&0x3FF0000)>>16; + result[t][5] = (rtl8723au_read32(pAdapter, rTx_Power_After_IQK_B)&0x3FF0000)>>16; + result[t][6] = (rtl8723au_read32(pAdapter, rRx_Power_Before_IQK_B_2)&0x3FF0000)>>16; + result[t][7] = (rtl8723au_read32(pAdapter, rRx_Power_After_IQK_B_2)&0x3FF0000)>>16; break; } else if (i == (retryCount - 1) && PathBOK == 0x01) { /* Tx IQK OK */ DBG_8723A("Path B Only Tx IQK Success!!\n"); - result[t][4] = (PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_B, bMaskDWord)&0x3FF0000)>>16; - result[t][5] = (PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_B, bMaskDWord)&0x3FF0000)>>16; + result[t][4] = (rtl8723au_read32(pAdapter, rTx_Power_Before_IQK_B)&0x3FF0000)>>16; + result[t][5] = (rtl8723au_read32(pAdapter, rTx_Power_After_IQK_B)&0x3FF0000)>>16; } } @@ -844,7 +854,7 @@ static void _PHY_IQCalibrate(struct rtw_adapter *pAdapter, int result[][8], u8 t } /* Back to BB mode, load original value */ - PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0); + rtl8723au_write32(pAdapter, rFPGA0_IQK, 0); if (t != 0) { if (!pdmpriv->bRfPiEnable) { @@ -862,14 +872,16 @@ static void _PHY_IQCalibrate(struct rtw_adapter *pAdapter, int result[][8], u8 t _PHY_ReloadADDARegisters(pAdapter, IQK_BB_REG_92C, pdmpriv->IQK_BB_backup, IQK_BB_REG_NUM); /* Restore RX initial gain */ - PHY_SetBBReg(pAdapter, rFPGA0_XA_LSSIParameter, bMaskDWord, 0x00032ed3); + rtl8723au_write32(pAdapter, + rFPGA0_XA_LSSIParameter, 0x00032ed3); if (is2T) { - PHY_SetBBReg(pAdapter, rFPGA0_XB_LSSIParameter, bMaskDWord, 0x00032ed3); + rtl8723au_write32(pAdapter, + rFPGA0_XB_LSSIParameter, 0x00032ed3); } /* load 0xe30 IQC default value */ - PHY_SetBBReg(pAdapter, rTx_IQK_Tone_A, bMaskDWord, 0x01008c00); - PHY_SetBBReg(pAdapter, rRx_IQK_Tone_A, bMaskDWord, 0x01008c00); + rtl8723au_write32(pAdapter, rTx_IQK_Tone_A, 0x01008c00); + rtl8723au_write32(pAdapter, rRx_IQK_Tone_A, 0x01008c00); } } @@ -980,12 +992,10 @@ void rtl8723a_phy_iq_calibrate(struct rtw_adapter *pAdapter, bool bReCovery) is13simular = false; for (i = 0; i < 3; i++) { - if (IS_92C_SERIAL(pHalData->VersionID)) { - _PHY_IQCalibrate(pAdapter, result, i, true); - } else { - /* For 88C 1T1R */ + if (pHalData->rf_type == RF_2T2R) + _PHY_IQCalibrate(pAdapter, result, i, true); + else /* For 88C 1T1R */ _PHY_IQCalibrate(pAdapter, result, i, false); - } if (i == 1) { is12simular = _PHY_SimularityCompare(pAdapter, result, 0, 1); @@ -1053,9 +1063,10 @@ void rtl8723a_phy_iq_calibrate(struct rtw_adapter *pAdapter, bool bReCovery) if ((RegE94 != 0)/*&&(RegEA4 != 0)*/) _PHY_PathAFillIQKMatrix(pAdapter, bPathAOK, result, final_candidate, (RegEA4 == 0)); - if (IS_92C_SERIAL(pHalData->VersionID)) { + if (pHalData->rf_type == RF_2T2R) { if ((RegEB4 != 0)/*&&(RegEC4 != 0)*/) - _PHY_PathBFillIQKMatrix(pAdapter, bPathBOK, result, final_candidate, (RegEC4 == 0)); + _PHY_PathBFillIQKMatrix(pAdapter, bPathBOK, result, + final_candidate, (RegEC4 == 0)); } _PHY_SaveADDARegisters(pAdapter, IQK_BB_REG_92C, pdmpriv->IQK_BB_backup_recover, 9); @@ -1074,12 +1085,10 @@ void rtl8723a_phy_lc_calibrate(struct rtw_adapter *pAdapter) if (pmlmeext->sitesurvey_res.state == SCAN_PROCESS) return; - if (IS_92C_SERIAL(pHalData->VersionID)) { + if (pHalData->rf_type == RF_2T2R) _PHY_LCCalibrate(pAdapter, true); - } else { - /* For 88C 1T1R */ + else /* For 88C 1T1R */ _PHY_LCCalibrate(pAdapter, false); - } } void diff --git a/drivers/staging/rtl8723au/hal/HalHWImg8723A_BB.c b/drivers/staging/rtl8723au/hal/HalHWImg8723A_BB.c index 9d4f6bed4269..e8cab9e97385 100644 --- a/drivers/staging/rtl8723au/hal/HalHWImg8723A_BB.c +++ b/drivers/staging/rtl8723au/hal/HalHWImg8723A_BB.c @@ -30,12 +30,12 @@ static bool CheckCondition(const u32 Condition, const u32 Hex) return false; cond = Condition & 0x0000FF00; - cond = cond >> 8; + cond >>= 8; if ((_interface & cond) == 0 && cond != 0x07) return false; cond = Condition & 0x00FF0000; - cond = cond >> 16; + cond >>= 16; if ((_platform & cond) == 0 && cond != 0x0F) return false; return true; @@ -215,17 +215,15 @@ static u32 Array_AGC_TAB_1T_8723A[] = { void ODM_ReadAndConfig_AGC_TAB_1T_8723A(struct dm_odm_t *pDM_Odm) { - u32 hex; u32 i; u8 platform = 0x04; - u8 interfaceValue = pDM_Odm->SupportInterface; u8 board = pDM_Odm->BoardType; u32 ArrayLen = sizeof(Array_AGC_TAB_1T_8723A)/sizeof(u32); u32 *Array = Array_AGC_TAB_1T_8723A; hex = board; - hex += interfaceValue << 8; + hex += ODM_ITRF_USB << 8; hex += platform << 16; hex += 0xFF000000; for (i = 0; i < ArrayLen; i += 2) { @@ -234,11 +232,11 @@ void ODM_ReadAndConfig_AGC_TAB_1T_8723A(struct dm_odm_t *pDM_Odm) /* This (offset, data) pair meets the condition. */ if (v1 < 0xCDCDCDCD) { - odm_ConfigBB_AGC_8723A(pDM_Odm, v1, bMaskDWord, v2); + odm_ConfigBB_AGC_8723A(pDM_Odm, v1, v2); continue; } else { if (!CheckCondition(Array[i], hex)) { - /* Discard the following (offset, data) pairs. */ + /* Discard the following (offset, data) pairs */ READ_NEXT_PAIR(v1, v2, i); while (v2 != 0xDEAD && v2 != 0xCDEF && @@ -246,12 +244,13 @@ void ODM_ReadAndConfig_AGC_TAB_1T_8723A(struct dm_odm_t *pDM_Odm) READ_NEXT_PAIR(v1, v2, i); i -= 2; /* prevent from for-loop += 2 */ } else { - /* Configure matched pairs and skip to end of if-else. */ + /* Configure matched pairs and skip to + end of if-else. */ READ_NEXT_PAIR(v1, v2, i); while (v2 != 0xDEAD && v2 != 0xCDEF && v2 != 0xCDCD && i < ArrayLen - 2) { - odm_ConfigBB_AGC_8723A(pDM_Odm, v1, bMaskDWord, v2); + odm_ConfigBB_AGC_8723A(pDM_Odm, v1, v2); READ_NEXT_PAIR(v1, v2, i); } while (v2 != 0xDEAD && i < ArrayLen - 2) @@ -467,13 +466,12 @@ void ODM_ReadAndConfig_PHY_REG_1T_8723A(struct dm_odm_t *pDM_Odm) u32 hex = 0; u32 i = 0; u8 platform = 0x04; - u8 interfaceValue = pDM_Odm->SupportInterface; u8 board = pDM_Odm->BoardType; u32 ArrayLen = sizeof(Array_PHY_REG_1T_8723A)/sizeof(u32); u32 *Array = Array_PHY_REG_1T_8723A; hex += board; - hex += interfaceValue << 8; + hex += ODM_ITRF_USB << 8; hex += platform << 16; hex += 0xFF000000; for (i = 0; i < ArrayLen; i += 2) { @@ -482,11 +480,11 @@ void ODM_ReadAndConfig_PHY_REG_1T_8723A(struct dm_odm_t *pDM_Odm) /* This (offset, data) pair meets the condition. */ if (v1 < 0xCDCDCDCD) { - odm_ConfigBB_PHY_8723A(pDM_Odm, v1, bMaskDWord, v2); + odm_ConfigBB_PHY_8723A(pDM_Odm, v1, v2); continue; } else { if (!CheckCondition(Array[i], hex)) { - /* Discard the following (offset, data) pairs. */ + /* Discard the following (offset, data) pairs */ READ_NEXT_PAIR(v1, v2, i); while (v2 != 0xDEAD && v2 != 0xCDEF && @@ -494,12 +492,13 @@ void ODM_ReadAndConfig_PHY_REG_1T_8723A(struct dm_odm_t *pDM_Odm) READ_NEXT_PAIR(v1, v2, i); i -= 2; /* prevent from for-loop += 2 */ } else { - /* Configure matched pairs and skip to end of if-else. */ + /* Configure matched pairs and skip to + end of if-else. */ READ_NEXT_PAIR(v1, v2, i); while (v2 != 0xDEAD && v2 != 0xCDEF && v2 != 0xCDCD && i < ArrayLen - 2) { - odm_ConfigBB_PHY_8723A(pDM_Odm, v1, bMaskDWord, v2); + odm_ConfigBB_PHY_8723A(pDM_Odm, v1, v2); READ_NEXT_PAIR(v1, v2, i); } while (v2 != 0xDEAD && i < ArrayLen - 2) @@ -520,16 +519,15 @@ static u32 Array_PHY_REG_MP_8723A[] = { void ODM_ReadAndConfig_PHY_REG_MP_8723A(struct dm_odm_t *pDM_Odm) { - u32 hex = 0; - u32 i = 0; - u8 platform = 0x04; - u8 interfaceValue = pDM_Odm->SupportInterface; - u8 board = pDM_Odm->BoardType; - u32 ArrayLen = sizeof(Array_PHY_REG_MP_8723A)/sizeof(u32); - u32 *Array = Array_PHY_REG_MP_8723A; + u32 hex = 0; + u32 i; + u8 platform = 0x04; + u8 board = pDM_Odm->BoardType; + u32 ArrayLen = sizeof(Array_PHY_REG_MP_8723A)/sizeof(u32); + u32 *Array = Array_PHY_REG_MP_8723A; hex += board; - hex += interfaceValue << 8; + hex += ODM_ITRF_USB << 8; hex += platform << 16; hex += 0xFF000000; for (i = 0; i < ArrayLen; i += 2) { @@ -538,11 +536,11 @@ void ODM_ReadAndConfig_PHY_REG_MP_8723A(struct dm_odm_t *pDM_Odm) /* This (offset, data) pair meets the condition. */ if (v1 < 0xCDCDCDCD) { - odm_ConfigBB_PHY_8723A(pDM_Odm, v1, bMaskDWord, v2); + odm_ConfigBB_PHY_8723A(pDM_Odm, v1, v2); continue; } else { if (!CheckCondition(Array[i], hex)) { - /* Discard the following (offset, data) pairs. */ + /* Discard the following (offset, data) pairs */ READ_NEXT_PAIR(v1, v2, i); while (v2 != 0xDEAD && v2 != 0xCDEF && @@ -550,12 +548,13 @@ void ODM_ReadAndConfig_PHY_REG_MP_8723A(struct dm_odm_t *pDM_Odm) READ_NEXT_PAIR(v1, v2, i); i -= 2; /* prevent from for-loop += 2 */ } else { - /* Configure matched pairs and skip to end of if-else. */ + /* Configure matched pairs and skip to + end of if-else. */ READ_NEXT_PAIR(v1, v2, i); while (v2 != 0xDEAD && v2 != 0xCDEF && v2 != 0xCDCD && i < ArrayLen - 2) { - odm_ConfigBB_PHY_8723A(pDM_Odm, v1, bMaskDWord, v2); + odm_ConfigBB_PHY_8723A(pDM_Odm, v1, v2); READ_NEXT_PAIR(v1, v2, i); } while (v2 != 0xDEAD && i < ArrayLen - 2) diff --git a/drivers/staging/rtl8723au/hal/HalHWImg8723A_MAC.c b/drivers/staging/rtl8723au/hal/HalHWImg8723A_MAC.c index 12071453be97..93b2d183d694 100644 --- a/drivers/staging/rtl8723au/hal/HalHWImg8723A_MAC.c +++ b/drivers/staging/rtl8723au/hal/HalHWImg8723A_MAC.c @@ -30,12 +30,12 @@ static bool CheckCondition(const u32 Condition, const u32 Hex) return false; cond = Condition & 0x0000FF00; - cond = cond >> 8; + cond >>= 8; if ((_interface & cond) == 0 && cond != 0x07) return false; cond = Condition & 0x00FF0000; - cond = cond >> 16; + cond >>= 16; if ((_platform & cond) == 0 && cond != 0x0F) return false; return true; @@ -144,13 +144,12 @@ void ODM_ReadAndConfig_MAC_REG_8723A(struct dm_odm_t *pDM_Odm) u32 hex = 0; u32 i = 0; u8 platform = 0x04; - u8 interfaceValue = pDM_Odm->SupportInterface; u8 board = pDM_Odm->BoardType; u32 ArrayLen = sizeof(Array_MAC_REG_8723A)/sizeof(u32); u32 *Array = Array_MAC_REG_8723A; hex += board; - hex += interfaceValue << 8; + hex += ODM_ITRF_USB << 8; hex += platform << 16; hex += 0xFF000000; for (i = 0; i < ArrayLen; i += 2) { diff --git a/drivers/staging/rtl8723au/hal/HalHWImg8723A_RF.c b/drivers/staging/rtl8723au/hal/HalHWImg8723A_RF.c index 00480f5fcdab..dbf571e8b908 100644 --- a/drivers/staging/rtl8723au/hal/HalHWImg8723A_RF.c +++ b/drivers/staging/rtl8723au/hal/HalHWImg8723A_RF.c @@ -30,12 +30,12 @@ static bool CheckCondition(const u32 Condition, const u32 Hex) return false; cond = Condition & 0x0000FF00; - cond = cond >> 8; + cond >>= 8; if ((_interface & cond) == 0 && cond != 0x07) return false; cond = Condition & 0x00FF0000; - cond = cond >> 16; + cond >>= 16; if ((_platform & cond) == 0 && cond != 0x0F) return false; return true; @@ -214,13 +214,12 @@ void ODM_ReadAndConfig_RadioA_1T_8723A(struct dm_odm_t *pDM_Odm) u32 hex = 0; u32 i = 0; u8 platform = 0x04; - u8 interfaceValue = pDM_Odm->SupportInterface; u8 board = pDM_Odm->BoardType; u32 ArrayLen = sizeof(Array_RadioA_1T_8723A)/sizeof(u32); u32 *Array = Array_RadioA_1T_8723A; hex += board; - hex += interfaceValue << 8; + hex += ODM_ITRF_USB << 8; hex += platform << 16; hex += 0xFF000000; diff --git a/drivers/staging/rtl8723au/hal/HalPwrSeqCmd.c b/drivers/staging/rtl8723au/hal/HalPwrSeqCmd.c index 33777d2852f4..ae090ab11585 100644 --- a/drivers/staging/rtl8723au/hal/HalPwrSeqCmd.c +++ b/drivers/staging/rtl8723au/hal/HalPwrSeqCmd.c @@ -59,17 +59,15 @@ u8 HalPwrSeqCmdParsing23a(struct rtw_adapter *padapter, u8 CutVersion, PwrCfgCmd = PwrSeqCmd[AryIdx]; RT_TRACE(_module_hal_init_c_, _drv_info_, - ("HalPwrSeqCmdParsing23a: offset(%#x) cut_msk(%#x) " - "fab_msk(%#x) interface_msk(%#x) base(%#x) cmd(%#x) " - "msk(%#x) value(%#x)\n", - GET_PWR_CFG_OFFSET(PwrCfgCmd), - GET_PWR_CFG_CUT_MASK(PwrCfgCmd), - GET_PWR_CFG_FAB_MASK(PwrCfgCmd), - GET_PWR_CFG_INTF_MASK(PwrCfgCmd), - GET_PWR_CFG_BASE(PwrCfgCmd), - GET_PWR_CFG_CMD(PwrCfgCmd), - GET_PWR_CFG_MASK(PwrCfgCmd), - GET_PWR_CFG_VALUE(PwrCfgCmd))); + "HalPwrSeqCmdParsing23a: offset(%#x) cut_msk(%#x) fab_msk(%#x) interface_msk(%#x) base(%#x) cmd(%#x) msk(%#x) value(%#x)\n", + GET_PWR_CFG_OFFSET(PwrCfgCmd), + GET_PWR_CFG_CUT_MASK(PwrCfgCmd), + GET_PWR_CFG_FAB_MASK(PwrCfgCmd), + GET_PWR_CFG_INTF_MASK(PwrCfgCmd), + GET_PWR_CFG_BASE(PwrCfgCmd), + GET_PWR_CFG_CMD(PwrCfgCmd), + GET_PWR_CFG_MASK(PwrCfgCmd), + GET_PWR_CFG_VALUE(PwrCfgCmd)); /* 2 Only Handle the command whose FAB, CUT, and Interface are matched */ @@ -79,14 +77,12 @@ u8 HalPwrSeqCmdParsing23a(struct rtw_adapter *padapter, u8 CutVersion, switch (GET_PWR_CFG_CMD(PwrCfgCmd)) { case PWR_CMD_READ: RT_TRACE(_module_hal_init_c_, _drv_info_, - ("HalPwrSeqCmdParsing23a: " - "PWR_CMD_READ\n")); + "HalPwrSeqCmdParsing23a: PWR_CMD_READ\n"); break; case PWR_CMD_WRITE: RT_TRACE(_module_hal_init_c_, _drv_info_, - ("HalPwrSeqCmdParsing23a: " - "PWR_CMD_WRITE\n")); + "HalPwrSeqCmdParsing23a: PWR_CMD_WRITE\n"); offset = GET_PWR_CFG_OFFSET(PwrCfgCmd); /* Read the value from system register */ @@ -102,8 +98,7 @@ u8 HalPwrSeqCmdParsing23a(struct rtw_adapter *padapter, u8 CutVersion, case PWR_CMD_POLLING: RT_TRACE(_module_hal_init_c_, _drv_info_, - ("HalPwrSeqCmdParsing23a: " - "PWR_CMD_POLLING\n")); + "HalPwrSeqCmdParsing23a: PWR_CMD_POLLING\n"); bPollingBit = false; offset = GET_PWR_CFG_OFFSET(PwrCfgCmd); @@ -131,8 +126,7 @@ u8 HalPwrSeqCmdParsing23a(struct rtw_adapter *padapter, u8 CutVersion, case PWR_CMD_DELAY: RT_TRACE(_module_hal_init_c_, _drv_info_, - ("HalPwrSeqCmdParsing23a: " - "PWR_CMD_DELAY\n")); + "HalPwrSeqCmdParsing23a: PWR_CMD_DELAY\n"); if (GET_PWR_CFG_VALUE(PwrCfgCmd) == PWRSEQ_DELAY_US) udelay(GET_PWR_CFG_OFFSET(PwrCfgCmd)); @@ -145,15 +139,12 @@ u8 HalPwrSeqCmdParsing23a(struct rtw_adapter *padapter, u8 CutVersion, /* When this command is parsed, end the process */ RT_TRACE(_module_hal_init_c_, _drv_info_, - ("HalPwrSeqCmdParsing23a: " - "PWR_CMD_END\n")); + "HalPwrSeqCmdParsing23a: PWR_CMD_END\n"); return true; - break; default: RT_TRACE(_module_hal_init_c_, _drv_err_, - ("HalPwrSeqCmdParsing23a: " - "Unknown CMD!!\n")); + "HalPwrSeqCmdParsing23a: Unknown CMD!!\n"); break; } } diff --git a/drivers/staging/rtl8723au/hal/hal_com.c b/drivers/staging/rtl8723au/hal/hal_com.c index bf4cae20bd12..530db57e8842 100644 --- a/drivers/staging/rtl8723au/hal/hal_com.c +++ b/drivers/staging/rtl8723au/hal/hal_com.c @@ -22,46 +22,6 @@ #define _HAL_INIT_C_ -void dump_chip_info23a(struct hal_version ChipVersion) -{ - int cnt = 0; - u8 buf[128]; - - cnt += sprintf((buf + cnt), "Chip Version Info: CHIP_8723A_"); - - cnt += sprintf((buf + cnt), "%s_", IS_NORMAL_CHIP(ChipVersion) ? - "Normal_Chip" : "Test_Chip"); - cnt += sprintf((buf + cnt), "%s_", - IS_CHIP_VENDOR_TSMC(ChipVersion) ? "TSMC" : "UMC"); - if (IS_A_CUT(ChipVersion)) - cnt += sprintf((buf + cnt), "A_CUT_"); - else if (IS_B_CUT(ChipVersion)) - cnt += sprintf((buf + cnt), "B_CUT_"); - else if (IS_C_CUT(ChipVersion)) - cnt += sprintf((buf + cnt), "C_CUT_"); - else if (IS_D_CUT(ChipVersion)) - cnt += sprintf((buf + cnt), "D_CUT_"); - else if (IS_E_CUT(ChipVersion)) - cnt += sprintf((buf + cnt), "E_CUT_"); - else - cnt += sprintf((buf + cnt), "UNKNOWN_CUT(%d)_", - ChipVersion.CUTVersion); - - if (IS_1T1R(ChipVersion)) - cnt += sprintf((buf + cnt), "1T1R_"); - else if (IS_1T2R(ChipVersion)) - cnt += sprintf((buf + cnt), "1T2R_"); - else if (IS_2T2R(ChipVersion)) - cnt += sprintf((buf + cnt), "2T2R_"); - else - cnt += sprintf((buf + cnt), "UNKNOWN_RFTYPE(%d)_", - ChipVersion.RFType); - - cnt += sprintf((buf + cnt), "RomVer(%d)\n", ChipVersion.ROMVer); - - DBG_8723A("%s", buf); -} - #define EEPROM_CHANNEL_PLAN_BY_HW_MASK 0x80 /* return the final channel plan decision */ @@ -231,13 +191,11 @@ void HalSetBrateCfg23a(struct rtw_adapter *padapter, u8 *mBratesOS) rate_index = 0; /* Set RTS initial rate */ while (brate_cfg > 0x1) { - brate_cfg = (brate_cfg >> 1); + brate_cfg >>= 1; rate_index++; } /* Ziv - Check */ rtl8723au_write8(padapter, REG_INIRTS_RATE_SEL, rate_index); - - return; } static void _OneOutPipeMapping(struct rtw_adapter *pAdapter) @@ -437,9 +395,6 @@ rtl8723a_set_ampdu_min_space(struct rtw_adapter *padapter, u8 MinSpacingToSet) if (MinSpacingToSet < SecMinSpace) MinSpacingToSet = SecMinSpace; - /* RT_TRACE(COMP_MLME, DBG_LOUD, - ("Set HW_VAR_AMPDU_MIN_SPACE: %#x\n", - padapter->MgntInfo.MinSpaceCfg)); */ MinSpacingToSet |= rtl8723au_read8(padapter, REG_AMPDU_MIN_SPACE) & 0xf8; rtl8723au_write8(padapter, REG_AMPDU_MIN_SPACE, @@ -479,9 +434,6 @@ void rtl8723a_set_ampdu_factor(struct rtw_adapter *padapter, u8 FactorToSet) rtl8723au_write8(padapter, REG_AGGLEN_LMT + index, pRegToSet[index]); } - - /* RT_TRACE(COMP_MLME, DBG_LOUD, - ("Set HW_VAR_AMPDU_FACTOR: %#x\n", FactorToSet)); */ } } @@ -666,14 +618,8 @@ void rtl8723a_cam_empty_entry(struct rtw_adapter *padapter, u8 ucIndex) /* write content 0 is equall to mark invalid */ /* delay_ms(40); */ rtl8723au_write32(padapter, WCAMI, ulContent); - /* RT_TRACE(COMP_SEC, DBG_LOUD, - ("rtl8723a_cam_empty_entry(): WRITE A4: %lx\n", - ulContent));*/ /* delay_ms(40); */ rtl8723au_write32(padapter, REG_CAMCMD, ulCommand); - /* RT_TRACE(COMP_SEC, DBG_LOUD, - ("rtl8723a_cam_empty_entry(): WRITE A0: %lx\n", - ulCommand));*/ } } diff --git a/drivers/staging/rtl8723au/hal/odm.c b/drivers/staging/rtl8723au/hal/odm.c index 5269b46445f4..ec543cfe1b45 100644 --- a/drivers/staging/rtl8723au/hal/odm.c +++ b/drivers/staging/rtl8723au/hal/odm.c @@ -189,25 +189,16 @@ void odm_DynamicBBPowerSaving23a(struct dm_odm_t *pDM_Odm); /* END---------BB POWER SAVE----------------------- */ -void odm_RefreshRateAdaptiveMask23aCE23a(struct dm_odm_t *pDM_Odm); - void odm_DynamicTxPower23aInit(struct dm_odm_t *pDM_Odm); -void odm_RSSIMonitorCheck23aCE(struct dm_odm_t *pDM_Odm); -void odm_RSSIMonitorCheck23a(struct dm_odm_t *pDM_Odm); +static void odm_RSSIMonitorCheck(struct dm_odm_t *pDM_Odm); void odm_DynamicTxPower23a(struct dm_odm_t *pDM_Odm); -void odm_RefreshRateAdaptiveMask23a(struct dm_odm_t *pDM_Odm); - -void ODM_TXPowerTrackingCheck23a(struct dm_odm_t *pDM_Odm); +static void odm_RefreshRateAdaptiveMask(struct dm_odm_t *pDM_Odm); void odm_RateAdaptiveMaskInit23a(struct dm_odm_t *pDM_Odm); -void odm_TXPowerTrackingThermalMeterInit23a(struct dm_odm_t *pDM_Odm); - -void odm_TXPowerTrackingInit23a(struct dm_odm_t *pDM_Odm); - -void odm_TXPowerTrackingCheckCE23a(struct dm_odm_t *pDM_Odm); +static void odm_TXPowerTrackingInit(struct dm_odm_t *pDM_Odm); static void odm_EdcaTurboCheck23a(struct dm_odm_t *pDM_Odm); static void ODM_EdcaTurboInit23a(struct dm_odm_t *pDM_Odm); @@ -216,16 +207,16 @@ static void ODM_EdcaTurboInit23a(struct dm_odm_t *pDM_Odm); #define RxDefaultAnt2 0x569a bool odm_StaDefAntSel(struct dm_odm_t *pDM_Odm, - u32 OFDM_Ant1_Cnt, - u32 OFDM_Ant2_Cnt, - u32 CCK_Ant1_Cnt, - u32 CCK_Ant2_Cnt, - u8 *pDefAnt + u32 OFDM_Ant1_Cnt, + u32 OFDM_Ant2_Cnt, + u32 CCK_Ant1_Cnt, + u32 CCK_Ant2_Cnt, + u8 *pDefAnt ); void odm_SetRxIdleAnt(struct dm_odm_t *pDM_Odm, u8 Ant, - bool bDualPath + bool bDualPath ); /* 3 Export Interface */ @@ -241,7 +232,7 @@ void ODM23a_DMInit(struct dm_odm_t *pDM_Odm) odm23a_DynBBPSInit(pDM_Odm); odm_DynamicTxPower23aInit(pDM_Odm); - odm_TXPowerTrackingInit23a(pDM_Odm); + odm_TXPowerTrackingInit(pDM_Odm); ODM_EdcaTurboInit23a(pDM_Odm); } @@ -258,7 +249,7 @@ void ODM_DMWatchdog23a(struct rtw_adapter *adapter) odm_CmnInfoUpdate_Debug23a(pDM_Odm); odm_CommonInfoSelfUpdate(pHalData); odm_FalseAlarmCounterStatistics23a(pDM_Odm); - odm_RSSIMonitorCheck23a(pDM_Odm); + odm_RSSIMonitorCheck(pDM_Odm); /* 8723A or 8189ES platform */ /* NeilChen--2012--08--24-- */ @@ -277,14 +268,11 @@ void ODM_DMWatchdog23a(struct rtw_adapter *adapter) if (pwrctrlpriv->bpower_saving) return; - odm_RefreshRateAdaptiveMask23a(pDM_Odm); + odm_RefreshRateAdaptiveMask(pDM_Odm); odm_DynamicBBPowerSaving23a(pDM_Odm); - ODM_TXPowerTrackingCheck23a(pDM_Odm); odm_EdcaTurboCheck23a(pDM_Odm); - - odm_dtc(pDM_Odm); } /* */ @@ -302,11 +290,6 @@ void ODM_CmnInfoInit23a(struct dm_odm_t *pDM_Odm, /* */ switch (CmnInfo) { /* Fixed ODM value. */ - case ODM_CMNINFO_PLATFORM: - break; - case ODM_CMNINFO_INTERFACE: - pDM_Odm->SupportInterface = (u8)Value; - break; case ODM_CMNINFO_MP_TEST_CHIP: pDM_Odm->bIsMPChip = (u8)Value; break; @@ -319,9 +302,6 @@ void ODM_CmnInfoInit23a(struct dm_odm_t *pDM_Odm, case ODM_CMNINFO_FAB_VER: pDM_Odm->FabVersion = (u8)Value; break; - case ODM_CMNINFO_RF_TYPE: - pDM_Odm->RFType = (u8)Value; - break; case ODM_CMNINFO_BOARD_TYPE: pDM_Odm->BoardType = (u8)Value; break; @@ -334,9 +314,6 @@ void ODM_CmnInfoInit23a(struct dm_odm_t *pDM_Odm, case ODM_CMNINFO_EXT_TRSW: pDM_Odm->ExtTRSW = (u8)Value; break; - case ODM_CMNINFO_PATCH_ID: - pDM_Odm->PatchID = (u8)Value; - break; case ODM_CMNINFO_BINHCT_TEST: pDM_Odm->bInHctTest = (bool)Value; break; @@ -351,15 +328,6 @@ void ODM_CmnInfoInit23a(struct dm_odm_t *pDM_Odm, /* do nothing */ break; } - - /* */ - /* Tx power tracking BB swing table. */ - /* The base index = 12. +((12-n)/2)dB 13~?? = decrease tx pwr by -((n-12)/2)dB */ - /* */ - pDM_Odm->BbSwingIdxOfdm = 12; /* Set defalut value as index 12. */ - pDM_Odm->BbSwingIdxOfdmCurrent = 12; - pDM_Odm->BbSwingFlagOfdm = false; - } void ODM_CmnInfoPtrArrayHook23a(struct dm_odm_t *pDM_Odm, enum odm_cmninfo CmnInfo, @@ -383,9 +351,6 @@ void ODM_CmnInfoUpdate23a(struct dm_odm_t *pDM_Odm, u32 CmnInfo, u64 Value) { /* This init variable may be changed in run time. */ switch (CmnInfo) { - case ODM_CMNINFO_RF_TYPE: - pDM_Odm->RFType = (u8)Value; - break; case ODM_CMNINFO_WIFI_DIRECT: pDM_Odm->bWIFI_Direct = (bool)Value; break; @@ -414,13 +379,18 @@ void ODM_CmnInfoUpdate23a(struct dm_odm_t *pDM_Odm, u32 CmnInfo, u64 Value) } -void odm_CommonInfoSelfInit23a(struct dm_odm_t *pDM_Odm - ) +void odm_CommonInfoSelfInit23a(struct dm_odm_t *pDM_Odm) { - pDM_Odm->bCckHighPower = - (bool) ODM_GetBBReg(pDM_Odm, rFPGA0_XA_HSSIParameter2, BIT(9)); + u32 val32; + + val32 = rtl8723au_read32(pDM_Odm->Adapter, rFPGA0_XA_HSSIParameter2); + if (val32 & BIT(9)) + pDM_Odm->bCckHighPower = true; + else + pDM_Odm->bCckHighPower = false; + pDM_Odm->RFPathRxEnable = - (u8) ODM_GetBBReg(pDM_Odm, rOFDM0_TRxPathEnable, 0x0F); + rtl8723au_read32(pDM_Odm->Adapter, rOFDM0_TRxPathEnable) & 0x0F; ODM_InitDebugSetting23a(pDM_Odm); } @@ -432,15 +402,6 @@ static void odm_CommonInfoSelfUpdate(struct hal_data_8723a *pHalData) u8 EntryCnt = 0; u8 i; - if (pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_40) { - if (pHalData->nCur40MhzPrimeSC == 1) - pDM_Odm->ControlChannel = pHalData->CurrentChannel - 2; - else if (pHalData->nCur40MhzPrimeSC == 2) - pDM_Odm->ControlChannel = pHalData->CurrentChannel + 2; - } else { - pDM_Odm->ControlChannel = pHalData->CurrentChannel; - } - for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) { pEntry = pDM_Odm->pODM_StaInfo[i]; if (pEntry) @@ -456,16 +417,13 @@ void odm_CmnInfoInit_Debug23a(struct dm_odm_t *pDM_Odm) { ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("odm_CmnInfoInit_Debug23a ==>\n")); ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("SupportAbility = 0x%x\n", pDM_Odm->SupportAbility)); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("SupportInterface =%d\n", pDM_Odm->SupportInterface)); ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("SupportICType = 0x%x\n", pDM_Odm->SupportICType)); ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("CutVersion =%d\n", pDM_Odm->CutVersion)); ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("FabVersion =%d\n", pDM_Odm->FabVersion)); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("RFType =%d\n", pDM_Odm->RFType)); ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("BoardType =%d\n", pDM_Odm->BoardType)); ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("ExtLNA =%d\n", pDM_Odm->ExtLNA)); ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("ExtPA =%d\n", pDM_Odm->ExtPA)); ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("ExtTRSW =%d\n", pDM_Odm->ExtTRSW)); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("PatchID =%d\n", pDM_Odm->PatchID)); ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("bInHctTest =%d\n", pDM_Odm->bInHctTest)); ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("bWIFITest =%d\n", pDM_Odm->bWIFITest)); ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("bDualMacSmartConcurrent =%d\n", pDM_Odm->bDualMacSmartConcurrent)); @@ -481,18 +439,19 @@ void odm_CmnInfoUpdate_Debug23a(struct dm_odm_t *pDM_Odm) ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("RSSI_Min =%d\n", pDM_Odm->RSSI_Min)); } -void ODM_Write_DIG23a(struct dm_odm_t *pDM_Odm, - u8 CurrentIGI - ) +void ODM_Write_DIG23a(struct dm_odm_t *pDM_Odm, u8 CurrentIGI) { + struct rtw_adapter *adapter = pDM_Odm->Adapter; struct dig_t *pDM_DigTable = &pDM_Odm->DM_DigTable; - - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("ODM_REG(IGI_A, pDM_Odm) = 0x%x, ODM_BIT(IGI, pDM_Odm) = 0x%x \n", - ODM_REG(IGI_A, pDM_Odm), ODM_BIT(IGI, pDM_Odm))); + u32 val32; if (pDM_DigTable->CurIGValue != CurrentIGI) { - ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_A, pDM_Odm), ODM_BIT(IGI, pDM_Odm), CurrentIGI); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("CurrentIGI(0x%02x). \n", CurrentIGI)); + val32 = rtl8723au_read32(adapter, ODM_REG_IGI_A_11N); + val32 &= ~ODM_BIT_IGI_11N; + val32 |= CurrentIGI; + rtl8723au_write32(adapter, ODM_REG_IGI_A_11N, val32); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, + ("CurrentIGI(0x%02x). \n", CurrentIGI)); pDM_DigTable->CurIGValue = CurrentIGI; } ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, @@ -515,11 +474,10 @@ void odm_DIG23abyRSSI_LPS(struct dm_odm_t *pDM_Odm) CurrentIGI = CurrentIGI+RSSI_OFFSET_DIG; bFwCurrentInPSMode = pAdapter->pwrctrlpriv.bFwCurrentInPSMode; - /* ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG_LPS, ODM_DBG_LOUD, ("odm_DIG23a() ==>\n")); */ - /* Using FW PS mode to make IGI */ if (bFwCurrentInPSMode) { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("---Neil---odm_DIG23a is in LPS mode\n")); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, + ("---Neil---odm_DIG23a is in LPS mode\n")); /* Adjust by FA in LPS MODE */ if (pFalseAlmCnt->Cnt_all > DM_DIG_FA_TH2_LPS) CurrentIGI = CurrentIGI+2; @@ -545,15 +503,17 @@ void odm_DIG23abyRSSI_LPS(struct dm_odm_t *pDM_Odm) else if (CurrentIGI < RSSI_Lower) CurrentIGI = RSSI_Lower; - ODM_Write_DIG23a(pDM_Odm, CurrentIGI);/* ODM_Write_DIG23a(pDM_Odm, pDM_DigTable->CurIGValue); */ - + ODM_Write_DIG23a(pDM_Odm, CurrentIGI); } void odm_DIG23aInit(struct dm_odm_t *pDM_Odm) { struct dig_t *pDM_DigTable = &pDM_Odm->DM_DigTable; + u32 val32; + + val32 = rtl8723au_read32(pDM_Odm->Adapter, ODM_REG_IGI_A_11N); + pDM_DigTable->CurIGValue = val32 & ODM_BIT_IGI_11N; - pDM_DigTable->CurIGValue = (u8) ODM_GetBBReg(pDM_Odm, ODM_REG(IGI_A, pDM_Odm), ODM_BIT(IGI, pDM_Odm)); pDM_DigTable->RssiLowThresh = DM_DIG_THRESH_LOW; pDM_DigTable->RssiHighThresh = DM_DIG_THRESH_HIGH; pDM_DigTable->FALowThresh = DM_FALSEALARM_THRESH_LOW; @@ -591,26 +551,22 @@ void odm_DIG23a(struct rtw_adapter *adapter) u8 dm_dig_max, dm_dig_min; u8 CurrentIGI = pDM_DigTable->CurIGValue; - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG23a() ==>\n")); - /* if (!(pDM_Odm->SupportAbility & (ODM_BB_DIG|ODM_BB_FA_CNT))) */ - if ((!(pDM_Odm->SupportAbility&ODM_BB_DIG)) || (!(pDM_Odm->SupportAbility&ODM_BB_FA_CNT))) { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, - ("odm_DIG23a() Return: SupportAbility ODM_BB_DIG or ODM_BB_FA_CNT is disabled\n")); - return; - } - + ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, + ("odm_DIG23a() ==>\n")); if (adapter->mlmepriv.bScanInProcess) { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG23a() Return: In Scan Progress \n")); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, + ("odm_DIG23a() Return: In Scan Progress \n")); return; } DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_0; FirstConnect = (pDM_Odm->bLinked) && (!pDM_DigTable->bMediaConnect_0); - FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0); + FirstDisConnect = (!pDM_Odm->bLinked) && + (pDM_DigTable->bMediaConnect_0); /* 1 Boundary Decision */ if ((pDM_Odm->SupportICType & ODM_RTL8723A) && - ((pDM_Odm->BoardType == ODM_BOARD_HIGHPWR) || pDM_Odm->ExtLNA)) { + (pDM_Odm->BoardType == ODM_BOARD_HIGHPWR || pDM_Odm->ExtLNA)) { dm_dig_max = DM_DIG_MAX_NIC_HP; dm_dig_min = DM_DIG_MIN_NIC_HP; DIG_MaxOfMin = DM_DIG_MAX_AP_HP; @@ -764,31 +720,29 @@ void odm_DIG23a(struct rtw_adapter *adapter) void odm_FalseAlarmCounterStatistics23a(struct dm_odm_t *pDM_Odm) { - u32 ret_value; + struct rtw_adapter *adapter = pDM_Odm->Adapter; struct false_alarm_stats *FalseAlmCnt = &pDM_Odm->FalseAlmCnt; - - if (!(pDM_Odm->SupportAbility & ODM_BB_FA_CNT)) - return; + u32 ret_value, val32; /* hold ofdm counter */ - /* hold page C counter */ - ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_HOLDC_11N, BIT(31), 1); + /* hold page C counter */ + val32 = rtl8723au_read32(adapter, ODM_REG_OFDM_FA_HOLDC_11N); + val32 |= BIT(31); + rtl8723au_write32(adapter, ODM_REG_OFDM_FA_HOLDC_11N, val32); /* hold page D counter */ - ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTD_11N, BIT(31), 1); - ret_value = - ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_TYPE1_11N, bMaskDWord); + val32 = rtl8723au_read32(adapter, ODM_REG_OFDM_FA_RSTD_11N); + val32 |= BIT(31); + rtl8723au_write32(adapter, ODM_REG_OFDM_FA_RSTD_11N, val32); + ret_value = rtl8723au_read32(adapter, ODM_REG_OFDM_FA_TYPE1_11N); FalseAlmCnt->Cnt_Fast_Fsync = (ret_value&0xffff); - FalseAlmCnt->Cnt_SB_Search_fail = ((ret_value&0xffff0000)>>16); - ret_value = - ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_TYPE2_11N, bMaskDWord); + FalseAlmCnt->Cnt_SB_Search_fail = (ret_value & 0xffff0000)>>16; + ret_value = rtl8723au_read32(adapter, ODM_REG_OFDM_FA_TYPE2_11N); FalseAlmCnt->Cnt_OFDM_CCA = (ret_value&0xffff); - FalseAlmCnt->Cnt_Parity_Fail = ((ret_value&0xffff0000)>>16); - ret_value = - ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_TYPE3_11N, bMaskDWord); + FalseAlmCnt->Cnt_Parity_Fail = (ret_value & 0xffff0000)>>16; + ret_value = rtl8723au_read32(adapter, ODM_REG_OFDM_FA_TYPE3_11N); FalseAlmCnt->Cnt_Rate_Illegal = (ret_value&0xffff); - FalseAlmCnt->Cnt_Crc8_fail = ((ret_value&0xffff0000)>>16); - ret_value = - ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_TYPE4_11N, bMaskDWord); + FalseAlmCnt->Cnt_Crc8_fail = (ret_value & 0xffff0000)>>16; + ret_value = rtl8723au_read32(adapter, ODM_REG_OFDM_FA_TYPE4_11N); FalseAlmCnt->Cnt_Mcs_fail = (ret_value&0xffff); FalseAlmCnt->Cnt_Ofdm_fail = FalseAlmCnt->Cnt_Parity_Fail + @@ -798,15 +752,16 @@ void odm_FalseAlarmCounterStatistics23a(struct dm_odm_t *pDM_Odm) FalseAlmCnt->Cnt_Fast_Fsync + FalseAlmCnt->Cnt_SB_Search_fail; /* hold cck counter */ - ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT(12), 1); - ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT(14), 1); + val32 = rtl8723au_read32(adapter, ODM_REG_CCK_FA_RST_11N); + val32 |= (BIT(12) | BIT(14)); + rtl8723au_write32(adapter, ODM_REG_CCK_FA_RST_11N, val32); - ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_CCK_FA_LSB_11N, bMaskByte0); + ret_value = rtl8723au_read32(adapter, ODM_REG_CCK_FA_LSB_11N) & 0xff; FalseAlmCnt->Cnt_Cck_fail = ret_value; - ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_CCK_FA_MSB_11N, bMaskByte3); - FalseAlmCnt->Cnt_Cck_fail += (ret_value & 0xff) << 8; + ret_value = rtl8723au_read32(adapter, ODM_REG_CCK_FA_MSB_11N) >> 16; + FalseAlmCnt->Cnt_Cck_fail += (ret_value & 0xff00); - ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_CCK_CCA_CNT_11N, bMaskDWord); + ret_value = rtl8723au_read32(adapter, ODM_REG_CCK_CCA_CNT_11N); FalseAlmCnt->Cnt_CCK_CCA = ((ret_value&0xFF)<<8) | ((ret_value&0xFF00)>>8); @@ -823,26 +778,39 @@ void odm_FalseAlarmCounterStatistics23a(struct dm_odm_t *pDM_Odm) if (pDM_Odm->SupportICType >= ODM_RTL8723A) { /* reset false alarm counter registers */ - ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTC_11N, BIT(31), 1); - ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTC_11N, BIT(31), 0); - ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTD_11N, BIT(27), 1); - ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTD_11N, BIT(27), 0); + val32 = rtl8723au_read32(adapter, ODM_REG_OFDM_FA_RSTC_11N); + val32 |= BIT(31); + rtl8723au_write32(adapter, ODM_REG_OFDM_FA_RSTC_11N, val32); + val32 = rtl8723au_read32(adapter, ODM_REG_OFDM_FA_RSTC_11N); + val32 &= ~BIT(31); + rtl8723au_write32(adapter, ODM_REG_OFDM_FA_RSTC_11N, val32); + + val32 = rtl8723au_read32(adapter, ODM_REG_OFDM_FA_RSTD_11N); + val32 |= BIT(27); + rtl8723au_write32(adapter, ODM_REG_OFDM_FA_RSTD_11N, val32); + val32 = rtl8723au_read32(adapter, ODM_REG_OFDM_FA_RSTD_11N); + val32 &= ~BIT(27); + rtl8723au_write32(adapter, ODM_REG_OFDM_FA_RSTD_11N, val32); + /* update ofdm counter */ /* update page C counter */ - ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_HOLDC_11N, BIT(31), 0); + val32 = rtl8723au_read32(adapter, ODM_REG_OFDM_FA_HOLDC_11N); + val32 &= ~BIT(31); + rtl8723au_write32(adapter, ODM_REG_OFDM_FA_HOLDC_11N, val32); + /* update page D counter */ - ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTD_11N, BIT(31), 0); + val32 = rtl8723au_read32(adapter, ODM_REG_OFDM_FA_RSTD_11N); + val32 &= ~BIT(31); + rtl8723au_write32(adapter, ODM_REG_OFDM_FA_RSTD_11N, val32); /* reset CCK CCA counter */ - ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, - BIT(13) | BIT(12), 0); - ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, - BIT(13) | BIT(12), 2); - /* reset CCK FA counter */ - ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, - BIT(15) | BIT(14), 0); - ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, - BIT(15) | BIT(14), 2); + val32 = rtl8723au_read32(adapter, ODM_REG_CCK_FA_RST_11N); + val32 &= ~(BIT(12) | BIT(13) | BIT(14) | BIT(15)); + rtl8723au_write32(adapter, ODM_REG_CCK_FA_RST_11N, val32); + + val32 = rtl8723au_read32(adapter, ODM_REG_CCK_FA_RST_11N); + val32 |= (BIT(13) | BIT(15)); + rtl8723au_write32(adapter, ODM_REG_CCK_FA_RST_11N, val32); } ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, @@ -859,9 +827,12 @@ void odm_FalseAlarmCounterStatistics23a(struct dm_odm_t *pDM_Odm) ("Cnt_Crc8_fail =%d, Cnt_Mcs_fail =%d\n", FalseAlmCnt->Cnt_Crc8_fail, FalseAlmCnt->Cnt_Mcs_fail)); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Cnt_Cck_fail =%d\n", FalseAlmCnt->Cnt_Cck_fail)); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Cnt_Ofdm_fail =%d\n", FalseAlmCnt->Cnt_Ofdm_fail)); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Total False Alarm =%d\n", FalseAlmCnt->Cnt_all)); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, + ("Cnt_Cck_fail =%d\n", FalseAlmCnt->Cnt_Cck_fail)); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, + ("Cnt_Ofdm_fail =%d\n", FalseAlmCnt->Cnt_Ofdm_fail)); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, + ("Total False Alarm =%d\n", FalseAlmCnt->Cnt_all)); } /* 3 ============================================================ */ @@ -873,16 +844,13 @@ void odm_CCKPacketDetectionThresh23a(struct dm_odm_t *pDM_Odm) struct false_alarm_stats *FalseAlmCnt = &pDM_Odm->FalseAlmCnt; u8 CurCCK_CCAThres; - if (!(pDM_Odm->SupportAbility & (ODM_BB_CCK_PD|ODM_BB_FA_CNT))) - return; - if (pDM_Odm->ExtLNA) return; if (pDM_Odm->bLinked) { if (pDM_Odm->RSSI_Min > 25) { CurCCK_CCAThres = 0xcd; - } else if ((pDM_Odm->RSSI_Min <= 25) && (pDM_Odm->RSSI_Min > 10)) { + } else if (pDM_Odm->RSSI_Min <= 25 && pDM_Odm->RSSI_Min > 10) { CurCCK_CCAThres = 0x83; } else { if (FalseAlmCnt->Cnt_Cck_fail > 1000) @@ -905,10 +873,10 @@ void ODM_Write_CCK_CCA_Thres23a(struct dm_odm_t *pDM_Odm, u8 CurCCK_CCAThres) struct dig_t *pDM_DigTable = &pDM_Odm->DM_DigTable; if (pDM_DigTable->CurCCK_CCAThres != CurCCK_CCAThres) - ODM_Write1Byte(pDM_Odm, ODM_REG(CCK_CCA, pDM_Odm), CurCCK_CCAThres); + rtl8723au_write8(pDM_Odm->Adapter, ODM_REG(CCK_CCA, pDM_Odm), + CurCCK_CCAThres); pDM_DigTable->PreCCK_CCAThres = pDM_DigTable->CurCCK_CCAThres; pDM_DigTable->CurCCK_CCAThres = CurCCK_CCAThres; - } /* 3 ============================================================ */ @@ -934,20 +902,19 @@ void odm_DynamicBBPowerSaving23a(struct dm_odm_t *pDM_Odm) void ODM_RF_Saving23a(struct dm_odm_t *pDM_Odm, u8 bForceInNormal) { struct dynamic_pwr_sav *pDM_PSTable = &pDM_Odm->DM_PSTable; + struct rtw_adapter *adapter = pDM_Odm->Adapter; + u32 val32; u8 Rssi_Up_bound = 30; u8 Rssi_Low_bound = 25; - if (pDM_Odm->PatchID == 40) { /* RT_CID_819x_FUNAI_TV */ - Rssi_Up_bound = 50; - Rssi_Low_bound = 45; - } if (pDM_PSTable->initialize == 0) { - pDM_PSTable->Reg874 = (ODM_GetBBReg(pDM_Odm, 0x874, bMaskDWord)&0x1CC000)>>14; + pDM_PSTable->Reg874 = + rtl8723au_read32(adapter, 0x874) & 0x1CC000; pDM_PSTable->RegC70 = - (ODM_GetBBReg(pDM_Odm, 0xc70, bMaskDWord) & BIT(3)) >>3; - pDM_PSTable->Reg85C = (ODM_GetBBReg(pDM_Odm, 0x85c, bMaskDWord)&0xFF000000)>>24; - pDM_PSTable->RegA74 = (ODM_GetBBReg(pDM_Odm, 0xa74, bMaskDWord)&0xF000)>>12; - /* Reg818 = PHY_QueryBBReg(pAdapter, 0x818, bMaskDWord); */ + rtl8723au_read32(adapter, 0xc70) & BIT(3); + pDM_PSTable->Reg85C = + rtl8723au_read32(adapter, 0x85c) & 0xFF000000; + pDM_PSTable->RegA74 = rtl8723au_read32(adapter, 0xa74) & 0xF000; pDM_PSTable->initialize = 1; } @@ -973,26 +940,74 @@ void ODM_RF_Saving23a(struct dm_odm_t *pDM_Odm, u8 bForceInNormal) if (pDM_PSTable->PreRFState != pDM_PSTable->CurRFState) { if (pDM_PSTable->CurRFState == RF_Save) { - /* <tynli_note> 8723 RSSI report will be wrong. Set 0x874[5]= 1 when enter BB power saving mode. */ + /* <tynli_note> 8723 RSSI report will be wrong. + * Set 0x874[5]= 1 when enter BB power saving mode. */ /* Suggested by SD3 Yu-Nan. 2011.01.20. */ - if (pDM_Odm->SupportICType == ODM_RTL8723A) - ODM_SetBBReg(pDM_Odm, 0x874, BIT(5), 0x1); /* Reg874[5]= 1b'1 */ - ODM_SetBBReg(pDM_Odm, 0x874, 0x1C0000, 0x2); /* Reg874[20:18]= 3'b010 */ - ODM_SetBBReg(pDM_Odm, 0xc70, BIT(3), 0); /* RegC70[3]= 1'b0 */ - ODM_SetBBReg(pDM_Odm, 0x85c, 0xFF000000, 0x63); /* Reg85C[31:24]= 0x63 */ - ODM_SetBBReg(pDM_Odm, 0x874, 0xC000, 0x2); /* Reg874[15:14]= 2'b10 */ - ODM_SetBBReg(pDM_Odm, 0xa74, 0xF000, 0x3); /* RegA75[7:4]= 0x3 */ - ODM_SetBBReg(pDM_Odm, 0x818, BIT(28), 0x0); /* Reg818[28]= 1'b0 */ - ODM_SetBBReg(pDM_Odm, 0x818, BIT(28), 0x1); /* Reg818[28]= 1'b1 */ + /* Reg874[5]= 1b'1 */ + if (pDM_Odm->SupportICType == ODM_RTL8723A) { + val32 = rtl8723au_read32(adapter, 0x874); + val32 |= BIT(5); + rtl8723au_write32(adapter, 0x874, val32); + } + /* Reg874[20:18]= 3'b010 */ + val32 = rtl8723au_read32(adapter, 0x874); + val32 &= ~(BIT(18) | BIT(20)); + val32 |= BIT(19); + rtl8723au_write32(adapter, 0x874, val32); + /* RegC70[3]= 1'b0 */ + val32 = rtl8723au_read32(adapter, 0xc70); + val32 &= ~BIT(3); + rtl8723au_write32(adapter, 0xc70, val32); + /* Reg85C[31:24]= 0x63 */ + val32 = rtl8723au_read32(adapter, 0x85c); + val32 &= 0x00ffffff; + val32 |= 0x63000000; + rtl8723au_write32(adapter, 0x85c, val32); + /* Reg874[15:14]= 2'b10 */ + val32 = rtl8723au_read32(adapter, 0x874); + val32 &= ~BIT(14); + val32 |= BIT(15); + rtl8723au_write32(adapter, 0x874, val32); + /* RegA75[7:4]= 0x3 */ + val32 = rtl8723au_read32(adapter, 0xa74); + val32 &= ~(BIT(14) | BIT(15)); + val32 |= (BIT(12) | BIT(13)); + rtl8723au_write32(adapter, 0xa74, val32); + /* Reg818[28]= 1'b0 */ + val32 = rtl8723au_read32(adapter, 0x818); + val32 &= ~BIT(28); + rtl8723au_write32(adapter, 0x818, val32); + /* Reg818[28]= 1'b1 */ + val32 = rtl8723au_read32(adapter, 0x818); + val32 |= BIT(28); + rtl8723au_write32(adapter, 0x818, val32); } else { - ODM_SetBBReg(pDM_Odm, 0x874, 0x1CC000, pDM_PSTable->Reg874); - ODM_SetBBReg(pDM_Odm, 0xc70, BIT(3), pDM_PSTable->RegC70); - ODM_SetBBReg(pDM_Odm, 0x85c, 0xFF000000, pDM_PSTable->Reg85C); - ODM_SetBBReg(pDM_Odm, 0xa74, 0xF000, pDM_PSTable->RegA74); - ODM_SetBBReg(pDM_Odm, 0x818, BIT(28), 0x0); - - if (pDM_Odm->SupportICType == ODM_RTL8723A) - ODM_SetBBReg(pDM_Odm, 0x874, BIT(5), 0x0); /* Reg874[5]= 1b'0 */ + val32 = rtl8723au_read32(adapter, 0x874); + val32 |= pDM_PSTable->Reg874; + rtl8723au_write32(adapter, 0x874, val32); + + val32 = rtl8723au_read32(adapter, 0xc70); + val32 |= pDM_PSTable->RegC70; + rtl8723au_write32(adapter, 0xc70, val32); + + val32 = rtl8723au_read32(adapter, 0x85c); + val32 |= pDM_PSTable->Reg85C; + rtl8723au_write32(adapter, 0x85c, val32); + + val32 = rtl8723au_read32(adapter, 0xa74); + val32 |= pDM_PSTable->RegA74; + rtl8723au_write32(adapter, 0xa74, val32); + + val32 = rtl8723au_read32(adapter, 0x818); + val32 &= ~BIT(28); + rtl8723au_write32(adapter, 0x818, val32); + + /* Reg874[5]= 1b'0 */ + if (pDM_Odm->SupportICType == ODM_RTL8723A) { + val32 = rtl8723au_read32(adapter, 0x874); + val32 &= ~BIT(5); + rtl8723au_write32(adapter, 0x874, val32); + } } pDM_PSTable->PreRFState = pDM_PSTable->CurRFState; } @@ -1010,10 +1025,6 @@ void odm_RateAdaptiveMaskInit23a(struct dm_odm_t *pDM_Odm) struct odm_rate_adapt *pOdmRA = &pDM_Odm->RateAdaptive; pOdmRA->Type = DM_Type_ByDriver; - if (pOdmRA->Type == DM_Type_ByDriver) - pDM_Odm->bUseRAMask = true; - else - pDM_Odm->bUseRAMask = false; pOdmRA->RATRState = DM_RATR_STA_INIT; pOdmRA->HighRSSIThresh = 50; @@ -1057,7 +1068,8 @@ u32 ODM_Get_Rate_Bitmap23a(struct hal_data_8723a *pHalData, u32 macid, break; case (ODM_WM_B|ODM_WM_G|ODM_WM_N24G): case (ODM_WM_A|ODM_WM_B|ODM_WM_G|ODM_WM_N24G): - if (pDM_Odm->RFType == ODM_1T2R || pDM_Odm->RFType == ODM_1T1R) { + if (pHalData->rf_type == RF_1T2R || + pHalData->rf_type == RF_1T1R) { if (rssi_level == DM_RATR_STA_HIGH) { rate_bitmap = 0x000f0000; } else if (rssi_level == DM_RATR_STA_MIDDLE) { @@ -1086,22 +1098,22 @@ u32 ODM_Get_Rate_Bitmap23a(struct hal_data_8723a *pHalData, u32 macid, default: /* case WIRELESS_11_24N: */ /* case WIRELESS_11_5N: */ - if (pDM_Odm->RFType == RF_1T2R) + if (pHalData->rf_type == RF_1T2R) rate_bitmap = 0x000fffff; else rate_bitmap = 0x0fffffff; break; } - /* printk("%s ==> rssi_level:0x%02x, WirelessMode:0x%02x, rate_bitmap:0x%08x \n", __func__, rssi_level, WirelessMode, rate_bitmap); */ - ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, (" ==> rssi_level:0x%02x, WirelessMode:0x%02x, rate_bitmap:0x%08x \n", rssi_level, WirelessMode, rate_bitmap)); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, + (" ==> rssi_level:0x%02x, WirelessMode:0x%02x, rate_bitmap:0x%08x \n", + rssi_level, WirelessMode, rate_bitmap)); return rate_bitmap; - } /*----------------------------------------------------------------------------- - * Function: odm_RefreshRateAdaptiveMask23a() + * Function: odm_RefreshRateAdaptiveMask() * * Overview: Update rate table mask according to rssi * @@ -1116,51 +1128,35 @@ u32 ODM_Get_Rate_Bitmap23a(struct hal_data_8723a *pHalData, u32 macid, *05/27/2009 hpfan Create Version 0. * *---------------------------------------------------------------------------*/ -void odm_RefreshRateAdaptiveMask23a(struct dm_odm_t *pDM_Odm) -{ - if (!(pDM_Odm->SupportAbility & ODM_BB_RA_MASK)) - return; - /* */ - /* 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate */ - /* at the same time. In the stage2/3, we need to prive universal interface and merge all */ - /* HW dynamic mechanism. */ - /* */ - odm_RefreshRateAdaptiveMask23aCE23a(pDM_Odm); -} - -void odm_RefreshRateAdaptiveMask23aCE23a(struct dm_odm_t *pDM_Odm) +static void odm_RefreshRateAdaptiveMask(struct dm_odm_t *pDM_Odm) { + struct rtw_adapter *pAdapter = pDM_Odm->Adapter; + u32 smoothed; u8 i; - struct rtw_adapter *pAdapter = pDM_Odm->Adapter; if (pAdapter->bDriverStopped) { ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_TRACE, - ("<---- odm_RefreshRateAdaptiveMask23a(): driver is going to unload\n")); + ("<---- %s: driver is going to unload\n", + __func__)); return; } - if (!pDM_Odm->bUseRAMask) { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, - ("<---- odm_RefreshRateAdaptiveMask23a(): driver does not control rate adaptive mask\n")); - return; - } - - /* printk("==> %s \n", __func__); */ - for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) { struct sta_info *pstat = pDM_Odm->pODM_StaInfo[i]; if (pstat) { - if (ODM_RAStateCheck23a(pDM_Odm, pstat->rssi_stat.UndecoratedSmoothedPWDB, false, &pstat->rssi_level)) { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, + smoothed = pstat->rssi_stat.UndecoratedSmoothedPWDB; + if (ODM_RAStateCheck23a(pDM_Odm, smoothed, false, + &pstat->rssi_level)) { + ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, + ODM_DBG_LOUD, ("RSSI:%d, RSSI_LEVEL:%d\n", - pstat->rssi_stat.UndecoratedSmoothedPWDB, - pstat->rssi_level)); - rtw_hal_update_ra_mask23a(pstat, pstat->rssi_level); + smoothed, + pstat->rssi_level)); + rtw_hal_update_ra_mask23a(pstat, + pstat->rssi_level); } - } } - } /* Return Value: bool */ @@ -1189,7 +1185,8 @@ bool ODM_RAStateCheck23a(struct dm_odm_t *pDM_Odm, s32 RSSI, bool bForceUpdate, LowRSSIThreshForRA += GoUpGap; break; default: - ODM_RT_ASSERT(pDM_Odm, false, ("wrong rssi level setting %d !", *pRATRState)); + ODM_RT_ASSERT(pDM_Odm, false, ("wrong rssi level setting %d !", + *pRATRState)); break; } @@ -1227,24 +1224,8 @@ void odm_DynamicTxPower23aInit(struct dm_odm_t *pDM_Odm) pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; } -void odm_RSSIMonitorCheck23a(struct dm_odm_t *pDM_Odm) -{ - /* For AP/ADSL use struct rtl8723a_priv * */ - /* For CE/NIC use struct rtw_adapter * */ - - if (!(pDM_Odm->SupportAbility & ODM_BB_RSSI_MONITOR)) - return; - - /* 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate */ - /* at the same time. In the stage2/3, we need to prive universal interface and merge all */ - /* HW dynamic mechanism. */ - odm_RSSIMonitorCheck23aCE(pDM_Odm); -} /* odm_RSSIMonitorCheck23a */ - static void -FindMinimumRSSI( - struct rtw_adapter *pAdapter - ) +FindMinimumRSSI(struct rtw_adapter *pAdapter) { struct hal_data_8723a *pHalData = GET_HAL_DATA(pAdapter); struct dm_priv *pdmpriv = &pHalData->dmpriv; @@ -1252,21 +1233,22 @@ FindMinimumRSSI( /* 1 1.Determine the minimum RSSI */ - if ((!pDM_Odm->bLinked) && - (pdmpriv->EntryMinUndecoratedSmoothedPWDB == 0)) + if (!pDM_Odm->bLinked && !pdmpriv->EntryMinUndecoratedSmoothedPWDB) pdmpriv->MinUndecoratedPWDBForDM = 0; else - pdmpriv->MinUndecoratedPWDBForDM = pdmpriv->EntryMinUndecoratedSmoothedPWDB; + pdmpriv->MinUndecoratedPWDBForDM = + pdmpriv->EntryMinUndecoratedSmoothedPWDB; } -void odm_RSSIMonitorCheck23aCE(struct dm_odm_t *pDM_Odm) +static void odm_RSSIMonitorCheck(struct dm_odm_t *pDM_Odm) { struct rtw_adapter *Adapter = pDM_Odm->Adapter; struct hal_data_8723a *pHalData = GET_HAL_DATA(Adapter); struct dm_priv *pdmpriv = &pHalData->dmpriv; - int i; - int tmpEntryMaxPWDB = 0, tmpEntryMinPWDB = 0xff; + int i; + int MaxDB = 0, MinDB = 0xff; u8 sta_cnt = 0; + u32 tmpdb; u32 PWDB_rssi[NUM_STA] = {0};/* 0~15]:MACID, [16~31]:PWDB_rssi */ struct sta_info *psta; @@ -1276,37 +1258,36 @@ void odm_RSSIMonitorCheck23aCE(struct dm_odm_t *pDM_Odm) for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) { psta = pDM_Odm->pODM_StaInfo[i]; if (psta) { - if (psta->rssi_stat.UndecoratedSmoothedPWDB < tmpEntryMinPWDB) - tmpEntryMinPWDB = psta->rssi_stat.UndecoratedSmoothedPWDB; + if (psta->rssi_stat.UndecoratedSmoothedPWDB < MinDB) + MinDB = psta->rssi_stat.UndecoratedSmoothedPWDB; - if (psta->rssi_stat.UndecoratedSmoothedPWDB > tmpEntryMaxPWDB) - tmpEntryMaxPWDB = psta->rssi_stat.UndecoratedSmoothedPWDB; + if (psta->rssi_stat.UndecoratedSmoothedPWDB > MaxDB) + MaxDB = psta->rssi_stat.UndecoratedSmoothedPWDB; - if (psta->rssi_stat.UndecoratedSmoothedPWDB != (-1)) - PWDB_rssi[sta_cnt++] = (psta->mac_id | (psta->rssi_stat.UndecoratedSmoothedPWDB<<16)); + if (psta->rssi_stat.UndecoratedSmoothedPWDB != -1) { + tmpdb = psta->rssi_stat.UndecoratedSmoothedPWDB; + PWDB_rssi[sta_cnt++] = psta->mac_id | + (tmpdb << 16); + } } } for (i = 0; i < sta_cnt; i++) { - if (PWDB_rssi[i] != (0)) { - if (pHalData->fw_ractrl) /* Report every sta's RSSI to FW */ - rtl8723a_set_rssi_cmd(Adapter, (u8 *)&PWDB_rssi[i]); - } + if (PWDB_rssi[i] != (0)) + rtl8723a_set_rssi_cmd(Adapter, (u8 *)&PWDB_rssi[i]); } - if (tmpEntryMaxPWDB != 0) /* If associated entry is found */ - pdmpriv->EntryMaxUndecoratedSmoothedPWDB = tmpEntryMaxPWDB; - else - pdmpriv->EntryMaxUndecoratedSmoothedPWDB = 0; + pdmpriv->EntryMaxUndecoratedSmoothedPWDB = MaxDB; - if (tmpEntryMinPWDB != 0xff) /* If associated entry is found */ - pdmpriv->EntryMinUndecoratedSmoothedPWDB = tmpEntryMinPWDB; + if (MinDB != 0xff) /* If associated entry is found */ + pdmpriv->EntryMinUndecoratedSmoothedPWDB = MinDB; else pdmpriv->EntryMinUndecoratedSmoothedPWDB = 0; FindMinimumRSSI(Adapter);/* get pdmpriv->MinUndecoratedPWDBForDM */ - ODM_CmnInfoUpdate23a(&pHalData->odmpriv, ODM_CMNINFO_RSSI_MIN, pdmpriv->MinUndecoratedPWDBForDM); + ODM_CmnInfoUpdate23a(&pHalData->odmpriv, ODM_CMNINFO_RSSI_MIN, + pdmpriv->MinUndecoratedPWDBForDM); } /* endif */ @@ -1314,12 +1295,7 @@ void odm_RSSIMonitorCheck23aCE(struct dm_odm_t *pDM_Odm) /* 3 Tx Power Tracking */ /* 3 ============================================================ */ -void odm_TXPowerTrackingInit23a(struct dm_odm_t *pDM_Odm) -{ - odm_TXPowerTrackingThermalMeterInit23a(pDM_Odm); -} - -void odm_TXPowerTrackingThermalMeterInit23a(struct dm_odm_t *pDM_Odm) +static void odm_TXPowerTrackingInit(struct dm_odm_t *pDM_Odm) { struct rtw_adapter *Adapter = pDM_Odm->Adapter; struct hal_data_8723a *pHalData = GET_HAL_DATA(Adapter); @@ -1329,42 +1305,33 @@ void odm_TXPowerTrackingThermalMeterInit23a(struct dm_odm_t *pDM_Odm) pdmpriv->TXPowercount = 0; pdmpriv->bTXPowerTrackingInit = false; pdmpriv->TxPowerTrackControl = true; - MSG_8723A("pdmpriv->TxPowerTrackControl = %d\n", pdmpriv->TxPowerTrackControl); + MSG_8723A("pdmpriv->TxPowerTrackControl = %d\n", + pdmpriv->TxPowerTrackControl); pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = true; } -void ODM_TXPowerTrackingCheck23a(struct dm_odm_t *pDM_Odm) -{ - /* For AP/ADSL use struct rtl8723a_priv * */ - /* For CE/NIC use struct rtw_adapter * */ - - /* 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate */ - /* at the same time. In the stage2/3, we need to prive universal interface and merge all */ - /* HW dynamic mechanism. */ - odm_TXPowerTrackingCheckCE23a(pDM_Odm); -} - -void odm_TXPowerTrackingCheckCE23a(struct dm_odm_t *pDM_Odm) -{ -} - /* EDCA Turbo */ static void ODM_EdcaTurboInit23a(struct dm_odm_t *pDM_Odm) { - struct rtw_adapter *Adapter = pDM_Odm->Adapter; pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = false; - pDM_Odm->DM_EDCA_Table.bIsCurRDLState = false; Adapter->recvpriv.bIsAnyNonBEPkts = false; - ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Orginial VO PARAM: 0x%x\n", ODM_Read4Byte(pDM_Odm, ODM_EDCA_VO_PARAM))); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Orginial VI PARAM: 0x%x\n", ODM_Read4Byte(pDM_Odm, ODM_EDCA_VI_PARAM))); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Orginial BE PARAM: 0x%x\n", ODM_Read4Byte(pDM_Odm, ODM_EDCA_BE_PARAM))); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Orginial BK PARAM: 0x%x\n", ODM_Read4Byte(pDM_Odm, ODM_EDCA_BK_PARAM))); - -} /* ODM_InitEdcaTurbo */ + ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, + ("Orginial VO PARAM: 0x%x\n", + rtl8723au_read32(Adapter, ODM_EDCA_VO_PARAM))); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, + ("Orginial VI PARAM: 0x%x\n", + rtl8723au_read32(Adapter, ODM_EDCA_VI_PARAM))); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, + ("Orginial BE PARAM: 0x%x\n", + rtl8723au_read32(Adapter, ODM_EDCA_BE_PARAM))); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, + ("Orginial BK PARAM: 0x%x\n", + rtl8723au_read32(Adapter, ODM_EDCA_BK_PARAM))); +} static void odm_EdcaTurboCheck23a(struct dm_odm_t *pDM_Odm) { @@ -1377,19 +1344,18 @@ static void odm_EdcaTurboCheck23a(struct dm_odm_t *pDM_Odm) struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; u32 trafficIndex; u32 edca_param; - u64 cur_tx_bytes = 0; - u64 cur_rx_bytes = 0; - u8 bbtchange = false; + u64 cur_tx_bytes; + u64 cur_rx_bytes; /* For AP/ADSL use struct rtl8723a_priv * */ /* For CE/NIC use struct rtw_adapter * */ - /* 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate */ - /* at the same time. In the stage2/3, we need to prive universal interface and merge all */ - /* HW dynamic mechanism. */ - - if (!(pDM_Odm->SupportAbility & ODM_MAC_EDCA_TURBO)) - return; + /* + * 2011/09/29 MH In HW integration first stage, we provide 4 + * different handle to operate at the same time. In the stage2/3, + * we need to prive universal interface and merge all HW dynamic + * mechanism. + */ if ((pregpriv->wifi_spec == 1))/* (pmlmeinfo->HT_enable == 0)) */ goto dm_CheckEdcaTurbo_EXIT; @@ -1401,7 +1367,7 @@ static void odm_EdcaTurboCheck23a(struct dm_odm_t *pDM_Odm) goto dm_CheckEdcaTurbo_EXIT; /* Check if the status needs to be changed. */ - if ((bbtchange) || (!precvpriv->bIsAnyNonBEPkts)) { + if (!precvpriv->bIsAnyNonBEPkts) { cur_tx_bytes = pxmitpriv->tx_bytes - pxmitpriv->last_tx_bytes; cur_rx_bytes = precvpriv->rx_bytes - precvpriv->last_rx_bytes; @@ -1454,29 +1420,37 @@ dm_CheckEdcaTurbo_EXIT: precvpriv->last_rx_bytes = precvpriv->rx_bytes; } -u32 GetPSDData(struct dm_odm_t *pDM_Odm, unsigned int point, u8 initial_gain_psd) +u32 GetPSDData(struct dm_odm_t *pDM_Odm, unsigned int point, + u8 initial_gain_psd) { - u32 psd_report; + struct rtw_adapter *adapter = pDM_Odm->Adapter; + u32 psd_report, val32; /* Set DCO frequency index, offset = (40MHz/SamplePts)*point */ - ODM_SetBBReg(pDM_Odm, 0x808, 0x3FF, point); + val32 = rtl8723au_read32(adapter, 0x808); + val32 &= ~0x3ff; + val32 |= (point & 0x3ff); + rtl8723au_write32(adapter, 0x808, val32); /* Start PSD calculation, Reg808[22]= 0->1 */ - ODM_SetBBReg(pDM_Odm, 0x808, BIT(22), 1); + val32 = rtl8723au_read32(adapter, 0x808); + val32 |= BIT(22); + rtl8723au_write32(adapter, 0x808, val32); /* Need to wait for HW PSD report */ udelay(30); - ODM_SetBBReg(pDM_Odm, 0x808, BIT(22), 0); + val32 = rtl8723au_read32(adapter, 0x808); + val32 &= ~BIT(22); + rtl8723au_write32(adapter, 0x808, val32); /* Read PSD report, Reg8B4[15:0] */ - psd_report = ODM_GetBBReg(pDM_Odm, 0x8B4, bMaskDWord) & 0x0000FFFF; + psd_report = rtl8723au_read32(adapter, 0x8B4) & 0x0000FFFF; - psd_report = (u32)(ConvertTo_dB23a(psd_report))+(u32)(initial_gain_psd-0x1c); + psd_report = (u32)(ConvertTo_dB23a(psd_report)) + + (u32)(initial_gain_psd-0x1c); return psd_report; } -u32 -ConvertTo_dB23a( - u32 Value) +u32 ConvertTo_dB23a(u32 Value) { u8 i; u8 j; @@ -1504,7 +1478,8 @@ ConvertTo_dB23a( /* */ /* Description: */ -/*Set Single/Dual Antenna default setting for products that do not do detection in advance. */ +/* Set Single/Dual Antenna default setting for products that do not + * do detection in advance. */ /* */ /* Added by Joseph, 2012.03.22 */ /* */ @@ -1518,18 +1493,13 @@ void ODM_SingleDualAntennaDefaultSetting(struct dm_odm_t *pDM_Odm) /* 2 8723A ANT DETECT */ -static void odm_PHY_SaveAFERegisters( - struct dm_odm_t *pDM_Odm, - u32 *AFEReg, - u32 *AFEBackup, - u32 RegisterNum - ) +static void odm_PHY_SaveAFERegisters(struct dm_odm_t *pDM_Odm, u32 *AFEReg, + u32 *AFEBackup, u32 RegisterNum) { u32 i; - /* RTPRINT(FINIT, INIT_IQK, ("Save ADDA parameters.\n")); */ for (i = 0 ; i < RegisterNum ; i++) - AFEBackup[i] = ODM_GetBBReg(pDM_Odm, AFEReg[i], bMaskDWord); + AFEBackup[i] = rtl8723au_read32(pDM_Odm->Adapter, AFEReg[i]); } static void odm_PHY_ReloadAFERegisters(struct dm_odm_t *pDM_Odm, u32 *AFEReg, @@ -1538,7 +1508,7 @@ static void odm_PHY_ReloadAFERegisters(struct dm_odm_t *pDM_Odm, u32 *AFEReg, u32 i; for (i = 0 ; i < RegiesterNum; i++) - ODM_SetBBReg(pDM_Odm, AFEReg[i], bMaskDWord, AFEBackup[i]); + rtl8723au_write32(pDM_Odm->Adapter, AFEReg[i], AFEBackup[i]); } /* 2 8723A ANT DETECT */ @@ -1548,9 +1518,10 @@ static void odm_PHY_ReloadAFERegisters(struct dm_odm_t *pDM_Odm, u32 *AFEReg, bool ODM_SingleDualAntennaDetection(struct dm_odm_t *pDM_Odm, u8 mode) { struct sw_ant_sw *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; + struct rtw_adapter *adapter = pDM_Odm->Adapter; u32 CurrentChannel, RfLoopReg; u8 n; - u32 Reg88c, Regc08, Reg874, Regc50; + u32 Reg88c, Regc08, Reg874, Regc50, val32; u8 initial_gain = 0x5a; u32 PSD_report_tmp; u32 AntA_report = 0x0, AntB_report = 0x0, AntO_report = 0x0; @@ -1573,72 +1544,80 @@ bool ODM_SingleDualAntennaDetection(struct dm_odm_t *pDM_Odm, u8 mode) return bResult; /* 1 Backup Current RF/BB Settings */ - CurrentChannel = ODM_GetRFReg(pDM_Odm, RF_PATH_A, ODM_CHANNEL, bRFRegOffsetMask); + CurrentChannel = ODM_GetRFReg(pDM_Odm, RF_PATH_A, ODM_CHANNEL, + bRFRegOffsetMask); RfLoopReg = ODM_GetRFReg(pDM_Odm, RF_PATH_A, 0x00, bRFRegOffsetMask); - ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, ODM_DPDT, Antenna_A); /* change to Antenna A */ + /* change to Antenna A */ + val32 = rtl8723au_read32(adapter, rFPGA0_XA_RFInterfaceOE); + val32 &= ~0x300; + val32 |= 0x100; /* Enable antenna A */ + rtl8723au_write32(adapter, rFPGA0_XA_RFInterfaceOE, val32); + /* Step 1: USE IQK to transmitter single tone */ udelay(10); /* Store A Path Register 88c, c08, 874, c50 */ - Reg88c = ODM_GetBBReg(pDM_Odm, rFPGA0_AnalogParameter4, bMaskDWord); - Regc08 = ODM_GetBBReg(pDM_Odm, rOFDM0_TRMuxPar, bMaskDWord); - Reg874 = ODM_GetBBReg(pDM_Odm, rFPGA0_XCD_RFInterfaceSW, bMaskDWord); - Regc50 = ODM_GetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskDWord); + Reg88c = rtl8723au_read32(adapter, rFPGA0_AnalogParameter4); + Regc08 = rtl8723au_read32(adapter, rOFDM0_TRMuxPar); + Reg874 = rtl8723au_read32(adapter, rFPGA0_XCD_RFInterfaceSW); + Regc50 = rtl8723au_read32(adapter, rOFDM0_XAAGCCore1); /* Store AFE Registers */ odm_PHY_SaveAFERegisters(pDM_Odm, AFE_REG_8723A, AFE_Backup, 16); /* Set PSD 128 pts */ - ODM_SetBBReg(pDM_Odm, rFPGA0_PSDFunction, BIT(14) | BIT(15), 0x0); + val32 = rtl8723au_read32(adapter, rFPGA0_PSDFunction); + val32 &= ~(BIT(14) | BIT(15)); + rtl8723au_write32(adapter, rFPGA0_PSDFunction, val32); /* To SET CH1 to do */ - ODM_SetRFReg(pDM_Odm, RF_PATH_A, ODM_CHANNEL, bRFRegOffsetMask, 0x01); /* Channel 1 */ + ODM_SetRFReg(pDM_Odm, RF_PATH_A, ODM_CHANNEL, bRFRegOffsetMask, 0x01); /* AFE all on step */ - ODM_SetBBReg(pDM_Odm, rRx_Wait_CCA, bMaskDWord, 0x6FDB25A4); - ODM_SetBBReg(pDM_Odm, rTx_CCK_RFON, bMaskDWord, 0x6FDB25A4); - ODM_SetBBReg(pDM_Odm, rTx_CCK_BBON, bMaskDWord, 0x6FDB25A4); - ODM_SetBBReg(pDM_Odm, rTx_OFDM_RFON, bMaskDWord, 0x6FDB25A4); - ODM_SetBBReg(pDM_Odm, rTx_OFDM_BBON, bMaskDWord, 0x6FDB25A4); - ODM_SetBBReg(pDM_Odm, rTx_To_Rx, bMaskDWord, 0x6FDB25A4); - ODM_SetBBReg(pDM_Odm, rTx_To_Tx, bMaskDWord, 0x6FDB25A4); - ODM_SetBBReg(pDM_Odm, rRx_CCK, bMaskDWord, 0x6FDB25A4); - ODM_SetBBReg(pDM_Odm, rRx_OFDM, bMaskDWord, 0x6FDB25A4); - ODM_SetBBReg(pDM_Odm, rRx_Wait_RIFS, bMaskDWord, 0x6FDB25A4); - ODM_SetBBReg(pDM_Odm, rRx_TO_Rx, bMaskDWord, 0x6FDB25A4); - ODM_SetBBReg(pDM_Odm, rStandby, bMaskDWord, 0x6FDB25A4); - ODM_SetBBReg(pDM_Odm, rSleep, bMaskDWord, 0x6FDB25A4); - ODM_SetBBReg(pDM_Odm, rPMPD_ANAEN, bMaskDWord, 0x6FDB25A4); - ODM_SetBBReg(pDM_Odm, rFPGA0_XCD_SwitchControl, bMaskDWord, 0x6FDB25A4); - ODM_SetBBReg(pDM_Odm, rBlue_Tooth, bMaskDWord, 0x6FDB25A4); + rtl8723au_write32(adapter, rRx_Wait_CCA, 0x6FDB25A4); + rtl8723au_write32(adapter, rTx_CCK_RFON, 0x6FDB25A4); + rtl8723au_write32(adapter, rTx_CCK_BBON, 0x6FDB25A4); + rtl8723au_write32(adapter, rTx_OFDM_RFON, 0x6FDB25A4); + rtl8723au_write32(adapter, rTx_OFDM_BBON, 0x6FDB25A4); + rtl8723au_write32(adapter, rTx_To_Rx, 0x6FDB25A4); + rtl8723au_write32(adapter, rTx_To_Tx, 0x6FDB25A4); + rtl8723au_write32(adapter, rRx_CCK, 0x6FDB25A4); + rtl8723au_write32(adapter, rRx_OFDM, 0x6FDB25A4); + rtl8723au_write32(adapter, rRx_Wait_RIFS, 0x6FDB25A4); + rtl8723au_write32(adapter, rRx_TO_Rx, 0x6FDB25A4); + rtl8723au_write32(adapter, rStandby, 0x6FDB25A4); + rtl8723au_write32(adapter, rSleep, 0x6FDB25A4); + rtl8723au_write32(adapter, rPMPD_ANAEN, 0x6FDB25A4); + rtl8723au_write32(adapter, rFPGA0_XCD_SwitchControl, 0x6FDB25A4); + rtl8723au_write32(adapter, rBlue_Tooth, 0x6FDB25A4); /* 3 wire Disable */ - ODM_SetBBReg(pDM_Odm, rFPGA0_AnalogParameter4, bMaskDWord, 0xCCF000C0); + rtl8723au_write32(adapter, rFPGA0_AnalogParameter4, 0xCCF000C0); /* BB IQK Setting */ - ODM_SetBBReg(pDM_Odm, rOFDM0_TRMuxPar, bMaskDWord, 0x000800E4); - ODM_SetBBReg(pDM_Odm, rFPGA0_XCD_RFInterfaceSW, bMaskDWord, 0x22208000); + rtl8723au_write32(adapter, rOFDM0_TRMuxPar, 0x000800E4); + rtl8723au_write32(adapter, rFPGA0_XCD_RFInterfaceSW, 0x22208000); /* IQK setting tone@ 4.34Mhz */ - ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_A, bMaskDWord, 0x10008C1C); - ODM_SetBBReg(pDM_Odm, rTx_IQK, bMaskDWord, 0x01007c00); + rtl8723au_write32(adapter, rTx_IQK_Tone_A, 0x10008C1C); + rtl8723au_write32(adapter, rTx_IQK, 0x01007c00); /* Page B init */ - ODM_SetBBReg(pDM_Odm, rConfig_AntA, bMaskDWord, 0x00080000); - ODM_SetBBReg(pDM_Odm, rConfig_AntA, bMaskDWord, 0x0f600000); - ODM_SetBBReg(pDM_Odm, rRx_IQK, bMaskDWord, 0x01004800); - ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_A, bMaskDWord, 0x10008c1f); - ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_A, bMaskDWord, 0x82150008); - ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_A, bMaskDWord, 0x28150008); - ODM_SetBBReg(pDM_Odm, rIQK_AGC_Rsp, bMaskDWord, 0x001028d0); + rtl8723au_write32(adapter, rConfig_AntA, 0x00080000); + rtl8723au_write32(adapter, rConfig_AntA, 0x0f600000); + rtl8723au_write32(adapter, rRx_IQK, 0x01004800); + rtl8723au_write32(adapter, rRx_IQK_Tone_A, 0x10008c1f); + rtl8723au_write32(adapter, rTx_IQK_PI_A, 0x82150008); + rtl8723au_write32(adapter, rRx_IQK_PI_A, 0x28150008); + rtl8723au_write32(adapter, rIQK_AGC_Rsp, 0x001028d0); /* RF loop Setting */ ODM_SetRFReg(pDM_Odm, RF_PATH_A, 0x0, 0xFFFFF, 0x50008); /* IQK Single tone start */ - ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x80800000); - ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf8000000); + rtl8723au_write32(adapter, rFPGA0_IQK, 0x80800000); + rtl8723au_write32(adapter, rIQK_AGC_Pts, 0xf8000000); udelay(1000); PSD_report_tmp = 0x0; @@ -1650,7 +1629,10 @@ bool ODM_SingleDualAntennaDetection(struct dm_odm_t *pDM_Odm, u8 mode) PSD_report_tmp = 0x0; - ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, 0x300, Antenna_B); /* change to Antenna B */ + val32 = rtl8723au_read32(adapter, rFPGA0_XA_RFInterfaceOE); + val32 &= ~0x300; + val32 |= 0x200; /* Enable antenna B */ + rtl8723au_write32(adapter, rFPGA0_XA_RFInterfaceOE, val32); udelay(10); for (n = 0; n < 2; n++) { @@ -1660,7 +1642,10 @@ bool ODM_SingleDualAntennaDetection(struct dm_odm_t *pDM_Odm, u8 mode) } /* change to open case */ - ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, 0x300, 0); /* change to Ant A and B all open case */ + /* change to Ant A and B all open case */ + val32 = rtl8723au_read32(adapter, rFPGA0_XA_RFInterfaceOE); + val32 &= ~0x300; + rtl8723au_write32(adapter, rFPGA0_XA_RFInterfaceOE, val32); udelay(10); for (n = 0; n < 2; n++) { @@ -1670,25 +1655,36 @@ bool ODM_SingleDualAntennaDetection(struct dm_odm_t *pDM_Odm, u8 mode) } /* Close IQK Single Tone function */ - ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x00000000); + rtl8723au_write32(adapter, rFPGA0_IQK, 0x00000000); PSD_report_tmp = 0x0; /* 1 Return to antanna A */ - ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, 0x300, Antenna_A); - ODM_SetBBReg(pDM_Odm, rFPGA0_AnalogParameter4, bMaskDWord, Reg88c); - ODM_SetBBReg(pDM_Odm, rOFDM0_TRMuxPar, bMaskDWord, Regc08); - ODM_SetBBReg(pDM_Odm, rFPGA0_XCD_RFInterfaceSW, bMaskDWord, Reg874); - ODM_SetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, 0x7F, 0x40); - ODM_SetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskDWord, Regc50); - ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, CurrentChannel); + val32 = rtl8723au_read32(adapter, rFPGA0_XA_RFInterfaceOE); + val32 &= ~0x300; + val32 |= 0x100; /* Enable antenna A */ + rtl8723au_write32(adapter, rFPGA0_XA_RFInterfaceOE, val32); + rtl8723au_write32(adapter, rFPGA0_AnalogParameter4, Reg88c); + rtl8723au_write32(adapter, rOFDM0_TRMuxPar, Regc08); + rtl8723au_write32(adapter, rFPGA0_XCD_RFInterfaceSW, Reg874); + val32 = rtl8723au_read32(adapter, rOFDM0_XAAGCCore1); + val32 &= ~0x7f; + val32 |= 0x40; + rtl8723au_write32(adapter, rOFDM0_XAAGCCore1, val32); + + rtl8723au_write32(adapter, rOFDM0_XAAGCCore1, Regc50); + ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, + CurrentChannel); ODM_SetRFReg(pDM_Odm, RF_PATH_A, 0x00, bRFRegOffsetMask, RfLoopReg); /* Reload AFE Registers */ odm_PHY_ReloadAFERegisters(pDM_Odm, AFE_REG_8723A, AFE_Backup, 16); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("psd_report_A[%d]= %d \n", 2416, AntA_report)); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("psd_report_B[%d]= %d \n", 2416, AntB_report)); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("psd_report_O[%d]= %d \n", 2416, AntO_report)); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, + ("psd_report_A[%d]= %d \n", 2416, AntA_report)); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, + ("psd_report_B[%d]= %d \n", 2416, AntB_report)); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, + ("psd_report_O[%d]= %d \n", 2416, AntO_report)); /* 2 Test Ant B based on Ant A is ON */ if (mode == ANTTESTB) { @@ -1710,30 +1706,33 @@ bool ODM_SingleDualAntennaDetection(struct dm_odm_t *pDM_Odm, u8 mode) if ((AntO_report >= 100) & (AntO_report < 118)) { if (AntA_report > (AntO_report+1)) { pDM_SWAT_Table->ANTA_ON = false; - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Ant A is OFF")); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, + ODM_DBG_LOUD, ("Ant A is OFF")); } else { pDM_SWAT_Table->ANTA_ON = true; - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Ant A is ON")); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, + ODM_DBG_LOUD, ("Ant A is ON")); } if (AntB_report > (AntO_report+2)) { pDM_SWAT_Table->ANTB_ON = false; - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Ant B is OFF")); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, + ODM_DBG_LOUD, ("Ant B is OFF")); } else { pDM_SWAT_Table->ANTB_ON = true; - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Ant B is ON")); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, + ODM_DBG_LOUD, ("Ant B is ON")); } } } else { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Need to check again\n")); - pDM_SWAT_Table->ANTA_ON = true; /* Set Antenna A on as default */ - pDM_SWAT_Table->ANTB_ON = false; /* Set Antenna B off as default */ + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, + ("ODM_SingleDualAntennaDetection(): Need to check again\n")); + /* Set Antenna A on as default */ + pDM_SWAT_Table->ANTA_ON = true; + /* Set Antenna B off as default */ + pDM_SWAT_Table->ANTB_ON = false; bResult = false; } - return bResult; -} -/* Justin: According to the current RRSI to adjust Response Frame TX power, 2012/11/05 */ -void odm_dtc(struct dm_odm_t *pDM_Odm) -{ + return bResult; } diff --git a/drivers/staging/rtl8723au/hal/odm_HWConfig.c b/drivers/staging/rtl8723au/hal/odm_HWConfig.c index 33aafa01f900..7b9799e3dbda 100644 --- a/drivers/staging/rtl8723au/hal/odm_HWConfig.c +++ b/drivers/staging/rtl8723au/hal/odm_HWConfig.c @@ -33,24 +33,23 @@ static s32 odm_SignalScaleMapping_92CSeries(struct dm_odm_t *pDM_Odm, s32 CurrSi { s32 RetSig = 0; - if ((pDM_Odm->SupportInterface == ODM_ITRF_USB) || (pDM_Odm->SupportInterface == ODM_ITRF_SDIO)) { - if (CurrSig >= 51 && CurrSig <= 100) - RetSig = 100; - else if (CurrSig >= 41 && CurrSig <= 50) - RetSig = 80 + ((CurrSig - 40)*2); - else if (CurrSig >= 31 && CurrSig <= 40) - RetSig = 66 + (CurrSig - 30); - else if (CurrSig >= 21 && CurrSig <= 30) - RetSig = 54 + (CurrSig - 20); - else if (CurrSig >= 10 && CurrSig <= 20) - RetSig = 42 + (((CurrSig - 10) * 2) / 3); - else if (CurrSig >= 5 && CurrSig <= 9) - RetSig = 22 + (((CurrSig - 5) * 3) / 2); - else if (CurrSig >= 1 && CurrSig <= 4) - RetSig = 6 + (((CurrSig - 1) * 3) / 2); - else - RetSig = CurrSig; - } + if (CurrSig >= 51 && CurrSig <= 100) + RetSig = 100; + else if (CurrSig >= 41 && CurrSig <= 50) + RetSig = 80 + ((CurrSig - 40)*2); + else if (CurrSig >= 31 && CurrSig <= 40) + RetSig = 66 + (CurrSig - 30); + else if (CurrSig >= 21 && CurrSig <= 30) + RetSig = 54 + (CurrSig - 20); + else if (CurrSig >= 10 && CurrSig <= 20) + RetSig = 42 + (((CurrSig - 10) * 2) / 3); + else if (CurrSig >= 5 && CurrSig <= 9) + RetSig = 22 + (((CurrSig - 5) * 3) / 2); + else if (CurrSig >= 1 && CurrSig <= 4) + RetSig = 6 + (((CurrSig - 1) * 3) / 2); + else + RetSig = CurrSig; + return RetSig; } diff --git a/drivers/staging/rtl8723au/hal/odm_RegConfig8723A.c b/drivers/staging/rtl8723au/hal/odm_RegConfig8723A.c index 88e0126e855a..342dec3e939f 100644 --- a/drivers/staging/rtl8723au/hal/odm_RegConfig8723A.c +++ b/drivers/staging/rtl8723au/hal/odm_RegConfig8723A.c @@ -14,6 +14,7 @@ ******************************************************************************/ #include "odm_precomp.h" +#include "usb_ops_linux.h" void odm_ConfigRFReg_8723A( @@ -43,62 +44,45 @@ odm_ConfigRFReg_8723A( } } -void odm_ConfigMAC_8723A(struct dm_odm_t *pDM_Odm, - u32 Addr, - u8 Data - ) +void odm_ConfigMAC_8723A(struct dm_odm_t *pDM_Odm, u32 addr, u8 data) { - ODM_Write1Byte(pDM_Odm, Addr, Data); + rtl8723au_write8(pDM_Odm->Adapter, addr, data); ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, - ("===> ODM_ConfigMACWithHeaderFile23a: [MAC_REG] %08X %08X\n", - Addr, Data)); + ("===> %s: [MAC_REG] %08X %08X\n", __func__, addr, data)); } -void -odm_ConfigBB_AGC_8723A( - struct dm_odm_t *pDM_Odm, - u32 Addr, - u32 Bitmask, - u32 Data - ) +void odm_ConfigBB_AGC_8723A(struct dm_odm_t *pDM_Odm, u32 addr, u32 data) { - ODM_SetBBReg(pDM_Odm, Addr, Bitmask, Data); + rtl8723au_write32(pDM_Odm->Adapter, addr, data); /* Add 1us delay between BB/RF register setting. */ udelay(1); ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, - ("===> ODM_ConfigBBWithHeaderFile23a: [AGC_TAB] %08X %08X\n", - Addr, Data)); + ("===> %s: [AGC_TAB] %08X %08X\n", __func__, addr, data)); } void -odm_ConfigBB_PHY_8723A( - struct dm_odm_t *pDM_Odm, - u32 Addr, - u32 Bitmask, - u32 Data - ) +odm_ConfigBB_PHY_8723A(struct dm_odm_t *pDM_Odm, u32 addr, u32 data) { - if (Addr == 0xfe) + if (addr == 0xfe) msleep(50); - else if (Addr == 0xfd) + else if (addr == 0xfd) mdelay(5); - else if (Addr == 0xfc) + else if (addr == 0xfc) mdelay(1); - else if (Addr == 0xfb) + else if (addr == 0xfb) udelay(50); - else if (Addr == 0xfa) + else if (addr == 0xfa) udelay(5); - else if (Addr == 0xf9) + else if (addr == 0xf9) udelay(1); - else if (Addr == 0xa24) - pDM_Odm->RFCalibrateInfo.RegA24 = Data; - ODM_SetBBReg(pDM_Odm, Addr, Bitmask, Data); + else if (addr == 0xa24) + pDM_Odm->RFCalibrateInfo.RegA24 = data; + rtl8723au_write32(pDM_Odm->Adapter, addr, data); /* Add 1us delay between BB/RF register setting. */ udelay(1); ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, - ("===> ODM_ConfigBBWithHeaderFile23a: [PHY_REG] %08X %08X\n", - Addr, Data)); + ("===> %s: [PHY_REG] %08X %08X\n", __func__, addr, data)); } diff --git a/drivers/staging/rtl8723au/hal/odm_debug.c b/drivers/staging/rtl8723au/hal/odm_debug.c index c912ab89bc3e..cb2bdda6b0eb 100644 --- a/drivers/staging/rtl8723au/hal/odm_debug.c +++ b/drivers/staging/rtl8723au/hal/odm_debug.c @@ -22,3 +22,18 @@ void ODM_InitDebugSetting23a(struct dm_odm_t *pDM_Odm) } u32 GlobalDebugLevel23A; + +void rt_trace(int comp, int level, const char *fmt, ...) +{ + struct va_format vaf; + va_list args; + + va_start(args, fmt); + + vaf.fmt = fmt; + vaf.va = &args; + + pr_info(DRIVER_PREFIX " [0x%08x,%d] %pV", comp, level, &vaf); + + va_end(args); +} diff --git a/drivers/staging/rtl8723au/hal/odm_interface.c b/drivers/staging/rtl8723au/hal/odm_interface.c index f03f6d4a3888..d8f67902708e 100644 --- a/drivers/staging/rtl8723au/hal/odm_interface.c +++ b/drivers/staging/rtl8723au/hal/odm_interface.c @@ -23,96 +23,6 @@ /* */ #include <usb_ops_linux.h> -u8 ODM_Read1Byte(struct dm_odm_t *pDM_Odm, - u32 RegAddr - ) -{ - struct rtw_adapter *Adapter = pDM_Odm->Adapter; - - return rtl8723au_read8(Adapter, RegAddr); -} - -u16 ODM_Read2Byte(struct dm_odm_t *pDM_Odm, u32 RegAddr) -{ - struct rtw_adapter *Adapter = pDM_Odm->Adapter; - - return rtl8723au_read16(Adapter, RegAddr); -} - -u32 ODM_Read4Byte(struct dm_odm_t *pDM_Odm, u32 RegAddr) -{ - struct rtw_adapter *Adapter = pDM_Odm->Adapter; - - return rtl8723au_read32(Adapter, RegAddr); -} - -void ODM_Write1Byte(struct dm_odm_t *pDM_Odm, u32 RegAddr, u8 Data) -{ - struct rtw_adapter *Adapter = pDM_Odm->Adapter; - - rtl8723au_write8(Adapter, RegAddr, Data); -} - -void ODM_Write2Byte(struct dm_odm_t *pDM_Odm, u32 RegAddr, u16 Data) -{ - struct rtw_adapter *Adapter = pDM_Odm->Adapter; - - rtl8723au_write16(Adapter, RegAddr, Data); -} - -void ODM_Write4Byte(struct dm_odm_t *pDM_Odm, u32 RegAddr, u32 Data) -{ - struct rtw_adapter *Adapter = pDM_Odm->Adapter; - - rtl8723au_write32(Adapter, RegAddr, Data); -} - -void ODM_SetMACReg( - struct dm_odm_t *pDM_Odm, - u32 RegAddr, - u32 BitMask, - u32 Data - ) -{ - struct rtw_adapter *Adapter = pDM_Odm->Adapter; - - PHY_SetBBReg(Adapter, RegAddr, BitMask, Data); -} - -u32 ODM_GetMACReg( - struct dm_odm_t *pDM_Odm, - u32 RegAddr, - u32 BitMask - ) -{ - struct rtw_adapter *Adapter = pDM_Odm->Adapter; - - return PHY_QueryBBReg(Adapter, RegAddr, BitMask); -} - -void ODM_SetBBReg( - struct dm_odm_t *pDM_Odm, - u32 RegAddr, - u32 BitMask, - u32 Data - ) -{ - struct rtw_adapter *Adapter = pDM_Odm->Adapter; - - PHY_SetBBReg(Adapter, RegAddr, BitMask, Data); -} - -u32 ODM_GetBBReg( - struct dm_odm_t *pDM_Odm, - u32 RegAddr, - u32 BitMask - ) -{ - struct rtw_adapter *Adapter = pDM_Odm->Adapter; - - return PHY_QueryBBReg(Adapter, RegAddr, BitMask); -} - void ODM_SetRFReg( struct dm_odm_t *pDM_Odm, enum RF_RADIO_PATH eRFPath, diff --git a/drivers/staging/rtl8723au/hal/rtl8723a_bt-coexist.c b/drivers/staging/rtl8723au/hal/rtl8723a_bt-coexist.c index 73cfddd6df9a..cf15f80836ba 100644 --- a/drivers/staging/rtl8723au/hal/rtl8723a_bt-coexist.c +++ b/drivers/staging/rtl8723au/hal/rtl8723a_bt-coexist.c @@ -1554,7 +1554,8 @@ static void bthci_ResetBtSec(struct rtw_adapter *padapter, struct bt_security *p pBtSec->bUsedHwEncrypt = true; else pBtSec->bUsedHwEncrypt = false; - RT_TRACE(_module_rtl871x_security_c_, _drv_info_, ("%s: bUsedHwEncrypt =%d\n", __func__, pBtSec->bUsedHwEncrypt)); + RT_TRACE(_module_rtl871x_security_c_, _drv_info_, + "%s: bUsedHwEncrypt =%d\n", __func__, pBtSec->bUsedHwEncrypt); pBtSec->RSNIE.Octet = pBtSec->RSNIEBuf; } @@ -3208,7 +3209,7 @@ bthci_CmdDisconnectPhysicalLink(struct rtw_adapter *padapter, pBtDbg->dbgHciInfo.hciCmdCntDisconnectPhyLink++; PLH = *((u8 *)pHciCmd->Data); - PhysLinkDisconnectReason = (*((u8 *)pHciCmd->Data+1)); + PhysLinkDisconnectReason = *((u8 *)pHciCmd->Data+1); RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("HCI_DISCONNECT_PHYSICAL_LINK PhyHandle = 0x%x, Reason = 0x%x\n", PLH, PhysLinkDisconnectReason)); @@ -4518,8 +4519,8 @@ bthci_StateConnecting(struct rtw_adapter *padapter, RTPRINT(FIOCTL, IOCTL_STATE, ("STATE_CMD_MAC_CONNECT_COMPLETE\n")); if (pBTInfo->BtAsocEntry[EntryNum].AMPRole == AMP_BTAP_JOINER) { - RT_TRACE(_module_rtl871x_security_c_, - _drv_info_, ("StateConnecting \n")); + RT_TRACE(_module_rtl871x_security_c_, _drv_info_, + "StateConnecting\n"); } break; case STATE_CMD_DISCONNECT_PHY_LINK: @@ -5796,7 +5797,7 @@ static void btdm_1AntUpdateHalRAMask(struct rtw_adapter *padapter, u32 mac_id, u32 filter) { u8 init_rate = 0; - u8 raid; + u8 raid, arg; u32 mask; u8 shortGIrate = false; int supportRateNum = 0; @@ -5860,26 +5861,16 @@ btdm_1AntUpdateHalRAMask(struct rtw_adapter *padapter, u32 mac_id, u32 filter) mask &= ~filter; init_rate = get_highest_rate_idx23a(mask)&0x3f; - if (pHalData->fw_ractrl) { - u8 arg = 0; + arg = mac_id&0x1f;/* MACID */ + arg |= BIT(7); + if (true == shortGIrate) + arg |= BIT(5); - arg = mac_id&0x1f;/* MACID */ - arg |= BIT(7); - if (true == shortGIrate) - arg |= BIT(5); - - RTPRINT(FBT, BT_TRACE, - ("[BTCoex], Update FW RAID entry, MASK = 0x%08x, " - "arg = 0x%02x\n", mask, arg)); - - rtl8723a_set_raid_cmd(padapter, mask, arg); - } else { - if (shortGIrate) - init_rate |= BIT(6); + RTPRINT(FBT, BT_TRACE, + ("[BTCoex], Update FW RAID entry, MASK = 0x%08x, " + "arg = 0x%02x\n", mask, arg)); - rtl8723au_write8(padapter, REG_INIDATA_RATE_SEL + mac_id, - init_rate); - } + rtl8723a_set_raid_cmd(padapter, mask, arg); psta->init_rate = init_rate; pdmpriv->INIDATA_RATE[mac_id] = init_rate; @@ -11206,15 +11197,17 @@ void rtl8723a_BT_init_hal_vars(struct rtw_adapter *padapter) pHalData->bt_coexist.bt_radiosharedtype = pHalData->EEPROMBluetoothRadioShared; RT_TRACE(_module_hal_init_c_, _drv_info_, - ("BT Coexistance = 0x%x\n", rtl8723a_BT_coexist(padapter))); + "BT Coexistance = 0x%x\n", rtl8723a_BT_coexist(padapter)); if (rtl8723a_BT_coexist(padapter)) { if (pHalData->bt_coexist.BT_Ant_Num == Ant_x2) { BTDM_SetBtCoexCurrAntNum(padapter, 2); - RT_TRACE(_module_hal_init_c_, _drv_info_, ("BlueTooth BT_Ant_Num = Antx2\n")); + RT_TRACE(_module_hal_init_c_, _drv_info_, + "BlueTooth BT_Ant_Num = Antx2\n"); } else if (pHalData->bt_coexist.BT_Ant_Num == Ant_x1) { BTDM_SetBtCoexCurrAntNum(padapter, 1); - RT_TRACE(_module_hal_init_c_, _drv_info_, ("BlueTooth BT_Ant_Num = Antx1\n")); + RT_TRACE(_module_hal_init_c_, _drv_info_, + "BlueTooth BT_Ant_Num = Antx1\n"); } pHalData->bt_coexist.bBTBusyTraffic = false; pHalData->bt_coexist.bBTTrafficModeSet = false; @@ -11223,8 +11216,8 @@ void rtl8723a_BT_init_hal_vars(struct rtw_adapter *padapter) pHalData->bt_coexist.PreviousState = 0; RT_TRACE(_module_hal_init_c_, _drv_info_, - ("bt_radiosharedType = 0x%x\n", - pHalData->bt_coexist.bt_radiosharedtype)); + "bt_radiosharedType = 0x%x\n", + pHalData->bt_coexist.bt_radiosharedtype); } } diff --git a/drivers/staging/rtl8723au/hal/rtl8723a_cmd.c b/drivers/staging/rtl8723au/hal/rtl8723a_cmd.c index 7b56411cc3c8..11e1108d0c56 100644 --- a/drivers/staging/rtl8723au/hal/rtl8723a_cmd.c +++ b/drivers/staging/rtl8723au/hal/rtl8723a_cmd.c @@ -142,32 +142,18 @@ int rtl8723a_set_raid_cmd(struct rtw_adapter *padapter, u32 mask, u8 arg) /* arg[5] = Short GI */ void rtl8723a_add_rateatid(struct rtw_adapter *pAdapter, u32 bitmap, u8 arg, u8 rssi_level) { - struct hal_data_8723a *pHalData = GET_HAL_DATA(pAdapter); - u8 macid = arg&0x1f; - u8 raid = (bitmap>>28) & 0x0f; + struct hal_data_8723a *pHalData = GET_HAL_DATA(pAdapter); + u8 macid = arg & 0x1f; + u32 raid = bitmap & 0xf0000000; bitmap &= 0x0fffffff; if (rssi_level != DM_RATR_STA_INIT) bitmap = ODM_Get_Rate_Bitmap23a(pHalData, macid, bitmap, rssi_level); - bitmap |= ((raid<<28)&0xf0000000); + bitmap |= raid; - if (pHalData->fw_ractrl == true) { - rtl8723a_set_raid_cmd(pAdapter, bitmap, arg); - } else { - u8 init_rate, shortGIrate = false; - - init_rate = get_highest_rate_idx23a(bitmap&0x0fffffff)&0x3f; - - shortGIrate = (arg&BIT(5)) ? true:false; - - if (shortGIrate == true) - init_rate |= BIT(6); - - rtl8723au_write8(pAdapter, REG_INIDATA_RATE_SEL + macid, - init_rate); - } + rtl8723a_set_raid_cmd(pAdapter, bitmap, arg); } void rtl8723a_set_FwPwrMode_cmd(struct rtw_adapter *padapter, u8 Mode) @@ -183,10 +169,8 @@ void rtl8723a_set_FwPwrMode_cmd(struct rtw_adapter *padapter, u8 Mode) prevent conficting setting in Fw power */ /* saving sequence. 2010.06.07. Added by tynli. Suggested by SD3 yschang. */ - if ((Mode != PS_MODE_ACTIVE) && - (!IS_92C_SERIAL(pHalData->VersionID))) { + if (Mode != PS_MODE_ACTIVE && pHalData->rf_type != RF_2T2R) ODM_RF_Saving23a(&pHalData->odmpriv, true); - } H2CSetPwrMode.Mode = Mode; H2CSetPwrMode.SmartPS = pwrpriv->smart_ps; diff --git a/drivers/staging/rtl8723au/hal/rtl8723a_dm.c b/drivers/staging/rtl8723au/hal/rtl8723a_dm.c index fa826b068d11..1e831f2d1caf 100644 --- a/drivers/staging/rtl8723au/hal/rtl8723a_dm.c +++ b/drivers/staging/rtl8723au/hal/rtl8723a_dm.c @@ -94,8 +94,6 @@ void rtl8723a_init_dm_priv(struct rtw_adapter *Adapter) memset(pDM_Odm, 0, sizeof(*pDM_Odm)); pDM_Odm->Adapter = Adapter; - ODM_CmnInfoInit23a(pDM_Odm, ODM_CMNINFO_PLATFORM, 0x04); - ODM_CmnInfoInit23a(pDM_Odm, ODM_CMNINFO_INTERFACE, RTW_USB);/* RTL871X_HCI_TYPE */ ODM_CmnInfoInit23a(pDM_Odm, ODM_CMNINFO_IC_TYPE, ODM_RTL8723A); @@ -119,15 +117,7 @@ void rtl8723a_init_dm_priv(struct rtw_adapter *Adapter) ODM_CmnInfoInit23a(pDM_Odm, ODM_CMNINFO_EXT_LNA, true); ODM_CmnInfoInit23a(pDM_Odm, ODM_CMNINFO_EXT_PA, true); } - ODM_CmnInfoInit23a(pDM_Odm, ODM_CMNINFO_PATCH_ID, pHalData->CustomerID); ODM_CmnInfoInit23a(pDM_Odm, ODM_CMNINFO_BWIFI_TEST, Adapter->registrypriv.wifi_spec); - - if (pHalData->rf_type == RF_1T1R) - ODM_CmnInfoUpdate23a(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_1T1R); - else if (pHalData->rf_type == RF_2T2R) - ODM_CmnInfoUpdate23a(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_2T2R); - else if (pHalData->rf_type == RF_1T2R) - ODM_CmnInfoUpdate23a(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_1T2R); } static void Update_ODM_ComInfo_8723a(struct rtw_adapter *Adapter) @@ -136,16 +126,7 @@ static void Update_ODM_ComInfo_8723a(struct rtw_adapter *Adapter) struct dm_odm_t *pDM_Odm = &pHalData->odmpriv; struct dm_priv *pdmpriv = &pHalData->dmpriv; int i; - pdmpriv->InitODMFlag = ODM_BB_DIG | - ODM_BB_RA_MASK | - ODM_BB_DYNAMIC_TXPWR | - ODM_BB_FA_CNT | - ODM_BB_RSSI_MONITOR | - ODM_BB_CCK_PD | - ODM_BB_PWR_SAVE | - ODM_MAC_EDCA_TURBO | - ODM_RF_TX_PWR_TRACK | - ODM_RF_CALIBRATION; + pdmpriv->InitODMFlag = 0; /* Pointer reference */ rtl8723a_odm_support_ability_set(Adapter, DYNAMIC_ALL_FUNC_ENABLE); diff --git a/drivers/staging/rtl8723au/hal/rtl8723a_hal_init.c b/drivers/staging/rtl8723au/hal/rtl8723a_hal_init.c index a5eadd4e2580..04d01833dc30 100644 --- a/drivers/staging/rtl8723au/hal/rtl8723a_hal_init.c +++ b/drivers/staging/rtl8723au/hal/rtl8723a_hal_init.c @@ -95,7 +95,7 @@ static int _WriteFW(struct rtw_adapter *padapter, void *buffer, u32 size) goto exit; } RT_TRACE(_module_hal_init_c_, _drv_info_, - ("_WriteFW Done- for Normal chip.\n")); + "_WriteFW Done- for Normal chip.\n"); exit: return ret; @@ -115,13 +115,13 @@ static int _FWFreeToGo(struct rtw_adapter *padapter) if (counter >= POLLING_READY_TIMEOUT_COUNT) { RT_TRACE(_module_hal_init_c_, _drv_err_, - ("%s: chksum report fail! REG_MCUFWDL:0x%08x\n", - __func__, value32)); + "%s: chksum report fail! REG_MCUFWDL:0x%08x\n", + __func__, value32); return _FAIL; } RT_TRACE(_module_hal_init_c_, _drv_info_, - ("%s: Checksum report OK! REG_MCUFWDL:0x%08x\n", __func__, - value32)); + "%s: Checksum report OK! REG_MCUFWDL:0x%08x\n", __func__, + value32); value32 = rtl8723au_read32(padapter, REG_MCUFWDL); value32 |= MCUFWDL_RDY; @@ -134,17 +134,16 @@ static int _FWFreeToGo(struct rtw_adapter *padapter) value32 = rtl8723au_read32(padapter, REG_MCUFWDL); if (value32 & WINTINI_RDY) { RT_TRACE(_module_hal_init_c_, _drv_info_, - ("%s: Polling FW ready success!! " - "REG_MCUFWDL:0x%08x\n", - __func__, value32)); + "%s: Polling FW ready success!! REG_MCUFWDL:0x%08x\n", + __func__, value32); return _SUCCESS; } udelay(5); } while (counter++ < POLLING_READY_TIMEOUT_COUNT); RT_TRACE(_module_hal_init_c_, _drv_err_, - ("%s: Polling FW ready fail!! REG_MCUFWDL:0x%08x\n", - __func__, value32)); + "%s: Polling FW ready fail!! REG_MCUFWDL:0x%08x\n", + __func__, value32); return _FAIL; } @@ -173,8 +172,8 @@ void rtl8723a_FirmwareSelfReset(struct rtw_adapter *padapter) u1bTmp = rtl8723au_read8(padapter, REG_SYS_FUNC_EN + 1); } RT_TRACE(_module_hal_init_c_, _drv_info_, - ("-%s: 8051 reset success (%d)\n", __func__, - Delay)); + "-%s: 8051 reset success (%d)\n", __func__, + Delay); if ((Delay == 0)) { /* force firmware reset */ @@ -206,13 +205,12 @@ int rtl8723a_FirmwareDownload(struct rtw_adapter *padapter) int fw_size; static int log_version; - RT_TRACE(_module_hal_init_c_, _drv_info_, ("+%s\n", __func__)); + RT_TRACE(_module_hal_init_c_, _drv_info_, "+%s\n", __func__); if (IS_8723A_A_CUT(pHalData->VersionID)) { fw_name = "rtlwifi/rtl8723aufw_A.bin"; RT_TRACE(_module_hal_init_c_, _drv_info_, - ("rtl8723a_FirmwareDownload: R8723FwImageArray_UMC " - "for RTL8723A A CUT\n")); + "rtl8723a_FirmwareDownload: R8723FwImageArray_UMC for RTL8723A A CUT\n"); } else if (IS_8723A_B_CUT(pHalData->VersionID)) { /* WLAN Fw. */ if (padapter->registrypriv.wifi_spec == 1) { @@ -234,7 +232,7 @@ int rtl8723a_FirmwareDownload(struct rtw_adapter *padapter) /* <Roger_TODO> We should download proper RAM Code here to match the ROM code. */ RT_TRACE(_module_hal_init_c_, _drv_err_, - ("%s: unknow version!\n", __func__)); + "%s: unknown version!\n", __func__); rtStatus = _FAIL; goto Exit; } @@ -319,11 +317,11 @@ int rtl8723a_FirmwareDownload(struct rtw_adapter *padapter) rtStatus = _FWFreeToGo(padapter); if (_SUCCESS != rtStatus) { RT_TRACE(_module_hal_init_c_, _drv_err_, - ("DL Firmware failed!\n")); + "DL Firmware failed!\n"); goto Exit; } RT_TRACE(_module_hal_init_c_, _drv_info_, - ("Firmware is ready to run!\n")); + "Firmware is ready to run!\n"); Exit: kfree(firmware_buf); @@ -424,15 +422,14 @@ hal_ReadEFuse_WiFi(struct rtw_adapter *padapter, offset = GET_HDR_OFFSET_2_0(efuseHeader); ReadEFuseByte23a(padapter, eFuse_Addr++, &efuseExtHdr); - if (ALL_WORDS_DISABLED(efuseExtHdr)) { + if (ALL_WORDS_DISABLED(efuseExtHdr)) continue; - } offset |= ((efuseExtHdr & 0xF0) >> 1); - wden = (efuseExtHdr & 0x0F); + wden = efuseExtHdr & 0x0F; } else { - offset = ((efuseHeader >> 4) & 0x0f); - wden = (efuseHeader & 0x0f); + offset = (efuseHeader >> 4) & 0x0f; + wden = efuseHeader & 0x0f; } if (offset < EFUSE_MAX_SECTION_8723A) { @@ -524,15 +521,14 @@ hal_ReadEFuse_BT(struct rtw_adapter *padapter, ReadEFuseByte23a(padapter, eFuse_Addr++, &efuseExtHdr); - if (ALL_WORDS_DISABLED(efuseExtHdr)) { + if (ALL_WORDS_DISABLED(efuseExtHdr)) continue; - } offset |= ((efuseExtHdr & 0xF0) >> 1); - wden = (efuseExtHdr & 0x0F); + wden = efuseExtHdr & 0x0F; } else { - offset = ((efuseHeader >> 4) & 0x0f); - wden = (efuseHeader & 0x0f); + offset = (efuseHeader >> 4) & 0x0f; + wden = efuseHeader & 0x0f; } if (offset < EFUSE_BT_MAX_SECTION) { @@ -630,9 +626,8 @@ u16 rtl8723a_EfuseGetCurrentSize_WiFi(struct rtw_adapter *padapter) hoffset = GET_HDR_OFFSET_2_0(efuse_data); efuse_addr++; efuse_OneByteRead23a(padapter, efuse_addr, &efuse_data); - if (ALL_WORDS_DISABLED(efuse_data)) { + if (ALL_WORDS_DISABLED(efuse_data)) continue; - } hoffset |= ((efuse_data & 0xF0) >> 1); hworden = efuse_data & 0x0F; @@ -721,9 +716,8 @@ u16 rtl8723a_EfuseGetCurrentSize_BT(struct rtw_adapter *padapter) } /* Check if we need to check next bank efuse */ - if (efuse_addr < retU2) { + if (efuse_addr < retU2) break; /* don't need to check next bank. */ - } } retU2 = ((bank - 1) * EFUSE_BT_REAL_BANK_CONTENT_LEN) + efuse_addr; @@ -744,7 +738,7 @@ void rtl8723a_read_chip_version(struct rtw_adapter *padapter) value32 = rtl8723au_read32(padapter, REG_SYS_CFG); ChipVersion.ICType = CHIP_8723A; ChipVersion.ChipType = ((value32 & RTL_ID) ? TEST_CHIP : NORMAL_CHIP); - ChipVersion.RFType = RF_TYPE_1T1R; + pHalData->rf_type = RF_1T1R; ChipVersion.VendorType = ((value32 & VENDOR_ID) ? CHIP_VENDOR_UMC : CHIP_VENDOR_TSMC); ChipVersion.CUTVersion = (value32 & CHIP_VER_RTL_MASK) >> CHIP_VER_RTL_SHIFT; /* IC version (CUT) */ @@ -755,7 +749,7 @@ void rtl8723a_read_chip_version(struct rtw_adapter *padapter) value32 = rtl8723au_read32(padapter, REG_GPIO_OUTSTS); /* ROM code version. */ - ChipVersion.ROMVer = ((value32 & RF_RL_ID) >> 20); + ChipVersion.ROMVer = (value32 & RF_RL_ID) >> 20; /* For multi-function consideration. Added by Roger, 2010.10.06. */ pHalData->MultiFunc = RT_MULTI_FUNC_NONE; @@ -768,16 +762,8 @@ void rtl8723a_read_chip_version(struct rtw_adapter *padapter) pHalData->PolarityCtl = ((value32 & WL_HWPDN_SL) ? RT_POLARITY_HIGH_ACT : RT_POLARITY_LOW_ACT); - dump_chip_info23a(ChipVersion); pHalData->VersionID = ChipVersion; - if (IS_1T2R(ChipVersion)) - pHalData->rf_type = RF_1T2R; - else if (IS_2T2R(ChipVersion)) - pHalData->rf_type = RF_2T2R; - else - pHalData->rf_type = RF_1T1R; - MSG_8723A("RF_Type is %x!!\n", pHalData->rf_type); } @@ -831,7 +817,7 @@ static void ResumeTxBeacon(struct rtw_adapter *padapter) we record the value */ /* which should be read from register to a global variable. */ - RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("+ResumeTxBeacon\n")); + RT_TRACE(_module_hci_hal_init_c_, _drv_info_, "+ResumeTxBeacon\n"); pHalData->RegFwHwTxQCtrl |= BIT(6); rtl8723au_write8(padapter, REG_FWHW_TXQ_CTRL + 2, @@ -849,7 +835,7 @@ static void StopTxBeacon(struct rtw_adapter *padapter) we record the value */ /* which should be read from register to a global variable. */ - RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("+StopTxBeacon\n")); + RT_TRACE(_module_hci_hal_init_c_, _drv_info_, "+StopTxBeacon\n"); pHalData->RegFwHwTxQCtrl &= ~BIT(6); rtl8723au_write8(padapter, REG_FWHW_TXQ_CTRL + 2, @@ -995,7 +981,7 @@ int c2h_handler_8723a(struct rtw_adapter *padapter, struct c2h_evt_hdr *c2h_evt) switch (c2h_evt->id) { case C2H_DBG: RT_TRACE(_module_hal_init_c_, _drv_info_, - ("C2HCommandHandler: %s\n", c2h_evt->payload)); + "C2HCommandHandler: %s\n", c2h_evt->payload); break; case C2H_CCX_TX_RPT: @@ -1005,22 +991,22 @@ int c2h_handler_8723a(struct rtw_adapter *padapter, struct c2h_evt_hdr *c2h_evt) break; case C2H_HW_INFO_EXCH: RT_TRACE(_module_hal_init_c_, _drv_info_, - ("[BT], C2H_HW_INFO_EXCH\n")); + "[BT], C2H_HW_INFO_EXCH\n"); for (i = 0; i < c2h_evt->plen; i++) { RT_TRACE(_module_hal_init_c_, _drv_info_, - ("[BT], tmpBuf[%d]= 0x%x\n", i, - c2h_evt->payload[i])); + "[BT], tmpBuf[%d]= 0x%x\n", i, + c2h_evt->payload[i]); } break; case C2H_C2H_H2C_TEST: RT_TRACE(_module_hal_init_c_, _drv_info_, - ("[BT], C2H_H2C_TEST\n")); + "[BT], C2H_H2C_TEST\n"); RT_TRACE(_module_hal_init_c_, _drv_info_, - ("[BT], tmpBuf[0]/[1]/[2]/[3]/[4]= 0x%x/ 0x%x/ " - "0x%x/ 0x%x/ 0x%x\n", c2h_evt->payload[0], - c2h_evt->payload[1], c2h_evt->payload[2], - c2h_evt->payload[3], c2h_evt->payload[4])); + "[BT], tmpBuf[0]/[1]/[2]/[3]/[4]= 0x%x/ 0x%x/ 0x%x/ 0x%x/ 0x%x\n", + c2h_evt->payload[0], + c2h_evt->payload[1], c2h_evt->payload[2], + c2h_evt->payload[3], c2h_evt->payload[4]); break; case C2H_BT_INFO: @@ -1095,7 +1081,6 @@ void rtl8723a_init_default_value(struct rtw_adapter *padapter) pdmpriv = &pHalData->dmpriv; /* init default value */ - pHalData->fw_ractrl = false; pHalData->bIQKInitialized = false; if (!padapter->pwrctrlpriv.bkeepfwalive) pHalData->LastHMEBoxNum = 0; @@ -1149,14 +1134,13 @@ static int _LLTWrite(struct rtw_adapter *padapter, u32 address, u32 data) /* polling */ do { value = rtl8723au_read32(padapter, LLTReg); - if (_LLT_NO_ACTIVE == _LLT_OP_VALUE(value)) { + if (_LLT_NO_ACTIVE == _LLT_OP_VALUE(value)) break; - } if (count > POLLING_LLT_THRESHOLD) { RT_TRACE(_module_hal_init_c_, _drv_err_, - ("Failed to polling write LLT done at " - "address %d!\n", address)); + "Failed to polling write LLT done at address %d!\n", + address); status = _FAIL; break; } @@ -1174,16 +1158,14 @@ int InitLLTTable23a(struct rtw_adapter *padapter, u32 boundary) for (i = 0; i < (txpktbuf_bndy - 1); i++) { status = _LLTWrite(padapter, i, i + 1); - if (status != _SUCCESS) { + if (status != _SUCCESS) return status; - } } /* end of list */ status = _LLTWrite(padapter, (txpktbuf_bndy - 1), 0xFF); - if (status != _SUCCESS) { + if (status != _SUCCESS) return status; - } /* Make the other pages as ring buffer */ /* This ring buffer is used as beacon buffer if we config this @@ -1191,16 +1173,14 @@ int InitLLTTable23a(struct rtw_adapter *padapter, u32 boundary) /* Otherwise used as local loopback buffer. */ for (i = txpktbuf_bndy; i < Last_Entry_Of_TxPktBuf; i++) { status = _LLTWrite(padapter, i, (i + 1)); - if (_SUCCESS != status) { + if (_SUCCESS != status) return status; - } } /* Let last entry point to the start entry of ring buffer */ status = _LLTWrite(padapter, Last_Entry_Of_TxPktBuf, txpktbuf_bndy); - if (status != _SUCCESS) { + if (status != _SUCCESS) return status; - } return status; } @@ -1272,8 +1252,6 @@ e. SYS_FUNC_EN 0x02[7:0] = 0x14 reset BB state machine /* 2010/08/12 MH We need to set BB/GLBAL reset to save power for SS mode. */ - -/* RT_TRACE(COMP_INIT, DBG_LOUD, ("======> RF off and reset BB.\n")); */ } static void _ResetDigitalProcedure1_92C(struct rtw_adapter *padapter, @@ -1402,8 +1380,6 @@ static void _DisableAnalog(struct rtw_adapter *padapter, bool bWithoutHWSM) value8 = rtl8723au_read8(padapter, REG_LDOV12D_CTRL); value8 &= ~LDV12_EN; rtl8723au_write8(padapter, REG_LDOV12D_CTRL, value8); -/* RT_TRACE(COMP_INIT, DBG_LOUD, - (" REG_LDOV12D_CTRL Reg0x21:0x%02x.\n", value8)); */ } /***************************** @@ -1435,9 +1411,9 @@ static void _DisableAnalog(struct rtw_adapter *padapter, bool bWithoutHWSM) /* HW Auto state machine */ int CardDisableHWSM(struct rtw_adapter *padapter, u8 resetMCU) { - if (padapter->bSurpriseRemoved) { + if (padapter->bSurpriseRemoved) return _SUCCESS; - } + /* RF Off Sequence ==== */ _DisableRFAFEAndResetBB8192C(padapter); @@ -1451,7 +1427,7 @@ int CardDisableHWSM(struct rtw_adapter *padapter, u8 resetMCU) _DisableAnalog(padapter, false); RT_TRACE(_module_hci_hal_init_c_, _drv_info_, - ("======> Card disable finished.\n")); + "======> Card disable finished.\n"); return _SUCCESS; } @@ -1459,9 +1435,8 @@ int CardDisableHWSM(struct rtw_adapter *padapter, u8 resetMCU) /* without HW Auto state machine */ int CardDisableWithoutHWSM(struct rtw_adapter *padapter) { - if (padapter->bSurpriseRemoved) { + if (padapter->bSurpriseRemoved) return _SUCCESS; - } /* RF Off Sequence ==== */ _DisableRFAFEAndResetBB8192C(padapter); @@ -1478,8 +1453,6 @@ int CardDisableWithoutHWSM(struct rtw_adapter *padapter) /* ==== Disable analog sequence === */ _DisableAnalog(padapter, true); - /* RT_TRACE(COMP_INIT, DBG_LOUD, - ("<====== Card Disable Without HWSM .\n")); */ return _SUCCESS; } @@ -1496,7 +1469,7 @@ void Hal_InitPGData(struct rtw_adapter *padapter, u8 *PROMContent) } } else { RT_TRACE(_module_hci_hal_init_c_, _drv_notice_, - ("AutoLoad Fail reported from CR9346!!\n")); + "AutoLoad Fail reported from CR9346!!\n"); /* update to default value 0xFF */ if (!pEEPROM->EepromOrEfuse) EFUSE_ShadowMapUpdate23a(padapter, EFUSE_WIFI); @@ -1521,7 +1494,7 @@ void Hal_EfuseParseIDCode(struct rtw_adapter *padapter, u8 *hwinfo) } RT_TRACE(_module_hal_init_c_, _drv_info_, - ("EEPROM ID = 0x%04x\n", EEPROMId)); + "EEPROM ID = 0x%04x\n", EEPROMId); } static void Hal_EEValueCheck(u8 EEType, void *pInValue, void *pOutValue) @@ -1536,9 +1509,8 @@ static void Hal_EEValueCheck(u8 EEType, void *pInValue, void *pOutValue) *pOut = *pIn; else { RT_TRACE(_module_hci_hal_init_c_, _drv_err_, - ("EETYPE_TX_PWR, value =%d is invalid, set " - "to default = 0x%x\n", - *pIn, EEPROM_Default_TxPowerLevel)); + "EETYPE_TX_PWR, value =%d is invalid, set to default = 0x%x\n", + *pIn, EEPROM_Default_TxPowerLevel); *pOut = EEPROM_Default_TxPowerLevel; } } @@ -1676,35 +1648,34 @@ Hal_EfuseParsetxpowerinfo_8723A(struct rtw_adapter *padapter, for (rfPath = 0; rfPath < RF_PATH_MAX; rfPath++) { for (ch = 0; ch < CHANNEL_MAX_NUMBER; ch++) { RT_TRACE(_module_hci_hal_init_c_, _drv_info_, - ("RF(%u)-Ch(%u) [CCK / HT40_1S / HT40_2S] = " - "[0x%x / 0x%x / 0x%x]\n", - rfPath, ch, - pHalData->TxPwrLevelCck[rfPath][ch], - pHalData->TxPwrLevelHT40_1S[rfPath][ch], - pHalData->TxPwrLevelHT40_2S[rfPath][ch])); + "RF(%u)-Ch(%u) [CCK / HT40_1S / HT40_2S] = [0x%x / 0x%x / 0x%x]\n", + rfPath, ch, + pHalData->TxPwrLevelCck[rfPath][ch], + pHalData->TxPwrLevelHT40_1S[rfPath][ch], + pHalData->TxPwrLevelHT40_2S[rfPath][ch]); } } for (ch = 0; ch < CHANNEL_MAX_NUMBER; ch++) { RT_TRACE(_module_hci_hal_init_c_, _drv_info_, - ("RF-A Ht20 to HT40 Diff[%u] = 0x%x(%d)\n", ch, - pHalData->TxPwrHt20Diff[RF_PATH_A][ch], - pHalData->TxPwrHt20Diff[RF_PATH_A][ch])); + "RF-A Ht20 to HT40 Diff[%u] = 0x%x(%d)\n", ch, + pHalData->TxPwrHt20Diff[RF_PATH_A][ch], + pHalData->TxPwrHt20Diff[RF_PATH_A][ch]); } for (ch = 0; ch < CHANNEL_MAX_NUMBER; ch++) RT_TRACE(_module_hci_hal_init_c_, _drv_info_, - ("RF-A Legacy to Ht40 Diff[%u] = 0x%x\n", ch, - pHalData->TxPwrLegacyHtDiff[RF_PATH_A][ch])); + "RF-A Legacy to Ht40 Diff[%u] = 0x%x\n", ch, + pHalData->TxPwrLegacyHtDiff[RF_PATH_A][ch]); for (ch = 0; ch < CHANNEL_MAX_NUMBER; ch++) { RT_TRACE(_module_hci_hal_init_c_, _drv_info_, - ("RF-B Ht20 to HT40 Diff[%u] = 0x%x(%d)\n", ch, - pHalData->TxPwrHt20Diff[RF_PATH_B][ch], - pHalData->TxPwrHt20Diff[RF_PATH_B][ch])); + "RF-B Ht20 to HT40 Diff[%u] = 0x%x(%d)\n", ch, + pHalData->TxPwrHt20Diff[RF_PATH_B][ch], + pHalData->TxPwrHt20Diff[RF_PATH_B][ch]); } for (ch = 0; ch < CHANNEL_MAX_NUMBER; ch++) RT_TRACE(_module_hci_hal_init_c_, _drv_info_, - ("RF-B Legacy to HT40 Diff[%u] = 0x%x\n", ch, - pHalData->TxPwrLegacyHtDiff[RF_PATH_B][ch])); + "RF-B Legacy to HT40 Diff[%u] = 0x%x\n", ch, + pHalData->TxPwrLegacyHtDiff[RF_PATH_B][ch]); if (!AutoLoadFail) { struct registry_priv *registry_par = &padapter->registrypriv; if (registry_par->regulatory_tid == 0xff) { @@ -1721,7 +1692,7 @@ Hal_EfuseParsetxpowerinfo_8723A(struct rtw_adapter *padapter, pHalData->EEPROMRegulatory = 0; } RT_TRACE(_module_hci_hal_init_c_, _drv_info_, - ("EEPROMRegulatory = 0x%x\n", pHalData->EEPROMRegulatory)); + "EEPROMRegulatory = 0x%x\n", pHalData->EEPROMRegulatory); if (!AutoLoadFail) pHalData->bTXPowerDataReadFromEEPORM = true; @@ -1747,8 +1718,8 @@ Hal_EfuseParseBTCoexistInfo_8723A(struct rtw_adapter *padapter, /* eeprom spec */ tempval = hwinfo[RF_OPTION4_8723A]; pHalData->EEPROMBluetoothAntNum = (tempval & 0x1); - pHalData->EEPROMBluetoothAntIsolation = ((tempval & 0x10) >> 4); - pHalData->EEPROMBluetoothRadioShared = ((tempval & 0x20) >> 5); + pHalData->EEPROMBluetoothAntIsolation = (tempval & 0x10) >> 4; + pHalData->EEPROMBluetoothRadioShared = (tempval & 0x20) >> 5; } else { pHalData->EEPROMBluetoothCoexist = 0; pHalData->EEPROMBluetoothType = BT_RTL8723A; @@ -1771,8 +1742,8 @@ Hal_EfuseParseEEPROMVer(struct rtw_adapter *padapter, else pHalData->EEPROMVersion = 1; RT_TRACE(_module_hci_hal_init_c_, _drv_info_, - ("Hal_EfuseParseEEPROMVer(), EEVer = %d\n", - pHalData->EEPROMVersion)); + "Hal_EfuseParseEEPROMVer(), EEVer = %d\n", + pHalData->EEPROMVersion); } void @@ -1805,10 +1776,10 @@ Hal_EfuseParseCustomerID(struct rtw_adapter *padapter, pHalData->EEPROMSubCustomerID = 0; } RT_TRACE(_module_hci_hal_init_c_, _drv_info_, - ("EEPROM Customer ID: 0x%2x\n", pHalData->EEPROMCustomerID)); + "EEPROM Customer ID: 0x%2x\n", pHalData->EEPROMCustomerID); RT_TRACE(_module_hci_hal_init_c_, _drv_info_, - ("EEPROM SubCustomer ID: 0x%02x\n", - pHalData->EEPROMSubCustomerID)); + "EEPROM SubCustomer ID: 0x%02x\n", + pHalData->EEPROMSubCustomerID); } void @@ -1837,8 +1808,8 @@ Hal_EfuseParseXtal_8723A(struct rtw_adapter *pAdapter, pHalData->CrystalCap = EEPROM_Default_CrystalCap_8723A; } RT_TRACE(_module_hci_hal_init_c_, _drv_info_, - ("%s: CrystalCap = 0x%2x\n", __func__, - pHalData->CrystalCap)); + "%s: CrystalCap = 0x%2x\n", __func__, + pHalData->CrystalCap); } void @@ -1875,9 +1846,8 @@ static void rtl8723a_cal_txdesc_chksum(struct tx_desc *ptxdesc) /* Clear first */ ptxdesc->txdw7 &= cpu_to_le32(0xffff0000); - for (index = 0; index < count; index++) { + for (index = 0; index < count; index++) checksum ^= le16_to_cpu(*(usPtr + index)); - } ptxdesc->txdw7 |= cpu_to_le32(checksum & 0x0000ffff); } @@ -1925,9 +1895,8 @@ void rtl8723a_fill_fake_txdesc(struct rtw_adapter *padapter, u8 *pDesc, ptxdesc->txdw3 |= cpu_to_le32((8 << 28)); } - if (true == IsBTQosNull) { + if (true == IsBTQosNull) ptxdesc->txdw2 |= cpu_to_le32(BIT(23)); /* BT NULL */ - } /* offset 16 */ ptxdesc->txdw4 |= cpu_to_le32(BIT(8)); /* driver uses rate */ diff --git a/drivers/staging/rtl8723au/hal/rtl8723a_phycfg.c b/drivers/staging/rtl8723au/hal/rtl8723a_phycfg.c index 19dc5e3b2e2e..46a30659c96f 100644 --- a/drivers/staging/rtl8723au/hal/rtl8723a_phycfg.c +++ b/drivers/staging/rtl8723au/hal/rtl8723a_phycfg.c @@ -121,18 +121,15 @@ PHY_SetBBReg(struct rtw_adapter *Adapter, u32 RegAddr, u32 BitMask, u32 Data) { u32 OriginalValue, BitShift; - /* RT_TRACE(COMP_RF, DBG_TRACE, ("--->PHY_SetBBReg(): RegAddr(%#lx), BitMask(%#lx), Data(%#lx)\n", RegAddr, BitMask, Data)); */ - if (BitMask != bMaskDWord) {/* if not "double word" write */ OriginalValue = rtl8723au_read32(Adapter, RegAddr); BitShift = phy_CalculateBitShift(BitMask); - Data = ((OriginalValue & (~BitMask)) | (Data << BitShift)); + Data = (OriginalValue & (~BitMask)) | (Data << BitShift); } rtl8723au_write32(Adapter, RegAddr, Data); /* RTPRINT(FPHY, PHY_BBW, ("BBW MASK = 0x%lx Addr[0x%lx]= 0x%lx\n", BitMask, RegAddr, Data)); */ - /* RT_TRACE(COMP_RF, DBG_TRACE, ("<---PHY_SetBBReg(): RegAddr(%#lx), BitMask(%#lx), Data(%#lx)\n", RegAddr, BitMask, Data)); */ } /* */ @@ -190,25 +187,24 @@ phy_RFSerialRead(struct rtw_adapter *Adapter, enum RF_RADIO_PATH eRFPath, /* For 92S LSSI Read RFLSSIRead */ /* For RF A/B write 0x824/82c(does not work in the future) */ /* We must use 0x824 for RF A and B to execute read trigger */ - tmplong = PHY_QueryBBReg(Adapter, rFPGA0_XA_HSSIParameter2, bMaskDWord); + tmplong = rtl8723au_read32(Adapter, rFPGA0_XA_HSSIParameter2); if (eRFPath == RF_PATH_A) tmplong2 = tmplong; else - tmplong2 = PHY_QueryBBReg(Adapter, pPhyReg->rfHSSIPara2, - bMaskDWord); + tmplong2 = rtl8723au_read32(Adapter, pPhyReg->rfHSSIPara2); tmplong2 = (tmplong2 & ~bLSSIReadAddress) | (NewOffset << 23) | bLSSIReadEdge; /* T65 RF */ - PHY_SetBBReg(Adapter, rFPGA0_XA_HSSIParameter2, - bMaskDWord, tmplong & (~bLSSIReadEdge)); + rtl8723au_write32(Adapter, rFPGA0_XA_HSSIParameter2, + tmplong & (~bLSSIReadEdge)); udelay(10);/* PlatformStallExecution(10); */ - PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, bMaskDWord, tmplong2); + rtl8723au_write32(Adapter, pPhyReg->rfHSSIPara2, tmplong2); udelay(100);/* PlatformStallExecution(100); */ - PHY_SetBBReg(Adapter, rFPGA0_XA_HSSIParameter2, bMaskDWord, - tmplong | bLSSIReadEdge); + rtl8723au_write32(Adapter, rFPGA0_XA_HSSIParameter2, + tmplong | bLSSIReadEdge); udelay(10);/* PlatformStallExecution(10); */ if (eRFPath == RF_PATH_A) @@ -319,9 +315,7 @@ phy_RFSerialWrite(struct rtw_adapter *Adapter, enum RF_RADIO_PATH eRFPath, /* */ /* Write Operation */ /* */ - PHY_SetBBReg(Adapter, pPhyReg->rf3wireOffset, bMaskDWord, DataAndAddr); - /* RTPRINT(FPHY, PHY_RFW, ("RFW-%d Addr[0x%lx]= 0x%lx\n", eRFPath, pPhyReg->rf3wireOffset, DataAndAddr)); */ - + rtl8723au_write32(Adapter, pPhyReg->rf3wireOffset, DataAndAddr); } /** @@ -392,7 +386,7 @@ PHY_SetRFReg(struct rtw_adapter *Adapter, enum RF_RADIO_PATH eRFPath, if (BitMask != bRFRegOffsetMask) { Original_Value = phy_RFSerialRead(Adapter, eRFPath, RegAddr); BitShift = phy_CalculateBitShift(BitMask); - Data = ((Original_Value & (~BitMask)) | (Data << BitShift)); + Data = (Original_Value & (~BitMask)) | (Data << BitShift); } phy_RFSerialWrite(Adapter, eRFPath, RegAddr, Data); @@ -419,7 +413,6 @@ PHY_SetRFReg(struct rtw_adapter *Adapter, enum RF_RADIO_PATH eRFPath, int PHY_MACConfig8723A(struct rtw_adapter *Adapter) { struct hal_data_8723a *pHalData = GET_HAL_DATA(Adapter); - bool is92C = IS_92C_SERIAL(pHalData->VersionID); /* */ /* Config MAC */ @@ -427,9 +420,9 @@ int PHY_MACConfig8723A(struct rtw_adapter *Adapter) ODM_ReadAndConfig_MAC_REG_8723A(&pHalData->odmpriv); /* 2010.07.13 AMPDU aggregation number 9 */ - /* rtw_write16(Adapter, REG_MAX_AGGR_NUM, MAX_AGGR_NUM); */ rtl8723au_write8(Adapter, REG_MAX_AGGR_NUM, 0x0A); - if (is92C && (BOARD_USB_DONGLE == pHalData->BoardType)) + if (pHalData->rf_type == RF_2T2R && + BOARD_USB_DONGLE == pHalData->BoardType) rtl8723au_write8(Adapter, 0x40, 0x04); return _SUCCESS; @@ -552,131 +545,51 @@ storePwrIndexDiffRateOffset(struct rtw_adapter *Adapter, u32 RegAddr, if (RegAddr == rTxAGC_A_Rate18_06) { pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][0] = Data; - /* RT_TRACE(COMP_INIT, DBG_TRACE, - ("MCSTxPowerLevelOriginalOffset[%d][0] = 0x%lx\n", - pHalData->pwrGroupCnt, */ - /* pHalData->MCSTxPowerLevelOriginalOffset[ - pHalData->pwrGroupCnt][0])); */ } if (RegAddr == rTxAGC_A_Rate54_24) { pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][1] = Data; - /* RT_TRACE(COMP_INIT, DBG_TRACE, - ("MCSTxPowerLevelOriginalOffset[%d][1] = 0x%lx\n", - pHalData->pwrGroupCnt, */ - /* pHalData->MCSTxPowerLevelOriginalOffset[ - pHalData->pwrGroupCnt][1])); */ } if (RegAddr == rTxAGC_A_CCK1_Mcs32) { pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][6] = Data; - /* RT_TRACE(COMP_INIT, DBG_TRACE, - ("MCSTxPowerLevelOriginalOffset[%d][6] = 0x%lx\n", - pHalData->pwrGroupCnt, */ - /* pHalData->MCSTxPowerLevelOriginalOffset[ - pHalData->pwrGroupCnt][6])); */ } if (RegAddr == rTxAGC_B_CCK11_A_CCK2_11 && BitMask == 0xffffff00) { pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][7] = Data; - /* RT_TRACE(COMP_INIT, DBG_TRACE, - ("MCSTxPowerLevelOriginalOffset[%d][7] = 0x%lx\n", - pHalData->pwrGroupCnt, */ - /* pHalData->MCSTxPowerLevelOriginalOffset[ - pHalData->pwrGroupCnt][7])); */ } if (RegAddr == rTxAGC_A_Mcs03_Mcs00) { pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][2] = Data; - /* RT_TRACE(COMP_INIT, DBG_TRACE, - ("MCSTxPowerLevelOriginalOffset[%d][2] = 0x%lx\n", - pHalData->pwrGroupCnt, */ - /* pHalData->MCSTxPowerLevelOriginalOffset[ - pHalData->pwrGroupCnt][2])); */ } if (RegAddr == rTxAGC_A_Mcs07_Mcs04) { pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][3] = Data; - /* RT_TRACE(COMP_INIT, DBG_TRACE, - ("MCSTxPowerLevelOriginalOffset[%d][3] = 0x%lx\n", - pHalData->pwrGroupCnt, */ - /* pHalData->MCSTxPowerLevelOriginalOffset[ - pHalData->pwrGroupCnt][3])); */ } if (RegAddr == rTxAGC_A_Mcs11_Mcs08) { pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][4] = Data; - /* RT_TRACE(COMP_INIT, DBG_TRACE, - ("MCSTxPowerLevelOriginalOffset[%d][4] = 0x%lx\n", - pHalData->pwrGroupCnt, */ - /* pHalData->MCSTxPowerLevelOriginalOffset[ - pHalData->pwrGroupCnt][4])); */ } if (RegAddr == rTxAGC_A_Mcs15_Mcs12) { pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][5] = Data; - /* RT_TRACE(COMP_INIT, DBG_TRACE, - ("MCSTxPowerLevelOriginalOffset[%d][5] = 0x%lx\n", - pHalData->pwrGroupCnt, */ - /* pHalData->MCSTxPowerLevelOriginalOffset[ - pHalData->pwrGroupCnt][5])); */ } if (RegAddr == rTxAGC_B_Rate18_06) { pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][8] = Data; - /* RT_TRACE(COMP_INIT, DBG_TRACE, - ("MCSTxPowerLevelOriginalOffset[%d][8] = 0x%lx\n", - pHalData->pwrGroupCnt, */ - /* pHalData->MCSTxPowerLevelOriginalOffset[ - pHalData->pwrGroupCnt][8])); */ } if (RegAddr == rTxAGC_B_Rate54_24) { pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][9] = Data; - /* RT_TRACE(COMP_INIT, DBG_TRACE, - ("MCSTxPowerLevelOriginalOffset[%d][9] = 0x%lx\n", - pHalData->pwrGroupCnt, */ - /* pHalData->MCSTxPowerLevelOriginalOffset[ - pHalData->pwrGroupCnt][9])); */ } if (RegAddr == rTxAGC_B_CCK1_55_Mcs32) { pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][14] = Data; - /* RT_TRACE(COMP_INIT, DBG_TRACE, - ("MCSTxPowerLevelOriginalOffset[%d][14] = 0x%lx\n", - pHalData->pwrGroupCnt, */ - /* pHalData->MCSTxPowerLevelOriginalOffset[ - pHalData->pwrGroupCnt][14])); */ } if (RegAddr == rTxAGC_B_CCK11_A_CCK2_11 && BitMask == 0x000000ff) { pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][15] = Data; - /* RT_TRACE(COMP_INIT, DBG_TRACE, - ("MCSTxPowerLevelOriginalOffset[%d][15] = 0x%lx\n", - pHalData->pwrGroupCnt, */ - /* pHalData->MCSTxPowerLevelOriginalOffset[ - pHalData->pwrGroupCnt][15])); */ } if (RegAddr == rTxAGC_B_Mcs03_Mcs00) { pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][10] = Data; - /* RT_TRACE(COMP_INIT, DBG_TRACE, - ("MCSTxPowerLevelOriginalOffset[%d][10] = 0x%lx\n", - pHalData->pwrGroupCnt, */ - /* pHalData->MCSTxPowerLevelOriginalOffset[ - pHalData->pwrGroupCnt][10])); */ } if (RegAddr == rTxAGC_B_Mcs07_Mcs04) { pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][11] = Data; - /* RT_TRACE(COMP_INIT, DBG_TRACE, - ("MCSTxPowerLevelOriginalOffset[%d][11] = 0x%lx\n", - pHalData->pwrGroupCnt, */ - /* pHalData->MCSTxPowerLevelOriginalOffset[ - pHalData->pwrGroupCnt][11])); */ } if (RegAddr == rTxAGC_B_Mcs11_Mcs08) { pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][12] = Data; - /* RT_TRACE(COMP_INIT, DBG_TRACE, - ("MCSTxPowerLevelOriginalOffset[%d][12] = 0x%lx\n", - pHalData->pwrGroupCnt, */ - /* pHalData->MCSTxPowerLevelOriginalOffset[ - pHalData->pwrGroupCnt][12])); */ } if (RegAddr == rTxAGC_B_Mcs15_Mcs12) { pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][13] = Data; - /* RT_TRACE(COMP_INIT, DBG_TRACE, - ("MCSTxPowerLevelOriginalOffset[%d][13] = 0x%lx\n", - pHalData->pwrGroupCnt, */ - /* pHalData->MCSTxPowerLevelOriginalOffset[ - pHalData->pwrGroupCnt][13])); */ pHalData->pwrGroupCnt++; } } @@ -831,7 +744,7 @@ PHY_BBConfig8723A(struct rtw_adapter *Adapter) (CrystalCap | (CrystalCap << 6))); } - PHY_SetBBReg(Adapter, REG_LDOA15_CTRL, bMaskDWord, 0x01572505); + rtl8723au_write32(Adapter, REG_LDOA15_CTRL, 0x01572505); return rtStatus; } @@ -920,10 +833,6 @@ _PHY_SetBWMode23a92C(struct rtw_adapter *Adapter) u8 regBwOpMode; u8 regRRSR_RSC; - /* There is no 40MHz mode in RF_8225. */ - if (pHalData->rf_chip == RF_8225) - return; - if (Adapter->bDriverStopped) return; @@ -982,10 +891,7 @@ _PHY_SetBWMode23a92C(struct rtw_adapter *Adapter) break; default: - /*RT_TRACE(COMP_DBG, DBG_LOUD, - ("PHY_SetBWMode23aCallback8192C(): unknown Bandwidth: %#X\n" \ - , pHalData->CurrentChannelBW));*/ - break; + break; } /* Skip over setting of J-mode in BB register here. Default value is "None J mode". Emily 20070315 */ @@ -994,41 +900,8 @@ _PHY_SetBWMode23a92C(struct rtw_adapter *Adapter) /* NowL = PlatformEFIORead4Byte(Adapter, TSFR); */ /* NowH = PlatformEFIORead4Byte(Adapter, TSFR+4); */ /* EndTime = ((u64)NowH << 32) + NowL; */ - /* RT_TRACE(COMP_SCAN, DBG_LOUD, ("SetBWMode23aCallback8190Pci: time - of SetBWMode23a = %I64d us!\n", (EndTime - BeginTime))); */ - - /* 3<3>Set RF related register */ - switch (pHalData->rf_chip) { - case RF_8225: - /* PHY_SetRF8225Bandwidth(Adapter, - pHalData->CurrentChannelBW); */ - break; - - case RF_8256: - /* Please implement this function in Hal8190PciPhy8256.c */ - /* PHY_SetRF8256Bandwidth(Adapter, - pHalData->CurrentChannelBW); */ - break; - - case RF_8258: - /* Please implement this function in Hal8190PciPhy8258.c */ - /* PHY_SetRF8258Bandwidth(); */ - break; - - case RF_6052: - rtl8723a_phy_rf6052set_bw(Adapter, pHalData->CurrentChannelBW); - break; - - default: - /* RT_ASSERT(false, ("Unknown RFChipID: %d\n", - pHalData->RFChipID)); */ - break; - } - - /* pHalData->SetBWMode23aInProgress = false; */ - /* RT_TRACE(COMP_SCAN, DBG_LOUD, - ("<== PHY_SetBWMode23aCallback8192C() \n")); */ + rtl8723a_phy_rf6052set_bw(Adapter, pHalData->CurrentChannelBW); } /*----------------------------------------------------------------------------- diff --git a/drivers/staging/rtl8723au/hal/rtl8723a_rf6052.c b/drivers/staging/rtl8723au/hal/rtl8723a_rf6052.c index 1aad4384471c..3e3f18634ffe 100644 --- a/drivers/staging/rtl8723au/hal/rtl8723a_rf6052.c +++ b/drivers/staging/rtl8723au/hal/rtl8723a_rf6052.c @@ -267,8 +267,8 @@ getTxPowerWriteValByRegulatory(struct rtw_adapter *Adapter, u8 Channel, break; case 2: /* Better regulatory */ /* don't increase any power diff */ - writeVal = ((index < 2) ? powerBase0[rf] : - powerBase1[rf]); + writeVal = (index < 2) ? powerBase0[rf] : + powerBase1[rf]; break; case 3: /* Customer defined power diff. */ chnlGroup = 0; @@ -353,7 +353,7 @@ static void writeOFDMPowerReg(struct rtw_adapter *Adapter, u8 index, else RegOffset = RegOffset_B[index]; - PHY_SetBBReg(Adapter, RegOffset, bMaskDWord, writeVal); + rtl8723au_write32(Adapter, RegOffset, writeVal); /* 201005115 Joseph: Set Tx Power diff for Tx power training mechanism. */ diff --git a/drivers/staging/rtl8723au/hal/rtl8723au_recv.c b/drivers/staging/rtl8723au/hal/rtl8723au_recv.c index 6075b6dc1bee..0fec84bcb5d9 100644 --- a/drivers/staging/rtl8723au/hal/rtl8723au_recv.c +++ b/drivers/staging/rtl8723au/hal/rtl8723au_recv.c @@ -48,7 +48,7 @@ int rtl8723au_init_recv_priv(struct rtw_adapter *padapter) if (!precvpriv->precv_buf) { res = _FAIL; RT_TRACE(_module_rtl871x_recv_c_, _drv_err_, - ("alloc recv_buf fail!\n")); + "alloc recv_buf fail!\n"); goto exit; } @@ -194,8 +194,8 @@ void update_recvframe_phyinfo(struct recv_frame *precvframe, bool matchbssid = false; u8 *bssid; - matchbssid = (!ieee80211_is_ctl(hdr->frame_control) && - !pattrib->icv_err && !pattrib->crc_err); + matchbssid = !ieee80211_is_ctl(hdr->frame_control) && + !pattrib->icv_err && !pattrib->crc_err; if (matchbssid) { switch (hdr->frame_control & diff --git a/drivers/staging/rtl8723au/hal/rtl8723au_xmit.c b/drivers/staging/rtl8723au/hal/rtl8723au_xmit.c index 1759487329ab..6bf87fe86644 100644 --- a/drivers/staging/rtl8723au/hal/rtl8723au_xmit.c +++ b/drivers/staging/rtl8723au/hal/rtl8723au_xmit.c @@ -42,7 +42,7 @@ static int urb_zero_packet_chk(struct rtw_adapter *padapter, int sz) static void rtl8192cu_cal_txdesc_chksum(struct tx_desc *ptxdesc) { - u16 *usPtr = (u16 *)ptxdesc; + __le16 *usPtr = (__le16 *)ptxdesc; u32 count = 16; /* (32 bytes / 2 bytes per XOR) => 16 times */ u32 index; u16 checksum = 0; @@ -130,7 +130,7 @@ static void fill_txdesc_phy(struct pkt_attrib *pattrib, __le32 *pdw) } } -static s32 update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem, s32 sz, u8 bagg_pkt) +static s32 update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem, s32 sz) { int pull = 0; uint qsel; @@ -143,7 +143,7 @@ static s32 update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem, s32 sz, u8 bag struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; int bmcst = is_multicast_ether_addr(pattrib->ra); - if ((!bagg_pkt) && (urb_zero_packet_chk(padapter, sz) == 0)) { + if (urb_zero_packet_chk(padapter, sz) == 0) { ptxdesc = (struct tx_desc *)(pmem+PACKET_OFFSET_SZ); pull = 1; pxmitframe->pkt_offset--; @@ -272,7 +272,8 @@ static s32 update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem, s32 sz, u8 bag if (bmcst) ptxdesc->txdw0 |= cpu_to_le32(BIT(24)); - RT_TRACE(_module_rtl871x_xmit_c_, _drv_info_, ("offset0-txdesc = 0x%x\n", ptxdesc->txdw0)); + RT_TRACE(_module_rtl871x_xmit_c_, _drv_info_, + "offset0-txdesc = 0x%x\n", ptxdesc->txdw0); /* offset 4 */ /* pkt_offset, unit:8 bytes padding */ @@ -303,7 +304,7 @@ static int rtw_dump_xframe(struct rtw_adapter *padapter, mem_addr = pxmitframe->buf_addr; - RT_TRACE(_module_rtl871x_xmit_c_, _drv_info_, ("rtw_dump_xframe()\n")); + RT_TRACE(_module_rtl871x_xmit_c_, _drv_info_, "rtw_dump_xframe()\n"); for (t = 0; t < pattrib->nr_frags; t++) { if (inner_ret != _SUCCESS && ret == _SUCCESS) @@ -311,7 +312,7 @@ static int rtw_dump_xframe(struct rtw_adapter *padapter, if (t != (pattrib->nr_frags - 1)) { RT_TRACE(_module_rtl871x_xmit_c_, _drv_err_, - ("pattrib->nr_frags =%d\n", pattrib->nr_frags)); + "pattrib->nr_frags =%d\n", pattrib->nr_frags); sz = pxmitpriv->frag_len; sz = sz - 4 - pattrib->icv_len; @@ -320,7 +321,7 @@ static int rtw_dump_xframe(struct rtw_adapter *padapter, sz = pattrib->last_txcmdsz; } - pull = update_txdesc(pxmitframe, mem_addr, sz, false); + pull = update_txdesc(pxmitframe, mem_addr, sz); if (pull) { mem_addr += PACKET_OFFSET_SZ; /* pull txdesc head */ @@ -338,7 +339,7 @@ static int rtw_dump_xframe(struct rtw_adapter *padapter, rtw_count_tx_stats23a(padapter, pxmitframe, sz); RT_TRACE(_module_rtl871x_xmit_c_, _drv_info_, - ("rtw_write_port, w_sz =%d\n", w_sz)); + "rtw_write_port, w_sz =%d\n", w_sz); mem_addr += w_sz; @@ -365,7 +366,7 @@ bool rtl8723au_xmitframe_complete(struct rtw_adapter *padapter, phwxmits = pxmitpriv->hwxmits; hwentry = pxmitpriv->hwxmit_entry; - RT_TRACE(_module_rtl871x_xmit_c_, _drv_info_, ("xmitframe_complete()\n")); + RT_TRACE(_module_rtl871x_xmit_c_, _drv_info_, "xmitframe_complete()\n"); if (pxmitbuf == NULL) { pxmitbuf = rtw_alloc_xmitbuf23a(pxmitpriv); @@ -388,7 +389,8 @@ bool rtl8723au_xmitframe_complete(struct rtw_adapter *padapter, rtw_os_xmit_complete23a(padapter, pxmitframe);/* always return ndis_packet after rtw_xmitframe_coalesce23a */ } - RT_TRACE(_module_rtl871x_xmit_c_, _drv_info_, ("xmitframe_complete(): rtw_dump_xframe\n")); + RT_TRACE(_module_rtl871x_xmit_c_, _drv_info_, + "xmitframe_complete(): rtw_dump_xframe\n"); if (res == _SUCCESS) { rtw_dump_xframe(padapter, pxmitframe); @@ -481,7 +483,7 @@ enqueue: if (res != _SUCCESS) { RT_TRACE(_module_xmit_osdep_c_, _drv_err_, - ("pre_xmitframe: enqueue xmitframe fail\n")); + "pre_xmitframe: enqueue xmitframe fail\n"); rtw_free_xmitframe23a(pxmitpriv, pxmitframe); /* Trick, make the statistics correct */ diff --git a/drivers/staging/rtl8723au/hal/usb_halinit.c b/drivers/staging/rtl8723au/hal/usb_halinit.c index adbf1c2dd383..42ae29d26302 100644 --- a/drivers/staging/rtl8723au/hal/usb_halinit.c +++ b/drivers/staging/rtl8723au/hal/usb_halinit.c @@ -447,22 +447,8 @@ static void _InitRetryFunction(struct rtw_adapter *Adapter) static void _InitRFType(struct rtw_adapter *Adapter) { struct hal_data_8723a *pHalData = GET_HAL_DATA(Adapter); - bool is92CU = IS_92C_SERIAL(pHalData->VersionID); - pHalData->rf_chip = RF_6052; - - if (!is92CU) { - pHalData->rf_type = RF_1T1R; - DBG_8723A("Set RF Chip ID to RF_6052 and RF type to 1T1R.\n"); - return; - } - - /* TODO: Consider that EEPROM set 92CU to 1T1R later. */ - /* Force to overwrite setting according to chip version. Ignore - EEPROM setting. */ - /* pHalData->RF_Type = is92CU ? RF_2T2R : RF_1T1R; */ - MSG_8723A("Set RF Chip ID to RF_6052 and RF type to %d.\n", - pHalData->rf_type); + pHalData->rf_type = RF_1T1R; } /* Set CCK and OFDM Block "ON" */ @@ -530,7 +516,7 @@ int rtl8723au_hal_init(struct rtw_adapter *Adapter) /* Check if MAC has already power on. by tynli. 2011.05.27. */ val8 = rtl8723au_read8(Adapter, REG_CR); RT_TRACE(_module_hci_hal_init_c_, _drv_info_, - ("%s: REG_CR 0x100 = 0x%02x\n", __func__, val8)); + "%s: REG_CR 0x100 = 0x%02x\n", __func__, val8); /* Fix 92DU-VC S3 hang with the reason is that secondary mac is not initialized. */ /* 0x100 value of first mac is 0xEA while 0x100 value of secondary @@ -540,13 +526,13 @@ int rtl8723au_hal_init(struct rtw_adapter *Adapter) } else { mac_on = true; RT_TRACE(_module_hci_hal_init_c_, _drv_info_, - ("%s: MAC has already power on\n", __func__)); + "%s: MAC has already power on\n", __func__); } status = _InitPowerOn(Adapter); if (status == _FAIL) { RT_TRACE(_module_hci_hal_init_c_, _drv_err_, - ("Failed to init power on!\n")); + "Failed to init power on!\n"); goto exit; } @@ -561,7 +547,7 @@ int rtl8723au_hal_init(struct rtw_adapter *Adapter) status = InitLLTTable23a(Adapter, boundary); if (status == _FAIL) { RT_TRACE(_module_hci_hal_init_c_, _drv_err_, - ("Failed to init LLT table\n")); + "Failed to init LLT table\n"); goto exit; } } @@ -572,12 +558,10 @@ int rtl8723au_hal_init(struct rtw_adapter *Adapter) status = rtl8723a_FirmwareDownload(Adapter); if (status != _SUCCESS) { Adapter->bFWReady = false; - pHalData->fw_ractrl = false; DBG_8723A("fw download fail!\n"); goto exit; } else { Adapter->bFWReady = true; - pHalData->fw_ractrl = true; DBG_8723A("fw download ok!\n"); } @@ -625,17 +609,22 @@ int rtl8723au_hal_init(struct rtw_adapter *Adapter) } /* reducing 80M spur */ - PHY_SetBBReg(Adapter, REG_AFE_XTAL_CTRL, bMaskDWord, 0x0381808d); - PHY_SetBBReg(Adapter, REG_AFE_PLL_CTRL, bMaskDWord, 0xf0ffff83); - PHY_SetBBReg(Adapter, REG_AFE_PLL_CTRL, bMaskDWord, 0xf0ffff82); - PHY_SetBBReg(Adapter, REG_AFE_PLL_CTRL, bMaskDWord, 0xf0ffff83); + rtl8723au_write32(Adapter, REG_AFE_XTAL_CTRL, 0x0381808d); + rtl8723au_write32(Adapter, REG_AFE_PLL_CTRL, 0xf0ffff83); + rtl8723au_write32(Adapter, REG_AFE_PLL_CTRL, 0xf0ffff82); + rtl8723au_write32(Adapter, REG_AFE_PLL_CTRL, 0xf0ffff83); /* RFSW Control */ - PHY_SetBBReg(Adapter, rFPGA0_TxInfo, bMaskDWord, 0x00000003); /* 0x804[14]= 0 */ - PHY_SetBBReg(Adapter, rFPGA0_XAB_RFInterfaceSW, bMaskDWord, 0x07000760); /* 0x870[6:5]= b'11 */ - PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, bMaskDWord, 0x66F60210); /* 0x860[6:5]= b'00 */ + /* 0x804[14]= 0 */ + rtl8723au_write32(Adapter, rFPGA0_TxInfo, 0x00000003); + /* 0x870[6:5]= b'11 */ + rtl8723au_write32(Adapter, rFPGA0_XAB_RFInterfaceSW, 0x07000760); + /* 0x860[6:5]= b'00 */ + rtl8723au_write32(Adapter, rFPGA0_XA_RFInterfaceOE, 0x66F60210); - RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("%s: 0x870 = value 0x%x\n", __func__, PHY_QueryBBReg(Adapter, 0x870, bMaskDWord))); + RT_TRACE(_module_hci_hal_init_c_, _drv_info_, + "%s: 0x870 = value 0x%x\n", __func__, + rtl8723au_read32(Adapter, 0x870)); /* */ /* Joseph Note: Keep RfRegChnlVal for later use. */ @@ -747,15 +736,16 @@ int rtl8723au_hal_init(struct rtw_adapter *Adapter) rtl8723a_InitHalDm(Adapter); - val8 = ((WiFiNavUpperUs + HAL_8723A_NAV_UPPER_UNIT - 1) / - HAL_8723A_NAV_UPPER_UNIT); + val8 = (WiFiNavUpperUs + HAL_8723A_NAV_UPPER_UNIT - 1) / + HAL_8723A_NAV_UPPER_UNIT; rtl8723au_write8(Adapter, REG_NAV_UPPER, val8); /* 2011/03/09 MH debug only, UMC-B cut pass 2500 S5 test, but we need to fin root cause. */ if (((rtl8723au_read32(Adapter, rFPGA0_RFMOD) & 0xFF000000) != 0x83000000)) { PHY_SetBBReg(Adapter, rFPGA0_RFMOD, BIT(24), 1); - RT_TRACE(_module_hci_hal_init_c_, _drv_err_, ("%s: IQK fail recorver\n", __func__)); + RT_TRACE(_module_hci_hal_init_c_, _drv_err_, + "%s: IQK fail recover\n", __func__); } /* ack for xmit mgmt frames. */ @@ -806,19 +796,18 @@ static void phy_SsPwrSwitch92CU(struct rtw_adapter *Adapter, /* AFE */ if (pHalData->rf_type == RF_2T2R) - PHY_SetBBReg(Adapter, rRx_Wait_CCA, bMaskDWord, - 0x63DB25A0); + rtl8723au_write32(Adapter, rRx_Wait_CCA, 0x63DB25A0); else if (pHalData->rf_type == RF_1T1R) - PHY_SetBBReg(Adapter, rRx_Wait_CCA, bMaskDWord, - 0x631B25A0); + rtl8723au_write32(Adapter, rRx_Wait_CCA, 0x631B25A0); /* 4. issue 3-wire command that RF set to Rx idle mode. This is used to re-write the RX idle mode. */ /* We can only prvide a usual value instead and then HW will modify the value by itself. */ - PHY_SetRFReg(Adapter, RF_PATH_A, 0, bRFRegOffsetMask, 0x32D95); + PHY_SetRFReg(Adapter, RF_PATH_A, RF_AC, + bRFRegOffsetMask, 0x32D95); if (pHalData->rf_type == RF_2T2R) { - PHY_SetRFReg(Adapter, RF_PATH_B, 0, + PHY_SetRFReg(Adapter, RF_PATH_B, RF_AC, bRFRegOffsetMask, 0x32D95); } break; @@ -829,7 +818,7 @@ static void phy_SsPwrSwitch92CU(struct rtw_adapter *Adapter, else sps0 &= ~(BIT(0) | BIT(3)); - RT_TRACE(_module_hal_init_c_, _drv_err_, ("SS LVL1\n")); + RT_TRACE(_module_hal_init_c_, _drv_err_, "SS LVL1\n"); /* Disable RF and BB only for SelectSuspend. */ /* 1. Set BB/RF to shutdown. */ @@ -840,13 +829,11 @@ static void phy_SsPwrSwitch92CU(struct rtw_adapter *Adapter, for packet detection */ /* (4) Reg800[1] = 1 enable preamble power saving */ Adapter->pwrctrlpriv.PS_BBRegBackup[PSBBREG_RF0] = - PHY_QueryBBReg(Adapter, rFPGA0_XAB_RFParameter, - bMaskDWord); + rtl8723au_read32(Adapter, rFPGA0_XAB_RFParameter); Adapter->pwrctrlpriv.PS_BBRegBackup[PSBBREG_RF1] = - PHY_QueryBBReg(Adapter, rOFDM0_TRxPathEnable, - bMaskDWord); + rtl8723au_read32(Adapter, rOFDM0_TRxPathEnable); Adapter->pwrctrlpriv.PS_BBRegBackup[PSBBREG_RF2] = - PHY_QueryBBReg(Adapter, rFPGA0_RFMOD, bMaskDWord); + rtl8723au_read32(Adapter, rFPGA0_RFMOD); if (pHalData->rf_type == RF_2T2R) { PHY_SetBBReg(Adapter, rFPGA0_XAB_RFParameter, 0x380038, 0); @@ -858,18 +845,16 @@ static void phy_SsPwrSwitch92CU(struct rtw_adapter *Adapter, /* 2 .AFE control register to power down. bit[30:22] */ Adapter->pwrctrlpriv.PS_BBRegBackup[PSBBREG_AFE0] = - PHY_QueryBBReg(Adapter, rRx_Wait_CCA, bMaskDWord); + rtl8723au_read32(Adapter, rRx_Wait_CCA); if (pHalData->rf_type == RF_2T2R) - PHY_SetBBReg(Adapter, rRx_Wait_CCA, bMaskDWord, - 0x00DB25A0); + rtl8723au_write32(Adapter, rRx_Wait_CCA, 0x00DB25A0); else if (pHalData->rf_type == RF_1T1R) - PHY_SetBBReg(Adapter, rRx_Wait_CCA, bMaskDWord, - 0x001B25A0); + rtl8723au_write32(Adapter, rRx_Wait_CCA, 0x001B25A0); /* 3. issue 3-wire command that RF set to power down.*/ - PHY_SetRFReg(Adapter, RF_PATH_A, 0, bRFRegOffsetMask, 0); + PHY_SetRFReg(Adapter, RF_PATH_A, RF_AC, bRFRegOffsetMask, 0); if (pHalData->rf_type == RF_2T2R) - PHY_SetRFReg(Adapter, RF_PATH_B, 0, + PHY_SetRFReg(Adapter, RF_PATH_B, RF_AC, bRFRegOffsetMask, 0); /* 4. Force PFM , disable SPS18_LDO_Marco_Block */ @@ -949,14 +934,14 @@ int rtl8723au_inirp_init(struct rtw_adapter *Adapter) status = _SUCCESS; - RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("===> usb_inirp_init\n")); + RT_TRACE(_module_hci_hal_init_c_, _drv_info_, "===> usb_inirp_init\n"); /* issue Rx irp to receive data */ precvbuf = (struct recv_buf *)precvpriv->precv_buf; for (i = 0; i < NR_RECVBUFF; i++) { if (rtl8723au_read_port(Adapter, 0, precvbuf) == _FAIL) { RT_TRACE(_module_hci_hal_init_c_, _drv_err_, - ("usb_rx_init: usb_read_port error\n")); + "usb_rx_init: usb_read_port error\n"); status = _FAIL; goto exit; } @@ -964,7 +949,7 @@ int rtl8723au_inirp_init(struct rtw_adapter *Adapter) } if (rtl8723au_read_interrupt(Adapter) == _FAIL) { RT_TRACE(_module_hci_hal_init_c_, _drv_err_, - ("%s: usb_read_interrupt error\n", __func__)); + "%s: usb_read_interrupt error\n", __func__); status = _FAIL; } pHalData->IntrMask[0] = rtl8723au_read32(Adapter, REG_USB_HIMR); @@ -973,7 +958,7 @@ int rtl8723au_inirp_init(struct rtw_adapter *Adapter) rtl8723au_write32(Adapter, REG_USB_HIMR, pHalData->IntrMask[0]); exit: RT_TRACE(_module_hci_hal_init_c_, _drv_info_, - ("<=== usb_inirp_init\n")); + "<=== usb_inirp_init\n"); return status; } @@ -982,7 +967,7 @@ int rtl8723au_inirp_deinit(struct rtw_adapter *Adapter) struct hal_data_8723a *pHalData = GET_HAL_DATA(Adapter); RT_TRACE(_module_hci_hal_init_c_, _drv_info_, - ("\n ===> usb_rx_deinit\n")); + "===> usb_rx_deinit\n"); rtl8723au_read_port_cancel(Adapter); pHalData->IntrMask[0] = rtl8723au_read32(Adapter, REG_USB_HIMR); MSG_8723A("%s pHalData->IntrMask = 0x%04x\n", __func__, @@ -990,7 +975,7 @@ int rtl8723au_inirp_deinit(struct rtw_adapter *Adapter) pHalData->IntrMask[0] = 0x0; rtl8723au_write32(Adapter, REG_USB_HIMR, pHalData->IntrMask[0]); RT_TRACE(_module_hci_hal_init_c_, _drv_info_, - ("\n <=== usb_rx_deinit\n")); + "<=== usb_rx_deinit\n"); return _SUCCESS; } @@ -1037,11 +1022,10 @@ static void Hal_EfuseParseMACAddr_8723AU(struct rtw_adapter *padapter, } RT_TRACE(_module_hci_hal_init_c_, _drv_notice_, - ("Hal_EfuseParseMACAddr_8723AU: Permanent Address =%02x:%02x:" - "%02x:%02x:%02x:%02x\n", - pEEPROM->mac_addr[0], pEEPROM->mac_addr[1], - pEEPROM->mac_addr[2], pEEPROM->mac_addr[3], - pEEPROM->mac_addr[4], pEEPROM->mac_addr[5])); + "Hal_EfuseParseMACAddr_8723AU: Permanent Address =%02x:%02x:%02x:%02x:%02x:%02x\n", + pEEPROM->mac_addr[0], pEEPROM->mac_addr[1], + pEEPROM->mac_addr[2], pEEPROM->mac_addr[3], + pEEPROM->mac_addr[4], pEEPROM->mac_addr[5]); } static void readAdapterInfo(struct rtw_adapter *padapter) @@ -1102,13 +1086,6 @@ static void _ReadPROMContent(struct rtw_adapter *Adapter) readAdapterInfo(Adapter); } -static void _ReadRFType(struct rtw_adapter *Adapter) -{ - struct hal_data_8723a *pHalData = GET_HAL_DATA(Adapter); - - pHalData->rf_chip = RF_6052; -} - /* */ /* Description: */ /* We should set Efuse cell selection to WiFi cell in default. */ @@ -1138,12 +1115,8 @@ void rtl8723a_read_adapter_info(struct rtw_adapter *Adapter) hal_EfuseCellSel(Adapter); - _ReadRFType(Adapter);/* rf_chip -> _InitRFType() */ _ReadPROMContent(Adapter); - /* MSG_8723A("%s()(done), rf_chip = 0x%x, rf_type = 0x%x\n", - __func__, pHalData->rf_chip, pHalData->rf_type); */ - MSG_8723A("<==== _ReadAdapterInfo8723AU in %d ms\n", jiffies_to_msecs(jiffies - start)); } @@ -1192,8 +1165,6 @@ int GetHalDefVar8192CUsb(struct rtw_adapter *Adapter, } break; default: - /* RT_TRACE(COMP_INIT, DBG_WARNING, ("GetHalDefVar8192CUsb(): " - "Unkown variable: %d!\n", eVariable)); */ bResult = _FAIL; break; } @@ -1211,7 +1182,7 @@ void rtl8723a_update_ramask(struct rtw_adapter *padapter, struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; struct wlan_bssid_ex *cur_network = &pmlmeinfo->network; - u8 init_rate, networkType, raid; + u8 init_rate, networkType, raid, arg; u32 mask, rate_bitmap; u8 shortGIrate = false; int supportRateNum; @@ -1283,27 +1254,15 @@ void rtl8723a_update_ramask(struct rtw_adapter *padapter, init_rate = get_highest_rate_idx23a(mask) & 0x3f; - if (pHalData->fw_ractrl == true) { - u8 arg = 0; - - arg = mac_id & 0x1f;/* MACID */ + arg = mac_id & 0x1f;/* MACID */ + arg |= BIT(7); - arg |= BIT(7); + if (shortGIrate == true) + arg |= BIT(5); - if (shortGIrate == true) - arg |= BIT(5); + DBG_8723A("update raid entry, mask = 0x%x, arg = 0x%x\n", mask, arg); - DBG_8723A("update raid entry, mask = 0x%x, arg = 0x%x\n", - mask, arg); - - rtl8723a_set_raid_cmd(padapter, mask, arg); - } else { - if (shortGIrate == true) - init_rate |= BIT(6); - - rtl8723au_write8(padapter, (REG_INIDATA_RATE_SEL + mac_id), - init_rate); - } + rtl8723a_set_raid_cmd(padapter, mask, arg); /* set ra_id */ psta->raid = raid; diff --git a/drivers/staging/rtl8723au/hal/usb_ops_linux.c b/drivers/staging/rtl8723au/hal/usb_ops_linux.c index a6d16adce107..371e6b373420 100644 --- a/drivers/staging/rtl8723au/hal/usb_ops_linux.c +++ b/drivers/staging/rtl8723au/hal/usb_ops_linux.c @@ -297,14 +297,12 @@ urb_submit: case -ENODEV: case -ESHUTDOWN: RT_TRACE(_module_hci_ops_os_c_, _drv_err_, - ("usb_read_port_complete:bSurpriseRemoved =" - "true\n")); + "usb_read_port_complete:bSurpriseRemoved =true\n"); /* Fall Through here */ case -ENOENT: padapter->bDriverStopped = true; RT_TRACE(_module_hci_ops_os_c_, _drv_err_, - ("usb_read_port_complete:bDriverStopped =" - "true\n")); + "usb_read_port_complete:bDriverStopped =true\n"); break; case -EPROTO: break; @@ -367,16 +365,16 @@ static int recvbuf2recvframe(struct rtw_adapter *padapter, struct sk_buff *pskb) do { RT_TRACE(_module_rtl871x_recv_c_, _drv_info_, - ("recvbuf2recvframe: rxdesc = offsset 0:0x%08x, " - "4:0x%08x, 8:0x%08x, C:0x%08x\n", prxstat->rxdw0, - prxstat->rxdw1, prxstat->rxdw2, prxstat->rxdw4)); + "recvbuf2recvframe: rxdesc = offsset 0:0x%08x, 4:0x%08x, 8:0x%08x, C:0x%08x\n", + prxstat->rxdw0, prxstat->rxdw1, + prxstat->rxdw2, prxstat->rxdw4); prxstat = (struct recv_stat *)pbuf; precvframe = rtw_alloc_recvframe23a(pfree_recv_queue); if (!precvframe) { RT_TRACE(_module_rtl871x_recv_c_, _drv_err_, - ("recvbuf2recvframe: precvframe == NULL\n")); + "recvbuf2recvframe: precvframe == NULL\n"); DBG_8723A("%s()-%d: rtw_alloc_recvframe23a() failed! RX " "Drop!\n", __func__, __LINE__); goto _exit_recvbuf2recvframe; @@ -400,7 +398,7 @@ static int recvbuf2recvframe(struct rtw_adapter *padapter, struct sk_buff *pskb) if (pattrib->pkt_len <= 0 || pkt_offset > transfer_len) { RT_TRACE(_module_rtl871x_recv_c_, _drv_info_, - ("recvbuf2recvframe: pkt_len<= 0\n")); + "recvbuf2recvframe: pkt_len<= 0\n"); DBG_8723A("%s()-%d: RX Warning!\n", __func__, __LINE__); rtw_free_recvframe23a(precvframe); @@ -471,8 +469,7 @@ static int recvbuf2recvframe(struct rtw_adapter *padapter, struct sk_buff *pskb) if (rtw_recv_entry23a(precvframe) != _SUCCESS) RT_TRACE(_module_rtl871x_recv_c_, _drv_err_, - ("recvbuf2recvframe: rtw_recv_entry23a" - "(precvframe) != _SUCCESS\n")); + "recvbuf2recvframe: rtw_recv_entry23a(precvframe) != _SUCCESS\n"); pkt_cnt--; transfer_len -= pkt_offset; @@ -520,16 +517,15 @@ static void usb_read_port_complete(struct urb *purb) struct recv_priv *precvpriv = &padapter->recvpriv; RT_TRACE(_module_hci_ops_os_c_, _drv_err_, - ("usb_read_port_complete!!!\n")); + "usb_read_port_complete!!!\n"); precvpriv->rx_pending_cnt--; if (padapter->bSurpriseRemoved || padapter->bDriverStopped || padapter->bReadPortCancel) { RT_TRACE(_module_hci_ops_os_c_, _drv_err_, - ("usb_read_port_complete:bDriverStopped(%d) OR " - "bSurpriseRemoved(%d)\n", padapter->bDriverStopped, - padapter->bSurpriseRemoved)); + "usb_read_port_complete:bDriverStopped(%d) OR bSurpriseRemoved(%d)\n", + padapter->bDriverStopped, padapter->bSurpriseRemoved); DBG_8723A("%s()-%d: RX Warning! bDriverStopped(%d) OR " "bSurpriseRemoved(%d) bReadPortCancel(%d)\n", @@ -542,9 +538,7 @@ static void usb_read_port_complete(struct urb *purb) if (purb->actual_length > MAX_RECVBUF_SZ || purb->actual_length < RXDESC_SIZE) { RT_TRACE(_module_hci_ops_os_c_, _drv_err_, - ("usb_read_port_complete: (purb->actual_" - "length > MAX_RECVBUF_SZ) || (purb->actual_" - "length < RXDESC_SIZE)\n")); + "usb_read_port_complete: (purb->actual_length > MAX_RECVBUF_SZ) || (purb->actual_length < RXDESC_SIZE)\n"); rtl8723au_read_port(padapter, 0, precvbuf); DBG_8723A("%s()-%d: RX Warning!\n", __func__, __LINE__); @@ -564,8 +558,8 @@ static void usb_read_port_complete(struct urb *purb) } } else { RT_TRACE(_module_hci_ops_os_c_, _drv_err_, - ("usb_read_port_complete : purb->status(%d) != 0 \n", - purb->status)); + "usb_read_port_complete : purb->status(%d) != 0\n", + purb->status); skb_put(precvbuf->pskb, purb->actual_length); precvbuf->pskb = NULL; @@ -583,14 +577,12 @@ static void usb_read_port_complete(struct urb *purb) case -ENODEV: case -ESHUTDOWN: RT_TRACE(_module_hci_ops_os_c_, _drv_err_, - ("usb_read_port_complete:bSurprise" - "Removed = true\n")); + "usb_read_port_complete:bSurpriseRemoved = true\n"); /* Intentional fall through here */ case -ENOENT: padapter->bDriverStopped = true; RT_TRACE(_module_hci_ops_os_c_, _drv_err_, - ("usb_read_port_complete:" - "bDriverStopped = true\n")); + "usb_read_port_complete:bDriverStopped = true\n"); break; case -EPROTO: case -EOVERFLOW: @@ -620,14 +612,13 @@ int rtl8723au_read_port(struct rtw_adapter *adapter, u32 cnt, if (adapter->bDriverStopped || adapter->bSurpriseRemoved) { RT_TRACE(_module_hci_ops_os_c_, _drv_err_, - ("usb_read_port:(padapter->bDriverStopped ||" - "padapter->bSurpriseRemoved)!!!\n")); + "usb_read_port:(padapter->bDriverStopped ||padapter->bSurpriseRemoved)!!!\n"); return _FAIL; } if (!precvbuf) { RT_TRACE(_module_hci_ops_os_c_, _drv_err_, - ("usb_read_port:precvbuf == NULL\n")); + "usb_read_port:precvbuf == NULL\n"); return _FAIL; } @@ -638,7 +629,8 @@ int rtl8723au_read_port(struct rtw_adapter *adapter, u32 cnt, if (!precvbuf->pskb) { precvbuf->pskb = netdev_alloc_skb(adapter->pnetdev, MAX_RECVBUF_SZ + RECVBUFF_ALIGN_SZ); if (precvbuf->pskb == NULL) { - RT_TRACE(_module_hci_ops_os_c_, _drv_err_, ("init_recvbuf(): alloc_skb fail!\n")); + RT_TRACE(_module_hci_ops_os_c_, _drv_err_, + "init_recvbuf(): alloc_skb fail!\n"); return _FAIL; } @@ -661,8 +653,8 @@ int rtl8723au_read_port(struct rtw_adapter *adapter, u32 cnt, err = usb_submit_urb(purb, GFP_ATOMIC); if ((err) && (err != -EPERM)) { RT_TRACE(_module_hci_ops_os_c_, _drv_err_, - ("cannot submit rx in-token(err = 0x%.8x), URB_STATUS " - "= 0x%.8x", err, purb->status)); + "cannot submit rx in-token(err = 0x%.8x), URB_STATUS = 0x%.8x\n", + err, purb->status); DBG_8723A("cannot submit rx in-token(err = 0x%08x), urb_status " "= %d\n", err, purb->status); ret = _FAIL; |