diff options
Diffstat (limited to 'drivers/staging/rtl8723bs/hal')
| -rw-r--r-- | drivers/staging/rtl8723bs/hal/HalPhyRf.c | 30 | ||||
| -rw-r--r-- | drivers/staging/rtl8723bs/hal/HalPhyRf.h | 8 | ||||
| -rw-r--r-- | drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c | 23 | ||||
| -rw-r--r-- | drivers/staging/rtl8723bs/hal/rtl8723b_hal_init.c | 44 |
4 files changed, 35 insertions, 70 deletions
diff --git a/drivers/staging/rtl8723bs/hal/HalPhyRf.c b/drivers/staging/rtl8723bs/hal/HalPhyRf.c index beb4002a40e1..357802db9aed 100644 --- a/drivers/staging/rtl8723bs/hal/HalPhyRf.c +++ b/drivers/staging/rtl8723bs/hal/HalPhyRf.c @@ -622,33 +622,3 @@ void ODM_TXPowerTrackingCallback_ThermalMeter(struct adapter *Adapter) pDM_Odm->RFCalibrateInfo.TXPowercount = 0; } - - - - -/* 3 ============================================================ */ -/* 3 IQ Calibration */ -/* 3 ============================================================ */ - -u8 ODM_GetRightChnlPlaceforIQK(u8 chnl) -{ - u8 channel_all[ODM_TARGET_CHNL_NUM_2G_5G] = { - 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, - 36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, - 60, 62, 64, 100, 102, 104, 106, 108, 110, 112, - 114, 116, 118, 120, 122, 124, 126, 128, 130, 132, - 134, 136, 138, 140, 149, 151, 153, 155, 157, 159, - 161, 163, 165 - }; - u8 place = chnl; - - - if (chnl > 14) { - for (place = 14; place < sizeof(channel_all); place++) { - if (channel_all[place] == chnl) - return place-13; - } - } - return 0; - -} diff --git a/drivers/staging/rtl8723bs/hal/HalPhyRf.h b/drivers/staging/rtl8723bs/hal/HalPhyRf.h index 3d6f68bc61d7..643fcf37c9ad 100644 --- a/drivers/staging/rtl8723bs/hal/HalPhyRf.h +++ b/drivers/staging/rtl8723bs/hal/HalPhyRf.h @@ -44,12 +44,4 @@ void ODM_ClearTxPowerTrackingState(PDM_ODM_T pDM_Odm); void ODM_TXPowerTrackingCallback_ThermalMeter(struct adapter *Adapter); - - -#define ODM_TARGET_CHNL_NUM_2G_5G 59 - - -u8 ODM_GetRightChnlPlaceforIQK(u8 chnl); - - #endif /* #ifndef __HAL_PHY_RF_H__ */ diff --git a/drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c b/drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c index 1ca9063a269f..85ea535dd6e9 100644 --- a/drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c +++ b/drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c @@ -1,5 +1,5 @@ // SPDX-License-Identifier: GPL-2.0 -/****************************************************************************** +/***************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * @@ -82,7 +82,9 @@ static void setIqkMatrix_8723B( /* if (RFPath == ODM_RF_PATH_A) */ switch (RFPath) { case ODM_RF_PATH_A: - /* wirte new elements A, C, D to regC80 and regC94, element B is always 0 */ + /* write new elements A, C, D to regC80 and regC94, + * element B is always 0 + */ value32 = (ele_D<<22)|((ele_C&0x3F)<<16)|ele_A; PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XATxIQImbalance, bMaskDWord, value32); @@ -93,7 +95,9 @@ static void setIqkMatrix_8723B( PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, BIT24, value32); break; case ODM_RF_PATH_B: - /* wirte new elements A, C, D to regC88 and regC9C, element B is always 0 */ + /* write new elements A, C, D to regC88 and regC9C, + * element B is always 0 + */ value32 = (ele_D<<22)|((ele_C&0x3F)<<16)|ele_A; PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XBTxIQImbalance, bMaskDWord, value32); @@ -166,7 +170,7 @@ void DoIQK_8723B( /*----------------------------------------------------------------------------- * Function: odm_TxPwrTrackSetPwr88E() * - * Overview: 88E change all channel tx power accordign to flag. + * Overview: 88E change all channel tx power according to flag. * OFDM & CCK are all different. * * Input: NONE @@ -1788,7 +1792,7 @@ void PHY_IQCalibrate_8723B( PDM_ODM_T pDM_Odm = &pHalData->odmpriv; s32 result[4][8]; /* last is final result */ - u8 i, final_candidate, Indexforchannel; + u8 i, final_candidate; bool bPathAOK, bPathBOK; s32 RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC, RegTmp = 0; bool is12simular, is13simular, is23simular; @@ -1993,17 +1997,14 @@ void PHY_IQCalibrate_8723B( _PHY_PathBFillIQKMatrix8723B(padapter, bPathBOK, result, final_candidate, (RegEC4 == 0)); } - Indexforchannel = ODM_GetRightChnlPlaceforIQK(pHalData->CurrentChannel); - /* To Fix BSOD when final_candidate is 0xff */ /* by sherry 20120321 */ if (final_candidate < 4) { for (i = 0; i < IQK_Matrix_REG_NUM; i++) - pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[Indexforchannel].Value[0][i] = result[final_candidate][i]; - pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[Indexforchannel].bIQKDone = true; + pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[0].Value[0][i] = result[final_candidate][i]; + pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[0].bIQKDone = true; } - /* RT_DISP(FINIT, INIT_IQK, ("\nIQK OK Indexforchannel %d.\n", Indexforchannel)); */ - ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("\nIQK OK Indexforchannel %d.\n", Indexforchannel)); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("\nIQK OK Indexforchannel %d.\n", 0)); _PHY_SaveADDARegisters8723B(padapter, IQK_BB_REG_92C, pDM_Odm->RFCalibrateInfo.IQK_BB_backup_recover, 9); diff --git a/drivers/staging/rtl8723bs/hal/rtl8723b_hal_init.c b/drivers/staging/rtl8723bs/hal/rtl8723b_hal_init.c index 66127f6c8e4d..de8caa6cd418 100644 --- a/drivers/staging/rtl8723bs/hal/rtl8723b_hal_init.c +++ b/drivers/staging/rtl8723bs/hal/rtl8723b_hal_init.c @@ -750,7 +750,7 @@ static void Hal_BT_EfusePowerSwitch( rtw_write8(padapter, 0x6B, tempval); /* Attention!! Between 0x6A[14] and 0x6A[15] setting need 100us delay */ - /* So don't wirte 0x6A[14]= 1 and 0x6A[15]= 0 together! */ + /* So don't write 0x6A[14]= 1 and 0x6A[15]= 0 together! */ msleep(1); /* disable BT output isolation */ /* 0x6A[15] = 0 */ @@ -765,7 +765,7 @@ static void Hal_BT_EfusePowerSwitch( rtw_write8(padapter, 0x6B, tempval); /* Attention!! Between 0x6A[14] and 0x6A[15] setting need 100us delay */ - /* So don't wirte 0x6A[14]= 1 and 0x6A[15]= 0 together! */ + /* So don't write 0x6A[14]= 1 and 0x6A[15]= 0 together! */ /* disable BT power cut */ /* 0x6A[14] = 1 */ @@ -1231,7 +1231,7 @@ static u16 hal_EfuseGetCurrentSize_WiFi( goto exit; error: - /* report max size to prevent wirte efuse */ + /* report max size to prevent write efuse */ EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, &efuse_addr, bPseudoTest); exit: @@ -2237,7 +2237,7 @@ void rtl8723b_InitAntenna_Selection(struct adapter *padapter) u8 val; val = rtw_read8(padapter, REG_LEDCFG2); - /* Let 8051 take control antenna settting */ + /* Let 8051 take control antenna setting */ val |= BIT(7); /* DPDT_SEL_EN, 0x4C[23] */ rtw_write8(padapter, REG_LEDCFG2, val); } @@ -3191,22 +3191,26 @@ static void rtl8723b_fill_default_txdesc( if (bmcst) ptxdesc->bmc = 1; - /* 2009.11.05. tynli_test. Suggested by SD4 Filen for FW LPS. */ - /* (1) The sequence number of each non-Qos frame / broadcast / multicast / */ - /* mgnt frame should be controled by Hw because Fw will also send null data */ - /* which we cannot control when Fw LPS enable. */ - /* --> default enable non-Qos data sequense number. 2010.06.23. by tynli. */ - /* (2) Enable HW SEQ control for beacon packet, because we use Hw beacon. */ - /* (3) Use HW Qos SEQ to control the seq num of Ext port non-Qos packets. */ - /* 2010.06.23. Added by tynli. */ + /* 2009.11.05. tynli_test. Suggested by SD4 Filen for FW LPS. + * (1) The sequence number of each non-Qos frame / broadcast / + * multicast / mgnt frame should be controlled by Hw because Fw + * will also send null data which we cannot control when Fw LPS + * enable. + * --> default enable non-Qos data sequense number. 2010.06.23. + * by tynli. + * (2) Enable HW SEQ control for beacon packet, because we use + * Hw beacon. + * (3) Use HW Qos SEQ to control the seq num of Ext port non-Qos + * packets. + * 2010.06.23. Added by tynli. + */ if (!pattrib->qos_en) /* Hw set sequence number */ ptxdesc->en_hwseq = 1; /* HWSEQ_EN */ } -/* - *Description: +/* Description: * - *Parameters: + * Parameters: * pxmitframe xmitframe * pbuf where to fill tx desc */ @@ -3543,7 +3547,7 @@ static void hw_var_set_mlme_sitesurvey(struct adapter *padapter, u8 variable, u8 rtw_write8(padapter, reg_bcn_ctl, val8); } - /* Save orignal RRSR setting. */ + /* Save original RRSR setting. */ pHalData->RegRRSR = rtw_read16(padapter, REG_RRSR); } else { /* sitesurvey done */ @@ -3561,7 +3565,7 @@ static void hw_var_set_mlme_sitesurvey(struct adapter *padapter, u8 variable, u8 value_rcr |= rcr_clear_bit; rtw_write32(padapter, REG_RCR, value_rcr); - /* Restore orignal RRSR setting. */ + /* Restore original RRSR setting. */ rtw_write16(padapter, REG_RRSR, pHalData->RegRRSR); } } @@ -4329,8 +4333,7 @@ void GetHwReg8723B(struct adapter *padapter, u8 variable, u8 *val) } } -/* - *Description: +/* Description: * Change default setting of specified variable. */ u8 SetHalDefVar8723B(struct adapter *padapter, enum HAL_DEF_VARIABLE variable, void *pval) @@ -4348,8 +4351,7 @@ u8 SetHalDefVar8723B(struct adapter *padapter, enum HAL_DEF_VARIABLE variable, v return bResult; } -/* - *Description: +/* Description: * Query setting of specified variable. */ u8 GetHalDefVar8723B(struct adapter *padapter, enum HAL_DEF_VARIABLE variable, void *pval) |