diff options
Diffstat (limited to 'drivers/staging/wilc1000/wilc_spi.c')
| -rw-r--r-- | drivers/staging/wilc1000/wilc_spi.c | 714 |
1 files changed, 308 insertions, 406 deletions
diff --git a/drivers/staging/wilc1000/wilc_spi.c b/drivers/staging/wilc1000/wilc_spi.c index 599508beabf8..86de50c9f7f5 100644 --- a/drivers/staging/wilc1000/wilc_spi.c +++ b/drivers/staging/wilc1000/wilc_spi.c @@ -6,18 +6,25 @@ /* */ /* */ /* //////////////////////////////////////////////////////////////////////////// */ - +#include <linux/module.h> +#include <linux/init.h> +#include <linux/kernel.h> +#include <linux/fs.h> +#include <linux/slab.h> +#include <linux/types.h> +#include <linux/cdev.h> +#include <linux/uaccess.h> +#include <linux/device.h> +#include <linux/spi/spi.h> +#include <linux/of_gpio.h> + +#include "linux_wlan_common.h" #include <linux/string.h> #include "wilc_wlan_if.h" #include "wilc_wlan.h" +#include "wilc_wfi_netdevice.h" typedef struct { - void *os_context; - int (*spi_tx)(u8 *, u32); - int (*spi_rx)(u8 *, u32); - int (*spi_trx)(u8 *, u8 *, u32); - int (*spi_max_speed)(void); - wilc_debug_func dPrint; int crc_off; int nint; int has_thrpt_enh; @@ -25,8 +32,8 @@ typedef struct { static wilc_spi_t g_spi; -static int spi_read(u32, u8 *, u32); -static int spi_write(u32, u8 *, u32); +static int wilc_spi_read(struct wilc *wilc, u32, u8 *, u32); +static int wilc_spi_write(struct wilc *wilc, u32, u8 *, u32); /******************************************** * @@ -111,165 +118,175 @@ static u8 crc7(u8 crc, const u8 *buffer, u32 len) #define DATA_PKT_SZ_8K (8 * 1024) #define DATA_PKT_SZ DATA_PKT_SZ_8K -static int spi_cmd(u8 cmd, u32 adr, u32 data, u32 sz, u8 clockless) +#define USE_SPI_DMA 0 + +static const struct wilc1000_ops wilc1000_spi_ops; + +static int wilc_bus_probe(struct spi_device *spi) { - u8 bc[9]; - int len = 5; - int result = N_OK; + int ret, gpio; + struct wilc *wilc; - bc[0] = cmd; - switch (cmd) { - case CMD_SINGLE_READ: /* single word (4 bytes) read */ - bc[1] = (u8)(adr >> 16); - bc[2] = (u8)(adr >> 8); - bc[3] = (u8)adr; - len = 5; - break; + gpio = of_get_gpio(spi->dev.of_node, 0); + if (gpio < 0) + gpio = GPIO_NUM; - case CMD_INTERNAL_READ: /* internal register read */ - bc[1] = (u8)(adr >> 8); - if (clockless) - bc[1] |= BIT(7); - bc[2] = (u8)adr; - bc[3] = 0x00; - len = 5; - break; + ret = wilc_netdev_init(&wilc, NULL, HIF_SPI, GPIO_NUM, &wilc_hif_spi); + if (ret) + return ret; - case CMD_TERMINATE: /* termination */ - bc[1] = 0x00; - bc[2] = 0x00; - bc[3] = 0x00; - len = 5; - break; + spi_set_drvdata(spi, wilc); + wilc->dev = &spi->dev; - case CMD_REPEAT: /* repeat */ - bc[1] = 0x00; - bc[2] = 0x00; - bc[3] = 0x00; - len = 5; - break; + return 0; +} - case CMD_RESET: /* reset */ - bc[1] = 0xff; - bc[2] = 0xff; - bc[3] = 0xff; - len = 5; - break; +static int wilc_bus_remove(struct spi_device *spi) +{ + wilc_netdev_cleanup(spi_get_drvdata(spi)); + return 0; +} - case CMD_DMA_WRITE: /* dma write */ - case CMD_DMA_READ: /* dma read */ - bc[1] = (u8)(adr >> 16); - bc[2] = (u8)(adr >> 8); - bc[3] = (u8)adr; - bc[4] = (u8)(sz >> 8); - bc[5] = (u8)(sz); - len = 7; - break; +static const struct of_device_id wilc1000_of_match[] = { + { .compatible = "atmel,wilc_spi", }, + {} +}; +MODULE_DEVICE_TABLE(of, wilc1000_of_match); + +struct spi_driver wilc1000_spi_driver = { + .driver = { + .name = MODALIAS, + .of_match_table = wilc1000_of_match, + }, + .probe = wilc_bus_probe, + .remove = wilc_bus_remove, +}; +module_spi_driver(wilc1000_spi_driver); +MODULE_LICENSE("GPL"); - case CMD_DMA_EXT_WRITE: /* dma extended write */ - case CMD_DMA_EXT_READ: /* dma extended read */ - bc[1] = (u8)(adr >> 16); - bc[2] = (u8)(adr >> 8); - bc[3] = (u8)adr; - bc[4] = (u8)(sz >> 16); - bc[5] = (u8)(sz >> 8); - bc[6] = (u8)(sz); - len = 8; - break; +static int wilc_spi_tx(struct wilc *wilc, u8 *b, u32 len) +{ + struct spi_device *spi = to_spi_device(wilc->dev); + int ret; + struct spi_message msg; - case CMD_INTERNAL_WRITE: /* internal register write */ - bc[1] = (u8)(adr >> 8); - if (clockless) - bc[1] |= BIT(7); - bc[2] = (u8)(adr); - bc[3] = (u8)(data >> 24); - bc[4] = (u8)(data >> 16); - bc[5] = (u8)(data >> 8); - bc[6] = (u8)(data); - len = 8; - break; + if (len > 0 && b) { + struct spi_transfer tr = { + .tx_buf = b, + .len = len, + .delay_usecs = 0, + }; + char *r_buffer = kzalloc(len, GFP_KERNEL); - case CMD_SINGLE_WRITE: /* single word write */ - bc[1] = (u8)(adr >> 16); - bc[2] = (u8)(adr >> 8); - bc[3] = (u8)(adr); - bc[4] = (u8)(data >> 24); - bc[5] = (u8)(data >> 16); - bc[6] = (u8)(data >> 8); - bc[7] = (u8)(data); - len = 9; - break; + if (!r_buffer) + return -ENOMEM; - default: - result = N_FAIL; - break; - } + tr.rx_buf = r_buffer; + dev_dbg(&spi->dev, "Request writing %d bytes\n", len); - if (result) { - if (!g_spi.crc_off) - bc[len - 1] = (crc7(0x7f, (const u8 *)&bc[0], len - 1)) << 1; - else - len -= 1; + memset(&msg, 0, sizeof(msg)); + spi_message_init(&msg); + msg.spi = spi; + msg.is_dma_mapped = USE_SPI_DMA; + spi_message_add_tail(&tr, &msg); - if (!g_spi.spi_tx(bc, len)) { - PRINT_ER("[wilc spi]: Failed cmd write, bus error...\n"); - result = N_FAIL; - } + ret = spi_sync(spi, &msg); + if (ret < 0) + dev_err(&spi->dev, "SPI transaction failed\n"); + + kfree(r_buffer); + } else { + dev_err(&spi->dev, + "can't write data with the following length: %d\n", + len); + dev_err(&spi->dev, + "FAILED due to NULL buffer or ZERO length check the following length: %d\n", + len); + ret = -EINVAL; } - return result; + return ret; } -static int spi_cmd_rsp(u8 cmd) +static int wilc_spi_rx(struct wilc *wilc, u8 *rb, u32 rlen) { - u8 rsp; - int result = N_OK; + struct spi_device *spi = to_spi_device(wilc->dev); + int ret; - /** - * Command/Control response - **/ - if ((cmd == CMD_RESET) || - (cmd == CMD_TERMINATE) || - (cmd == CMD_REPEAT)) { - if (!g_spi.spi_rx(&rsp, 1)) { - result = N_FAIL; - goto _fail_; - } - } + if (rlen > 0) { + struct spi_message msg; + struct spi_transfer tr = { + .rx_buf = rb, + .len = rlen, + .delay_usecs = 0, - if (!g_spi.spi_rx(&rsp, 1)) { - PRINT_ER("[wilc spi]: Failed cmd response read, bus error...\n"); - result = N_FAIL; - goto _fail_; - } + }; + char *t_buffer = kzalloc(rlen, GFP_KERNEL); - if (rsp != cmd) { - PRINT_ER("[wilc spi]: Failed cmd response, cmd (%02x), resp (%02x)\n", cmd, rsp); - result = N_FAIL; - goto _fail_; - } + if (!t_buffer) + return -ENOMEM; - /** - * State response - **/ - if (!g_spi.spi_rx(&rsp, 1)) { - PRINT_ER("[wilc spi]: Failed cmd state read, bus error...\n"); - result = N_FAIL; - goto _fail_; - } + tr.tx_buf = t_buffer; - if (rsp != 0x00) { - PRINT_ER("[wilc spi]: Failed cmd state response state (%02x)\n", rsp); - result = N_FAIL; + memset(&msg, 0, sizeof(msg)); + spi_message_init(&msg); + msg.spi = spi; + msg.is_dma_mapped = USE_SPI_DMA; + spi_message_add_tail(&tr, &msg); + + ret = spi_sync(spi, &msg); + if (ret < 0) + dev_err(&spi->dev, "SPI transaction failed\n"); + kfree(t_buffer); + } else { + dev_err(&spi->dev, + "can't read data with the following length: %u\n", + rlen); + ret = -EINVAL; } -_fail_: + return ret; +} - return result; +static int wilc_spi_tx_rx(struct wilc *wilc, u8 *wb, u8 *rb, u32 rlen) +{ + struct spi_device *spi = to_spi_device(wilc->dev); + int ret; + + if (rlen > 0) { + struct spi_message msg; + struct spi_transfer tr = { + .rx_buf = rb, + .tx_buf = wb, + .len = rlen, + .bits_per_word = 8, + .delay_usecs = 0, + + }; + + memset(&msg, 0, sizeof(msg)); + spi_message_init(&msg); + msg.spi = spi; + msg.is_dma_mapped = USE_SPI_DMA; + + spi_message_add_tail(&tr, &msg); + ret = spi_sync(spi, &msg); + if (ret < 0) + dev_err(&spi->dev, "SPI transaction failed\n"); + } else { + dev_err(&spi->dev, + "can't read data with the following length: %u\n", + rlen); + ret = -EINVAL; + } + + return ret; } -static int spi_cmd_complete(u8 cmd, u32 adr, u8 *b, u32 sz, u8 clockless) +static int spi_cmd_complete(struct wilc *wilc, u8 cmd, u32 adr, u8 *b, u32 sz, + u8 clockless) { + struct spi_device *spi = to_spi_device(wilc->dev); u8 wb[32], rb[32]; u8 wix, rix; u32 len2; @@ -398,7 +415,7 @@ static int spi_cmd_complete(u8 cmd, u32 adr, u8 *b, u32 sz, u8 clockless) #undef NUM_DUMMY_BYTES if (len2 > ARRAY_SIZE(wb)) { - PRINT_ER("[wilc spi]: spi buffer size too small (%d) (%zu)\n", + dev_err(&spi->dev, "spi buffer size too small (%d) (%zu)\n", len2, ARRAY_SIZE(wb)); result = N_FAIL; return result; @@ -409,8 +426,8 @@ static int spi_cmd_complete(u8 cmd, u32 adr, u8 *b, u32 sz, u8 clockless) } rix = len; - if (!g_spi.spi_trx(wb, rb, len2)) { - PRINT_ER("[wilc spi]: Failed cmd write, bus error...\n"); + if (wilc_spi_tx_rx(wilc, wb, rb, len2)) { + dev_err(&spi->dev, "Failed cmd write, bus error...\n"); result = N_FAIL; return result; } @@ -430,7 +447,7 @@ static int spi_cmd_complete(u8 cmd, u32 adr, u8 *b, u32 sz, u8 clockless) /* } while(&rptr[1] <= &rb[len2]); */ if (rsp != cmd) { - PRINT_ER("[wilc spi]: Failed cmd response, cmd (%02x)" + dev_err(&spi->dev, "Failed cmd response, cmd (%02x)" ", resp (%02x)\n", cmd, rsp); result = N_FAIL; return result; @@ -441,8 +458,8 @@ static int spi_cmd_complete(u8 cmd, u32 adr, u8 *b, u32 sz, u8 clockless) **/ rsp = rb[rix++]; if (rsp != 0x00) { - PRINT_ER("[wilc spi]: Failed cmd state response " - "state (%02x)\n", rsp); + dev_err(&spi->dev, "Failed cmd state response state (%02x)\n", + rsp); result = N_FAIL; return result; } @@ -469,8 +486,8 @@ static int spi_cmd_complete(u8 cmd, u32 adr, u8 *b, u32 sz, u8 clockless) } while (retry--); if (retry <= 0) { - PRINT_ER("[wilc spi]: Error, data read " - "response (%02x)\n", rsp); + dev_err(&spi->dev, + "Error, data read response (%02x)\n", rsp); result = N_RESET; return result; } @@ -485,7 +502,8 @@ static int spi_cmd_complete(u8 cmd, u32 adr, u8 *b, u32 sz, u8 clockless) b[2] = rb[rix++]; b[3] = rb[rix++]; } else { - PRINT_ER("[wilc spi]: buffer overrun when reading data.\n"); + dev_err(&spi->dev, + "buffer overrun when reading data.\n"); result = N_FAIL; return result; } @@ -498,7 +516,7 @@ static int spi_cmd_complete(u8 cmd, u32 adr, u8 *b, u32 sz, u8 clockless) crc[0] = rb[rix++]; crc[1] = rb[rix++]; } else { - PRINT_ER("[wilc spi]: buffer overrun when reading crc.\n"); + dev_err(&spi->dev,"buffer overrun when reading crc.\n"); result = N_FAIL; return result; } @@ -524,8 +542,8 @@ static int spi_cmd_complete(u8 cmd, u32 adr, u8 *b, u32 sz, u8 clockless) /** * Read bytes **/ - if (!g_spi.spi_rx(&b[ix], nbytes)) { - PRINT_ER("[wilc spi]: Failed data block read, bus error...\n"); + if (wilc_spi_rx(wilc, &b[ix], nbytes)) { + dev_err(&spi->dev, "Failed data block read, bus error...\n"); result = N_FAIL; goto _error_; } @@ -534,8 +552,8 @@ static int spi_cmd_complete(u8 cmd, u32 adr, u8 *b, u32 sz, u8 clockless) * Read Crc **/ if (!g_spi.crc_off) { - if (!g_spi.spi_rx(crc, 2)) { - PRINT_ER("[wilc spi]: Failed data block crc read, bus error...\n"); + if (wilc_spi_rx(wilc, crc, 2)) { + dev_err(&spi->dev, "Failed data block crc read, bus error...\n"); result = N_FAIL; goto _error_; } @@ -565,8 +583,8 @@ static int spi_cmd_complete(u8 cmd, u32 adr, u8 *b, u32 sz, u8 clockless) **/ retry = 10; do { - if (!g_spi.spi_rx(&rsp, 1)) { - PRINT_ER("[wilc spi]: Failed data response read, bus error...\n"); + if (wilc_spi_rx(wilc, &rsp, 1)) { + dev_err(&spi->dev, "Failed data response read, bus error...\n"); result = N_FAIL; break; } @@ -581,8 +599,8 @@ static int spi_cmd_complete(u8 cmd, u32 adr, u8 *b, u32 sz, u8 clockless) /** * Read bytes **/ - if (!g_spi.spi_rx(&b[ix], nbytes)) { - PRINT_ER("[wilc spi]: Failed data block read, bus error...\n"); + if (wilc_spi_rx(wilc, &b[ix], nbytes)) { + dev_err(&spi->dev, "Failed data block read, bus error...\n"); result = N_FAIL; break; } @@ -591,8 +609,8 @@ static int spi_cmd_complete(u8 cmd, u32 adr, u8 *b, u32 sz, u8 clockless) * Read Crc **/ if (!g_spi.crc_off) { - if (!g_spi.spi_rx(crc, 2)) { - PRINT_ER("[wilc spi]: Failed data block crc read, bus error...\n"); + if (wilc_spi_rx(wilc, crc, 2)) { + dev_err(&spi->dev, "Failed data block crc read, bus error...\n"); result = N_FAIL; break; } @@ -607,76 +625,9 @@ _error_: return result; } -static int spi_data_read(u8 *b, u32 sz) -{ - int retry, ix, nbytes; - int result = N_OK; - u8 crc[2]; - u8 rsp; - - /** - * Data - **/ - ix = 0; - do { - if (sz <= DATA_PKT_SZ) - nbytes = sz; - else - nbytes = DATA_PKT_SZ; - - /** - * Data Respnose header - **/ - retry = 10; - do { - if (!g_spi.spi_rx(&rsp, 1)) { - PRINT_ER("[wilc spi]: Failed data response read, bus error...\n"); - result = N_FAIL; - break; - } - if (((rsp >> 4) & 0xf) == 0xf) - break; - } while (retry--); - - if (result == N_FAIL) - break; - - if (retry <= 0) { - PRINT_ER("[wilc spi]: Failed data response read...(%02x)\n", rsp); - result = N_FAIL; - break; - } - - /** - * Read bytes - **/ - if (!g_spi.spi_rx(&b[ix], nbytes)) { - PRINT_ER("[wilc spi]: Failed data block read, bus error...\n"); - result = N_FAIL; - break; - } - - /** - * Read Crc - **/ - if (!g_spi.crc_off) { - if (!g_spi.spi_rx(crc, 2)) { - PRINT_ER("[wilc spi]: Failed data block crc read, bus error...\n"); - result = N_FAIL; - break; - } - } - - ix += nbytes; - sz -= nbytes; - - } while (sz); - - return result; -} - -static int spi_data_write(u8 *b, u32 sz) +static int spi_data_write(struct wilc *wilc, u8 *b, u32 sz) { + struct spi_device *spi = to_spi_device(wilc->dev); int ix, nbytes; int result = 1; u8 cmd, order, crc[2] = {0}; @@ -709,8 +660,9 @@ static int spi_data_write(u8 *b, u32 sz) order = 0x2; } cmd |= order; - if (!g_spi.spi_tx(&cmd, 1)) { - PRINT_ER("[wilc spi]: Failed data block cmd write, bus error...\n"); + if (wilc_spi_tx(wilc, &cmd, 1)) { + dev_err(&spi->dev, + "Failed data block cmd write, bus error...\n"); result = N_FAIL; break; } @@ -718,8 +670,9 @@ static int spi_data_write(u8 *b, u32 sz) /** * Write data **/ - if (!g_spi.spi_tx(&b[ix], nbytes)) { - PRINT_ER("[wilc spi]: Failed data block write, bus error...\n"); + if (wilc_spi_tx(wilc, &b[ix], nbytes)) { + dev_err(&spi->dev, + "Failed data block write, bus error...\n"); result = N_FAIL; break; } @@ -728,8 +681,8 @@ static int spi_data_write(u8 *b, u32 sz) * Write Crc **/ if (!g_spi.crc_off) { - if (!g_spi.spi_tx(crc, 2)) { - PRINT_ER("[wilc spi]: Failed data block crc write, bus error...\n"); + if (wilc_spi_tx(wilc, crc, 2)) { + dev_err(&spi->dev,"Failed data block crc write, bus error...\n"); result = N_FAIL; break; } @@ -752,34 +705,34 @@ static int spi_data_write(u8 *b, u32 sz) * ********************************************/ -static int spi_internal_write(u32 adr, u32 dat) +static int spi_internal_write(struct wilc *wilc, u32 adr, u32 dat) { + struct spi_device *spi = to_spi_device(wilc->dev); int result; -#ifdef BIG_ENDIAN - dat = BYTE_SWAP(dat); -#endif - result = spi_cmd_complete(CMD_INTERNAL_WRITE, adr, (u8 *)&dat, 4, 0); + dat = cpu_to_le32(dat); + result = spi_cmd_complete(wilc, CMD_INTERNAL_WRITE, adr, (u8 *)&dat, 4, + 0); if (result != N_OK) { - PRINT_ER("[wilc spi]: Failed internal write cmd...\n"); + dev_err(&spi->dev, "Failed internal write cmd...\n"); } return result; } -static int spi_internal_read(u32 adr, u32 *data) +static int spi_internal_read(struct wilc *wilc, u32 adr, u32 *data) { + struct spi_device *spi = to_spi_device(wilc->dev); int result; - result = spi_cmd_complete(CMD_INTERNAL_READ, adr, (u8 *)data, 4, 0); + result = spi_cmd_complete(wilc, CMD_INTERNAL_READ, adr, (u8 *)data, 4, + 0); if (result != N_OK) { - PRINT_ER("[wilc spi]: Failed internal read cmd...\n"); + dev_err(&spi->dev, "Failed internal read cmd...\n"); return 0; } -#ifdef BIG_ENDIAN - *data = BYTE_SWAP(*data); -#endif + *data = cpu_to_le32(*data); return 1; } @@ -790,31 +743,31 @@ static int spi_internal_read(u32 adr, u32 *data) * ********************************************/ -static int spi_write_reg(u32 addr, u32 data) +static int wilc_spi_write_reg(struct wilc *wilc, u32 addr, u32 data) { + struct spi_device *spi = to_spi_device(wilc->dev); int result = N_OK; u8 cmd = CMD_SINGLE_WRITE; u8 clockless = 0; -#ifdef BIG_ENDIAN - data = BYTE_SWAP(data); -#endif + data = cpu_to_le32(data); if (addr < 0x30) { /* Clockless register*/ cmd = CMD_INTERNAL_WRITE; clockless = 1; } - result = spi_cmd_complete(cmd, addr, (u8 *)&data, 4, clockless); + result = spi_cmd_complete(wilc, cmd, addr, (u8 *)&data, 4, clockless); if (result != N_OK) { - PRINT_ER("[wilc spi]: Failed cmd, write reg (%08x)...\n", addr); + dev_err(&spi->dev, "Failed cmd, write reg (%08x)...\n", addr); } return result; } -static int spi_write(u32 addr, u8 *buf, u32 size) +static int wilc_spi_write(struct wilc *wilc, u32 addr, u8 *buf, u32 size) { + struct spi_device *spi = to_spi_device(wilc->dev); int result; u8 cmd = CMD_DMA_EXT_WRITE; @@ -824,60 +777,61 @@ static int spi_write(u32 addr, u8 *buf, u32 size) if (size <= 4) return 0; - result = spi_cmd_complete(cmd, addr, NULL, size, 0); + result = spi_cmd_complete(wilc, cmd, addr, NULL, size, 0); if (result != N_OK) { - PRINT_ER("[wilc spi]: Failed cmd, write block (%08x)...\n", addr); + dev_err(&spi->dev, + "Failed cmd, write block (%08x)...\n", addr); return 0; } /** * Data **/ - result = spi_data_write(buf, size); + result = spi_data_write(wilc, buf, size); if (result != N_OK) { - PRINT_ER("[wilc spi]: Failed block data write...\n"); + dev_err(&spi->dev, "Failed block data write...\n"); } return 1; } -static int spi_read_reg(u32 addr, u32 *data) +static int wilc_spi_read_reg(struct wilc *wilc, u32 addr, u32 *data) { + struct spi_device *spi = to_spi_device(wilc->dev); int result = N_OK; u8 cmd = CMD_SINGLE_READ; u8 clockless = 0; if (addr < 0x30) { - /* PRINT_ER("***** read addr %d\n\n", addr); */ + /* dev_err(&spi->dev, "***** read addr %d\n\n", addr); */ /* Clockless register*/ cmd = CMD_INTERNAL_READ; clockless = 1; } - result = spi_cmd_complete(cmd, addr, (u8 *)data, 4, clockless); + result = spi_cmd_complete(wilc, cmd, addr, (u8 *)data, 4, clockless); if (result != N_OK) { - PRINT_ER("[wilc spi]: Failed cmd, read reg (%08x)...\n", addr); + dev_err(&spi->dev, "Failed cmd, read reg (%08x)...\n", addr); return 0; } -#ifdef BIG_ENDIAN - *data = BYTE_SWAP(*data); -#endif + *data = cpu_to_le32(*data); return 1; } -static int spi_read(u32 addr, u8 *buf, u32 size) +static int wilc_spi_read(struct wilc *wilc, u32 addr, u8 *buf, u32 size) { + struct spi_device *spi = to_spi_device(wilc->dev); u8 cmd = CMD_DMA_EXT_READ; int result; if (size <= 4) return 0; - result = spi_cmd_complete(cmd, addr, buf, size, 0); + result = spi_cmd_complete(wilc, cmd, addr, buf, size, 0); if (result != N_OK) { - PRINT_ER("[wilc spi]: Failed cmd, read block (%08x)...\n", addr); + dev_err(&spi->dev, "Failed cmd, read block (%08x)...\n", addr); return 0; } @@ -890,20 +844,7 @@ static int spi_read(u32 addr, u8 *buf, u32 size) * ********************************************/ -static int spi_clear_int(void) -{ - u32 reg; - - if (!spi_read_reg(WILC_HOST_RX_CTRL_0, ®)) { - PRINT_ER("[wilc spi]: Failed read reg (%08x)...\n", WILC_HOST_RX_CTRL_0); - return 0; - } - reg &= ~0x1; - spi_write_reg(WILC_HOST_RX_CTRL_0, reg); - return 1; -} - -static int spi_deinit(void *pv) +static int _wilc_spi_deinit(struct wilc *wilc) { /** * TODO: @@ -911,46 +852,9 @@ static int spi_deinit(void *pv) return 1; } -static int spi_sync(void) -{ - u32 reg; - int ret; - - /** - * interrupt pin mux select - **/ - ret = spi_read_reg(WILC_PIN_MUX_0, ®); - if (!ret) { - PRINT_ER("[wilc spi]: Failed read reg (%08x)...\n", WILC_PIN_MUX_0); - return 0; - } - reg |= BIT(8); - ret = spi_write_reg(WILC_PIN_MUX_0, reg); - if (!ret) { - PRINT_ER("[wilc spi]: Failed write reg (%08x)...\n", WILC_PIN_MUX_0); - return 0; - } - - /** - * interrupt enable - **/ - ret = spi_read_reg(WILC_INTR_ENABLE, ®); - if (!ret) { - PRINT_ER("[wilc spi]: Failed read reg (%08x)...\n", WILC_INTR_ENABLE); - return 0; - } - reg |= BIT(16); - ret = spi_write_reg(WILC_INTR_ENABLE, reg); - if (!ret) { - PRINT_ER("[wilc spi]: Failed write reg (%08x)...\n", WILC_INTR_ENABLE); - return 0; - } - - return 1; -} - -static int spi_init(wilc_wlan_inp_t *inp, wilc_debug_func func) +static int wilc_spi_init(struct wilc *wilc) { + struct spi_device *spi = to_spi_device(wilc->dev); u32 reg; u32 chipid; @@ -958,8 +862,8 @@ static int spi_init(wilc_wlan_inp_t *inp, wilc_debug_func func) if (isinit) { - if (!spi_read_reg(0x1000, &chipid)) { - PRINT_ER("[wilc spi]: Fail cmd read chip id...\n"); + if (!wilc_spi_read_reg(wilc, 0x1000, &chipid)) { + dev_err(&spi->dev, "Fail cmd read chip id...\n"); return 0; } return 1; @@ -967,21 +871,6 @@ static int spi_init(wilc_wlan_inp_t *inp, wilc_debug_func func) memset(&g_spi, 0, sizeof(wilc_spi_t)); - g_spi.dPrint = func; - g_spi.os_context = inp->os_context.os_private; - if (inp->io_func.io_init) { - if (!inp->io_func.io_init(g_spi.os_context)) { - PRINT_ER("[wilc spi]: Failed io init bus...\n"); - return 0; - } - } else { - return 0; - } - g_spi.spi_tx = inp->io_func.u.spi.spi_tx; - g_spi.spi_rx = inp->io_func.u.spi.spi_rx; - g_spi.spi_trx = inp->io_func.u.spi.spi_trx; - g_spi.spi_max_speed = inp->io_func.u.spi.spi_max_speed; - /** * configure protocol **/ @@ -989,14 +878,15 @@ static int spi_init(wilc_wlan_inp_t *inp, wilc_debug_func func) /* TODO: We can remove the CRC trials if there is a definite way to reset */ /* the SPI to it's initial value. */ - if (!spi_internal_read(WILC_SPI_PROTOCOL_OFFSET, ®)) { + if (!spi_internal_read(wilc, WILC_SPI_PROTOCOL_OFFSET, ®)) { /* Read failed. Try with CRC off. This might happen when module * is removed but chip isn't reset*/ g_spi.crc_off = 1; - PRINT_ER("[wilc spi]: Failed internal read protocol with CRC on, retyring with CRC off...\n"); - if (!spi_internal_read(WILC_SPI_PROTOCOL_OFFSET, ®)) { + dev_err(&spi->dev, "Failed internal read protocol with CRC on, retyring with CRC off...\n"); + if (!spi_internal_read(wilc, WILC_SPI_PROTOCOL_OFFSET, ®)) { /* Reaad failed with both CRC on and off, something went bad */ - PRINT_ER("[wilc spi]: Failed internal read protocol...\n"); + dev_err(&spi->dev, + "Failed internal read protocol...\n"); return 0; } } @@ -1004,8 +894,8 @@ static int spi_init(wilc_wlan_inp_t *inp, wilc_debug_func func) reg &= ~0xc; /* disable crc checking */ reg &= ~0x70; reg |= (0x5 << 4); - if (!spi_internal_write(WILC_SPI_PROTOCOL_OFFSET, reg)) { - PRINT_ER("[wilc spi %d]: Failed internal write protocol reg...\n", __LINE__); + if (!spi_internal_write(wilc, WILC_SPI_PROTOCOL_OFFSET, reg)) { + dev_err(&spi->dev, "[wilc spi %d]: Failed internal write protocol reg...\n", __LINE__); return 0; } g_spi.crc_off = 1; @@ -1015,11 +905,11 @@ static int spi_init(wilc_wlan_inp_t *inp, wilc_debug_func func) /** * make sure can read back chip id correctly **/ - if (!spi_read_reg(0x1000, &chipid)) { - PRINT_ER("[wilc spi]: Fail cmd read chip id...\n"); + if (!wilc_spi_read_reg(wilc, 0x1000, &chipid)) { + dev_err(&spi->dev, "Fail cmd read chip id...\n"); return 0; } - /* PRINT_ER("[wilc spi]: chipid (%08x)\n", chipid); */ + /* dev_err(&spi->dev, "chipid (%08x)\n", chipid); */ g_spi.has_thrpt_enh = 1; @@ -1028,29 +918,24 @@ static int spi_init(wilc_wlan_inp_t *inp, wilc_debug_func func) return 1; } -static void spi_max_bus_speed(void) -{ - g_spi.spi_max_speed(); -} - -static void spi_default_bus_speed(void) -{ -} - -static int spi_read_size(u32 *size) +static int wilc_spi_read_size(struct wilc *wilc, u32 *size) { + struct spi_device *spi = to_spi_device(wilc->dev); int ret; if (g_spi.has_thrpt_enh) { - ret = spi_internal_read(0xe840 - WILC_SPI_REG_BASE, size); + ret = spi_internal_read(wilc, 0xe840 - WILC_SPI_REG_BASE, + size); *size = *size & IRQ_DMA_WD_CNT_MASK; } else { u32 tmp; u32 byte_cnt; - ret = spi_read_reg(WILC_VMM_TO_HOST_SIZE, &byte_cnt); + ret = wilc_spi_read_reg(wilc, WILC_VMM_TO_HOST_SIZE, + &byte_cnt); if (!ret) { - PRINT_ER("[wilc spi]: Failed read WILC_VMM_TO_HOST_SIZE ...\n"); + dev_err(&spi->dev, + "Failed read WILC_VMM_TO_HOST_SIZE ...\n"); goto _fail_; } tmp = (byte_cnt >> 2) & IRQ_DMA_WD_CNT_MASK; @@ -1065,19 +950,23 @@ _fail_: -static int spi_read_int(u32 *int_status) +static int wilc_spi_read_int(struct wilc *wilc, u32 *int_status) { + struct spi_device *spi = to_spi_device(wilc->dev); int ret; if (g_spi.has_thrpt_enh) { - ret = spi_internal_read(0xe840 - WILC_SPI_REG_BASE, int_status); + ret = spi_internal_read(wilc, 0xe840 - WILC_SPI_REG_BASE, + int_status); } else { u32 tmp; u32 byte_cnt; - ret = spi_read_reg(WILC_VMM_TO_HOST_SIZE, &byte_cnt); + ret = wilc_spi_read_reg(wilc, WILC_VMM_TO_HOST_SIZE, + &byte_cnt); if (!ret) { - PRINT_ER("[wilc spi]: Failed read WILC_VMM_TO_HOST_SIZE ...\n"); + dev_err(&spi->dev, + "Failed read WILC_VMM_TO_HOST_SIZE ...\n"); goto _fail_; } tmp = (byte_cnt >> 2) & IRQ_DMA_WD_CNT_MASK; @@ -1091,11 +980,12 @@ static int spi_read_int(u32 *int_status) happended = 0; - spi_read_reg(0x1a90, &irq_flags); + wilc_spi_read_reg(wilc, 0x1a90, &irq_flags); tmp |= ((irq_flags >> 27) << IRG_FLAGS_OFFSET); if (g_spi.nint > 5) { - spi_read_reg(0x1a94, &irq_flags); + wilc_spi_read_reg(wilc, 0x1a94, + &irq_flags); tmp |= (((irq_flags >> 0) & 0x7) << (IRG_FLAGS_OFFSET + 5)); } @@ -1105,7 +995,7 @@ static int spi_read_int(u32 *int_status) unkmown_mask = ~((1ul << g_spi.nint) - 1); if ((tmp >> IRG_FLAGS_OFFSET) & unkmown_mask) { - PRINT_ER("[wilc spi]: Unexpected interrupt (2): j=%d, tmp=%x, mask=%x\n", j, tmp, unkmown_mask); + dev_err(&spi->dev, "Unexpected interrupt (2): j=%d, tmp=%x, mask=%x\n", j, tmp, unkmown_mask); happended = 1; } } @@ -1121,12 +1011,14 @@ _fail_: return ret; } -static int spi_clear_int_ext(u32 val) +static int wilc_spi_clear_int_ext(struct wilc *wilc, u32 val) { + struct spi_device *spi = to_spi_device(wilc->dev); int ret; if (g_spi.has_thrpt_enh) { - ret = spi_internal_write(0xe844 - WILC_SPI_REG_BASE, val); + ret = spi_internal_write(wilc, 0xe844 - WILC_SPI_REG_BASE, + val); } else { u32 flags; @@ -1138,18 +1030,22 @@ static int spi_clear_int_ext(u32 val) for (i = 0; i < g_spi.nint; i++) { /* No matter what you write 1 or 0, it will clear interrupt. */ if (flags & 1) - ret = spi_write_reg(0x10c8 + i * 4, 1); + ret = wilc_spi_write_reg(wilc, 0x10c8 + i * 4, 1); if (!ret) break; flags >>= 1; } if (!ret) { - PRINT_ER("[wilc spi]: Failed spi_write_reg, set reg %x ...\n", 0x10c8 + i * 4); + dev_err(&spi->dev, + "Failed wilc_spi_write_reg, set reg %x ...\n", + 0x10c8 + i * 4); goto _fail_; } for (i = g_spi.nint; i < MAX_NUM_INT; i++) { if (flags & 1) - PRINT_ER("[wilc spi]: Unexpected interrupt cleared %d...\n", i); + dev_err(&spi->dev, + "Unexpected interrupt cleared %d...\n", + i); flags >>= 1; } } @@ -1165,9 +1061,11 @@ static int spi_clear_int_ext(u32 val) if ((val & SEL_VMM_TBL1) == SEL_VMM_TBL1) tbl_ctl |= BIT(1); - ret = spi_write_reg(WILC_VMM_TBL_CTL, tbl_ctl); + ret = wilc_spi_write_reg(wilc, WILC_VMM_TBL_CTL, + tbl_ctl); if (!ret) { - PRINT_ER("[wilc spi]: fail write reg vmm_tbl_ctl...\n"); + dev_err(&spi->dev, + "fail write reg vmm_tbl_ctl...\n"); goto _fail_; } @@ -1175,9 +1073,10 @@ static int spi_clear_int_ext(u32 val) /** * enable vmm transfer. **/ - ret = spi_write_reg(WILC_VMM_CORE_CTL, 1); + ret = wilc_spi_write_reg(wilc, + WILC_VMM_CORE_CTL, 1); if (!ret) { - PRINT_ER("[wilc spi]: fail write reg vmm_core_ctl...\n"); + dev_err(&spi->dev,"fail write reg vmm_core_ctl...\n"); goto _fail_; } } @@ -1187,13 +1086,14 @@ _fail_: return ret; } -static int spi_sync_ext(int nint /* how mant interrupts to enable. */) +static int wilc_spi_sync_ext(struct wilc *wilc, int nint) { + struct spi_device *spi = to_spi_device(wilc->dev); u32 reg; int ret, i; if (nint > MAX_NUM_INT) { - PRINT_ER("[wilc spi]: Too many interupts (%d)...\n", nint); + dev_err(&spi->dev, "Too many interupts (%d)...\n", nint); return 0; } @@ -1202,39 +1102,44 @@ static int spi_sync_ext(int nint /* how mant interrupts to enable. */) /** * interrupt pin mux select **/ - ret = spi_read_reg(WILC_PIN_MUX_0, ®); + ret = wilc_spi_read_reg(wilc, WILC_PIN_MUX_0, ®); if (!ret) { - PRINT_ER("[wilc spi]: Failed read reg (%08x)...\n", WILC_PIN_MUX_0); + dev_err(&spi->dev, "Failed read reg (%08x)...\n", + WILC_PIN_MUX_0); return 0; } reg |= BIT(8); - ret = spi_write_reg(WILC_PIN_MUX_0, reg); + ret = wilc_spi_write_reg(wilc, WILC_PIN_MUX_0, reg); if (!ret) { - PRINT_ER("[wilc spi]: Failed write reg (%08x)...\n", WILC_PIN_MUX_0); + dev_err(&spi->dev, "Failed write reg (%08x)...\n", + WILC_PIN_MUX_0); return 0; } /** * interrupt enable **/ - ret = spi_read_reg(WILC_INTR_ENABLE, ®); + ret = wilc_spi_read_reg(wilc, WILC_INTR_ENABLE, ®); if (!ret) { - PRINT_ER("[wilc spi]: Failed read reg (%08x)...\n", WILC_INTR_ENABLE); + dev_err(&spi->dev, "Failed read reg (%08x)...\n", + WILC_INTR_ENABLE); return 0; } for (i = 0; (i < 5) && (nint > 0); i++, nint--) { reg |= (BIT((27 + i))); } - ret = spi_write_reg(WILC_INTR_ENABLE, reg); + ret = wilc_spi_write_reg(wilc, WILC_INTR_ENABLE, reg); if (!ret) { - PRINT_ER("[wilc spi]: Failed write reg (%08x)...\n", WILC_INTR_ENABLE); + dev_err(&spi->dev, "Failed write reg (%08x)...\n", + WILC_INTR_ENABLE); return 0; } if (nint) { - ret = spi_read_reg(WILC_INTR2_ENABLE, ®); + ret = wilc_spi_read_reg(wilc, WILC_INTR2_ENABLE, ®); if (!ret) { - PRINT_ER("[wilc spi]: Failed read reg (%08x)...\n", WILC_INTR2_ENABLE); + dev_err(&spi->dev, "Failed read reg (%08x)...\n", + WILC_INTR2_ENABLE); return 0; } @@ -1242,9 +1147,10 @@ static int spi_sync_ext(int nint /* how mant interrupts to enable. */) reg |= BIT(i); } - ret = spi_read_reg(WILC_INTR2_ENABLE, ®); + ret = wilc_spi_read_reg(wilc, WILC_INTR2_ENABLE, ®); if (!ret) { - PRINT_ER("[wilc spi]: Failed write reg (%08x)...\n", WILC_INTR2_ENABLE); + dev_err(&spi->dev, "Failed write reg (%08x)...\n", + WILC_INTR2_ENABLE); return 0; } } @@ -1256,21 +1162,17 @@ static int spi_sync_ext(int nint /* how mant interrupts to enable. */) * Global spi HIF function table * ********************************************/ -wilc_hif_func_t hif_spi = { - spi_init, - spi_deinit, - spi_read_reg, - spi_write_reg, - spi_read, - spi_write, - spi_sync, - spi_clear_int, - spi_read_int, - spi_clear_int_ext, - spi_read_size, - spi_write, - spi_read, - spi_sync_ext, - spi_max_bus_speed, - spi_default_bus_speed, +const struct wilc_hif_func wilc_hif_spi = { + .hif_init = wilc_spi_init, + .hif_deinit = _wilc_spi_deinit, + .hif_read_reg = wilc_spi_read_reg, + .hif_write_reg = wilc_spi_write_reg, + .hif_block_rx = wilc_spi_read, + .hif_block_tx = wilc_spi_write, + .hif_read_int = wilc_spi_read_int, + .hif_clear_int_ext = wilc_spi_clear_int_ext, + .hif_read_size = wilc_spi_read_size, + .hif_block_tx_ext = wilc_spi_write, + .hif_block_rx_ext = wilc_spi_read, + .hif_sync_ext = wilc_spi_sync_ext, }; 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