diff options
Diffstat (limited to 'drivers/staging')
167 files changed, 6551 insertions, 11719 deletions
diff --git a/drivers/staging/Kconfig b/drivers/staging/Kconfig index 59af251e7576..7fec86946131 100644 --- a/drivers/staging/Kconfig +++ b/drivers/staging/Kconfig @@ -66,8 +66,6 @@ source "drivers/staging/gdm724x/Kconfig" source "drivers/staging/fwserial/Kconfig" -source "drivers/staging/netlogic/Kconfig" - source "drivers/staging/gs_fpgaboot/Kconfig" source "drivers/staging/unisys/Kconfig" diff --git a/drivers/staging/Makefile b/drivers/staging/Makefile index 76f413470bc8..e66e19c45425 100644 --- a/drivers/staging/Makefile +++ b/drivers/staging/Makefile @@ -10,7 +10,6 @@ obj-$(CONFIG_RTL8723BS) += rtl8723bs/ obj-$(CONFIG_R8712U) += rtl8712/ obj-$(CONFIG_R8188EU) += r8188eu/ obj-$(CONFIG_RTS5208) += rts5208/ -obj-$(CONFIG_NETLOGIC_XLR_NET) += netlogic/ obj-$(CONFIG_OCTEON_ETHERNET) += octeon/ obj-$(CONFIG_OCTEON_USB) += octeon-usb/ obj-$(CONFIG_VT6655) += vt6655/ diff --git a/drivers/staging/fbtft/fb_ssd1351.c b/drivers/staging/fbtft/fb_ssd1351.c index cf263a58a148..6fd549a424d5 100644 --- a/drivers/staging/fbtft/fb_ssd1351.c +++ b/drivers/staging/fbtft/fb_ssd1351.c @@ -187,7 +187,6 @@ static struct fbtft_display display = { }, }; -#ifdef CONFIG_FB_BACKLIGHT static int update_onboard_backlight(struct backlight_device *bd) { struct fbtft_par *par = bl_get_data(bd); @@ -231,9 +230,6 @@ static void register_onboard_backlight(struct fbtft_par *par) if (!par->fbtftops.unregister_backlight) par->fbtftops.unregister_backlight = fbtft_unregister_backlight; } -#else -static void register_onboard_backlight(struct fbtft_par *par) { }; -#endif FBTFT_REGISTER_DRIVER(DRVNAME, "solomon,ssd1351", &display); diff --git a/drivers/staging/fbtft/fbtft-core.c b/drivers/staging/fbtft/fbtft-core.c index ecb5f75f6dd5..f2684d2d6851 100644 --- a/drivers/staging/fbtft/fbtft-core.c +++ b/drivers/staging/fbtft/fbtft-core.c @@ -128,7 +128,6 @@ static int fbtft_request_gpios(struct fbtft_par *par) return 0; } -#ifdef CONFIG_FB_BACKLIGHT static int fbtft_backlight_update_status(struct backlight_device *bd) { struct fbtft_par *par = bl_get_data(bd); @@ -161,6 +160,7 @@ void fbtft_unregister_backlight(struct fbtft_par *par) par->info->bl_dev = NULL; } } +EXPORT_SYMBOL(fbtft_unregister_backlight); static const struct backlight_ops fbtft_bl_ops = { .get_brightness = fbtft_backlight_get_brightness, @@ -198,12 +198,7 @@ void fbtft_register_backlight(struct fbtft_par *par) if (!par->fbtftops.unregister_backlight) par->fbtftops.unregister_backlight = fbtft_unregister_backlight; } -#else -void fbtft_register_backlight(struct fbtft_par *par) { }; -void fbtft_unregister_backlight(struct fbtft_par *par) { }; -#endif EXPORT_SYMBOL(fbtft_register_backlight); -EXPORT_SYMBOL(fbtft_unregister_backlight); static void fbtft_set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye) @@ -853,13 +848,11 @@ int fbtft_register_framebuffer(struct fb_info *fb_info) fb_info->fix.smem_len >> 10, text1, HZ / fb_info->fbdefio->delay, text2); -#ifdef CONFIG_FB_BACKLIGHT /* Turn on backlight if available */ if (fb_info->bl_dev) { fb_info->bl_dev->props.power = FB_BLANK_UNBLANK; fb_info->bl_dev->ops->update_status(fb_info->bl_dev); } -#endif return 0; diff --git a/drivers/staging/greybus/audio_helper.c b/drivers/staging/greybus/audio_helper.c index 1ed4772d2771..843760675876 100644 --- a/drivers/staging/greybus/audio_helper.c +++ b/drivers/staging/greybus/audio_helper.c @@ -192,7 +192,11 @@ int gbaudio_remove_component_controls(struct snd_soc_component *component, unsigned int num_controls) { struct snd_card *card = component->card->snd_card; + int err; - return gbaudio_remove_controls(card, component->dev, controls, - num_controls, component->name_prefix); + down_write(&card->controls_rwsem); + err = gbaudio_remove_controls(card, component->dev, controls, + num_controls, component->name_prefix); + up_write(&card->controls_rwsem); + return err; } diff --git a/drivers/staging/media/Kconfig b/drivers/staging/media/Kconfig index e3aaae920847..b81cfa74edb7 100644 --- a/drivers/staging/media/Kconfig +++ b/drivers/staging/media/Kconfig @@ -26,6 +26,8 @@ source "drivers/staging/media/hantro/Kconfig" source "drivers/staging/media/imx/Kconfig" +source "drivers/staging/media/max96712/Kconfig" + source "drivers/staging/media/meson/vdec/Kconfig" source "drivers/staging/media/omap4iss/Kconfig" diff --git a/drivers/staging/media/Makefile b/drivers/staging/media/Makefile index 5b5afc5b03a0..7e2c86e3695d 100644 --- a/drivers/staging/media/Makefile +++ b/drivers/staging/media/Makefile @@ -1,6 +1,7 @@ # SPDX-License-Identifier: GPL-2.0 obj-$(CONFIG_INTEL_ATOMISP) += atomisp/ obj-$(CONFIG_VIDEO_IMX_MEDIA) += imx/ +obj-$(CONFIG_VIDEO_MAX96712) += max96712/ obj-$(CONFIG_VIDEO_MESON_VDEC) += meson/vdec/ obj-$(CONFIG_VIDEO_OMAP4) += omap4iss/ obj-$(CONFIG_VIDEO_ROCKCHIP_VDEC) += rkvdec/ diff --git a/drivers/staging/media/atomisp/Makefile b/drivers/staging/media/atomisp/Makefile index 606b7754fdfd..2485d7b3fee2 100644 --- a/drivers/staging/media/atomisp/Makefile +++ b/drivers/staging/media/atomisp/Makefile @@ -27,20 +27,16 @@ atomisp-objs += \ pci/sh_css_firmware.o \ pci/sh_css_host_data.o \ pci/sh_css_hrt.o \ - pci/sh_css_metadata.o \ pci/sh_css_metrics.o \ pci/sh_css_mipi.o \ pci/sh_css_mmu.o \ - pci/sh_css_morph.o \ pci/sh_css.o \ pci/sh_css_param_dvs.o \ pci/sh_css_param_shading.o \ pci/sh_css_params.o \ pci/sh_css_properties.o \ - pci/sh_css_shading.o \ pci/sh_css_sp.o \ pci/sh_css_stream_format.o \ - pci/sh_css_stream.o \ pci/sh_css_version.o \ pci/base/circbuf/src/circbuf.o \ pci/base/refcount/src/refcount.o \ @@ -53,6 +49,9 @@ atomisp-objs += \ pci/hmm/hmm.o \ pci/hmm/hmm_reserved_pool.o \ pci/ia_css_device_access.o \ + pci/ia_css_isp_configs.o \ + pci/ia_css_isp_states.o \ + pci/ia_css_isp_params.o \ pci/isp/kernels/aa/aa_2/ia_css_aa2.host.o \ pci/isp/kernels/anr/anr_1.0/ia_css_anr.host.o \ pci/isp/kernels/anr/anr_2/ia_css_anr2.host.o \ @@ -154,21 +153,13 @@ atomisp-objs += \ pci/hive_isp_css_common/host/timed_ctrl.o \ pci/hive_isp_css_common/host/vmem.o \ pci/hive_isp_css_shared/host/tag.o \ - pci/system_local.o \ - -obj-byt = \ - pci/css_2400_system/hive/ia_css_isp_configs.o \ - pci/css_2400_system/hive/ia_css_isp_params.o \ - pci/css_2400_system/hive/ia_css_isp_states.o \ + pci/system_local.o # These will be needed when clean merge CHT support nicely into the driver # Keep them here handy for when we get to that point # obj-cht = \ - pci/css_2401_system/hive/ia_css_isp_configs.o \ - pci/css_2401_system/hive/ia_css_isp_params.o \ - pci/css_2401_system/hive/ia_css_isp_states.o \ pci/css_2401_system/host/csi_rx.o \ pci/css_2401_system/host/ibuf_ctrl.o \ pci/css_2401_system/host/isys_dma.o \ @@ -306,10 +297,8 @@ INCLUDES += \ -I$(atomisp)/pci/runtime/rmgr/interface/ \ -I$(atomisp)/pci/runtime/spctrl/interface/ \ -I$(atomisp)/pci/runtime/tagger/interface/ \ - -I$(atomisp)/pci/css_2400_system/hive/ \ -I$(atomisp)/pci/css_2401_system/ \ -I$(atomisp)/pci/css_2401_system/host/ \ - -I$(atomisp)/pci/css_2401_system/hive/ \ -I$(atomisp)/pci/css_2401_system/hrt/ DEFINES := -DHRT_HW -DHRT_ISP_CSS_CUSTOM_HOST -DHRT_USE_VIR_ADDRS -D__HOST__ @@ -324,10 +313,7 @@ ifeq ($(CONFIG_VIDEO_ATOMISP_ISP2401),y) atomisp-objs += \ $(obj-cht) \ pci/runtime/isys/src/ibuf_ctrl_rmgr.o -DEFINES += -DISP2401 -DISP2401_NEW_INPUT_SYSTEM -DSYSTEM_hive_isp_css_2401_system -else -atomisp-objs += $(obj-byt) -DEFINES += -DISP2400 -DSYSTEM_hive_isp_css_2400_system +DEFINES += -DISP2401 endif ccflags-y += $(INCLUDES) $(DEFINES) -fno-common diff --git a/drivers/staging/media/atomisp/TODO b/drivers/staging/media/atomisp/TODO index 2d1ef9eb262a..43b842043f29 100644 --- a/drivers/staging/media/atomisp/TODO +++ b/drivers/staging/media/atomisp/TODO @@ -1,92 +1,161 @@ +For both Cherrytrail (CHT) and Baytrail (BHT) the driver +requires the "candrpv_0415_20150521_0458" firmware version. +It should be noticed that the firmware file is different, +depending on the ISP model, so they're stored with different +names: + +- for BHT: /lib/firmware/shisp_2400b0_v21.bin + + Warning: The driver was not tested yet for BHT. + +- for CHT: /lib/firmware/shisp_2401a0_v21.bin + + https://github.com/intel-aero/meta-intel-aero-base/blob/master/recipes-kernel/linux/linux-yocto/shisp_2401a0_v21.bin + NOTE: ===== -While the driver probes the hardware and reports itself as a -V4L2 driver, there are still some issues preventing it to -stream (at least it doesn't with the standard V4L2 applications. -Didn't test yet with some custom-made app for this driver). -Solving the related bugs and issues preventing it to work is -needed (items 6 and 7 from the list below). +This driver currently doesn't work with most V4L2 applications, +as there are still some issues with regards to implementing +certain APIs at the standard way. + +Also, currently only USERPTR streaming mode is working. + +In order to test, it is needed to know what's the sensor's +resolution. This can be checked with: + +$ v4l2-ctl --get-fmt-video + Format Video Capture: + Width/Height : 1600/1200 + ... + +It is known to work with: + +- v4l2grab at contrib/test directory at https://git.linuxtv.org/v4l-utils.git/ + + The resolution should not be bigger than the max resolution + supported by the sensor, or it will fail. So, if the sensor + reports: + + The driver can be tested with: + + v4l2grab -f YUYV -x 1600 -y 1200 -d /dev/video2 -u + +- NVT at https://github.com/intel/nvt + + $ ./v4l2n -o testimage_@.raw \ + --device /dev/video2 \ + --input 0 \ + --exposure=30000,30000,30000,30000 \ + --parm type=1,capturemode=CI_MODE_PREVIEW \ + --fmt type=1,width=1600,height=1200,pixelformat=YUYV \ + --reqbufs count=2,memory=USERPTR \ + --parameters=wb_config.r=32768,wb_config.gr=21043,wb_config.gb=21043,wb_config.b=30863 \ + --capture=20 + + As the output is in raw format, images need to be converted with: + + $ for i in $(seq 0 19); do + name="testimage_$(printf "%03i" $i)" + ./raw2pnm -x$WIDTH -y$HEIGHT -f$FORMAT $name.raw $name.pnm + rm $name.raw + done TODO ==== -1. The atomisp doesn't rely at the usual i2c stuff to discover the - sensors. Instead, it calls a function from atomisp_gmin_platform.c. - There are some hacks added there for it to wait for sensors to be - probed (with a timeout of 2 seconds or so). - This should be converted to the usual way, using V4L2 async subdev - framework to wait for cameras to be probed; +1. Fix support for MMAP streaming mode. This is required for most + V4L2 applications; -2. Use ACPI _DSM table - DONE! +2. Implement and/or fix V4L2 ioctls in order to allow a normal app to + use it; -3. Switch the driver to use pm_runtime stuff. Right now, it probes the - existing PMIC code and sensors call it directly. +3. Ensure that the driver will pass v4l2-compliance tests; -4. There's a problem at the sensor drivers: when trying to set a video - format, the atomisp main driver calls the sensor drivers with the - sensor turned off. This causes them to fail. +4. Get manufacturer's authorization to redistribute the binaries for + the firmware files; - The only exception is the atomisp-ov2880, which has a hack inside it - to turn it on when VIDIOC_S_FMT is called. +5. remove VIDEO_ATOMISP_ISP2401, making the driver to auto-detect the + register address differences between ISP2400 and ISP2401; - The right fix seems to power on the sensor when a video device is - opened (or at the first VIDIOC_ ioctl - except for VIDIOC_QUERYCAP), - powering it down at close() syscall. +6. Cleanup the driver code, removing the abstraction layers inside it; - Such kind of control would need to be done inside the atomisp driver, - not at the sensors code. +7. The atomisp doesn't rely at the usual i2c stuff to discover the + sensors. Instead, it calls a function from atomisp_gmin_platform.c. + There are some hacks added there for it to wait for sensors to be + probed (with a timeout of 2 seconds or so). This should be converted + to the usual way, using V4L2 async subdev framework to wait for + cameras to be probed; -5. There are several issues related to memory management, causing - crashes. The atomisp splits the memory management on three separate - regions: +8. Switch to standard V4L2 sub-device API for sensor and lens. In + particular, the user space API needs to support V4L2 controls as + defined in the V4L2 spec and references to atomisp must be removed from + these drivers. + +9. Use LED flash API for flash LED drivers such as LM3554 (which already + has a LED class driver). + +10. Migrate the sensor drivers out of staging or re-using existing + drivers; + +11. Switch the driver to use pm_runtime stuff. Right now, it probes the + existing PMIC code and sensors call it directly. + +12. There's a problem on sensor drivers: when trying to set a video + format, the atomisp main driver calls the sensor drivers with the + sensor turned off. This causes them to fail. + + This was fixed at atomisp-ov2880, which has a hack inside it + to turn it on when VIDIOC_S_FMT is called, but this has to be + cheked on other drivers as well. + + The right fix seems to power on the sensor when a video device is + opened (or at the first VIDIOC_ ioctl - except for VIDIOC_QUERYCAP), + powering it down at close() syscall. + + Such kind of control would need to be done inside the atomisp driver, + not at the sensors code. + +13. There are several issues related to memory management, that can + cause crashes and/or memory leaks. The atomisp splits the memory + management on three separate regions: - dynamic pool; - reserved pool; - generic pool - The code implementing it is at: + The code implementing it is at: drivers/staging/media/atomisp/pci/hmm/ - It also has a separate code for managing DMA buffers at: + It also has a separate code for managing DMA buffers at: drivers/staging/media/atomisp/pci/mmu/ - The code there is really dirty, ugly and probably wrong. I fixed - one bug there already, but the best would be to just trash it and use - something else. Maybe the code from the newer intel driver could - serve as a model: + The code there is really dirty, ugly and probably wrong. I fixed + one bug there already, but the best would be to just trash it and use + something else. Maybe the code from the newer intel driver could + serve as a model: drivers/staging/media/ipu3/ipu3-mmu.c - But converting it to use something like that is painful and may - cause some breakages. - -6. There is some issues at the frame receive logic, causing the - DQBUF ioctls to fail. - -7. A single AtomISP driver needs to be implemented to support both - Baytrail (BYT) and Cherrytail (CHT) platforms at the same time. - The current driver is a mechanical and hand combined merge of the - two using several runtime macros, plus some ifdef ISP2401 to select the - CHT version. Yet, there are some ISP-specific headers that change the - driver's behavior during compile time. + But converting it to use something like that is painful and may + cause some breakages. -8. The file structure needs to get tidied up to resemble a normal Linux - driver. +14. The file structure needs to get tidied up to resemble a normal Linux + driver. -9. Lots of the midlayer glue. unused code and abstraction needs removing. +15. Lots of the midlayer glue. Unused code and abstraction needs removing. -10. The AtomISP driver includes some special IOCTLS (ATOMISP_IOC_XXXX_XXXX) +16. The AtomISP driver includes some special IOCTLS (ATOMISP_IOC_XXXX_XXXX) and controls that require some cleanup. Some of those code may have been removed during the cleanups. They could be needed in order to - properly support 3A algorithms + properly support 3A algorithms. Such IOCTL interface needs more documentation. The better would be to use something close to the interface used by the IPU3 IMGU driver. -11. The ISP code has some dependencies of the exact FW version. +17. The ISP code has some dependencies of the exact FW version. The version defined in pci/sh_css_firmware.c: BYT (isp2400): "irci_stable_candrpv_0415_20150521_0458" @@ -106,24 +175,16 @@ TODO there are any specific things that can be done to fold in support for multiple firmware versions. -12. Switch to standard V4L2 sub-device API for sensor and lens. In - particular, the user space API needs to support V4L2 controls as - defined in the V4L2 spec and references to atomisp must be removed from - these drivers. - -13. Use LED flash API for flash LED drivers such as LM3554 (which already - has a LED class driver). -14. Switch from videobuf1 to videobuf2. Videobuf1 is being removed! +18. Switch from videobuf1 to videobuf2. Videobuf1 is being removed! -15. Correct Coding Style. Please refrain sending coding style patches +19. Correct Coding Style. Please refrain sending coding style patches for this driver until the other work is done, as there will be a lot of code churn until this driver becomes functional again. -16. Fix private ioctls to not need a compat_ioctl handler for running - 32-bit tasks. The compat code has been removed because of bugs, - and should not be needed for modern drivers. Fixing this properly - unfortunately means an incompatible ABI change. +20. Remove the logic which sets up pipelines inside it, moving it to + libcamera and implement MC support. + Limitations =========== diff --git a/drivers/staging/media/atomisp/i2c/atomisp-gc0310.c b/drivers/staging/media/atomisp/i2c/atomisp-gc0310.c index 687888d643df..cbc8b1d91995 100644 --- a/drivers/staging/media/atomisp/i2c/atomisp-gc0310.c +++ b/drivers/staging/media/atomisp/i2c/atomisp-gc0310.c @@ -266,7 +266,7 @@ static int gc0310_g_bin_factor_x(struct v4l2_subdev *sd, s32 *val) { struct gc0310_device *dev = to_gc0310_sensor(sd); - *val = gc0310_res[dev->fmt_idx].bin_factor_x; + *val = dev->res->bin_factor_x; return 0; } @@ -275,7 +275,7 @@ static int gc0310_g_bin_factor_y(struct v4l2_subdev *sd, s32 *val) { struct gc0310_device *dev = to_gc0310_sensor(sd); - *val = gc0310_res[dev->fmt_idx].bin_factor_y; + *val = dev->res->bin_factor_y; return 0; } @@ -878,76 +878,6 @@ static int gc0310_s_power(struct v4l2_subdev *sd, int on) return gc0310_init(sd); } -/* - * distance - calculate the distance - * @res: resolution - * @w: width - * @h: height - * - * Get the gap between resolution and w/h. - * res->width/height smaller than w/h wouldn't be considered. - * Returns the value of gap or -1 if fail. - */ -#define LARGEST_ALLOWED_RATIO_MISMATCH 800 -static int distance(struct gc0310_resolution *res, u32 w, u32 h) -{ - unsigned int w_ratio = (res->width << 13) / w; - unsigned int h_ratio; - int match; - - if (h == 0) - return -1; - h_ratio = (res->height << 13) / h; - if (h_ratio == 0) - return -1; - match = abs(((w_ratio << 13) / h_ratio) - 8192); - - if ((w_ratio < 8192) || (h_ratio < 8192) || - (match > LARGEST_ALLOWED_RATIO_MISMATCH)) - return -1; - - return w_ratio + h_ratio; -} - -/* Return the nearest higher resolution index */ -static int nearest_resolution_index(int w, int h) -{ - int i; - int idx = -1; - int dist; - int min_dist = INT_MAX; - struct gc0310_resolution *tmp_res = NULL; - - for (i = 0; i < N_RES; i++) { - tmp_res = &gc0310_res[i]; - dist = distance(tmp_res, w, h); - if (dist == -1) - continue; - if (dist < min_dist) { - min_dist = dist; - idx = i; - } - } - - return idx; -} - -static int get_resolution_index(int w, int h) -{ - int i; - - for (i = 0; i < N_RES; i++) { - if (w != gc0310_res[i].width) - continue; - if (h != gc0310_res[i].height) - continue; - - return i; - } - - return -1; -} - /* TODO: remove it. */ static int startup(struct v4l2_subdev *sd) { @@ -955,7 +885,7 @@ static int startup(struct v4l2_subdev *sd) struct i2c_client *client = v4l2_get_subdevdata(sd); int ret = 0; - ret = gc0310_write_reg_array(client, gc0310_res[dev->fmt_idx].regs); + ret = gc0310_write_reg_array(client, dev->res->regs); if (ret) { dev_err(&client->dev, "gc0310 write register err.\n"); return ret; @@ -972,8 +902,8 @@ static int gc0310_set_fmt(struct v4l2_subdev *sd, struct gc0310_device *dev = to_gc0310_sensor(sd); struct i2c_client *client = v4l2_get_subdevdata(sd); struct camera_mipi_info *gc0310_info = NULL; + struct gc0310_resolution *res; int ret = 0; - int idx = 0; if (format->pad) return -EINVAL; @@ -987,15 +917,16 @@ static int gc0310_set_fmt(struct v4l2_subdev *sd, mutex_lock(&dev->input_lock); - idx = nearest_resolution_index(fmt->width, fmt->height); - if (idx == -1) { - /* return the largest resolution */ - fmt->width = gc0310_res[N_RES - 1].width; - fmt->height = gc0310_res[N_RES - 1].height; - } else { - fmt->width = gc0310_res[idx].width; - fmt->height = gc0310_res[idx].height; - } + res = v4l2_find_nearest_size(gc0310_res_preview, + ARRAY_SIZE(gc0310_res_preview), width, + height, fmt->width, fmt->height); + if (!res) + res = &gc0310_res_preview[N_RES - 1]; + + fmt->width = res->width; + fmt->height = res->height; + dev->res = res; + fmt->code = MEDIA_BUS_FMT_SGRBG8_1X8; if (format->which == V4L2_SUBDEV_FORMAT_TRY) { @@ -1004,23 +935,15 @@ static int gc0310_set_fmt(struct v4l2_subdev *sd, return 0; } - dev->fmt_idx = get_resolution_index(fmt->width, fmt->height); - if (dev->fmt_idx == -1) { - dev_err(&client->dev, "get resolution fail\n"); - mutex_unlock(&dev->input_lock); - return -EINVAL; - } - dev_dbg(&client->dev, "%s: before gc0310_write_reg_array %s\n", - __func__, gc0310_res[dev->fmt_idx].desc); + __func__, dev->res->desc); ret = startup(sd); if (ret) { dev_err(&client->dev, "gc0310 startup err\n"); goto err; } - ret = gc0310_get_intg_factor(client, gc0310_info, - &gc0310_res[dev->fmt_idx]); + ret = gc0310_get_intg_factor(client, gc0310_info, dev->res); if (ret) { dev_err(&client->dev, "failed to get integration_factor\n"); goto err; @@ -1044,8 +967,8 @@ static int gc0310_get_fmt(struct v4l2_subdev *sd, if (!fmt) return -EINVAL; - fmt->width = gc0310_res[dev->fmt_idx].width; - fmt->height = gc0310_res[dev->fmt_idx].height; + fmt->width = dev->res->width; + fmt->height = dev->res->height; fmt->code = MEDIA_BUS_FMT_SGRBG8_1X8; return 0; @@ -1199,7 +1122,7 @@ static int gc0310_g_frame_interval(struct v4l2_subdev *sd, struct gc0310_device *dev = to_gc0310_sensor(sd); interval->interval.numerator = 1; - interval->interval.denominator = gc0310_res[dev->fmt_idx].fps; + interval->interval.denominator = dev->res->fps; return 0; } @@ -1237,7 +1160,7 @@ static int gc0310_g_skip_frames(struct v4l2_subdev *sd, u32 *frames) struct gc0310_device *dev = to_gc0310_sensor(sd); mutex_lock(&dev->input_lock); - *frames = gc0310_res[dev->fmt_idx].skip_frames; + *frames = dev->res->skip_frames; mutex_unlock(&dev->input_lock); return 0; @@ -1301,7 +1224,7 @@ static int gc0310_probe(struct i2c_client *client) mutex_init(&dev->input_lock); - dev->fmt_idx = 0; + dev->res = &gc0310_res_preview[0]; v4l2_i2c_subdev_init(&dev->sd, client, &gc0310_ops); pdata = gmin_camera_platform_data(&dev->sd, diff --git a/drivers/staging/media/atomisp/i2c/atomisp-gc2235.c b/drivers/staging/media/atomisp/i2c/atomisp-gc2235.c index 4d769590f2d3..0e6b2e6100d1 100644 --- a/drivers/staging/media/atomisp/i2c/atomisp-gc2235.c +++ b/drivers/staging/media/atomisp/i2c/atomisp-gc2235.c @@ -570,14 +570,16 @@ static int power_ctrl(struct v4l2_subdev *sd, bool flag) static int gpio_ctrl(struct v4l2_subdev *sd, bool flag) { struct gc2235_device *dev = to_gc2235_sensor(sd); - int ret = -1; + int ret; if (!dev || !dev->platform_data) return -ENODEV; - ret |= dev->platform_data->gpio1_ctrl(sd, !flag); + ret = dev->platform_data->gpio1_ctrl(sd, !flag); usleep_range(60, 90); - return dev->platform_data->gpio0_ctrl(sd, flag); + ret |= dev->platform_data->gpio0_ctrl(sd, flag); + + return ret; } static int power_up(struct v4l2_subdev *sd) @@ -670,76 +672,6 @@ static int gc2235_s_power(struct v4l2_subdev *sd, int on) return ret; } -/* - * distance - calculate the distance - * @res: resolution - * @w: width - * @h: height - * - * Get the gap between resolution and w/h. - * res->width/height smaller than w/h wouldn't be considered. - * Returns the value of gap or -1 if fail. - */ -#define LARGEST_ALLOWED_RATIO_MISMATCH 800 -static int distance(struct gc2235_resolution *res, u32 w, u32 h) -{ - unsigned int w_ratio = (res->width << 13) / w; - unsigned int h_ratio; - int match; - - if (h == 0) - return -1; - h_ratio = (res->height << 13) / h; - if (h_ratio == 0) - return -1; - match = abs(((w_ratio << 13) / h_ratio) - 8192); - - if ((w_ratio < 8192) || (h_ratio < 8192) || - (match > LARGEST_ALLOWED_RATIO_MISMATCH)) - return -1; - - return w_ratio + h_ratio; -} - -/* Return the nearest higher resolution index */ -static int nearest_resolution_index(int w, int h) -{ - int i; - int idx = -1; - int dist; - int min_dist = INT_MAX; - struct gc2235_resolution *tmp_res = NULL; - - for (i = 0; i < N_RES; i++) { - tmp_res = &gc2235_res[i]; - dist = distance(tmp_res, w, h); - if (dist == -1) - continue; - if (dist < min_dist) { - min_dist = dist; - idx = i; - } - } - - return idx; -} - -static int get_resolution_index(int w, int h) -{ - int i; - - for (i = 0; i < N_RES; i++) { - if (w != gc2235_res[i].width) - continue; - if (h != gc2235_res[i].height) - continue; - - return i; - } - - return -1; -} - static int startup(struct v4l2_subdev *sd) { struct gc2235_device *dev = to_gc2235_sensor(sd); @@ -758,7 +690,7 @@ static int startup(struct v4l2_subdev *sd) gc2235_write_reg_array(client, gc2235_init_settings); } - ret = gc2235_write_reg_array(client, gc2235_res[dev->fmt_idx].regs); + ret = gc2235_write_reg_array(client, dev->res->regs); if (ret) { dev_err(&client->dev, "gc2235 write register err.\n"); return ret; @@ -776,8 +708,8 @@ static int gc2235_set_fmt(struct v4l2_subdev *sd, struct gc2235_device *dev = to_gc2235_sensor(sd); struct i2c_client *client = v4l2_get_subdevdata(sd); struct camera_mipi_info *gc2235_info = NULL; + struct gc2235_resolution *res; int ret = 0; - int idx; gc2235_info = v4l2_get_subdev_hostdata(sd); if (!gc2235_info) @@ -786,16 +718,18 @@ static int gc2235_set_fmt(struct v4l2_subdev *sd, return -EINVAL; if (!fmt) return -EINVAL; + mutex_lock(&dev->input_lock); - idx = nearest_resolution_index(fmt->width, fmt->height); - if (idx == -1) { - /* return the largest resolution */ - fmt->width = gc2235_res[N_RES - 1].width; - fmt->height = gc2235_res[N_RES - 1].height; - } else { - fmt->width = gc2235_res[idx].width; - fmt->height = gc2235_res[idx].height; - } + res = v4l2_find_nearest_size(gc2235_res_preview, + ARRAY_SIZE(gc2235_res_preview), width, + height, fmt->width, fmt->height); + if (!res) + res = &gc2235_res_preview[N_RES - 1]; + + fmt->width = res->width; + fmt->height = res->height; + dev->res = res; + fmt->code = MEDIA_BUS_FMT_SGRBG10_1X10; if (format->which == V4L2_SUBDEV_FORMAT_TRY) { sd_state->pads->try_fmt = *fmt; @@ -803,13 +737,6 @@ static int gc2235_set_fmt(struct v4l2_subdev *sd, return 0; } - dev->fmt_idx = get_resolution_index(fmt->width, fmt->height); - if (dev->fmt_idx == -1) { - dev_err(&client->dev, "get resolution fail\n"); - mutex_unlock(&dev->input_lock); - return -EINVAL; - } - ret = startup(sd); if (ret) { dev_err(&client->dev, "gc2235 startup err\n"); @@ -817,7 +744,7 @@ static int gc2235_set_fmt(struct v4l2_subdev *sd, } ret = gc2235_get_intg_factor(client, gc2235_info, - &gc2235_res[dev->fmt_idx]); + dev->res); if (ret) dev_err(&client->dev, "failed to get integration_factor\n"); @@ -839,8 +766,8 @@ static int gc2235_get_fmt(struct v4l2_subdev *sd, if (!fmt) return -EINVAL; - fmt->width = gc2235_res[dev->fmt_idx].width; - fmt->height = gc2235_res[dev->fmt_idx].height; + fmt->width = dev->res->width; + fmt->height = dev->res->height; fmt->code = MEDIA_BUS_FMT_SGRBG10_1X10; return 0; @@ -953,7 +880,7 @@ static int gc2235_g_frame_interval(struct v4l2_subdev *sd, struct gc2235_device *dev = to_gc2235_sensor(sd); interval->interval.numerator = 1; - interval->interval.denominator = gc2235_res[dev->fmt_idx].fps; + interval->interval.denominator = dev->res->fps; return 0; } @@ -991,7 +918,7 @@ static int gc2235_g_skip_frames(struct v4l2_subdev *sd, u32 *frames) struct gc2235_device *dev = to_gc2235_sensor(sd); mutex_lock(&dev->input_lock); - *frames = gc2235_res[dev->fmt_idx].skip_frames; + *frames = dev->res->skip_frames; mutex_unlock(&dev->input_lock); return 0; @@ -1055,7 +982,7 @@ static int gc2235_probe(struct i2c_client *client) mutex_init(&dev->input_lock); - dev->fmt_idx = 0; + dev->res = &gc2235_res_preview[0]; v4l2_i2c_subdev_init(&dev->sd, client, &gc2235_ops); gcpdev = gmin_camera_platform_data(&dev->sd, diff --git a/drivers/staging/media/atomisp/i2c/atomisp-mt9m114.c b/drivers/staging/media/atomisp/i2c/atomisp-mt9m114.c index 49f4090856d3..00d6842c07d6 100644 --- a/drivers/staging/media/atomisp/i2c/atomisp-mt9m114.c +++ b/drivers/staging/media/atomisp/i2c/atomisp-mt9m114.c @@ -579,107 +579,6 @@ static int mt9m114_s_power(struct v4l2_subdev *sd, int power) return mt9m114_init_common(sd); } -/* - * distance - calculate the distance - * @res: resolution - * @w: width - * @h: height - * - * Get the gap between resolution and w/h. - * res->width/height smaller than w/h wouldn't be considered. - * Returns the value of gap or -1 if fail. - */ -#define LARGEST_ALLOWED_RATIO_MISMATCH 600 -static int distance(struct mt9m114_res_struct const *res, u32 w, u32 h) -{ - unsigned int w_ratio; - unsigned int h_ratio; - int match; - - if (w == 0) - return -1; - w_ratio = (res->width << 13) / w; - if (h == 0) - return -1; - h_ratio = (res->height << 13) / h; - if (h_ratio == 0) - return -1; - match = abs(((w_ratio << 13) / h_ratio) - 8192); - - if ((w_ratio < 8192) || (h_ratio < 8192) || - (match > LARGEST_ALLOWED_RATIO_MISMATCH)) - return -1; - - return w_ratio + h_ratio; -} - -/* Return the nearest higher resolution index */ -static int nearest_resolution_index(int w, int h) -{ - int i; - int idx = -1; - int dist; - int min_dist = INT_MAX; - const struct mt9m114_res_struct *tmp_res = NULL; - - for (i = 0; i < ARRAY_SIZE(mt9m114_res); i++) { - tmp_res = &mt9m114_res[i]; - dist = distance(tmp_res, w, h); - if (dist == -1) - continue; - if (dist < min_dist) { - min_dist = dist; - idx = i; - } - } - - return idx; -} - -static int mt9m114_try_res(u32 *w, u32 *h) -{ - int idx = 0; - - if ((*w > MT9M114_RES_960P_SIZE_H) - || (*h > MT9M114_RES_960P_SIZE_V)) { - *w = MT9M114_RES_960P_SIZE_H; - *h = MT9M114_RES_960P_SIZE_V; - } else { - idx = nearest_resolution_index(*w, *h); - - /* - * nearest_resolution_index() doesn't return smaller - * resolutions. If it fails, it means the requested - * resolution is higher than wecan support. Fallback - * to highest possible resolution in this case. - */ - if (idx == -1) - idx = ARRAY_SIZE(mt9m114_res) - 1; - - *w = mt9m114_res[idx].width; - *h = mt9m114_res[idx].height; - } - - return 0; -} - -static struct mt9m114_res_struct *mt9m114_to_res(u32 w, u32 h) -{ - int index; - - for (index = 0; index < N_RES; index++) { - if ((mt9m114_res[index].width == w) && - (mt9m114_res[index].height == h)) - break; - } - - /* No mode found */ - if (index >= N_RES) - return NULL; - - return &mt9m114_res[index]; -} - static int mt9m114_res2size(struct v4l2_subdev *sd, int *h_size, int *v_size) { struct mt9m114_device *dev = to_mt9m114_sensor(sd); @@ -829,7 +728,7 @@ static int mt9m114_set_fmt(struct v4l2_subdev *sd, struct v4l2_mbus_framefmt *fmt = &format->format; struct i2c_client *c = v4l2_get_subdevdata(sd); struct mt9m114_device *dev = to_mt9m114_sensor(sd); - struct mt9m114_res_struct *res_index; + struct mt9m114_res_struct *res; u32 width = fmt->width; u32 height = fmt->height; struct camera_mipi_info *mt9m114_info = NULL; @@ -845,20 +744,21 @@ static int mt9m114_set_fmt(struct v4l2_subdev *sd, if (!mt9m114_info) return -EINVAL; - mt9m114_try_res(&width, &height); + res = v4l2_find_nearest_size(mt9m114_res, + ARRAY_SIZE(mt9m114_res), width, + height, fmt->width, fmt->height); + if (!res) + res = &mt9m114_res[N_RES - 1]; + + fmt->width = res->width; + fmt->height = res->height; + if (format->which == V4L2_SUBDEV_FORMAT_TRY) { sd_state->pads->try_fmt = *fmt; return 0; } - res_index = mt9m114_to_res(width, height); - - /* Sanity check */ - if (unlikely(!res_index)) { - WARN_ON(1); - return -EINVAL; - } - switch (res_index->res) { + switch (res->res) { case MT9M114_RES_736P: ret = mt9m114_write_reg_array(c, mt9m114_736P_init, NO_POLLING); ret += misensor_rmw_reg(c, MISENSOR_16BIT, MISENSOR_READ_MODE, @@ -876,7 +776,7 @@ static int mt9m114_set_fmt(struct v4l2_subdev *sd, MISENSOR_R_MODE_MASK, MISENSOR_NORMAL_SET); break; default: - v4l2_err(sd, "set resolution: %d failed!\n", res_index->res); + v4l2_err(sd, "set resolution: %d failed!\n", res->res); return -EINVAL; } @@ -890,7 +790,7 @@ static int mt9m114_set_fmt(struct v4l2_subdev *sd, if (mt9m114_set_suspend(sd)) return -EINVAL; - if (dev->res != res_index->res) { + if (dev->res != res->res) { int index; /* Switch to different size */ @@ -922,7 +822,7 @@ static int mt9m114_set_fmt(struct v4l2_subdev *sd, } } ret = mt9m114_get_intg_factor(c, mt9m114_info, - &mt9m114_res[res_index->res]); + &mt9m114_res[res->res]); if (ret) { dev_err(&c->dev, "failed to get integration_factor\n"); return -EINVAL; @@ -931,7 +831,7 @@ static int mt9m114_set_fmt(struct v4l2_subdev *sd, * mt9m114 - we don't poll for context switch * because it does not happen with streaming disabled. */ - dev->res = res_index->res; + dev->res = res->res; fmt->width = width; fmt->height = height; diff --git a/drivers/staging/media/atomisp/i2c/atomisp-ov2680.c b/drivers/staging/media/atomisp/i2c/atomisp-ov2680.c index 2111e4a478c1..4ba99c660681 100644 --- a/drivers/staging/media/atomisp/i2c/atomisp-ov2680.c +++ b/drivers/staging/media/atomisp/i2c/atomisp-ov2680.c @@ -48,7 +48,7 @@ static enum atomisp_bayer_order ov2680_bayer_order_mapping[] = { /* i2c read/write stuff */ static int ov2680_read_reg(struct i2c_client *client, - int len, u16 reg, u16 *val) + int len, u16 reg, u32 *val) { struct i2c_msg msgs[2]; u8 addr_buf[2] = { reg >> 8, reg & 0xff }; @@ -86,7 +86,7 @@ static int ov2680_write_reg(struct i2c_client *client, unsigned int len, int ret; if (len == 2) - put_unaligned_be16(val << (8 * (4 - len)), buf + 2); + put_unaligned_be16(val, buf + 2); else if (len == 1) buf[2] = val; else @@ -147,7 +147,7 @@ static int ov2680_g_bin_factor_x(struct v4l2_subdev *sd, s32 *val) struct i2c_client *client = v4l2_get_subdevdata(sd); dev_dbg(&client->dev, "++++ov2680_g_bin_factor_x\n"); - *val = ov2680_res[dev->fmt_idx].bin_factor_x; + *val = dev->res->bin_factor_x; return 0; } @@ -157,7 +157,7 @@ static int ov2680_g_bin_factor_y(struct v4l2_subdev *sd, s32 *val) struct ov2680_device *dev = to_ov2680_sensor(sd); struct i2c_client *client = v4l2_get_subdevdata(sd); - *val = ov2680_res[dev->fmt_idx].bin_factor_y; + *val = dev->res->bin_factor_y; dev_dbg(&client->dev, "++++ov2680_g_bin_factor_y\n"); return 0; } @@ -166,11 +166,9 @@ static int ov2680_get_intg_factor(struct i2c_client *client, struct camera_mipi_info *info, const struct ov2680_resolution *res) { - struct v4l2_subdev *sd = i2c_get_clientdata(client); - struct ov2680_device *dev = to_ov2680_sensor(sd); struct atomisp_sensor_mode_data *buf = &info->data; unsigned int pix_clk_freq_hz; - u16 reg_val; + u32 reg_val; int ret; dev_dbg(&client->dev, "++++ov2680_get_intg_factor\n"); @@ -180,7 +178,6 @@ static int ov2680_get_intg_factor(struct i2c_client *client, /* pixel clock */ pix_clk_freq_hz = res->pix_clk_freq * 1000000; - dev->vt_pix_clk_freq_mhz = pix_clk_freq_hz; buf->vt_pix_clk_freq_mhz = pix_clk_freq_hz; /* get integration time */ @@ -254,7 +251,7 @@ static long __ov2680_set_exposure(struct v4l2_subdev *sd, int coarse_itg, "+++++++__ov2680_set_exposure coarse_itg %d, gain %d, digitgain %d++\n", coarse_itg, gain, digitgain); - vts = ov2680_res[dev->fmt_idx].lines_per_frame; + vts = dev->res->lines_per_frame; /* group hold */ ret = ov2680_write_reg(client, 1, @@ -359,10 +356,17 @@ static int ov2680_set_exposure(struct v4l2_subdev *sd, int exposure, int gain, int digitgain) { struct ov2680_device *dev = to_ov2680_sensor(sd); - int ret; + int ret = 0; mutex_lock(&dev->input_lock); - ret = __ov2680_set_exposure(sd, exposure, gain, digitgain); + + dev->exposure = exposure; + dev->gain = gain; + dev->digitgain = digitgain; + + if (dev->power_on) + ret = __ov2680_set_exposure(sd, exposure, gain, digitgain); + mutex_unlock(&dev->input_lock); return ret; @@ -383,7 +387,6 @@ static long ov2680_s_exposure(struct v4l2_subdev *sd, return -EINVAL; } - // EXPOSURE CONTROL DISABLED FOR INITIAL CHECKIN, TUNING DOESN'T WORK return ov2680_set_exposure(sd, coarse_itg, analog_gain, digital_gain); } @@ -406,56 +409,25 @@ static long ov2680_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg) static int ov2680_q_exposure(struct v4l2_subdev *sd, s32 *value) { struct i2c_client *client = v4l2_get_subdevdata(sd); - u16 reg_v, reg_v2; + u32 reg_val; int ret; /* get exposure */ - ret = ov2680_read_reg(client, 1, - OV2680_EXPOSURE_L, - ®_v); + ret = ov2680_read_reg(client, 3, OV2680_EXPOSURE_H, ®_val); if (ret) - goto err; - - ret = ov2680_read_reg(client, 1, - OV2680_EXPOSURE_M, - ®_v2); - if (ret) - goto err; - - reg_v += reg_v2 << 8; - ret = ov2680_read_reg(client, 1, - OV2680_EXPOSURE_H, - ®_v2); - if (ret) - goto err; - - *value = reg_v + (((u32)reg_v2 << 16)); -err: - return ret; -} + return ret; -static u32 ov2680_translate_bayer_order(enum atomisp_bayer_order code) -{ - switch (code) { - case atomisp_bayer_order_rggb: - return MEDIA_BUS_FMT_SRGGB10_1X10; - case atomisp_bayer_order_grbg: - return MEDIA_BUS_FMT_SGRBG10_1X10; - case atomisp_bayer_order_bggr: - return MEDIA_BUS_FMT_SBGGR10_1X10; - case atomisp_bayer_order_gbrg: - return MEDIA_BUS_FMT_SGBRG10_1X10; - } + /* Lower four bits are not part of the exposure val (always 0) */ + *value = reg_val >> 4; return 0; } static int ov2680_v_flip(struct v4l2_subdev *sd, s32 value) { - struct ov2680_device *dev = to_ov2680_sensor(sd); struct camera_mipi_info *ov2680_info = NULL; struct i2c_client *client = v4l2_get_subdevdata(sd); int ret; - u16 val; + u32 val; u8 index; dev_dbg(&client->dev, "@%s: value:%d\n", __func__, value); @@ -476,19 +448,16 @@ static int ov2680_v_flip(struct v4l2_subdev *sd, s32 value) ov2680_info = v4l2_get_subdev_hostdata(sd); if (ov2680_info) { ov2680_info->raw_bayer_order = ov2680_bayer_order_mapping[index]; - dev->format.code = ov2680_translate_bayer_order( - ov2680_info->raw_bayer_order); } return ret; } static int ov2680_h_flip(struct v4l2_subdev *sd, s32 value) { - struct ov2680_device *dev = to_ov2680_sensor(sd); struct camera_mipi_info *ov2680_info = NULL; struct i2c_client *client = v4l2_get_subdevdata(sd); int ret; - u16 val; + u32 val; u8 index; dev_dbg(&client->dev, "@%s: value:%d\n", __func__, value); @@ -510,8 +479,6 @@ static int ov2680_h_flip(struct v4l2_subdev *sd, s32 value) ov2680_info = v4l2_get_subdev_hostdata(sd); if (ov2680_info) { ov2680_info->raw_bayer_order = ov2680_bayer_order_mapping[index]; - dev->format.code = ov2680_translate_bayer_order( - ov2680_info->raw_bayer_order); } return ret; } @@ -677,25 +644,6 @@ static int ov2680_init_registers(struct v4l2_subdev *sd) return ret; } -static int ov2680_init(struct v4l2_subdev *sd) -{ - struct ov2680_device *dev = to_ov2680_sensor(sd); - - int ret; - - mutex_lock(&dev->input_lock); - - /* restore settings */ - ov2680_res = ov2680_res_preview; - N_RES = N_RES_PREVIEW; - - ret = ov2680_init_registers(sd); - - mutex_unlock(&dev->input_lock); - - return ret; -} - static int power_ctrl(struct v4l2_subdev *sd, bool flag) { int ret = 0; @@ -760,6 +708,9 @@ static int power_up(struct v4l2_subdev *sd) return -ENODEV; } + if (dev->power_on) + return 0; /* Already on */ + /* power control */ ret = power_ctrl(sd, 1); if (ret) @@ -784,8 +735,19 @@ static int power_up(struct v4l2_subdev *sd) /* according to DS, 20ms is needed between PWDN and i2c access */ msleep(20); + ret = ov2680_init_registers(sd); + if (ret) + goto fail_init_registers; + + ret = __ov2680_set_exposure(sd, dev->exposure, dev->gain, dev->digitgain); + if (ret) + goto fail_init_registers; + + dev->power_on = true; return 0; +fail_init_registers: + dev->platform_data->flisclk_ctrl(sd, 0); fail_clk: gpio_ctrl(sd, 0); fail_power: @@ -809,6 +771,9 @@ static int power_down(struct v4l2_subdev *sd) return -ENODEV; } + if (!dev->power_on) + return 0; /* Already off */ + ret = dev->platform_data->flisclk_ctrl(sd, 0); if (ret) dev_err(&client->dev, "flisclk failed\n"); @@ -823,94 +788,31 @@ static int power_down(struct v4l2_subdev *sd) /* power control */ ret = power_ctrl(sd, 0); - if (ret) + if (ret) { dev_err(&client->dev, "vprog failed.\n"); + return ret; + } - return ret; + dev->power_on = false; + return 0; } static int ov2680_s_power(struct v4l2_subdev *sd, int on) { + struct ov2680_device *dev = to_ov2680_sensor(sd); int ret; + mutex_lock(&dev->input_lock); + if (on == 0) { ret = power_down(sd); } else { ret = power_up(sd); - if (!ret) - return ov2680_init(sd); } - return ret; -} - -/* - * distance - calculate the distance - * @res: resolution - * @w: width - * @h: height - * - * Get the gap between resolution and w/h. - * res->width/height smaller than w/h wouldn't be considered. - * Returns the value of gap or -1 if fail. - */ -#define LARGEST_ALLOWED_RATIO_MISMATCH 600 -static int distance(struct ov2680_resolution *res, u32 w, u32 h) -{ - unsigned int w_ratio = (res->width << 13) / w; - unsigned int h_ratio; - int match; - - if (h == 0) - return -1; - h_ratio = (res->height << 13) / h; - if (h_ratio == 0) - return -1; - match = abs(((w_ratio << 13) / h_ratio) - 8192); - - if ((w_ratio < 8192) || (h_ratio < 8192) || - (match > LARGEST_ALLOWED_RATIO_MISMATCH)) - return -1; - - return w_ratio + h_ratio; -} -/* Return the nearest higher resolution index */ -static int nearest_resolution_index(int w, int h) -{ - int i; - int idx = -1; - int dist; - int min_dist = INT_MAX; - struct ov2680_resolution *tmp_res = NULL; - - for (i = 0; i < N_RES; i++) { - tmp_res = &ov2680_res[i]; - dist = distance(tmp_res, w, h); - if (dist == -1) - continue; - if (dist < min_dist) { - min_dist = dist; - idx = i; - } - } - - return idx; -} - -static int get_resolution_index(int w, int h) -{ - int i; - - for (i = 0; i < N_RES; i++) { - if (w != ov2680_res[i].width) - continue; - if (h != ov2680_res[i].height) - continue; - - return i; - } + mutex_unlock(&dev->input_lock); - return -1; + return ret; } static int ov2680_set_fmt(struct v4l2_subdev *sd, @@ -921,8 +823,8 @@ static int ov2680_set_fmt(struct v4l2_subdev *sd, struct ov2680_device *dev = to_ov2680_sensor(sd); struct i2c_client *client = v4l2_get_subdevdata(sd); struct camera_mipi_info *ov2680_info = NULL; - int ret = 0; - int idx = 0; + struct ov2680_resolution *res; + int vts, ret = 0; dev_dbg(&client->dev, "%s: %s: pad: %d, fmt: %p\n", __func__, @@ -940,41 +842,44 @@ static int ov2680_set_fmt(struct v4l2_subdev *sd, return -EINVAL; mutex_lock(&dev->input_lock); - idx = nearest_resolution_index(fmt->width, fmt->height); - if (idx == -1) { - /* return the largest resolution */ - fmt->width = ov2680_res[N_RES - 1].width; - fmt->height = ov2680_res[N_RES - 1].height; - } else { - fmt->width = ov2680_res[idx].width; - fmt->height = ov2680_res[idx].height; - } + + res = v4l2_find_nearest_size(ov2680_res_preview, + ARRAY_SIZE(ov2680_res_preview), width, + height, fmt->width, fmt->height); + if (!res) + res = &ov2680_res_preview[N_RES_PREVIEW - 1]; + + fmt->width = res->width; + fmt->height = res->height; + fmt->code = MEDIA_BUS_FMT_SBGGR10_1X10; if (format->which == V4L2_SUBDEV_FORMAT_TRY) { sd_state->pads->try_fmt = *fmt; mutex_unlock(&dev->input_lock); return 0; } - dev->fmt_idx = get_resolution_index(fmt->width, fmt->height); - dev_dbg(&client->dev, "%s: Resolution index: %d\n", - __func__, dev->fmt_idx); - if (dev->fmt_idx == -1) { - dev_err(&client->dev, "get resolution fail\n"); - mutex_unlock(&dev->input_lock); - return -EINVAL; - } - dev_dbg(&client->dev, "%s: i=%d, w=%d, h=%d\n", - __func__, dev->fmt_idx, fmt->width, fmt->height); - // IS IT NEEDED? + dev_dbg(&client->dev, "%s: %dx%d\n", + __func__, fmt->width, fmt->height); + + /* s_power has not been called yet for std v4l2 clients (camorama) */ power_up(sd); - ret = ov2680_write_reg_array(client, ov2680_res[dev->fmt_idx].regs); + ret = ov2680_write_reg_array(client, dev->res->regs); if (ret) dev_err(&client->dev, "ov2680 write resolution register err: %d\n", ret); - ret = ov2680_get_intg_factor(client, ov2680_info, - &ov2680_res[dev->fmt_idx]); + vts = dev->res->lines_per_frame; + + /* If necessary increase the VTS to match exposure + MARGIN */ + if (dev->exposure > vts - OV2680_INTEGRATION_TIME_MARGIN) + vts = dev->exposure + OV2680_INTEGRATION_TIME_MARGIN; + + ret = ov2680_write_reg(client, 2, OV2680_TIMING_VTS_H, vts); + if (ret) + dev_err(&client->dev, "ov2680 write vts err: %d\n", ret); + + ret = ov2680_get_intg_factor(client, ov2680_info, res); if (ret) { dev_err(&client->dev, "failed to get integration factor\n"); goto err; @@ -989,8 +894,6 @@ static int ov2680_set_fmt(struct v4l2_subdev *sd, if (v_flag) ov2680_v_flip(sd, v_flag); - v4l2_info(client, "\n%s idx %d\n", __func__, dev->fmt_idx); - /* * ret = startup(sd); * if (ret) @@ -1014,8 +917,8 @@ static int ov2680_get_fmt(struct v4l2_subdev *sd, if (!fmt) return -EINVAL; - fmt->width = ov2680_res[dev->fmt_idx].width; - fmt->height = ov2680_res[dev->fmt_idx].height; + fmt->width = dev->res->width; + fmt->height = dev->res->height; fmt->code = MEDIA_BUS_FMT_SBGGR10_1X10; return 0; @@ -1024,7 +927,7 @@ static int ov2680_get_fmt(struct v4l2_subdev *sd, static int ov2680_detect(struct i2c_client *client) { struct i2c_adapter *adapter = client->adapter; - u16 high, low; + u32 high, low; int ret; u16 id; u8 revision; @@ -1072,11 +975,6 @@ static int ov2680_s_stream(struct v4l2_subdev *sd, int enable) ret = ov2680_write_reg(client, 1, OV2680_SW_STREAM, enable ? OV2680_START_STREAMING : OV2680_STOP_STREAMING); -#if 0 - /* restore settings */ - ov2680_res = ov2680_res_preview; - N_RES = N_RES_PREVIEW; -#endif //otp valid at stream on state //if(!dev->otp_data) @@ -1101,16 +999,6 @@ static int ov2680_s_config(struct v4l2_subdev *sd, (struct camera_sensor_platform_data *)platform_data; mutex_lock(&dev->input_lock); - /* - * power off the module, then power on it in future - * as first power on by board may not fulfill the - * power on sequqence needed by the module - */ - ret = power_down(sd); - if (ret) { - dev_err(&client->dev, "ov2680 power-off err.\n"); - goto fail_power_off; - } ret = power_up(sd); if (ret) { @@ -1144,7 +1032,6 @@ fail_csi_cfg: fail_power_on: power_down(sd); dev_err(&client->dev, "sensor power-gating failed\n"); -fail_power_off: mutex_unlock(&dev->input_lock); return ret; } @@ -1155,7 +1042,7 @@ static int ov2680_g_frame_interval(struct v4l2_subdev *sd, struct ov2680_device *dev = to_ov2680_sensor(sd); interval->interval.numerator = 1; - interval->interval.denominator = ov2680_res[dev->fmt_idx].fps; + interval->interval.denominator = dev->res->fps; return 0; } @@ -1177,13 +1064,33 @@ static int ov2680_enum_frame_size(struct v4l2_subdev *sd, { int index = fse->index; - if (index >= N_RES) + if (index >= N_RES_PREVIEW) return -EINVAL; - fse->min_width = ov2680_res[index].width; - fse->min_height = ov2680_res[index].height; - fse->max_width = ov2680_res[index].width; - fse->max_height = ov2680_res[index].height; + fse->min_width = ov2680_res_preview[index].width; + fse->min_height = ov2680_res_preview[index].height; + fse->max_width = ov2680_res_preview[index].width; + fse->max_height = ov2680_res_preview[index].height; + + return 0; +} + +static int ov2680_enum_frame_interval(struct v4l2_subdev *sd, + struct v4l2_subdev_state *sd_state, + struct v4l2_subdev_frame_interval_enum *fie) +{ + struct v4l2_fract fract; + + if (fie->index >= N_RES_PREVIEW || + fie->width > ov2680_res_preview[0].width || + fie->height > ov2680_res_preview[0].height || + fie->which > V4L2_SUBDEV_FORMAT_ACTIVE) + return -EINVAL; + + fract.denominator = ov2680_res_preview[fie->index].fps; + fract.numerator = 1; + + fie->interval = fract; return 0; } @@ -1193,7 +1100,7 @@ static int ov2680_g_skip_frames(struct v4l2_subdev *sd, u32 *frames) struct ov2680_device *dev = to_ov2680_sensor(sd); mutex_lock(&dev->input_lock); - *frames = ov2680_res[dev->fmt_idx].skip_frames; + *frames = dev->res->skip_frames; mutex_unlock(&dev->input_lock); return 0; @@ -1216,6 +1123,7 @@ static const struct v4l2_subdev_core_ops ov2680_core_ops = { static const struct v4l2_subdev_pad_ops ov2680_pad_ops = { .enum_mbus_code = ov2680_enum_mbus_code, .enum_frame_size = ov2680_enum_frame_size, + .enum_frame_interval = ov2680_enum_frame_interval, .get_fmt = ov2680_get_fmt, .set_fmt = ov2680_set_fmt, }; @@ -1257,7 +1165,9 @@ static int ov2680_probe(struct i2c_client *client) mutex_init(&dev->input_lock); - dev->fmt_idx = 0; + dev->res = &ov2680_res_preview[0]; + dev->exposure = dev->res->lines_per_frame - OV2680_INTEGRATION_TIME_MARGIN; + dev->gain = 250; /* 0-2047 */ v4l2_i2c_subdev_init(&dev->sd, client, &ov2680_ops); pdata = gmin_camera_platform_data(&dev->sd, @@ -1278,7 +1188,6 @@ static int ov2680_probe(struct i2c_client *client) dev->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; dev->pad.flags = MEDIA_PAD_FL_SOURCE; - dev->format.code = MEDIA_BUS_FMT_SBGGR10_1X10; dev->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR; ret = v4l2_ctrl_handler_init(&dev->ctrl_handler, diff --git a/drivers/staging/media/atomisp/i2c/atomisp-ov2722.c b/drivers/staging/media/atomisp/i2c/atomisp-ov2722.c index 90d0871a78a3..da98094d7094 100644 --- a/drivers/staging/media/atomisp/i2c/atomisp-ov2722.c +++ b/drivers/staging/media/atomisp/i2c/atomisp-ov2722.c @@ -557,7 +557,7 @@ static int ov2722_g_volatile_ctrl(struct v4l2_ctrl *ctrl) ret = ov2722_g_fnumber_range(&dev->sd, &ctrl->val); break; case V4L2_CID_LINK_FREQ: - val = ov2722_res[dev->fmt_idx].mipi_freq; + val = dev->res->mipi_freq; if (val == 0) return -EINVAL; @@ -782,76 +782,6 @@ static int ov2722_s_power(struct v4l2_subdev *sd, int on) return ret; } -/* - * distance - calculate the distance - * @res: resolution - * @w: width - * @h: height - * - * Get the gap between resolution and w/h. - * res->width/height smaller than w/h wouldn't be considered. - * Returns the value of gap or -1 if fail. - */ -#define LARGEST_ALLOWED_RATIO_MISMATCH 800 -static int distance(struct ov2722_resolution *res, u32 w, u32 h) -{ - unsigned int w_ratio = (res->width << 13) / w; - unsigned int h_ratio; - int match; - - if (h == 0) - return -1; - h_ratio = (res->height << 13) / h; - if (h_ratio == 0) - return -1; - match = abs(((w_ratio << 13) / h_ratio) - 8192); - - if ((w_ratio < 8192) || (h_ratio < 8192) || - (match > LARGEST_ALLOWED_RATIO_MISMATCH)) - return -1; - - return w_ratio + h_ratio; -} - -/* Return the nearest higher resolution index */ -static int nearest_resolution_index(int w, int h) -{ - int i; - int idx = -1; - int dist; - int min_dist = INT_MAX; - struct ov2722_resolution *tmp_res = NULL; - - for (i = 0; i < N_RES; i++) { - tmp_res = &ov2722_res[i]; - dist = distance(tmp_res, w, h); - if (dist == -1) - continue; - if (dist < min_dist) { - min_dist = dist; - idx = i; - } - } - - return idx; -} - -static int get_resolution_index(int w, int h) -{ - int i; - - for (i = 0; i < N_RES; i++) { - if (w != ov2722_res[i].width) - continue; - if (h != ov2722_res[i].height) - continue; - - return i; - } - - return -1; -} - /* TODO: remove it. */ static int startup(struct v4l2_subdev *sd) { @@ -866,7 +796,7 @@ static int startup(struct v4l2_subdev *sd) return ret; } - ret = ov2722_write_reg_array(client, ov2722_res[dev->fmt_idx].regs); + ret = ov2722_write_reg_array(client, dev->res->regs); if (ret) { dev_err(&client->dev, "ov2722 write register err.\n"); return ret; @@ -882,9 +812,9 @@ static int ov2722_set_fmt(struct v4l2_subdev *sd, struct v4l2_mbus_framefmt *fmt = &format->format; struct ov2722_device *dev = to_ov2722_sensor(sd); struct i2c_client *client = v4l2_get_subdevdata(sd); + struct ov2722_resolution *res; struct camera_mipi_info *ov2722_info = NULL; int ret = 0; - int idx; if (format->pad) return -EINVAL; @@ -895,15 +825,16 @@ static int ov2722_set_fmt(struct v4l2_subdev *sd, return -EINVAL; mutex_lock(&dev->input_lock); - idx = nearest_resolution_index(fmt->width, fmt->height); - if (idx == -1) { - /* return the largest resolution */ - fmt->width = ov2722_res[N_RES - 1].width; - fmt->height = ov2722_res[N_RES - 1].height; - } else { - fmt->width = ov2722_res[idx].width; - fmt->height = ov2722_res[idx].height; - } + res = v4l2_find_nearest_size(ov2722_res_preview, + ARRAY_SIZE(ov2722_res_preview), width, + height, fmt->width, fmt->height); + if (!res) + res = &ov2722_res_preview[N_RES - 1]; + + fmt->width = res->width; + fmt->height = res->height; + dev->res = res; + fmt->code = MEDIA_BUS_FMT_SGRBG10_1X10; if (format->which == V4L2_SUBDEV_FORMAT_TRY) { sd_state->pads->try_fmt = *fmt; @@ -911,15 +842,9 @@ static int ov2722_set_fmt(struct v4l2_subdev *sd, return 0; } - dev->fmt_idx = get_resolution_index(fmt->width, fmt->height); - if (dev->fmt_idx == -1) { - dev_err(&client->dev, "get resolution fail\n"); - mutex_unlock(&dev->input_lock); - return -EINVAL; - } - dev->pixels_per_line = ov2722_res[dev->fmt_idx].pixels_per_line; - dev->lines_per_frame = ov2722_res[dev->fmt_idx].lines_per_frame; + dev->pixels_per_line = dev->res->pixels_per_line; + dev->lines_per_frame = dev->res->lines_per_frame; ret = startup(sd); if (ret) { @@ -950,8 +875,7 @@ static int ov2722_set_fmt(struct v4l2_subdev *sd, } } - ret = ov2722_get_intg_factor(client, ov2722_info, - &ov2722_res[dev->fmt_idx]); + ret = ov2722_get_intg_factor(client, ov2722_info, dev->res); if (ret) dev_err(&client->dev, "failed to get integration_factor\n"); @@ -972,8 +896,8 @@ static int ov2722_get_fmt(struct v4l2_subdev *sd, if (!fmt) return -EINVAL; - fmt->width = ov2722_res[dev->fmt_idx].width; - fmt->height = ov2722_res[dev->fmt_idx].height; + fmt->width = dev->res->width; + fmt->height = dev->res->height; fmt->code = MEDIA_BUS_FMT_SBGGR10_1X10; return 0; @@ -1098,7 +1022,7 @@ static int ov2722_g_frame_interval(struct v4l2_subdev *sd, struct ov2722_device *dev = to_ov2722_sensor(sd); interval->interval.numerator = 1; - interval->interval.denominator = ov2722_res[dev->fmt_idx].fps; + interval->interval.denominator = dev->res->fps; return 0; } @@ -1136,7 +1060,7 @@ static int ov2722_g_skip_frames(struct v4l2_subdev *sd, u32 *frames) struct ov2722_device *dev = to_ov2722_sensor(sd); mutex_lock(&dev->input_lock); - *frames = ov2722_res[dev->fmt_idx].skip_frames; + *frames = dev->res->skip_frames; mutex_unlock(&dev->input_lock); return 0; @@ -1220,7 +1144,7 @@ static int ov2722_probe(struct i2c_client *client) mutex_init(&dev->input_lock); - dev->fmt_idx = 0; + dev->res = &ov2722_res_preview[0]; v4l2_i2c_subdev_init(&dev->sd, client, &ov2722_ops); ovpdev = gmin_camera_platform_data(&dev->sd, diff --git a/drivers/staging/media/atomisp/i2c/gc0310.h b/drivers/staging/media/atomisp/i2c/gc0310.h index 2fe3de115083..db643ebc3909 100644 --- a/drivers/staging/media/atomisp/i2c/gc0310.h +++ b/drivers/staging/media/atomisp/i2c/gc0310.h @@ -150,8 +150,7 @@ struct gc0310_device { struct camera_sensor_platform_data *platform_data; int vt_pix_clk_freq_mhz; - int fmt_idx; - u8 res; + struct gc0310_resolution *res; u8 type; }; diff --git a/drivers/staging/media/atomisp/i2c/gc2235.h b/drivers/staging/media/atomisp/i2c/gc2235.h index ba5db1230033..806be5dff7a5 100644 --- a/drivers/staging/media/atomisp/i2c/gc2235.h +++ b/drivers/staging/media/atomisp/i2c/gc2235.h @@ -158,11 +158,10 @@ struct gc2235_device { struct v4l2_mbus_framefmt format; struct mutex input_lock; struct v4l2_ctrl_handler ctrl_handler; + struct gc2235_resolution *res; struct camera_sensor_platform_data *platform_data; int vt_pix_clk_freq_mhz; - int fmt_idx; - u8 res; u8 type; }; diff --git a/drivers/staging/media/atomisp/i2c/ov2680.h b/drivers/staging/media/atomisp/i2c/ov2680.h index 874115f35fca..4e351196fe34 100644 --- a/drivers/staging/media/atomisp/i2c/ov2680.h +++ b/drivers/staging/media/atomisp/i2c/ov2680.h @@ -141,7 +141,6 @@ struct regval_list { }; struct ov2680_resolution { - u8 *desc; const struct ov2680_reg *regs; int res; int width; @@ -154,7 +153,6 @@ struct ov2680_resolution { u8 bin_factor_x; u8 bin_factor_y; u8 bin_mode; - bool used; }; struct ov2680_format { @@ -169,15 +167,14 @@ struct ov2680_format { struct ov2680_device { struct v4l2_subdev sd; struct media_pad pad; - struct v4l2_mbus_framefmt format; struct mutex input_lock; struct v4l2_ctrl_handler ctrl_handler; + struct ov2680_resolution *res; struct camera_sensor_platform_data *platform_data; - int vt_pix_clk_freq_mhz; - int fmt_idx; - int run_mode; - u8 res; - u8 type; + bool power_on; + u16 exposure; + u16 gain; + u16 digitgain; }; /** @@ -283,14 +280,11 @@ static struct ov2680_reg const ov2680_global_setting[] = { {} }; -#if 0 /* None of the definitions below are used currently */ /* * 176x144 30fps VBlanking 1lane 10Bit (binning) */ static struct ov2680_reg const ov2680_QCIF_30fps[] = { {0x3086, 0x01}, - {0x3501, 0x24}, - {0x3502, 0x40}, {0x370a, 0x23}, {0x3801, 0xa0}, {0x3802, 0x00}, @@ -305,8 +299,6 @@ static struct ov2680_reg const ov2680_QCIF_30fps[] = { {0x380b, 0xa0}, {0x380c, 0x06}, {0x380d, 0xb0}, - {0x380e, 0x02}, - {0x380f, 0x84}, {0x3810, 0x00}, {0x3811, 0x04}, {0x3812, 0x00}, @@ -334,8 +326,6 @@ static struct ov2680_reg const ov2680_QCIF_30fps[] = { */ static struct ov2680_reg const ov2680_CIF_30fps[] = { {0x3086, 0x01}, - {0x3501, 0x24}, - {0x3502, 0x40}, {0x370a, 0x23}, {0x3801, 0xa0}, {0x3802, 0x00}, @@ -350,8 +340,6 @@ static struct ov2680_reg const ov2680_CIF_30fps[] = { {0x380b, 0x30}, {0x380c, 0x06}, {0x380d, 0xb0}, - {0x380e, 0x02}, - {0x380f, 0x84}, {0x3810, 0x00}, {0x3811, 0x04}, {0x3812, 0x00}, @@ -377,8 +365,6 @@ static struct ov2680_reg const ov2680_CIF_30fps[] = { */ static struct ov2680_reg const ov2680_QVGA_30fps[] = { {0x3086, 0x01}, - {0x3501, 0x24}, - {0x3502, 0x40}, {0x370a, 0x23}, {0x3801, 0xa0}, {0x3802, 0x00}, @@ -393,8 +379,6 @@ static struct ov2680_reg const ov2680_QVGA_30fps[] = { {0x380b, 0x00}, {0x380c, 0x06}, {0x380d, 0xb0}, - {0x380e, 0x02}, - {0x380f, 0x84}, {0x3810, 0x00}, {0x3811, 0x04}, {0x3812, 0x00}, @@ -420,8 +404,6 @@ static struct ov2680_reg const ov2680_QVGA_30fps[] = { */ static struct ov2680_reg const ov2680_656x496_30fps[] = { {0x3086, 0x01}, - {0x3501, 0x24}, - {0x3502, 0x40}, {0x370a, 0x23}, {0x3801, 0xa0}, {0x3802, 0x00}, @@ -436,8 +418,6 @@ static struct ov2680_reg const ov2680_656x496_30fps[] = { {0x380b, 0xf0}, {0x380c, 0x06}, {0x380d, 0xb0}, - {0x380e, 0x02}, - {0x380f, 0x84}, {0x3810, 0x00}, {0x3811, 0x04}, {0x3812, 0x00}, @@ -459,12 +439,10 @@ static struct ov2680_reg const ov2680_656x496_30fps[] = { }; /* - * 800x600 30fps VBlanking 1lane 10Bit (binning) + * 720x592 30fps VBlanking 1lane 10Bit (binning) */ static struct ov2680_reg const ov2680_720x592_30fps[] = { {0x3086, 0x01}, - {0x3501, 0x26}, - {0x3502, 0x40}, {0x370a, 0x23}, {0x3801, 0x00}, // X_ADDR_START; {0x3802, 0x00}, @@ -479,8 +457,6 @@ static struct ov2680_reg const ov2680_720x592_30fps[] = { {0x380b, 0x50}, // Y_OUTPUT_SIZE; {0x380c, 0x06}, {0x380d, 0xac}, // HTS; - {0x380e, 0x02}, - {0x380f, 0x84}, // VTS; {0x3810, 0x00}, {0x3811, 0x00}, {0x3812, 0x00}, @@ -508,8 +484,6 @@ static struct ov2680_reg const ov2680_720x592_30fps[] = { */ static struct ov2680_reg const ov2680_800x600_30fps[] = { {0x3086, 0x01}, - {0x3501, 0x26}, - {0x3502, 0x40}, {0x370a, 0x23}, {0x3801, 0x00}, {0x3802, 0x00}, @@ -524,8 +498,6 @@ static struct ov2680_reg const ov2680_800x600_30fps[] = { {0x380b, 0x58}, {0x380c, 0x06}, {0x380d, 0xac}, - {0x380e, 0x02}, - {0x380f, 0x84}, {0x3810, 0x00}, {0x3811, 0x00}, {0x3812, 0x00}, @@ -551,8 +523,6 @@ static struct ov2680_reg const ov2680_800x600_30fps[] = { */ static struct ov2680_reg const ov2680_720p_30fps[] = { {0x3086, 0x00}, - {0x3501, 0x48}, - {0x3502, 0xe0}, {0x370a, 0x21}, {0x3801, 0xa0}, {0x3802, 0x00}, @@ -567,8 +537,6 @@ static struct ov2680_reg const ov2680_720p_30fps[] = { {0x380b, 0xe0}, {0x380c, 0x06}, {0x380d, 0xa8}, - {0x380e, 0x05}, - {0x380f, 0x0e}, {0x3810, 0x00}, {0x3811, 0x08}, {0x3812, 0x00}, @@ -594,8 +562,6 @@ static struct ov2680_reg const ov2680_720p_30fps[] = { */ static struct ov2680_reg const ov2680_1296x976_30fps[] = { {0x3086, 0x00}, - {0x3501, 0x48}, - {0x3502, 0xe0}, {0x370a, 0x21}, {0x3801, 0xa0}, {0x3802, 0x00}, @@ -610,8 +576,6 @@ static struct ov2680_reg const ov2680_1296x976_30fps[] = { {0x380b, 0xd0}, {0x380c, 0x06}, {0x380d, 0xa8}, - {0x380e, 0x05}, - {0x380f, 0x0e}, {0x3810, 0x00}, {0x3811, 0x08}, {0x3812, 0x00}, @@ -637,8 +601,6 @@ static struct ov2680_reg const ov2680_1296x976_30fps[] = { */ static struct ov2680_reg const ov2680_1456x1096_30fps[] = { {0x3086, 0x00}, - {0x3501, 0x48}, - {0x3502, 0xe0}, {0x370a, 0x21}, {0x3801, 0x90}, {0x3802, 0x00}, @@ -653,8 +615,6 @@ static struct ov2680_reg const ov2680_1456x1096_30fps[] = { {0x380b, 0x48}, {0x380c, 0x06}, {0x380d, 0xa8}, - {0x380e, 0x05}, - {0x380f, 0x0e}, {0x3810, 0x00}, {0x3811, 0x08}, {0x3812, 0x00}, @@ -674,7 +634,6 @@ static struct ov2680_reg const ov2680_1456x1096_30fps[] = { // {0x5090, 0x0c}, {} }; -#endif /* *1616x916 30fps VBlanking 1lane 10bit @@ -682,8 +641,6 @@ static struct ov2680_reg const ov2680_1456x1096_30fps[] = { static struct ov2680_reg const ov2680_1616x916_30fps[] = { {0x3086, 0x00}, - {0x3501, 0x48}, - {0x3502, 0xe0}, {0x370a, 0x21}, {0x3801, 0x00}, {0x3802, 0x00}, @@ -698,8 +655,6 @@ static struct ov2680_reg const ov2680_1616x916_30fps[] = { {0x380b, 0x94}, {0x380c, 0x06}, {0x380d, 0xa8}, - {0x380e, 0x05}, - {0x380f, 0x0e}, {0x3810, 0x00}, {0x3811, 0x00}, {0x3812, 0x00}, @@ -721,13 +676,10 @@ static struct ov2680_reg const ov2680_1616x916_30fps[] = { }; /* - * 1612x1212 30fps VBlanking 1lane 10Bit + * 1616x1082 30fps VBlanking 1lane 10Bit */ -#if 0 static struct ov2680_reg const ov2680_1616x1082_30fps[] = { {0x3086, 0x00}, - {0x3501, 0x48}, - {0x3502, 0xe0}, {0x370a, 0x21}, {0x3801, 0x00}, {0x3802, 0x00}, @@ -742,8 +694,6 @@ static struct ov2680_reg const ov2680_1616x1082_30fps[] = { {0x380b, 0x3a}, {0x380c, 0x06}, {0x380d, 0xa8}, - {0x380e, 0x05}, - {0x380f, 0x0e}, {0x3810, 0x00}, {0x3811, 0x00}, {0x3812, 0x00}, @@ -763,14 +713,12 @@ static struct ov2680_reg const ov2680_1616x1082_30fps[] = { {0x5081, 0x41}, {} }; -#endif + /* * 1616x1216 30fps VBlanking 1lane 10Bit */ static struct ov2680_reg const ov2680_1616x1216_30fps[] = { {0x3086, 0x00}, - {0x3501, 0x48}, - {0x3502, 0xe0}, {0x370a, 0x21}, {0x3801, 0x00}, {0x3802, 0x00}, @@ -785,8 +733,6 @@ static struct ov2680_reg const ov2680_1616x1216_30fps[] = { {0x380b, 0xc0},//c0}, {0x380c, 0x06}, {0x380d, 0xa8}, - {0x380e, 0x05}, - {0x380f, 0x0e}, {0x3810, 0x00}, {0x3811, 0x00}, {0x3812, 0x00}, @@ -809,12 +755,10 @@ static struct ov2680_reg const ov2680_1616x1216_30fps[] = { static struct ov2680_resolution ov2680_res_preview[] = { { - .desc = "ov2680_1616x1216_30fps", .width = 1616, .height = 1216, .pix_clk_freq = 66, .fps = 30, - .used = 0, .pixels_per_line = 1698,//1704, .lines_per_frame = 1294, .bin_factor_x = 0, @@ -824,12 +768,23 @@ static struct ov2680_resolution ov2680_res_preview[] = { .regs = ov2680_1616x1216_30fps, }, { - .desc = "ov2680_1616x916_30fps", + .width = 1616, + .height = 1082, + .pix_clk_freq = 66, + .fps = 30, + .pixels_per_line = 1698,//1704, + .lines_per_frame = 1294, + .bin_factor_x = 0, + .bin_factor_y = 0, + .bin_mode = 0, + .skip_frames = 3, + .regs = ov2680_1616x1082_30fps, + }, + { .width = 1616, .height = 916, .fps = 30, .pix_clk_freq = 66, - .used = 0, .pixels_per_line = 1698,//1704, .lines_per_frame = 1294, .bin_factor_x = 0, @@ -838,11 +793,125 @@ static struct ov2680_resolution ov2680_res_preview[] = { .skip_frames = 3, .regs = ov2680_1616x916_30fps, }, + { + .width = 1456, + .height = 1096, + .fps = 30, + .pix_clk_freq = 66, + .pixels_per_line = 1698,//1704, + .lines_per_frame = 1294, + .bin_factor_x = 0, + .bin_factor_y = 0, + .bin_mode = 0, + .skip_frames = 3, + .regs = ov2680_1456x1096_30fps, + }, + { + .width = 1296, + .height = 976, + .fps = 30, + .pix_clk_freq = 66, + .pixels_per_line = 1698,//1704, + .lines_per_frame = 1294, + .bin_factor_x = 0, + .bin_factor_y = 0, + .bin_mode = 0, + .skip_frames = 3, + .regs = ov2680_1296x976_30fps, + }, + { + .width = 1280, + .height = 720, + .fps = 60, + .pix_clk_freq = 66, + .pixels_per_line = 1698,//1704, + .lines_per_frame = 1294, + .bin_factor_x = 0, + .bin_factor_y = 0, + .bin_mode = 0, + .skip_frames = 3, + .regs = ov2680_720p_30fps, + }, + { + .width = 800, + .height = 600, + .fps = 60, + .pix_clk_freq = 66, + .pixels_per_line = 1698,//1704, + .lines_per_frame = 1294, + .bin_factor_x = 0, + .bin_factor_y = 0, + .bin_mode = 0, + .skip_frames = 3, + .regs = ov2680_800x600_30fps, + }, + { + .width = 720, + .height = 592, + .fps = 60, + .pix_clk_freq = 66, + .pixels_per_line = 1698,//1704, + .lines_per_frame = 1294, + .bin_factor_x = 0, + .bin_factor_y = 0, + .bin_mode = 0, + .skip_frames = 3, + .regs = ov2680_720x592_30fps, + }, + { + .width = 656, + .height = 496, + .fps = 60, + .pix_clk_freq = 66, + .pixels_per_line = 1698,//1704, + .lines_per_frame = 1294, + .bin_factor_x = 0, + .bin_factor_y = 0, + .bin_mode = 0, + .skip_frames = 3, + .regs = ov2680_656x496_30fps, + }, + { + .width = 336, + .height = 256, + .fps = 60, + .pix_clk_freq = 66, + .pixels_per_line = 1698,//1704, + .lines_per_frame = 1294, + .bin_factor_x = 0, + .bin_factor_y = 0, + .bin_mode = 0, + .skip_frames = 3, + .regs = ov2680_QVGA_30fps, + }, + { + .width = 352, + .height = 288, + .fps = 60, + .pix_clk_freq = 66, + .pixels_per_line = 1698,//1704, + .lines_per_frame = 1294, + .bin_factor_x = 0, + .bin_factor_y = 0, + .bin_mode = 0, + .skip_frames = 3, + .regs = ov2680_CIF_30fps, + }, + { + .width = 176, + .height = 144, + .fps = 60, + .pix_clk_freq = 66, + .pixels_per_line = 1698,//1704, + .lines_per_frame = 1294, + .bin_factor_x = 0, + .bin_factor_y = 0, + .bin_mode = 0, + .skip_frames = 3, + .regs = ov2680_QCIF_30fps, + }, }; #define N_RES_PREVIEW (ARRAY_SIZE(ov2680_res_preview)) -static struct ov2680_resolution *ov2680_res = ov2680_res_preview; -static unsigned long N_RES = N_RES_PREVIEW; - #endif diff --git a/drivers/staging/media/atomisp/i2c/ov2722.h b/drivers/staging/media/atomisp/i2c/ov2722.h index 7b0debb6c53d..d6e2510bc01c 100644 --- a/drivers/staging/media/atomisp/i2c/ov2722.h +++ b/drivers/staging/media/atomisp/i2c/ov2722.h @@ -201,14 +201,13 @@ struct ov2722_device { struct media_pad pad; struct v4l2_mbus_framefmt format; struct mutex input_lock; + struct ov2722_resolution *res; struct camera_sensor_platform_data *platform_data; int vt_pix_clk_freq_mhz; - int fmt_idx; int run_mode; u16 pixels_per_line; u16 lines_per_frame; - u8 res; u8 type; struct v4l2_ctrl_handler ctrl_handler; diff --git a/drivers/staging/media/atomisp/pci/atomisp_cmd.c b/drivers/staging/media/atomisp/pci/atomisp_cmd.c index 366161cff560..97d5a528969b 100644 --- a/drivers/staging/media/atomisp/pci/atomisp_cmd.c +++ b/drivers/staging/media/atomisp/pci/atomisp_cmd.c @@ -857,7 +857,8 @@ static struct atomisp_video_pipe *__atomisp_get_pipe( } else if (asd->run_mode->val == ATOMISP_RUN_MODE_VIDEO) { /* For online video or SDV video pipe. */ if (css_pipe_id == IA_CSS_PIPE_ID_VIDEO || - css_pipe_id == IA_CSS_PIPE_ID_COPY) { + css_pipe_id == IA_CSS_PIPE_ID_COPY || + css_pipe_id == IA_CSS_PIPE_ID_YUVPP) { if (buf_type == IA_CSS_BUFFER_TYPE_OUTPUT_FRAME) return &asd->video_out_video_capture; return &asd->video_out_preview; @@ -865,7 +866,8 @@ static struct atomisp_video_pipe *__atomisp_get_pipe( } else if (asd->run_mode->val == ATOMISP_RUN_MODE_PREVIEW) { /* For online preview or ZSL preview pipe. */ if (css_pipe_id == IA_CSS_PIPE_ID_PREVIEW || - css_pipe_id == IA_CSS_PIPE_ID_COPY) + css_pipe_id == IA_CSS_PIPE_ID_COPY || + css_pipe_id == IA_CSS_PIPE_ID_YUVPP) return &asd->video_out_preview; } /* For capture pipe. */ @@ -1046,13 +1048,8 @@ void atomisp_buf_done(struct atomisp_sub_device *asd, int error, asd->pending_capture_request--; - if (IS_ISP2401) - asd->re_trigger_capture = false; - dev_dbg(isp->dev, "Trigger capture again for new buffer. err=%d\n", err); - } else if (IS_ISP2401) { - asd->re_trigger_capture = true; } break; case IA_CSS_BUFFER_TYPE_OUTPUT_FRAME: @@ -1474,7 +1471,7 @@ void atomisp_wdt_work(struct work_struct *work) wdt_work); int i; unsigned int pipe_wdt_cnt[MAX_STREAM_NUM][4] = { {0} }; - bool css_recover = false; + bool css_recover = true; rt_mutex_lock(&isp->mutex); if (!atomisp_streaming_count(isp)) { @@ -1487,12 +1484,7 @@ void atomisp_wdt_work(struct work_struct *work) dev_err(isp->dev, "timeout %d of %d\n", atomic_read(&isp->wdt_count) + 1, ATOMISP_ISP_MAX_TIMEOUT_COUNT); - - if (atomic_inc_return(&isp->wdt_count) < ATOMISP_ISP_MAX_TIMEOUT_COUNT) - css_recover = true; } else { - css_recover = true; - for (i = 0; i < isp->num_of_streams; i++) { struct atomisp_sub_device *asd = &isp->asd[i]; @@ -1715,6 +1707,12 @@ void atomisp_wdt_refresh_pipe(struct atomisp_video_pipe *pipe, { unsigned long next; + if (!pipe->asd) { + dev_err(pipe->isp->dev, "%s(): asd is NULL, device is %s\n", + __func__, pipe->vdev.name); + return; + } + if (delay != ATOMISP_WDT_KEEP_CURRENT_DELAY) pipe->wdt_duration = delay; @@ -1777,6 +1775,12 @@ void atomisp_wdt_refresh(struct atomisp_sub_device *asd, unsigned int delay) /* ISP2401 */ void atomisp_wdt_stop_pipe(struct atomisp_video_pipe *pipe, bool sync) { + if (!pipe->asd) { + dev_err(pipe->isp->dev, "%s(): asd is NULL, device is %s\n", + __func__, pipe->vdev.name); + return; + } + if (!atomisp_is_wdt_running(pipe)) return; @@ -1869,7 +1873,7 @@ irqreturn_t atomisp_isr_thread(int irq, void *isp_ptr) /* * The standard CSS2.0 API tells the following calling sequence of * dequeue ready buffers: - * while (ia_css_dequeue_event(...)) { + * while (ia_css_dequeue_psys_event(...)) { * switch (event.type) { * ... * ia_css_pipe_dequeue_buffer() @@ -1920,22 +1924,6 @@ out: } /* - * utils for buffer allocation/free - */ - -int atomisp_get_frame_pgnr(struct atomisp_device *isp, - const struct ia_css_frame *frame, u32 *p_pgnr) -{ - if (!frame) { - dev_err(isp->dev, "%s: NULL frame pointer ERROR.\n", __func__); - return -EINVAL; - } - - *p_pgnr = DIV_ROUND_UP(frame->data_bytes, PAGE_SIZE); - return 0; -} - -/* * Get internal fmt according to V4L2 fmt */ static enum ia_css_frame_format @@ -1968,9 +1956,11 @@ v4l2_fmt_to_sh_fmt(u32 fmt) return IA_CSS_FRAME_FORMAT_RGBA888; case V4L2_PIX_FMT_RGB565: return IA_CSS_FRAME_FORMAT_RGB565; +#if 0 case V4L2_PIX_FMT_JPEG: case V4L2_PIX_FMT_CUSTOM_M10MO_RAW: return IA_CSS_FRAME_FORMAT_BINARY_8; +#endif case V4L2_PIX_FMT_SBGGR16: case V4L2_PIX_FMT_SBGGR10: case V4L2_PIX_FMT_SGBRG10: @@ -2022,7 +2012,7 @@ static int raw_output_format_match_input(u32 input, u32 output) return -EINVAL; } -static u32 get_pixel_depth(u32 pixelformat) +u32 atomisp_get_pixel_depth(u32 pixelformat) { switch (pixelformat) { case V4L2_PIX_FMT_YUV420: @@ -3619,18 +3609,10 @@ int atomisp_cp_lsc_table(struct atomisp_sub_device *asd, } /* Shading table size per color */ - if (!IS_ISP2401) { - if (st->width > ISP2400_SH_CSS_MAX_SCTBL_WIDTH_PER_COLOR || - st->height > ISP2400_SH_CSS_MAX_SCTBL_HEIGHT_PER_COLOR) { - dev_err(asd->isp->dev, "shading table w/h validate failed!"); - return -EINVAL; - } - } else { - if (st->width > ISP2401_SH_CSS_MAX_SCTBL_WIDTH_PER_COLOR || - st->height > ISP2401_SH_CSS_MAX_SCTBL_HEIGHT_PER_COLOR) { - dev_err(asd->isp->dev, "shading table w/h validate failed!"); - return -EINVAL; - } + if (st->width > SH_CSS_MAX_SCTBL_WIDTH_PER_COLOR || + st->height > SH_CSS_MAX_SCTBL_HEIGHT_PER_COLOR) { + dev_err(asd->isp->dev, "shading table w/h validate failed!"); + return -EINVAL; } shading_table = atomisp_css_shading_table_alloc(st->width, st->height); @@ -4109,6 +4091,12 @@ void atomisp_handle_parameter_and_buffer(struct atomisp_video_pipe *pipe) unsigned long irqflags; bool need_to_enqueue_buffer = false; + if (!asd) { + dev_err(pipe->isp->dev, "%s(): asd is NULL, device is %s\n", + __func__, pipe->vdev.name); + return; + } + if (atomisp_is_vf_pipe(pipe)) return; @@ -4196,6 +4184,12 @@ int atomisp_set_parameters(struct video_device *vdev, struct atomisp_css_params *css_param = &asd->params.css_param; int ret; + if (!asd) { + dev_err(pipe->isp->dev, "%s(): asd is NULL, device is %s\n", + __func__, vdev->name); + return -EINVAL; + } + if (!asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream) { dev_err(asd->isp->dev, "%s: internal error!\n", __func__); return -EINVAL; @@ -4792,15 +4786,6 @@ int atomisp_get_sensor_mode_data(struct atomisp_sub_device *asd, return 0; } -int atomisp_get_fmt(struct video_device *vdev, struct v4l2_format *f) -{ - struct atomisp_video_pipe *pipe = atomisp_to_video_pipe(vdev); - - f->fmt.pix = pipe->pix; - - return 0; -} - static void __atomisp_update_stream_env(struct atomisp_sub_device *asd, u16 stream_index, struct atomisp_input_stream_info *stream_info) { @@ -4857,6 +4842,12 @@ int atomisp_try_fmt(struct video_device *vdev, struct v4l2_pix_format *f, int source_pad = atomisp_subdev_source_pad(vdev); int ret; + if (!asd) { + dev_err(isp->dev, "%s(): asd is NULL, device is %s\n", + __func__, vdev->name); + return -EINVAL; + } + if (!isp->inputs[asd->input_curr].camera) return -EINVAL; @@ -4943,7 +4934,7 @@ atomisp_try_fmt_file(struct atomisp_device *isp, struct v4l2_format *f) return -EINVAL; } - depth = get_pixel_depth(pixelformat); + depth = atomisp_get_pixel_depth(pixelformat); if (field == V4L2_FIELD_ANY) { field = V4L2_FIELD_NONE; @@ -5133,11 +5124,11 @@ static int css_input_resolution_changed(struct atomisp_sub_device *asd, dev_dbg(asd->isp->dev, "css_input_resolution_changed to %ux%u\n", ffmt->width, ffmt->height); -#if defined(ISP2401_NEW_INPUT_SYSTEM) - atomisp_css_input_set_two_pixels_per_clock(asd, false); -#else - atomisp_css_input_set_two_pixels_per_clock(asd, true); -#endif + if (IS_ISP2401) + atomisp_css_input_set_two_pixels_per_clock(asd, false); + else + atomisp_css_input_set_two_pixels_per_clock(asd, true); + if (asd->continuous_mode->val) { /* Note for all checks: ffmt includes pad_w+pad_h */ if (asd->run_mode->val == ATOMISP_RUN_MODE_VIDEO || @@ -5194,10 +5185,17 @@ static int atomisp_set_fmt_to_isp(struct video_device *vdev, int (*configure_pp_input)(struct atomisp_sub_device *asd, unsigned int width, unsigned int height) = configure_pp_input_nop; - u16 stream_index = atomisp_source_pad_to_stream_id(asd, source_pad); + u16 stream_index; const struct atomisp_in_fmt_conv *fc; int ret, i; + if (!asd) { + dev_err(isp->dev, "%s(): asd is NULL, device is %s\n", + __func__, vdev->name); + return -EINVAL; + } + stream_index = atomisp_source_pad_to_stream_id(asd, source_pad); + v4l2_fh_init(&fh.vfh, vdev); isp_sink_crop = atomisp_subdev_get_rect( @@ -5417,9 +5415,9 @@ static int atomisp_set_fmt_to_isp(struct video_device *vdev, else ret = get_frame_info(asd, output_info); if (ret) { - dev_err(isp->dev, "get_frame_info %ux%u (padded to %u)\n", - pix->width, pix->height, pix->bytesperline); - return -EINVAL; + dev_err(isp->dev, "__get_frame_info %ux%u (padded to %u) returned %d\n", + pix->width, pix->height, pix->bytesperline, ret); + return ret; } atomisp_update_grid_info(asd, pipe_id, source_pad); @@ -5465,9 +5463,14 @@ static void atomisp_get_dis_envelop(struct atomisp_sub_device *asd, static void atomisp_check_copy_mode(struct atomisp_sub_device *asd, int source_pad, struct v4l2_pix_format *f) { -#if defined(ISP2401_NEW_INPUT_SYSTEM) struct v4l2_mbus_framefmt *sink, *src; + if (!IS_ISP2401) { + /* Only used for the new input system */ + asd->copy_mode = false; + return; + } + sink = atomisp_subdev_get_ffmt(&asd->subdev, NULL, V4L2_SUBDEV_FORMAT_ACTIVE, ATOMISP_SUBDEV_PAD_SINK); src = atomisp_subdev_get_ffmt(&asd->subdev, NULL, @@ -5481,8 +5484,6 @@ static void atomisp_check_copy_mode(struct atomisp_sub_device *asd, sensor[asd->sensor_curr].stream_num > 1))) asd->copy_mode = true; else -#endif - /* Only used for the new input system */ asd->copy_mode = false; dev_dbg(asd->isp->dev, "copy_mode: %d\n", asd->copy_mode); @@ -5493,7 +5494,8 @@ static int atomisp_set_fmt_to_snr(struct video_device *vdev, unsigned int padding_w, unsigned int padding_h, unsigned int dvs_env_w, unsigned int dvs_env_h) { - struct atomisp_sub_device *asd = atomisp_to_video_pipe(vdev)->asd; + struct atomisp_video_pipe *pipe = atomisp_to_video_pipe(vdev); + struct atomisp_sub_device *asd = pipe->asd; const struct atomisp_format_bridge *format; struct v4l2_subdev_pad_config pad_cfg; struct v4l2_subdev_state pad_state = { @@ -5504,7 +5506,7 @@ static int atomisp_set_fmt_to_snr(struct video_device *vdev, }; struct v4l2_mbus_framefmt *ffmt = &vformat.format; struct v4l2_mbus_framefmt *req_ffmt; - struct atomisp_device *isp = asd->isp; + struct atomisp_device *isp; struct atomisp_input_stream_info *stream_info = (struct atomisp_input_stream_info *)ffmt->reserved; u16 stream_index = ATOMISP_INPUT_STREAM_GENERAL; @@ -5512,6 +5514,14 @@ static int atomisp_set_fmt_to_snr(struct video_device *vdev, struct v4l2_subdev_fh fh; int ret; + if (!asd) { + dev_err(pipe->isp->dev, "%s(): asd is NULL, device is %s\n", + __func__, vdev->name); + return -EINVAL; + } + + isp = asd->isp; + v4l2_fh_init(&fh.vfh, vdev); stream_index = atomisp_source_pad_to_stream_id(asd, source_pad); @@ -5540,6 +5550,10 @@ static int atomisp_set_fmt_to_snr(struct video_device *vdev, pad, set_fmt, &pad_state, &vformat); if (ret) return ret; + + dev_dbg(isp->dev, "video dis: sensor width: %d, height: %d\n", + ffmt->width, ffmt->height); + if (ffmt->width < req_ffmt->width || ffmt->height < req_ffmt->height) { req_ffmt->height -= dvs_env_h; @@ -5550,8 +5564,6 @@ static int atomisp_set_fmt_to_snr(struct video_device *vdev, asd->params.video_dis_en = false; } } - dev_dbg(isp->dev, "sensor width: %d, height: %d\n", - ffmt->width, ffmt->height); vformat.which = V4L2_SUBDEV_FORMAT_ACTIVE; ret = v4l2_subdev_call(isp->inputs[asd->input_curr].camera, pad, set_fmt, NULL, &vformat); @@ -5590,18 +5602,28 @@ int atomisp_set_fmt(struct video_device *vdev, struct v4l2_format *f) const struct atomisp_format_bridge *format_bridge; const struct atomisp_format_bridge *snr_format_bridge; struct ia_css_frame_info output_info, raw_output_info; - struct v4l2_pix_format snr_fmt = f->fmt.pix; - struct v4l2_pix_format backup_fmt = snr_fmt, s_fmt; + struct v4l2_pix_format snr_fmt; + struct v4l2_pix_format backup_fmt, s_fmt; unsigned int dvs_env_w = 0, dvs_env_h = 0; unsigned int padding_w = pad_w, padding_h = pad_h; bool res_overflow = false, crop_needs_override = false; struct v4l2_mbus_framefmt *isp_sink_fmt; struct v4l2_mbus_framefmt isp_source_fmt = {0}; + struct v4l2_subdev_format vformat = { + .which = V4L2_SUBDEV_FORMAT_ACTIVE, + }; + struct v4l2_mbus_framefmt *ffmt = &vformat.format; struct v4l2_rect isp_sink_crop; u16 source_pad = atomisp_subdev_source_pad(vdev); struct v4l2_subdev_fh fh; int ret; + if (!asd) { + dev_err(isp->dev, "%s(): asd is NULL, device is %s\n", + __func__, vdev->name); + return -EINVAL; + } + if (source_pad >= ATOMISP_SUBDEV_PADS_NUM) return -EINVAL; @@ -5621,9 +5643,38 @@ int atomisp_set_fmt(struct video_device *vdev, struct v4l2_format *f) if (!format_bridge) return -EINVAL; + /* Currently, raw formats are broken!!! */ + + if (format_bridge->sh_fmt == IA_CSS_FRAME_FORMAT_RAW) { + f->fmt.pix.pixelformat = V4L2_PIX_FMT_YUV420; + + format_bridge = atomisp_get_format_bridge(f->fmt.pix.pixelformat); + if (!format_bridge) + return -EINVAL; + } pipe->sh_fmt = format_bridge->sh_fmt; pipe->pix.pixelformat = f->fmt.pix.pixelformat; + /* Ensure that the resolution is equal or below the maximum supported */ + + vformat.which = V4L2_SUBDEV_FORMAT_ACTIVE; + v4l2_fill_mbus_format(ffmt, &f->fmt.pix, format_bridge->mbus_code); + ffmt->height += padding_h; + ffmt->width += padding_w; + + ret = v4l2_subdev_call(isp->inputs[asd->input_curr].camera, pad, + set_fmt, NULL, &vformat); + if (ret) + return ret; + + f->fmt.pix.width = ffmt->width - padding_w; + f->fmt.pix.height = ffmt->height - padding_h; + + snr_fmt = f->fmt.pix; + backup_fmt = snr_fmt; + + /**********************************************************************/ + if (source_pad == ATOMISP_SUBDEV_PAD_SOURCE_VF || (source_pad == ATOMISP_SUBDEV_PAD_SOURCE_PREVIEW && asd->run_mode->val == ATOMISP_RUN_MODE_VIDEO)) { @@ -5945,7 +5996,7 @@ int atomisp_set_fmt(struct video_device *vdev, struct v4l2_format *f) * which appears to be related by a hardware * performance limitation. It's unclear why this * particular code triggers the issue. */ - if (!IS_ISP2401 || crop_needs_override) { + if (crop_needs_override) { if (isp_sink_crop.width * main_compose.height > isp_sink_crop.height * main_compose.width) { sink_crop.height = isp_sink_crop.height; @@ -5987,6 +6038,14 @@ done: pipe->pix.width = f->fmt.pix.width; pipe->pix.height = f->fmt.pix.height; pipe->pix.pixelformat = f->fmt.pix.pixelformat; + /* + * FIXME: do we need to setup this differently, depending on the + * sensor or the pipeline? + */ + pipe->pix.colorspace = V4L2_COLORSPACE_REC709; + pipe->pix.ycbcr_enc = V4L2_YCBCR_ENC_709; + pipe->pix.xfer_func = V4L2_XFER_FUNC_709; + if (format_bridge->planar) { pipe->pix.bytesperline = output_info.padded_width; pipe->pix.sizeimage = PAGE_ALIGN(f->fmt.pix.height * @@ -6021,6 +6080,15 @@ done: else isp->need_gfx_throttle = true; + /* Report the needed sizes */ + f->fmt.pix.sizeimage = pipe->pix.sizeimage; + f->fmt.pix.bytesperline = pipe->pix.bytesperline; + + dev_dbg(isp->dev, "%s: %dx%d, image size: %d, %d bytes per line\n", + __func__, + f->fmt.pix.width, f->fmt.pix.height, + f->fmt.pix.sizeimage, f->fmt.pix.bytesperline); + return 0; } @@ -6034,6 +6102,12 @@ int atomisp_set_fmt_file(struct video_device *vdev, struct v4l2_format *f) struct v4l2_subdev_fh fh; int ret; + if (!asd) { + dev_err(isp->dev, "%s(): asd is NULL, device is %s\n", + __func__, vdev->name); + return -EINVAL; + } + v4l2_fh_init(&fh.vfh, vdev); dev_dbg(isp->dev, "setting fmt %ux%u 0x%x for file inject\n", @@ -6092,15 +6166,9 @@ int atomisp_set_shading_table(struct atomisp_sub_device *asd, } /* Shading table size per color */ - if (!IS_ISP2401) { - if (user_shading_table->width > ISP2400_SH_CSS_MAX_SCTBL_WIDTH_PER_COLOR || - user_shading_table->height > ISP2400_SH_CSS_MAX_SCTBL_HEIGHT_PER_COLOR) - return -EINVAL; - } else { - if (user_shading_table->width > ISP2401_SH_CSS_MAX_SCTBL_WIDTH_PER_COLOR || - user_shading_table->height > ISP2401_SH_CSS_MAX_SCTBL_HEIGHT_PER_COLOR) - return -EINVAL; - } + if (user_shading_table->width > SH_CSS_MAX_SCTBL_WIDTH_PER_COLOR || + user_shading_table->height > SH_CSS_MAX_SCTBL_HEIGHT_PER_COLOR) + return -EINVAL; shading_table = atomisp_css_shading_table_alloc( user_shading_table->width, user_shading_table->height); @@ -6359,6 +6427,12 @@ bool atomisp_is_vf_pipe(struct atomisp_video_pipe *pipe) { struct atomisp_sub_device *asd = pipe->asd; + if (!asd) { + dev_err(pipe->isp->dev, "%s(): asd is NULL, device is %s\n", + __func__, pipe->vdev.name); + return false; + } + if (pipe == &asd->video_out_vf) return true; @@ -6572,6 +6646,12 @@ static int atomisp_get_pipe_id(struct atomisp_video_pipe *pipe) { struct atomisp_sub_device *asd = pipe->asd; + if (!asd) { + dev_err(pipe->isp->dev, "%s(): asd is NULL, device is %s\n", + __func__, pipe->vdev.name); + return -EINVAL; + } + if (ATOMISP_USE_YUVPP(asd)) { return IA_CSS_PIPE_ID_YUVPP; } else if (asd->vfpp->val == ATOMISP_VFPP_DISABLE_SCALER) { @@ -6609,6 +6689,12 @@ int atomisp_get_invalid_frame_num(struct video_device *vdev, struct ia_css_pipe_info p_info; int ret; + if (!asd) { + dev_err(pipe->isp->dev, "%s(): asd is NULL, device is %s\n", + __func__, vdev->name); + return -EINVAL; + } + if (asd->isp->inputs[asd->input_curr].camera_caps-> sensor[asd->sensor_curr].stream_num > 1) { /* External ISP */ diff --git a/drivers/staging/media/atomisp/pci/atomisp_cmd.h b/drivers/staging/media/atomisp/pci/atomisp_cmd.h index e8bdd264d31b..ebc729468f87 100644 --- a/drivers/staging/media/atomisp/pci/atomisp_cmd.h +++ b/drivers/staging/media/atomisp/pci/atomisp_cmd.h @@ -74,8 +74,6 @@ irqreturn_t atomisp_isr_thread(int irq, void *isp_ptr); const struct atomisp_format_bridge *get_atomisp_format_bridge_from_mbus( u32 mbus_code); bool atomisp_is_mbuscode_raw(uint32_t code); -int atomisp_get_frame_pgnr(struct atomisp_device *isp, - const struct ia_css_frame *frame, u32 *p_pgnr); void atomisp_delayed_init_work(struct work_struct *work); /* Get internal fmt according to V4L2 fmt */ @@ -266,8 +264,6 @@ int atomisp_compare_grid(struct atomisp_sub_device *asd, int atomisp_get_sensor_mode_data(struct atomisp_sub_device *asd, struct atomisp_sensor_mode_data *config); -int atomisp_get_fmt(struct video_device *vdev, struct v4l2_format *f); - /* This function looks up the closest available resolution. */ int atomisp_try_fmt(struct video_device *vdev, struct v4l2_pix_format *f, bool *res_overflow); @@ -341,6 +337,8 @@ enum atomisp_metadata_type atomisp_get_metadata_type(struct atomisp_sub_device *asd, enum ia_css_pipe_id pipe_id); +u32 atomisp_get_pixel_depth(u32 pixelformat); + /* Function for HAL to inject a fake event to wake up poll thread */ int atomisp_inject_a_fake_event(struct atomisp_sub_device *asd, int *event); diff --git a/drivers/staging/media/atomisp/pci/atomisp_compat.h b/drivers/staging/media/atomisp/pci/atomisp_compat.h index c16eaf3d126f..64c1bf0943e6 100644 --- a/drivers/staging/media/atomisp/pci/atomisp_compat.h +++ b/drivers/staging/media/atomisp/pci/atomisp_compat.h @@ -133,8 +133,6 @@ void atomisp_css_get_dis_statistics(struct atomisp_sub_device *asd, struct atomisp_css_buffer *isp_css_buffer, struct ia_css_isp_dvs_statistics_map *dvs_map); -int atomisp_css_dequeue_event(struct atomisp_css_event *current_event); - void atomisp_css_temp_pipe_to_pipe_id(struct atomisp_sub_device *asd, struct atomisp_css_event *current_event); diff --git a/drivers/staging/media/atomisp/pci/atomisp_compat_css20.c b/drivers/staging/media/atomisp/pci/atomisp_compat_css20.c index 99a632f33d2d..1173be0e72b0 100644 --- a/drivers/staging/media/atomisp/pci/atomisp_compat_css20.c +++ b/drivers/staging/media/atomisp/pci/atomisp_compat_css20.c @@ -611,15 +611,6 @@ static void __apply_additional_pipe_config( if (stream_env->pipe_configs[pipe_id]. default_capture_config.mode == IA_CSS_CAPTURE_MODE_RAW) stream_env->pipe_configs[pipe_id].enable_dz = false; - - if (IS_ISP2401) { - /* the isp default to use ISP2.2 and the camera hal will - * control whether use isp2.7 */ - if (asd->select_isp_version->val == ATOMISP_CSS_ISP_PIPE_VERSION_2_7) - stream_env->pipe_configs[pipe_id].isp_pipe_version = SH_CSS_ISP_PIPE_VERSION_2_7; - else - stream_env->pipe_configs[pipe_id].isp_pipe_version = SH_CSS_ISP_PIPE_VERSION_2_2; - } break; case IA_CSS_PIPE_ID_VIDEO: /* enable reduced pipe to have binary @@ -972,7 +963,7 @@ int atomisp_css_irq_translate(struct atomisp_device *isp, void atomisp_css_rx_get_irq_info(enum mipi_port_id port, unsigned int *infos) { -#ifndef ISP2401_NEW_INPUT_SYSTEM +#ifndef IS_ISP2401 ia_css_isys_rx_get_irq_info(port, infos); #else *infos = 0; @@ -982,7 +973,7 @@ void atomisp_css_rx_get_irq_info(enum mipi_port_id port, void atomisp_css_rx_clear_irq_info(enum mipi_port_id port, unsigned int infos) { -#ifndef ISP2401_NEW_INPUT_SYSTEM +#ifndef IS_ISP2401 ia_css_isys_rx_clear_irq_info(port, infos); #endif } @@ -1633,14 +1624,6 @@ void atomisp_css_get_dis_statistics(struct atomisp_sub_device *asd, } } -int atomisp_css_dequeue_event(struct atomisp_css_event *current_event) -{ - if (ia_css_dequeue_event(¤t_event->event)) - return -EINVAL; - - return 0; -} - void atomisp_css_temp_pipe_to_pipe_id(struct atomisp_sub_device *asd, struct atomisp_css_event *current_event) { @@ -2657,41 +2640,50 @@ static int __get_frame_info(struct atomisp_sub_device *asd, if (__destroy_pipes(asd, true)) dev_warn(isp->dev, "destroy pipe failed.\n"); - if (__create_pipes(asd)) + if (__create_pipes(asd)) { + dev_err(isp->dev, "can't create pipes\n"); return -EINVAL; + } - if (__create_streams(asd)) + if (__create_streams(asd)) { + dev_err(isp->dev, "can't create streams\n"); goto stream_err; + } - ret = ia_css_pipe_get_info( - asd->stream_env[stream_index] - .pipes[pipe_id], &p_info); - if (!ret) { - switch (type) { - case ATOMISP_CSS_VF_FRAME: - *info = p_info.vf_output_info[0]; - dev_dbg(isp->dev, "getting vf frame info.\n"); - break; - case ATOMISP_CSS_SECOND_VF_FRAME: - *info = p_info.vf_output_info[1]; - dev_dbg(isp->dev, "getting second vf frame info.\n"); - break; - case ATOMISP_CSS_OUTPUT_FRAME: - *info = p_info.output_info[0]; - dev_dbg(isp->dev, "getting main frame info.\n"); - break; - case ATOMISP_CSS_SECOND_OUTPUT_FRAME: - *info = p_info.output_info[1]; - dev_dbg(isp->dev, "getting second main frame info.\n"); - break; - case ATOMISP_CSS_RAW_FRAME: - *info = p_info.raw_output_info; - dev_dbg(isp->dev, "getting raw frame info.\n"); - } - dev_dbg(isp->dev, "get frame info: w=%d, h=%d, num_invalid_frames %d.\n", - info->res.width, info->res.height, p_info.num_invalid_frames); - return 0; + ret = ia_css_pipe_get_info(asd->stream_env[stream_index].pipes[pipe_id], + &p_info); + if (ret) { + dev_err(isp->dev, "can't get info from pipe\n"); + goto stream_err; + } + + switch (type) { + case ATOMISP_CSS_VF_FRAME: + *info = p_info.vf_output_info[0]; + dev_dbg(isp->dev, "getting vf frame info.\n"); + break; + case ATOMISP_CSS_SECOND_VF_FRAME: + *info = p_info.vf_output_info[1]; + dev_dbg(isp->dev, "getting second vf frame info.\n"); + break; + case ATOMISP_CSS_OUTPUT_FRAME: + *info = p_info.output_info[0]; + dev_dbg(isp->dev, "getting main frame info.\n"); + break; + case ATOMISP_CSS_SECOND_OUTPUT_FRAME: + *info = p_info.output_info[1]; + dev_dbg(isp->dev, "getting second main frame info.\n"); + break; + default: + case ATOMISP_CSS_RAW_FRAME: + *info = p_info.raw_output_info; + dev_dbg(isp->dev, "getting raw frame info.\n"); + break; } + dev_dbg(isp->dev, "get frame info: w=%d, h=%d, num_invalid_frames %d.\n", + info->res.width, info->res.height, p_info.num_invalid_frames); + + return 0; stream_err: __destroy_pipes(asd, true); @@ -4111,7 +4103,7 @@ int atomisp_css_isr_thread(struct atomisp_device *isp, bool reset_wdt_timer[MAX_STREAM_NUM] = {false}; int i; - while (!atomisp_css_dequeue_event(¤t_event)) { + while (!ia_css_dequeue_psys_event(¤t_event.event)) { if (current_event.event.type == IA_CSS_EVENT_TYPE_FW_ASSERT) { /* diff --git a/drivers/staging/media/atomisp/pci/atomisp_fops.c b/drivers/staging/media/atomisp/pci/atomisp_fops.c index f82bf082aa79..be6a74d5ac19 100644 --- a/drivers/staging/media/atomisp/pci/atomisp_fops.c +++ b/drivers/staging/media/atomisp/pci/atomisp_fops.c @@ -464,13 +464,11 @@ int atomisp_qbuffers_to_css(struct atomisp_sub_device *asd) css_capture_pipe_id = IA_CSS_PIPE_ID_CAPTURE; } -#ifdef ISP2401_NEW_INPUT_SYSTEM - if (asd->copy_mode) { + if (IS_ISP2401 && asd->copy_mode) { css_capture_pipe_id = IA_CSS_PIPE_ID_COPY; css_preview_pipe_id = IA_CSS_PIPE_ID_COPY; css_video_pipe_id = IA_CSS_PIPE_ID_COPY; } -#endif if (asd->yuvpp_mode) { capture_pipe = &asd->video_out_capture; @@ -772,6 +770,30 @@ static int atomisp_open(struct file *file) dev_dbg(isp->dev, "open device %s\n", vdev->name); + /* + * Ensure that if we are still loading we block. Once the loading + * is over we can proceed. We can't blindly hold the lock until + * that occurs as if the load fails we'll deadlock the unload + */ + rt_mutex_lock(&isp->loading); + /* + * FIXME: revisit this with a better check once the code structure + * is cleaned up a bit more + */ + ret = v4l2_fh_open(file); + if (ret) { + dev_err(isp->dev, + "%s: v4l2_fh_open() returned error %d\n", + __func__, ret); + rt_mutex_unlock(&isp->loading); + return ret; + } + if (!isp->ready) { + rt_mutex_unlock(&isp->loading); + return -ENXIO; + } + rt_mutex_unlock(&isp->loading); + rt_mutex_lock(&isp->mutex); acc_node = !strcmp(vdev->name, "ATOMISP ISP ACC"); @@ -877,6 +899,11 @@ done: else pipe->users++; rt_mutex_unlock(&isp->mutex); + + /* Ensure that a mode is set */ + if (!acc_node) + v4l2_ctrl_s_ctrl(asd->run_mode, pipe->default_run_mode); + return 0; css_error: @@ -1025,7 +1052,7 @@ done: rt_mutex_unlock(&isp->mutex); mutex_unlock(&isp->streamoff_mutex); - return 0; + return v4l2_fh_release(file); } /* @@ -1067,7 +1094,7 @@ static int frame_mmap(struct atomisp_device *isp, host_virt = vma->vm_start; isp_virt = frame->data; - atomisp_get_frame_pgnr(isp, frame, &pgnr); + pgnr = DIV_ROUND_UP(frame->data_bytes, PAGE_SIZE); if (do_isp_mm_remap(isp, vma, isp_virt, host_virt, pgnr)) return -EAGAIN; @@ -1171,6 +1198,12 @@ static int atomisp_mmap(struct file *file, struct vm_area_struct *vma) u32 origin_size, new_size; int ret; + if (!asd) { + dev_err(isp->dev, "%s(): asd is NULL, device is %s\n", + __func__, vdev->name); + return -EINVAL; + } + if (!(vma->vm_flags & (VM_WRITE | VM_READ))) return -EACCES; diff --git a/drivers/staging/media/atomisp/pci/atomisp_gmin_platform.c b/drivers/staging/media/atomisp/pci/atomisp_gmin_platform.c index d8c9e31314b2..1cc581074ba7 100644 --- a/drivers/staging/media/atomisp/pci/atomisp_gmin_platform.c +++ b/drivers/staging/media/atomisp/pci/atomisp_gmin_platform.c @@ -321,6 +321,18 @@ static struct gmin_cfg_var i8880_vars[] = { {}, }; +/* + * Surface 3 does not describe CsiPort/CsiLanes in both DSDT and EFI. + */ +static struct gmin_cfg_var surface3_vars[] = { + {"APTA0330:00_CsiPort", "0"}, + {"APTA0330:00_CsiLanes", "2"}, + + {"OVTI8835:00_CsiPort", "1"}, + {"OVTI8835:00_CsiLanes", "4"}, + {}, +}; + static const struct dmi_system_id gmin_vars[] = { { .ident = "BYT-T FFD8", @@ -358,6 +370,13 @@ static const struct dmi_system_id gmin_vars[] = { }, .driver_data = i8880_vars, }, + { + .ident = "Surface 3", + .matches = { + DMI_MATCH(DMI_BOARD_NAME, "Surface 3"), + }, + .driver_data = surface3_vars, + }, {} }; @@ -481,7 +500,7 @@ fail: static u8 gmin_get_pmic_id_and_addr(struct device *dev) { - struct i2c_client *power; + struct i2c_client *power = NULL; static u8 pmic_i2c_addr; if (pmic_id) diff --git a/drivers/staging/media/atomisp/pci/atomisp_internal.h b/drivers/staging/media/atomisp/pci/atomisp_internal.h index c01db10bb735..f71ab1ee6e19 100644 --- a/drivers/staging/media/atomisp/pci/atomisp_internal.h +++ b/drivers/staging/media/atomisp/pci/atomisp_internal.h @@ -247,6 +247,13 @@ struct atomisp_device { * structures and css API calls. */ struct rt_mutex mutex; /* + * This mutex ensures that we don't allow an open to succeed while + * the initialization process is incomplete + */ + struct rt_mutex loading; + /* Set once the ISP is ready to allow opens */ + bool ready; + /* * Serialise streamoff: mutex is dropped during streamoff to * cancel the watchdog queue. MUST be acquired BEFORE * "mutex". diff --git a/drivers/staging/media/atomisp/pci/atomisp_ioctl.c b/drivers/staging/media/atomisp/pci/atomisp_ioctl.c index c8a625667e81..8fd470efd658 100644 --- a/drivers/staging/media/atomisp/pci/atomisp_ioctl.c +++ b/drivers/staging/media/atomisp/pci/atomisp_ioctl.c @@ -492,23 +492,22 @@ const struct atomisp_format_bridge atomisp_output_fmts[] = { .mbus_code = MEDIA_BUS_FMT_BGR565_2X8_LE, .sh_fmt = IA_CSS_FRAME_FORMAT_RGB565, .description = "16 RGB 5-6-5" +#if 0 }, { .pixelformat = V4L2_PIX_FMT_JPEG, .depth = 8, .mbus_code = MEDIA_BUS_FMT_JPEG_1X8, .sh_fmt = IA_CSS_FRAME_FORMAT_BINARY_8, .description = "JPEG" - }, -#if 0 - { + }, { /* This is a custom format being used by M10MO to send the RAW data */ .pixelformat = V4L2_PIX_FMT_CUSTOM_M10MO_RAW, .depth = 8, .mbus_code = V4L2_MBUS_FMT_CUSTOM_M10MO_RAW, .sh_fmt = IA_CSS_FRAME_FORMAT_BINARY_8, .description = "Custom RAW for M10MO" - }, #endif + }, }; const struct atomisp_format_bridge * @@ -646,6 +645,12 @@ static int atomisp_g_input(struct file *file, void *fh, unsigned int *input) struct atomisp_device *isp = video_get_drvdata(vdev); struct atomisp_sub_device *asd = atomisp_to_video_pipe(vdev)->asd; + if (!asd) { + dev_err(isp->dev, "%s(): asd is NULL, device is %s\n", + __func__, vdev->name); + return -EINVAL; + } + rt_mutex_lock(&isp->mutex); *input = asd->input_curr; rt_mutex_unlock(&isp->mutex); @@ -665,6 +670,12 @@ static int atomisp_s_input(struct file *file, void *fh, unsigned int input) struct v4l2_subdev *motor; int ret; + if (!asd) { + dev_err(isp->dev, "%s(): asd is NULL, device is %s\n", + __func__, vdev->name); + return -EINVAL; + } + rt_mutex_lock(&isp->mutex); if (input >= ATOM_ISP_MAX_INPUTS || input >= isp->input_cnt) { dev_dbg(isp->dev, "input_cnt: %d\n", isp->input_cnt); @@ -755,24 +766,91 @@ error: return ret; } +static int atomisp_enum_framesizes(struct file *file, void *priv, + struct v4l2_frmsizeenum *fsize) +{ + struct video_device *vdev = video_devdata(file); + struct atomisp_device *isp = video_get_drvdata(vdev); + struct atomisp_sub_device *asd = atomisp_to_video_pipe(vdev)->asd; + struct v4l2_subdev_frame_size_enum fse = { + .index = fsize->index, + .which = V4L2_SUBDEV_FORMAT_ACTIVE, + }; + int ret; + + ret = v4l2_subdev_call(isp->inputs[asd->input_curr].camera, + pad, enum_frame_size, NULL, &fse); + if (ret) + return ret; + + fsize->type = V4L2_FRMSIZE_TYPE_DISCRETE; + fsize->discrete.width = fse.max_width - pad_w; + fsize->discrete.height = fse.max_height - pad_h; + + return 0; +} + +static int atomisp_enum_frameintervals(struct file *file, void *priv, + struct v4l2_frmivalenum *fival) +{ + struct video_device *vdev = video_devdata(file); + struct atomisp_device *isp = video_get_drvdata(vdev); + struct atomisp_sub_device *asd = atomisp_to_video_pipe(vdev)->asd; + struct v4l2_subdev_frame_interval_enum fie = { + .code = atomisp_in_fmt_conv[0].code, + .index = fival->index, + .width = fival->width, + .height = fival->height, + .which = V4L2_SUBDEV_FORMAT_ACTIVE, + }; + int ret; + + ret = v4l2_subdev_call(isp->inputs[asd->input_curr].camera, + pad, enum_frame_interval, NULL, + &fie); + if (ret) + return ret; + + fival->type = V4L2_FRMIVAL_TYPE_DISCRETE; + fival->discrete = fie.interval; + + return ret; +} + static int atomisp_enum_fmt_cap(struct file *file, void *fh, struct v4l2_fmtdesc *f) { struct video_device *vdev = video_devdata(file); struct atomisp_device *isp = video_get_drvdata(vdev); struct atomisp_sub_device *asd = atomisp_to_video_pipe(vdev)->asd; - struct v4l2_subdev_mbus_code_enum code = { 0 }; + struct v4l2_subdev_mbus_code_enum code = { + .which = V4L2_SUBDEV_FORMAT_ACTIVE, + }; + const struct atomisp_format_bridge *format; + struct v4l2_subdev *camera; unsigned int i, fi = 0; int rval; + if (!asd) { + dev_err(isp->dev, "%s(): asd is NULL, device is %s\n", + __func__, vdev->name); + return -EINVAL; + } + + camera = isp->inputs[asd->input_curr].camera; + if(!camera) { + dev_err(isp->dev, "%s(): camera is NULL, device is %s\n", + __func__, vdev->name); + return -EINVAL; + } + rt_mutex_lock(&isp->mutex); - rval = v4l2_subdev_call(isp->inputs[asd->input_curr].camera, pad, - enum_mbus_code, NULL, &code); + + rval = v4l2_subdev_call(camera, pad, enum_mbus_code, NULL, &code); if (rval == -ENOIOCTLCMD) { dev_warn(isp->dev, - "enum_mbus_code pad op not supported. Please fix your sensor driver!\n"); - // rval = v4l2_subdev_call(isp->inputs[asd->input_curr].camera, - // video, enum_mbus_fmt, 0, &code.code); + "enum_mbus_code pad op not supported by %s. Please fix your sensor driver!\n", + camera->name); } rt_mutex_unlock(&isp->mutex); @@ -780,15 +858,15 @@ static int atomisp_enum_fmt_cap(struct file *file, void *fh, return rval; for (i = 0; i < ARRAY_SIZE(atomisp_output_fmts); i++) { - const struct atomisp_format_bridge *format = - &atomisp_output_fmts[i]; + format = &atomisp_output_fmts[i]; /* * Is the atomisp-supported format is valid for the * sensor (configuration)? If not, skip it. + * + * FIXME: fix the pipeline to allow sensor format too. */ - if (format->sh_fmt == IA_CSS_FRAME_FORMAT_RAW - && format->mbus_code != code.code) + if (format->sh_fmt == IA_CSS_FRAME_FORMAT_RAW) continue; /* Found a match. Now let's pick f->index'th one. */ @@ -806,20 +884,6 @@ static int atomisp_enum_fmt_cap(struct file *file, void *fh, return -EINVAL; } -static int atomisp_g_fmt_cap(struct file *file, void *fh, - struct v4l2_format *f) -{ - struct video_device *vdev = video_devdata(file); - struct atomisp_device *isp = video_get_drvdata(vdev); - - int ret; - - rt_mutex_lock(&isp->mutex); - ret = atomisp_get_fmt(vdev, f); - rt_mutex_unlock(&isp->mutex); - return ret; -} - static int atomisp_g_fmt_file(struct file *file, void *fh, struct v4l2_format *f) { @@ -834,6 +898,72 @@ static int atomisp_g_fmt_file(struct file *file, void *fh, return 0; } +static int atomisp_adjust_fmt(struct v4l2_format *f) +{ + const struct atomisp_format_bridge *format_bridge; + u32 padded_width; + + format_bridge = atomisp_get_format_bridge(f->fmt.pix.pixelformat); + + padded_width = f->fmt.pix.width + pad_w; + + if (format_bridge->planar) { + f->fmt.pix.bytesperline = padded_width; + f->fmt.pix.sizeimage = PAGE_ALIGN(f->fmt.pix.height * + DIV_ROUND_UP(format_bridge->depth * + padded_width, 8)); + } else { + f->fmt.pix.bytesperline = DIV_ROUND_UP(format_bridge->depth * + padded_width, 8); + f->fmt.pix.sizeimage = PAGE_ALIGN(f->fmt.pix.height * f->fmt.pix.bytesperline); + } + + if (f->fmt.pix.field == V4L2_FIELD_ANY) + f->fmt.pix.field = V4L2_FIELD_NONE; + + format_bridge = atomisp_get_format_bridge(f->fmt.pix.pixelformat); + if (!format_bridge) + return -EINVAL; + + /* Currently, raw formats are broken!!! */ + if (format_bridge->sh_fmt == IA_CSS_FRAME_FORMAT_RAW) { + f->fmt.pix.pixelformat = V4L2_PIX_FMT_YUV420; + + format_bridge = atomisp_get_format_bridge(f->fmt.pix.pixelformat); + if (!format_bridge) + return -EINVAL; + } + + padded_width = f->fmt.pix.width + pad_w; + + if (format_bridge->planar) { + f->fmt.pix.bytesperline = padded_width; + f->fmt.pix.sizeimage = PAGE_ALIGN(f->fmt.pix.height * + DIV_ROUND_UP(format_bridge->depth * + padded_width, 8)); + } else { + f->fmt.pix.bytesperline = DIV_ROUND_UP(format_bridge->depth * + padded_width, 8); + f->fmt.pix.sizeimage = PAGE_ALIGN(f->fmt.pix.height * f->fmt.pix.bytesperline); + } + + if (f->fmt.pix.field == V4L2_FIELD_ANY) + f->fmt.pix.field = V4L2_FIELD_NONE; + + /* + * FIXME: do we need to setup this differently, depending on the + * sensor or the pipeline? + */ + f->fmt.pix.colorspace = V4L2_COLORSPACE_REC709; + f->fmt.pix.ycbcr_enc = V4L2_YCBCR_ENC_709; + f->fmt.pix.xfer_func = V4L2_XFER_FUNC_709; + + f->fmt.pix.width -= pad_w; + f->fmt.pix.height -= pad_h; + + return 0; +} + /* This function looks up the closest available resolution. */ static int atomisp_try_fmt_cap(struct file *file, void *fh, struct v4l2_format *f) @@ -845,7 +975,35 @@ static int atomisp_try_fmt_cap(struct file *file, void *fh, rt_mutex_lock(&isp->mutex); ret = atomisp_try_fmt(vdev, &f->fmt.pix, NULL); rt_mutex_unlock(&isp->mutex); - return ret; + + if (ret) + return ret; + + return atomisp_adjust_fmt(f); +} + +static int atomisp_g_fmt_cap(struct file *file, void *fh, + struct v4l2_format *f) +{ + struct video_device *vdev = video_devdata(file); + struct atomisp_device *isp = video_get_drvdata(vdev); + struct atomisp_video_pipe *pipe; + + rt_mutex_lock(&isp->mutex); + pipe = atomisp_to_video_pipe(vdev); + rt_mutex_unlock(&isp->mutex); + + f->fmt.pix = pipe->pix; + + /* If s_fmt was issued, just return whatever is was previouly set */ + if (f->fmt.pix.sizeimage) + return 0; + + f->fmt.pix.pixelformat = V4L2_PIX_FMT_YUYV; + f->fmt.pix.width = 10000; + f->fmt.pix.height = 10000; + + return atomisp_try_fmt_cap(file, fh, f); } static int atomisp_s_fmt_cap(struct file *file, void *fh, @@ -1024,9 +1182,16 @@ int __atomisp_reqbufs(struct file *file, void *fh, struct ia_css_frame *frame; struct videobuf_vmalloc_memory *vm_mem; u16 source_pad = atomisp_subdev_source_pad(vdev); - u16 stream_id = atomisp_source_pad_to_stream_id(asd, source_pad); + u16 stream_id; int ret = 0, i = 0; + if (!asd) { + dev_err(pipe->isp->dev, "%s(): asd is NULL, device is %s\n", + __func__, vdev->name); + return -EINVAL; + } + stream_id = atomisp_source_pad_to_stream_id(asd, source_pad); + if (req->count == 0) { mutex_lock(&pipe->capq.vb_lock); if (!list_empty(&pipe->capq.stream)) @@ -1154,6 +1319,12 @@ static int atomisp_qbuf(struct file *file, void *fh, struct v4l2_buffer *buf) u32 pgnr; int ret = 0; + if (!asd) { + dev_err(isp->dev, "%s(): asd is NULL, device is %s\n", + __func__, vdev->name); + return -EINVAL; + } + rt_mutex_lock(&isp->mutex); if (isp->isp_fatal_error) { ret = -EIO; @@ -1287,25 +1458,8 @@ done: pipe->capq.streaming && !asd->enable_raw_buffer_lock->val && asd->params.offline_parm.num_captures == 1) { - if (!IS_ISP2401) { asd->pending_capture_request++; dev_dbg(isp->dev, "Add one pending capture request.\n"); - } else { - if (asd->re_trigger_capture) { - ret = atomisp_css_offline_capture_configure(asd, - asd->params.offline_parm.num_captures, - asd->params.offline_parm.skip_frames, - asd->params.offline_parm.offset); - asd->re_trigger_capture = false; - dev_dbg(isp->dev, "%s Trigger capture again ret=%d\n", - __func__, ret); - - } else { - asd->pending_capture_request++; - asd->re_trigger_capture = false; - dev_dbg(isp->dev, "Add one pending capture request.\n"); - } - } } rt_mutex_unlock(&isp->mutex); @@ -1389,6 +1543,12 @@ static int atomisp_dqbuf(struct file *file, void *fh, struct v4l2_buffer *buf) struct atomisp_device *isp = video_get_drvdata(vdev); int ret = 0; + if (!asd) { + dev_err(isp->dev, "%s(): asd is NULL, device is %s\n", + __func__, vdev->name); + return -EINVAL; + } + rt_mutex_lock(&isp->mutex); if (isp->isp_fatal_error) { @@ -1640,6 +1800,12 @@ static int atomisp_streamon(struct file *file, void *fh, int ret = 0; unsigned long irqflags; + if (!asd) { + dev_err(isp->dev, "%s(): asd is NULL, device is %s\n", + __func__, vdev->name); + return -EINVAL; + } + dev_dbg(isp->dev, "Start stream on pad %d for asd%d\n", atomisp_subdev_source_pad(vdev), asd->index); @@ -1686,8 +1852,6 @@ static int atomisp_streamon(struct file *file, void *fh, /* Reset pending capture request count. */ asd->pending_capture_request = 0; - if (IS_ISP2401) - asd->re_trigger_capture = false; if ((atomisp_subdev_streaming_count(asd) > sensor_start_stream) && (!isp->inputs[asd->input_curr].camera_caps->multi_stream_ctrl)) { @@ -1901,6 +2065,12 @@ int __atomisp_streamoff(struct file *file, void *fh, enum v4l2_buf_type type) unsigned long flags; bool first_streamoff = false; + if (!asd) { + dev_err(isp->dev, "%s(): asd is NULL, device is %s\n", + __func__, vdev->name); + return -EINVAL; + } + dev_dbg(isp->dev, "Stop stream on pad %d for asd%d\n", atomisp_subdev_source_pad(vdev), asd->index); @@ -2150,6 +2320,12 @@ static int atomisp_g_ctrl(struct file *file, void *fh, struct atomisp_device *isp = video_get_drvdata(vdev); int i, ret = -EINVAL; + if (!asd) { + dev_err(isp->dev, "%s(): asd is NULL, device is %s\n", + __func__, vdev->name); + return -EINVAL; + } + for (i = 0; i < ctrls_num; i++) { if (ci_v4l2_controls[i].id == control->id) { ret = 0; @@ -2229,6 +2405,12 @@ static int atomisp_s_ctrl(struct file *file, void *fh, struct atomisp_device *isp = video_get_drvdata(vdev); int i, ret = -EINVAL; + if (!asd) { + dev_err(isp->dev, "%s(): asd is NULL, device is %s\n", + __func__, vdev->name); + return -EINVAL; + } + for (i = 0; i < ctrls_num; i++) { if (ci_v4l2_controls[i].id == control->id) { ret = 0; @@ -2310,6 +2492,12 @@ static int atomisp_queryctl(struct file *file, void *fh, struct atomisp_sub_device *asd = atomisp_to_video_pipe(vdev)->asd; struct atomisp_device *isp = video_get_drvdata(vdev); + if (!asd) { + dev_err(isp->dev, "%s(): asd is NULL, device is %s\n", + __func__, vdev->name); + return -EINVAL; + } + switch (qc->id) { case V4L2_CID_FOCUS_ABSOLUTE: case V4L2_CID_FOCUS_RELATIVE: @@ -2355,6 +2543,12 @@ static int atomisp_camera_g_ext_ctrls(struct file *file, void *fh, int i; int ret = 0; + if (!asd) { + dev_err(isp->dev, "%s(): asd is NULL, device is %s\n", + __func__, vdev->name); + return -EINVAL; + } + if (!IS_ISP2401) motor = isp->inputs[asd->input_curr].motor; else @@ -2466,6 +2660,12 @@ static int atomisp_camera_s_ext_ctrls(struct file *file, void *fh, int i; int ret = 0; + if (!asd) { + dev_err(isp->dev, "%s(): asd is NULL, device is %s\n", + __func__, vdev->name); + return -EINVAL; + } + if (!IS_ISP2401) motor = isp->inputs[asd->input_curr].motor; else @@ -2591,6 +2791,12 @@ static int atomisp_g_parm(struct file *file, void *fh, struct atomisp_sub_device *asd = atomisp_to_video_pipe(vdev)->asd; struct atomisp_device *isp = video_get_drvdata(vdev); + if (!asd) { + dev_err(isp->dev, "%s(): asd is NULL, device is %s\n", + __func__, vdev->name); + return -EINVAL; + } + if (parm->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) { dev_err(isp->dev, "unsupported v4l2 buf type\n"); return -EINVAL; @@ -2613,6 +2819,12 @@ static int atomisp_s_parm(struct file *file, void *fh, int rval; int fps; + if (!asd) { + dev_err(isp->dev, "%s(): asd is NULL, device is %s\n", + __func__, vdev->name); + return -EINVAL; + } + if (parm->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) { dev_err(isp->dev, "unsupported v4l2 buf type\n"); return -EINVAL; @@ -3035,6 +3247,8 @@ const struct v4l2_ioctl_ops atomisp_ioctl_ops = { .vidioc_g_ctrl = atomisp_g_ctrl, .vidioc_s_ext_ctrls = atomisp_s_ext_ctrls, .vidioc_g_ext_ctrls = atomisp_g_ext_ctrls, + .vidioc_enum_framesizes = atomisp_enum_framesizes, + .vidioc_enum_frameintervals = atomisp_enum_frameintervals, .vidioc_enum_fmt_vid_cap = atomisp_enum_fmt_cap, .vidioc_try_fmt_vid_cap = atomisp_try_fmt_cap, .vidioc_g_fmt_vid_cap = atomisp_g_fmt_cap, diff --git a/drivers/staging/media/atomisp/pci/atomisp_subdev.c b/drivers/staging/media/atomisp/pci/atomisp_subdev.c index 12f22ad007c7..1807cfa786a7 100644 --- a/drivers/staging/media/atomisp/pci/atomisp_subdev.c +++ b/drivers/staging/media/atomisp/pci/atomisp_subdev.c @@ -1058,24 +1058,6 @@ static const struct v4l2_ctrl_config ctrl_depth_mode = { .def = 0, }; -/* - * Control for selectting ISP version - * - * When enabled, that means ISP version will be used ISP2.7. when disable, the - * isp will default to use ISP2.2. - * Note: Make sure set this configuration before creating stream. - */ -static const struct v4l2_ctrl_config ctrl_select_isp_version = { - .ops = &ctrl_ops, - .id = V4L2_CID_ATOMISP_SELECT_ISP_VERSION, - .type = V4L2_CTRL_TYPE_BOOLEAN, - .name = "Select Isp version", - .min = 0, - .max = 1, - .step = 1, - .def = 0, -}; - static void atomisp_init_subdev_pipe(struct atomisp_sub_device *asd, struct atomisp_video_pipe *pipe, enum v4l2_buf_type buf_type) { @@ -1164,23 +1146,28 @@ static int isp_subdev_init_entities(struct atomisp_sub_device *asd) atomisp_init_acc_pipe(asd, &asd->video_acc); - ret = atomisp_video_init(&asd->video_in, "MEMORY"); + ret = atomisp_video_init(&asd->video_in, "MEMORY", + ATOMISP_RUN_MODE_SDV); if (ret < 0) return ret; - ret = atomisp_video_init(&asd->video_out_capture, "CAPTURE"); + ret = atomisp_video_init(&asd->video_out_capture, "CAPTURE", + ATOMISP_RUN_MODE_STILL_CAPTURE); if (ret < 0) return ret; - ret = atomisp_video_init(&asd->video_out_vf, "VIEWFINDER"); + ret = atomisp_video_init(&asd->video_out_vf, "VIEWFINDER", + ATOMISP_RUN_MODE_CONTINUOUS_CAPTURE); if (ret < 0) return ret; - ret = atomisp_video_init(&asd->video_out_preview, "PREVIEW"); + ret = atomisp_video_init(&asd->video_out_preview, "PREVIEW", + ATOMISP_RUN_MODE_PREVIEW); if (ret < 0) return ret; - ret = atomisp_video_init(&asd->video_out_video_capture, "VIDEO"); + ret = atomisp_video_init(&asd->video_out_video_capture, "VIDEO", + ATOMISP_RUN_MODE_VIDEO); if (ret < 0) return ret; @@ -1218,11 +1205,6 @@ static int isp_subdev_init_entities(struct atomisp_sub_device *asd) v4l2_ctrl_new_custom(&asd->ctrl_handler, &ctrl_disable_dz, NULL); - if (IS_ISP2401) { - asd->select_isp_version = v4l2_ctrl_new_custom(&asd->ctrl_handler, - &ctrl_select_isp_version, - NULL); - } /* Make controls visible on subdev as well. */ asd->subdev.ctrl_handler = &asd->ctrl_handler; @@ -1351,6 +1333,14 @@ int atomisp_subdev_register_entities(struct atomisp_sub_device *asd, if (ret < 0) goto error; + asd->video_out_preview.vdev.v4l2_dev = vdev; + asd->video_out_preview.vdev.device_caps = device_caps | + V4L2_CAP_VIDEO_OUTPUT; + ret = video_register_device(&asd->video_out_preview.vdev, + VFL_TYPE_VIDEO, -1); + if (ret < 0) + goto error; + asd->video_out_capture.vdev.v4l2_dev = vdev; asd->video_out_capture.vdev.device_caps = device_caps | V4L2_CAP_VIDEO_OUTPUT; @@ -1366,13 +1356,7 @@ int atomisp_subdev_register_entities(struct atomisp_sub_device *asd, VFL_TYPE_VIDEO, -1); if (ret < 0) goto error; - asd->video_out_preview.vdev.v4l2_dev = vdev; - asd->video_out_preview.vdev.device_caps = device_caps | - V4L2_CAP_VIDEO_OUTPUT; - ret = video_register_device(&asd->video_out_preview.vdev, - VFL_TYPE_VIDEO, -1); - if (ret < 0) - goto error; + asd->video_out_video_capture.vdev.v4l2_dev = vdev; asd->video_out_video_capture.vdev.device_caps = device_caps | V4L2_CAP_VIDEO_OUTPUT; diff --git a/drivers/staging/media/atomisp/pci/atomisp_subdev.h b/drivers/staging/media/atomisp/pci/atomisp_subdev.h index d6fcfab6352d..7d731f1fee72 100644 --- a/drivers/staging/media/atomisp/pci/atomisp_subdev.h +++ b/drivers/staging/media/atomisp/pci/atomisp_subdev.h @@ -81,6 +81,9 @@ struct atomisp_video_pipe { /* the link list to store per_frame parameters */ struct list_head per_frame_params; + /* Store here the initial run mode */ + unsigned int default_run_mode; + unsigned int buffers_in_css; /* irq_lock is used to protect video buffer state change operations and @@ -316,7 +319,6 @@ struct atomisp_sub_device { /* ISP2401 */ struct v4l2_ctrl *ion_dev_fd; - struct v4l2_ctrl *select_isp_version; struct v4l2_ctrl *disable_dz; diff --git a/drivers/staging/media/atomisp/pci/atomisp_v4l2.c b/drivers/staging/media/atomisp/pci/atomisp_v4l2.c index 1e324f1f656e..1b240891a6e2 100644 --- a/drivers/staging/media/atomisp/pci/atomisp_v4l2.c +++ b/drivers/staging/media/atomisp/pci/atomisp_v4l2.c @@ -447,7 +447,8 @@ const struct atomisp_dfs_config dfs_config_cht_soc = { .dfs_table_size = ARRAY_SIZE(dfs_rules_cht_soc), }; -int atomisp_video_init(struct atomisp_video_pipe *video, const char *name) +int atomisp_video_init(struct atomisp_video_pipe *video, const char *name, + unsigned int run_mode) { int ret; const char *direction; @@ -478,6 +479,7 @@ int atomisp_video_init(struct atomisp_video_pipe *video, const char *name) "ATOMISP ISP %s %s", name, direction); video->vdev.release = video_device_release_empty; video_set_drvdata(&video->vdev, video->isp); + video->default_run_mode = run_mode; return 0; } @@ -711,15 +713,15 @@ static int atomisp_mrfld_power(struct atomisp_device *isp, bool enable) dev_dbg(isp->dev, "IUNIT power-%s.\n", enable ? "on" : "off"); - /*WA:Enable DVFS*/ + /* WA for P-Unit, if DVFS enabled, ISP timeout observed */ if (IS_CHT && enable) - punit_ddr_dvfs_enable(true); + punit_ddr_dvfs_enable(false); /* * FIXME:WA for ECS28A, with this sleep, CTS * android.hardware.camera2.cts.CameraDeviceTest#testCameraDeviceAbort * PASS, no impact on other platforms - */ + */ if (IS_BYT && enable) msleep(10); @@ -727,7 +729,7 @@ static int atomisp_mrfld_power(struct atomisp_device *isp, bool enable) iosf_mbi_modify(BT_MBI_UNIT_PMC, MBI_REG_READ, MRFLD_ISPSSPM0, val, MRFLD_ISPSSPM0_ISPSSC_MASK); - /*WA:Enable DVFS*/ + /* WA:Enable DVFS */ if (IS_CHT && !enable) punit_ddr_dvfs_enable(true); @@ -1182,6 +1184,7 @@ static void atomisp_unregister_entities(struct atomisp_device *isp) v4l2_device_unregister(&isp->v4l2_dev); media_device_unregister(&isp->media_dev); + media_device_cleanup(&isp->media_dev); } static int atomisp_register_entities(struct atomisp_device *isp) @@ -1566,6 +1569,7 @@ static int atomisp_pci_probe(struct pci_dev *pdev, const struct pci_device_id *i dev_dbg(&pdev->dev, "atomisp mmio base: %p\n", isp->base); rt_mutex_init(&isp->mutex); + rt_mutex_init(&isp->loading); mutex_init(&isp->streamoff_mutex); spin_lock_init(&isp->lock); @@ -1633,12 +1637,7 @@ static int atomisp_pci_probe(struct pci_dev *pdev, const struct pci_device_id *i pdev->d3cold_delay = 0; break; case ATOMISP_PCI_DEVICE_SOC_ANN: - isp->media_dev.hw_revision = ( -#ifdef ISP2401_NEW_INPUT_SYSTEM - ATOMISP_HW_REVISION_ISP2401 -#else - ATOMISP_HW_REVISION_ISP2401_LEGACY -#endif + isp->media_dev.hw_revision = ( ATOMISP_HW_REVISION_ISP2401 << ATOMISP_HW_REVISION_SHIFT); isp->media_dev.hw_revision |= pdev->revision < 2 ? ATOMISP_HW_STEPPING_A0 : ATOMISP_HW_STEPPING_B0; @@ -1646,12 +1645,7 @@ static int atomisp_pci_probe(struct pci_dev *pdev, const struct pci_device_id *i isp->hpll_freq = HPLL_FREQ_1600MHZ; break; case ATOMISP_PCI_DEVICE_SOC_CHT: - isp->media_dev.hw_revision = ( -#ifdef ISP2401_NEW_INPUT_SYSTEM - ATOMISP_HW_REVISION_ISP2401 -#else - ATOMISP_HW_REVISION_ISP2401_LEGACY -#endif + isp->media_dev.hw_revision = ( ATOMISP_HW_REVISION_ISP2401 << ATOMISP_HW_REVISION_SHIFT); isp->media_dev.hw_revision |= pdev->revision < 2 ? ATOMISP_HW_STEPPING_A0 : ATOMISP_HW_STEPPING_B0; @@ -1748,6 +1742,8 @@ static int atomisp_pci_probe(struct pci_dev *pdev, const struct pci_device_id *i pci_write_config_dword(pdev, MRFLD_PCI_CSI_AFE_TRIM_CONTROL, csi_afe_trim); } + rt_mutex_lock(&isp->loading); + err = atomisp_initialize_modules(isp); if (err < 0) { dev_err(&pdev->dev, "atomisp_initialize_modules (%d)\n", err); @@ -1805,6 +1801,8 @@ static int atomisp_pci_probe(struct pci_dev *pdev, const struct pci_device_id *i release_firmware(isp->firmware); isp->firmware = NULL; isp->css_env.isp_css_fw.data = NULL; + isp->ready = true; + rt_mutex_unlock(&isp->loading); atomisp_drvfs_init(isp); @@ -1824,6 +1822,7 @@ wdt_work_queue_fail: register_entities_fail: atomisp_uninitialize_modules(isp); initialize_modules_fail: + rt_mutex_unlock(&isp->loading); cpu_latency_qos_remove_request(&isp->pm_qos); atomisp_msi_irq_uninit(isp); pci_free_irq_vectors(pdev); diff --git a/drivers/staging/media/atomisp/pci/atomisp_v4l2.h b/drivers/staging/media/atomisp/pci/atomisp_v4l2.h index 81bb356b8172..72611b8286a4 100644 --- a/drivers/staging/media/atomisp/pci/atomisp_v4l2.h +++ b/drivers/staging/media/atomisp/pci/atomisp_v4l2.h @@ -27,7 +27,8 @@ struct v4l2_device; struct atomisp_device; struct firmware; -int atomisp_video_init(struct atomisp_video_pipe *video, const char *name); +int atomisp_video_init(struct atomisp_video_pipe *video, const char *name, + unsigned int run_mode); void atomisp_acc_init(struct atomisp_acc_pipe *video, const char *name); void atomisp_video_unregister(struct atomisp_video_pipe *video); void atomisp_acc_unregister(struct atomisp_acc_pipe *video); diff --git a/drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c b/drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c index f20c9b02fbe0..7dd0e4a53c8b 100644 --- a/drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c +++ b/drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c @@ -58,7 +58,6 @@ static void pipe_binarydesc_get_offline( descr->enable_dz = true; descr->enable_xnr = false; descr->enable_dpc = false; - descr->enable_luma_only = false; descr->enable_tnr = false; descr->enable_capture_pp_bli = false; descr->enable_fractional_ds = false; @@ -390,8 +389,6 @@ int ia_css_pipe_get_video_binarydesc( pipe->extra_config.enable_fractional_ds; video_descr->enable_dpc = pipe->config.enable_dpc; - video_descr->enable_luma_only = - pipe->config.enable_luma_only; video_descr->enable_tnr = pipe->config.enable_tnr; @@ -574,11 +571,9 @@ void ia_css_pipe_get_primary_binarydesc( in_info->res = pipe->config.input_effective_res; in_info->padded_width = in_info->res.width; -#if !defined(HAS_NO_PACKED_RAW_PIXELS) if (pipe->stream->config.pack_raw_pixels) in_info->format = IA_CSS_FRAME_FORMAT_RAW_PACKED; else -#endif in_info->format = IA_CSS_FRAME_FORMAT_RAW; in_info->raw_bit_depth = ia_css_pipe_util_pipe_input_format_bpp(pipe); @@ -600,24 +595,15 @@ void ia_css_pipe_get_primary_binarydesc( prim_descr->isp_pipe_version = pipe->config.isp_pipe_version; prim_descr->enable_fractional_ds = pipe->extra_config.enable_fractional_ds; - prim_descr->enable_luma_only = - pipe->config.enable_luma_only; /* We have both striped and non-striped primary binaries, * if continuous viewfinder is required, then we must select * a striped one. Otherwise we prefer to use a non-striped * since it has better performance. */ if (pipe_version == IA_CSS_PIPE_VERSION_2_6_1) prim_descr->striped = false; - else if (!IS_ISP2401) { + else prim_descr->striped = prim_descr->continuous && (!pipe->stream->stop_copy_preview || !pipe->stream->disable_cont_vf); - } else { - prim_descr->striped = prim_descr->continuous && !pipe->stream->disable_cont_vf; - - if ((pipe->config.default_capture_config.enable_xnr != 0) && - (pipe->extra_config.enable_dvs_6axis == true)) - prim_descr->enable_xnr = true; - } } IA_CSS_LEAVE_PRIVATE(""); } @@ -849,14 +835,7 @@ void ia_css_pipe_get_ldc_binarydesc( assert(out_info); IA_CSS_ENTER_PRIVATE(""); - if (!IS_ISP2401) { - *in_info = *out_info; - } else { - if (pipe->out_yuv_ds_input_info.res.width) - *in_info = pipe->out_yuv_ds_input_info; - else - *in_info = *out_info; - } + *in_info = *out_info; in_info->format = IA_CSS_FRAME_FORMAT_YUV420; in_info->raw_bit_depth = 0; diff --git a/drivers/staging/media/atomisp/pci/css_2400_system/hive/ia_css_isp_configs.c b/drivers/staging/media/atomisp/pci/css_2400_system/hive/ia_css_isp_configs.c deleted file mode 100644 index 1a021ae841fe..000000000000 --- a/drivers/staging/media/atomisp/pci/css_2400_system/hive/ia_css_isp_configs.c +++ /dev/null @@ -1,386 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -/* Generated code: do not edit or commmit. */ - -#define IA_CSS_INCLUDE_CONFIGURATIONS -#include "ia_css_pipeline.h" -#include "ia_css_isp_configs.h" -#include "ia_css_debug.h" -#include "assert_support.h" - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_iterator( - const struct ia_css_binary *binary, - const struct ia_css_iterator_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_iterator() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.iterator.size; - offset = binary->info->mem_offsets.offsets.config->dmem.iterator.offset; - } - if (size) { - ia_css_iterator_config((struct sh_css_isp_iterator_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_iterator() leave:\n"); -} - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_copy_output( - const struct ia_css_binary *binary, - const struct ia_css_copy_output_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_copy_output() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.copy_output.size; - offset = binary->info->mem_offsets.offsets.config->dmem.copy_output.offset; - } - if (size) { - ia_css_copy_output_config((struct sh_css_isp_copy_output_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_copy_output() leave:\n"); -} - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_crop( - const struct ia_css_binary *binary, - const struct ia_css_crop_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_crop() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.crop.size; - offset = binary->info->mem_offsets.offsets.config->dmem.crop.offset; - } - if (size) { - ia_css_crop_config((struct sh_css_isp_crop_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_crop() leave:\n"); -} - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_fpn( - const struct ia_css_binary *binary, - const struct ia_css_fpn_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_fpn() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.fpn.size; - offset = binary->info->mem_offsets.offsets.config->dmem.fpn.offset; - } - if (size) { - ia_css_fpn_config((struct sh_css_isp_fpn_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_fpn() leave:\n"); -} - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_dvs( - const struct ia_css_binary *binary, - const struct ia_css_dvs_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_dvs() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.dvs.size; - offset = binary->info->mem_offsets.offsets.config->dmem.dvs.offset; - } - if (size) { - ia_css_dvs_config((struct sh_css_isp_dvs_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_dvs() leave:\n"); -} - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_qplane( - const struct ia_css_binary *binary, - const struct ia_css_qplane_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_qplane() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.qplane.size; - offset = binary->info->mem_offsets.offsets.config->dmem.qplane.offset; - } - if (size) { - ia_css_qplane_config((struct sh_css_isp_qplane_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_qplane() leave:\n"); -} - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_output0( - const struct ia_css_binary *binary, - const struct ia_css_output0_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_output0() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.output0.size; - offset = binary->info->mem_offsets.offsets.config->dmem.output0.offset; - } - if (size) { - ia_css_output0_config((struct sh_css_isp_output_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_output0() leave:\n"); -} - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_output1( - const struct ia_css_binary *binary, - const struct ia_css_output1_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_output1() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.output1.size; - offset = binary->info->mem_offsets.offsets.config->dmem.output1.offset; - } - if (size) { - ia_css_output1_config((struct sh_css_isp_output_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_output1() leave:\n"); -} - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_output( - const struct ia_css_binary *binary, - const struct ia_css_output_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_output() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.output.size; - offset = binary->info->mem_offsets.offsets.config->dmem.output.offset; - } - if (size) { - ia_css_output_config((struct sh_css_isp_output_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_output() leave:\n"); -} - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_raw( - const struct ia_css_binary *binary, - const struct ia_css_raw_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_raw() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.raw.size; - offset = binary->info->mem_offsets.offsets.config->dmem.raw.offset; - } - if (size) { - ia_css_raw_config((struct sh_css_isp_raw_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_raw() leave:\n"); -} - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_tnr( - const struct ia_css_binary *binary, - const struct ia_css_tnr_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_tnr() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.tnr.size; - offset = binary->info->mem_offsets.offsets.config->dmem.tnr.offset; - } - if (size) { - ia_css_tnr_config((struct sh_css_isp_tnr_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_tnr() leave:\n"); -} - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_ref( - const struct ia_css_binary *binary, - const struct ia_css_ref_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_ref() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.ref.size; - offset = binary->info->mem_offsets.offsets.config->dmem.ref.offset; - } - if (size) { - ia_css_ref_config((struct sh_css_isp_ref_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_ref() leave:\n"); -} - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_vf( - const struct ia_css_binary *binary, - const struct ia_css_vf_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_vf() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.vf.size; - offset = binary->info->mem_offsets.offsets.config->dmem.vf.offset; - } - if (size) { - ia_css_vf_config((struct sh_css_isp_vf_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_vf() leave:\n"); -} diff --git a/drivers/staging/media/atomisp/pci/css_2400_system/hive/ia_css_isp_params.c b/drivers/staging/media/atomisp/pci/css_2400_system/hive/ia_css_isp_params.c deleted file mode 100644 index b786247b322b..000000000000 --- a/drivers/staging/media/atomisp/pci/css_2400_system/hive/ia_css_isp_params.c +++ /dev/null @@ -1,3420 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ -#define IA_CSS_INCLUDE_PARAMETERS -#include "sh_css_params.h" -#include "isp/kernels/aa/aa_2/ia_css_aa2.host.h" -#include "isp/kernels/anr/anr_1.0/ia_css_anr.host.h" -#include "isp/kernels/anr/anr_2/ia_css_anr2.host.h" -#include "isp/kernels/bh/bh_2/ia_css_bh.host.h" -#include "isp/kernels/bnr/bnr_1.0/ia_css_bnr.host.h" -#include "isp/kernels/bnr/bnr2_2/ia_css_bnr2_2.host.h" -#include "isp/kernels/cnr/cnr_2/ia_css_cnr2.host.h" -#include "isp/kernels/crop/crop_1.0/ia_css_crop.host.h" -#include "isp/kernels/csc/csc_1.0/ia_css_csc.host.h" -#include "isp/kernels/ctc/ctc_1.0/ia_css_ctc.host.h" -#include "isp/kernels/ctc/ctc1_5/ia_css_ctc1_5.host.h" -#include "isp/kernels/ctc/ctc2/ia_css_ctc2.host.h" -#include "isp/kernels/de/de_1.0/ia_css_de.host.h" -#include "isp/kernels/de/de_2/ia_css_de2.host.h" -#include "isp/kernels/dp/dp_1.0/ia_css_dp.host.h" -#include "isp/kernels/fixedbds/fixedbds_1.0/ia_css_fixedbds_param.h" -#include "isp/kernels/fpn/fpn_1.0/ia_css_fpn.host.h" -#include "isp/kernels/gc/gc_1.0/ia_css_gc.host.h" -#include "isp/kernels/gc/gc_2/ia_css_gc2.host.h" -#include "isp/kernels/macc/macc_1.0/ia_css_macc.host.h" -#include "isp/kernels/macc/macc1_5/ia_css_macc1_5.host.h" -#include "isp/kernels/ob/ob_1.0/ia_css_ob.host.h" -#include "isp/kernels/ob/ob2/ia_css_ob2.host.h" -#include "isp/kernels/output/output_1.0/ia_css_output.host.h" -#include "isp/kernels/raw_aa_binning/raw_aa_binning_1.0/ia_css_raa.host.h" -#include "isp/kernels/s3a/s3a_1.0/ia_css_s3a.host.h" -#include "isp/kernels/sc/sc_1.0/ia_css_sc.host.h" -#include "isp/kernels/sdis/sdis_1.0/ia_css_sdis.host.h" -#include "isp/kernels/sdis/sdis_2/ia_css_sdis2.host.h" -#include "isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.h" -#include "isp/kernels/uds/uds_1.0/ia_css_uds_param.h" -#include "isp/kernels/wb/wb_1.0/ia_css_wb.host.h" -#include "isp/kernels/xnr/xnr_1.0/ia_css_xnr.host.h" -#include "isp/kernels/xnr/xnr_3.0/ia_css_xnr3.host.h" -#include "isp/kernels/ynr/ynr_1.0/ia_css_ynr.host.h" -#include "isp/kernels/ynr/ynr_2/ia_css_ynr2.host.h" -#include "isp/kernels/fc/fc_1.0/ia_css_formats.host.h" -#include "isp/kernels/tdf/tdf_1.0/ia_css_tdf.host.h" -#include "isp/kernels/dpc2/ia_css_dpc2.host.h" -#include "isp/kernels/eed1_8/ia_css_eed1_8.host.h" -#include "isp/kernels/bnlm/ia_css_bnlm.host.h" -#include "isp/kernels/conversion/conversion_1.0/ia_css_conversion.host.h" -/* Generated code: do not edit or commmit. */ - -#include "ia_css_pipeline.h" -#include "ia_css_isp_params.h" -#include "ia_css_debug.h" -#include "assert_support.h" - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_aa( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.aa.size; - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.aa.offset; - - if (size) { - struct sh_css_isp_aa_params *t = (struct sh_css_isp_aa_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset]; - t->strength = params->aa_config.strength; - } - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_anr( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.anr.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.anr.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_anr() enter:\n"); - - ia_css_anr_encode((struct sh_css_isp_anr_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->anr_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_anr() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_anr2( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->vmem.anr2.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->vmem.anr2.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_anr2() enter:\n"); - - ia_css_anr2_vmem_encode((struct ia_css_isp_anr2_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], - ¶ms->anr_thres, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_anr2() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_bh( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.bh.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.bh.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bh() enter:\n"); - - ia_css_bh_encode((struct sh_css_isp_bh_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->s3a_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bh() leave:\n"); - } - } - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->hmem0.bh.size; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bh() enter:\n"); - - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_HMEM0] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bh() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_cnr( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.cnr.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.cnr.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_cnr() enter:\n"); - - ia_css_cnr_encode((struct sh_css_isp_cnr_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->cnr_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_cnr() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_crop( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.crop.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.crop.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_crop() enter:\n"); - - ia_css_crop_encode((struct sh_css_isp_crop_isp_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->crop_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_crop() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_csc( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.csc.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.csc.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_csc() enter:\n"); - - ia_css_csc_encode((struct sh_css_isp_csc_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->cc_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_csc() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_dp( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.dp.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.dp.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_dp() enter:\n"); - - ia_css_dp_encode((struct sh_css_isp_dp_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->dp_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_dp() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_bnr( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.bnr.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.bnr.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_bnr() enter:\n"); - - ia_css_bnr_encode((struct sh_css_isp_bnr_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->nr_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_bnr() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_de( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.de.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.de.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_de() enter:\n"); - - ia_css_de_encode((struct sh_css_isp_de_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->de_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_de() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_ecd( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.ecd.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.ecd.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_ecd() enter:\n"); - - ia_css_ecd_encode((struct sh_css_isp_ecd_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->ecd_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_ecd() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_formats( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.formats.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.formats.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_formats() enter:\n"); - - ia_css_formats_encode((struct sh_css_isp_formats_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->formats_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_formats() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_fpn( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.fpn.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.fpn.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_fpn() enter:\n"); - - ia_css_fpn_encode((struct sh_css_isp_fpn_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->fpn_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_fpn() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_gc( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.gc.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.gc.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_gc() enter:\n"); - - ia_css_gc_encode((struct sh_css_isp_gc_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->gc_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_gc() leave:\n"); - } - } - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->vamem1.gc.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->vamem1.gc.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_gc() enter:\n"); - - ia_css_gc_vamem_encode((struct sh_css_isp_gc_vamem_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VAMEM1].address[offset], - ¶ms->gc_table, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VAMEM1] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_gc() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_ce( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.ce.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.ce.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ce() enter:\n"); - - ia_css_ce_encode((struct sh_css_isp_ce_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->ce_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ce() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_yuv2rgb( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.yuv2rgb.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.yuv2rgb.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_yuv2rgb() enter:\n"); - - ia_css_yuv2rgb_encode((struct sh_css_isp_csc_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->yuv2rgb_cc_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_yuv2rgb() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_rgb2yuv( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.rgb2yuv.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.rgb2yuv.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_rgb2yuv() enter:\n"); - - ia_css_rgb2yuv_encode((struct sh_css_isp_csc_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->rgb2yuv_cc_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_rgb2yuv() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_r_gamma( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->vamem0.r_gamma.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->vamem0.r_gamma.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_r_gamma() enter:\n"); - - ia_css_r_gamma_vamem_encode((struct sh_css_isp_rgb_gamma_vamem_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VAMEM0].address[offset], - ¶ms->r_gamma_table, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VAMEM0] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_r_gamma() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_g_gamma( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->vamem1.g_gamma.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->vamem1.g_gamma.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_g_gamma() enter:\n"); - - ia_css_g_gamma_vamem_encode((struct sh_css_isp_rgb_gamma_vamem_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VAMEM1].address[offset], - ¶ms->g_gamma_table, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VAMEM1] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_g_gamma() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_b_gamma( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->vamem2.b_gamma.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->vamem2.b_gamma.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_b_gamma() enter:\n"); - - ia_css_b_gamma_vamem_encode((struct sh_css_isp_rgb_gamma_vamem_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VAMEM2].address[offset], - ¶ms->b_gamma_table, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VAMEM2] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_b_gamma() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_uds( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.uds.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.uds.offset; - - if (size) { - struct sh_css_sp_uds_params *p; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_uds() enter:\n"); - - p = (struct sh_css_sp_uds_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset]; - p->crop_pos = params->uds_config.crop_pos; - p->uds = params->uds_config.uds; - - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_uds() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_raa( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.raa.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.raa.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_raa() enter:\n"); - - ia_css_raa_encode((struct sh_css_isp_aa_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->raa_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_raa() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_s3a( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.s3a.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.s3a.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_s3a() enter:\n"); - - ia_css_s3a_encode((struct sh_css_isp_s3a_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->s3a_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_s3a() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_ob( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.ob.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.ob.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ob() enter:\n"); - - ia_css_ob_encode((struct sh_css_isp_ob_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->ob_config, - ¶ms->stream_configs.ob, size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ob() leave:\n"); - } - } - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->vmem.ob.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->vmem.ob.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ob() enter:\n"); - - ia_css_ob_vmem_encode((struct sh_css_isp_ob_vmem_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], - ¶ms->ob_config, - ¶ms->stream_configs.ob, size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ob() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_output( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.output.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.output.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_output() enter:\n"); - - ia_css_output_encode((struct sh_css_isp_output_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->output_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_output() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_sc( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.sc.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.sc.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sc() enter:\n"); - - ia_css_sc_encode((struct sh_css_isp_sc_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->sc_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sc() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_bds( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.bds.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.bds.offset; - - if (size) { - struct sh_css_isp_bds_params *p; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_bds() enter:\n"); - - p = (struct sh_css_isp_bds_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset]; - p->baf_strength = params->bds_config.strength; - - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_bds() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_tnr( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.tnr.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.tnr.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_tnr() enter:\n"); - - ia_css_tnr_encode((struct sh_css_isp_tnr_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->tnr_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_tnr() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_macc( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.macc.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.macc.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_macc() enter:\n"); - - ia_css_macc_encode((struct sh_css_isp_macc_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->macc_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_macc() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_sdis_horicoef( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->vmem.sdis_horicoef.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->vmem.sdis_horicoef.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_sdis_horicoef() enter:\n"); - - ia_css_sdis_horicoef_vmem_encode((struct sh_css_isp_sdis_hori_coef_tbl *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], - ¶ms->dvs_coefs, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_sdis_horicoef() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_sdis_vertcoef( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->vmem.sdis_vertcoef.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->vmem.sdis_vertcoef.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_sdis_vertcoef() enter:\n"); - - ia_css_sdis_vertcoef_vmem_encode((struct sh_css_isp_sdis_vert_coef_tbl *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], - ¶ms->dvs_coefs, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_sdis_vertcoef() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_sdis_horiproj( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.sdis_horiproj.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.sdis_horiproj.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_sdis_horiproj() enter:\n"); - - ia_css_sdis_horiproj_encode((struct sh_css_isp_sdis_hori_proj_tbl *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->dvs_coefs, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_sdis_horiproj() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_sdis_vertproj( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.sdis_vertproj.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.sdis_vertproj.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_sdis_vertproj() enter:\n"); - - ia_css_sdis_vertproj_encode((struct sh_css_isp_sdis_vert_proj_tbl *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->dvs_coefs, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_sdis_vertproj() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_sdis2_horicoef( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->vmem.sdis2_horicoef.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->vmem.sdis2_horicoef.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_sdis2_horicoef() enter:\n"); - - ia_css_sdis2_horicoef_vmem_encode((struct sh_css_isp_sdis_hori_coef_tbl *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], - ¶ms->dvs2_coefs, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_sdis2_horicoef() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_sdis2_vertcoef( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->vmem.sdis2_vertcoef.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->vmem.sdis2_vertcoef.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_sdis2_vertcoef() enter:\n"); - - ia_css_sdis2_vertcoef_vmem_encode((struct sh_css_isp_sdis_vert_coef_tbl *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], - ¶ms->dvs2_coefs, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_sdis2_vertcoef() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_sdis2_horiproj( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.sdis2_horiproj.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.sdis2_horiproj.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_sdis2_horiproj() enter:\n"); - - ia_css_sdis2_horiproj_encode((struct sh_css_isp_sdis_hori_proj_tbl *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->dvs2_coefs, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_sdis2_horiproj() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_sdis2_vertproj( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.sdis2_vertproj.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.sdis2_vertproj.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_sdis2_vertproj() enter:\n"); - - ia_css_sdis2_vertproj_encode((struct sh_css_isp_sdis_vert_proj_tbl *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->dvs2_coefs, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_sdis2_vertproj() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_wb( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.wb.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.wb.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_wb() enter:\n"); - - ia_css_wb_encode((struct sh_css_isp_wb_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->wb_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_wb() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_nr( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.nr.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.nr.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_nr() enter:\n"); - - ia_css_nr_encode((struct sh_css_isp_ynr_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->nr_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_nr() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_yee( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.yee.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.yee.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_yee() enter:\n"); - - ia_css_yee_encode((struct sh_css_isp_yee_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->yee_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_yee() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_ynr( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.ynr.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.ynr.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_ynr() enter:\n"); - - ia_css_ynr_encode((struct sh_css_isp_yee2_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->ynr_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_ynr() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_fc( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.fc.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.fc.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_fc() enter:\n"); - - ia_css_fc_encode((struct sh_css_isp_fc_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->fc_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_fc() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_ctc( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.ctc.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.ctc.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_ctc() enter:\n"); - - ia_css_ctc_encode((struct sh_css_isp_ctc_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->ctc_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_ctc() leave:\n"); - } - } - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->vamem0.ctc.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->vamem0.ctc.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_ctc() enter:\n"); - - ia_css_ctc_vamem_encode((struct sh_css_isp_ctc_vamem_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VAMEM0].address[offset], - ¶ms->ctc_table, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VAMEM0] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_ctc() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_xnr_table( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->vamem1.xnr_table.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->vamem1.xnr_table.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_xnr_table() enter:\n"); - - ia_css_xnr_table_vamem_encode((struct sh_css_isp_xnr_vamem_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VAMEM1].address[offset], - ¶ms->xnr_table, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VAMEM1] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_xnr_table() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_xnr( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.xnr.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.xnr.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_xnr() enter:\n"); - - ia_css_xnr_encode((struct sh_css_isp_xnr_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->xnr_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_xnr() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_xnr3( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.xnr3.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.xnr3.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_xnr3() enter:\n"); - - ia_css_xnr3_encode((struct sh_css_isp_xnr3_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->xnr3_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_xnr3() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_param_process_table() */ - -void (*ia_css_kernel_process_param[IA_CSS_NUM_PARAMETER_IDS])( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) = { - ia_css_process_aa, - ia_css_process_anr, - ia_css_process_anr2, - ia_css_process_bh, - ia_css_process_cnr, - ia_css_process_crop, - ia_css_process_csc, - ia_css_process_dp, - ia_css_process_bnr, - ia_css_process_de, - ia_css_process_ecd, - ia_css_process_formats, - ia_css_process_fpn, - ia_css_process_gc, - ia_css_process_ce, - ia_css_process_yuv2rgb, - ia_css_process_rgb2yuv, - ia_css_process_r_gamma, - ia_css_process_g_gamma, - ia_css_process_b_gamma, - ia_css_process_uds, - ia_css_process_raa, - ia_css_process_s3a, - ia_css_process_ob, - ia_css_process_output, - ia_css_process_sc, - ia_css_process_bds, - ia_css_process_tnr, - ia_css_process_macc, - ia_css_process_sdis_horicoef, - ia_css_process_sdis_vertcoef, - ia_css_process_sdis_horiproj, - ia_css_process_sdis_vertproj, - ia_css_process_sdis2_horicoef, - ia_css_process_sdis2_vertcoef, - ia_css_process_sdis2_horiproj, - ia_css_process_sdis2_vertproj, - ia_css_process_wb, - ia_css_process_nr, - ia_css_process_yee, - ia_css_process_ynr, - ia_css_process_fc, - ia_css_process_ctc, - ia_css_process_xnr_table, - ia_css_process_xnr, - ia_css_process_xnr3, -}; - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_dp_config(const struct ia_css_isp_parameters *params, - struct ia_css_dp_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_dp_config() enter: config=%p\n", - config); - - *config = params->dp_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_dp_config() leave\n"); - ia_css_dp_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_dp_config(struct ia_css_isp_parameters *params, - const struct ia_css_dp_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_dp_config() enter:\n"); - ia_css_dp_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->dp_config = *config; - params->config_changed[IA_CSS_DP_ID] = true; - params->config_changed[IA_CSS_DP_ID] = true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_dp_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_wb_config(const struct ia_css_isp_parameters *params, - struct ia_css_wb_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_wb_config() enter: config=%p\n", - config); - - *config = params->wb_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_wb_config() leave\n"); - ia_css_wb_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_wb_config(struct ia_css_isp_parameters *params, - const struct ia_css_wb_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_wb_config() enter:\n"); - ia_css_wb_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->wb_config = *config; - params->config_changed[IA_CSS_WB_ID] = true; - params->config_changed[IA_CSS_WB_ID] = true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_wb_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_tnr_config(const struct ia_css_isp_parameters *params, - struct ia_css_tnr_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_tnr_config() enter: config=%p\n", - config); - - *config = params->tnr_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_tnr_config() leave\n"); - ia_css_tnr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_tnr_config(struct ia_css_isp_parameters *params, - const struct ia_css_tnr_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_tnr_config() enter:\n"); - ia_css_tnr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->tnr_config = *config; - params->config_changed[IA_CSS_TNR_ID] = true; - params->config_changed[IA_CSS_TNR_ID] = true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_tnr_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_ob_config(const struct ia_css_isp_parameters *params, - struct ia_css_ob_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_ob_config() enter: config=%p\n", - config); - - *config = params->ob_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_ob_config() leave\n"); - ia_css_ob_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_ob_config(struct ia_css_isp_parameters *params, - const struct ia_css_ob_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_ob_config() enter:\n"); - ia_css_ob_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->ob_config = *config; - params->config_changed[IA_CSS_OB_ID] = true; - params->config_changed[IA_CSS_OB_ID] = true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_ob_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_de_config(const struct ia_css_isp_parameters *params, - struct ia_css_de_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_de_config() enter: config=%p\n", - config); - - *config = params->de_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_de_config() leave\n"); - ia_css_de_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_de_config(struct ia_css_isp_parameters *params, - const struct ia_css_de_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_de_config() enter:\n"); - ia_css_de_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->de_config = *config; - params->config_changed[IA_CSS_DE_ID] = true; - params->config_changed[IA_CSS_DE_ID] = true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_de_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_anr_config(const struct ia_css_isp_parameters *params, - struct ia_css_anr_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_anr_config() enter: config=%p\n", - config); - - *config = params->anr_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_anr_config() leave\n"); - ia_css_anr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_anr_config(struct ia_css_isp_parameters *params, - const struct ia_css_anr_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_anr_config() enter:\n"); - ia_css_anr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->anr_config = *config; - params->config_changed[IA_CSS_ANR_ID] = true; - params->config_changed[IA_CSS_ANR_ID] = true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_anr_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_anr2_config(const struct ia_css_isp_parameters *params, - struct ia_css_anr_thres *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_anr2_config() enter: config=%p\n", - config); - - *config = params->anr_thres; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_anr2_config() leave\n"); - ia_css_anr2_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_anr2_config(struct ia_css_isp_parameters *params, - const struct ia_css_anr_thres *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_anr2_config() enter:\n"); - ia_css_anr2_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->anr_thres = *config; - params->config_changed[IA_CSS_ANR2_ID] = true; - params->config_changed[IA_CSS_ANR2_ID] = true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_anr2_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_ce_config(const struct ia_css_isp_parameters *params, - struct ia_css_ce_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_ce_config() enter: config=%p\n", - config); - - *config = params->ce_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_ce_config() leave\n"); - ia_css_ce_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_ce_config(struct ia_css_isp_parameters *params, - const struct ia_css_ce_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_ce_config() enter:\n"); - ia_css_ce_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->ce_config = *config; - params->config_changed[IA_CSS_CE_ID] = true; - params->config_changed[IA_CSS_CE_ID] = true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_ce_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_ecd_config(const struct ia_css_isp_parameters *params, - struct ia_css_ecd_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_ecd_config() enter: config=%p\n", - config); - - *config = params->ecd_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_ecd_config() leave\n"); - ia_css_ecd_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_ecd_config(struct ia_css_isp_parameters *params, - const struct ia_css_ecd_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_ecd_config() enter:\n"); - ia_css_ecd_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->ecd_config = *config; - params->config_changed[IA_CSS_ECD_ID] = true; - params->config_changed[IA_CSS_ECD_ID] = true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_ecd_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_ynr_config(const struct ia_css_isp_parameters *params, - struct ia_css_ynr_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_ynr_config() enter: config=%p\n", - config); - - *config = params->ynr_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_ynr_config() leave\n"); - ia_css_ynr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_ynr_config(struct ia_css_isp_parameters *params, - const struct ia_css_ynr_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_ynr_config() enter:\n"); - ia_css_ynr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->ynr_config = *config; - params->config_changed[IA_CSS_YNR_ID] = true; - params->config_changed[IA_CSS_YNR_ID] = true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_ynr_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_fc_config(const struct ia_css_isp_parameters *params, - struct ia_css_fc_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_fc_config() enter: config=%p\n", - config); - - *config = params->fc_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_fc_config() leave\n"); - ia_css_fc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_fc_config(struct ia_css_isp_parameters *params, - const struct ia_css_fc_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_fc_config() enter:\n"); - ia_css_fc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->fc_config = *config; - params->config_changed[IA_CSS_FC_ID] = true; - params->config_changed[IA_CSS_FC_ID] = true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_fc_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_cnr_config(const struct ia_css_isp_parameters *params, - struct ia_css_cnr_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_cnr_config() enter: config=%p\n", - config); - - *config = params->cnr_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_cnr_config() leave\n"); - ia_css_cnr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_cnr_config(struct ia_css_isp_parameters *params, - const struct ia_css_cnr_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_cnr_config() enter:\n"); - ia_css_cnr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->cnr_config = *config; - params->config_changed[IA_CSS_CNR_ID] = true; - params->config_changed[IA_CSS_CNR_ID] = true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_cnr_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_macc_config(const struct ia_css_isp_parameters *params, - struct ia_css_macc_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_macc_config() enter: config=%p\n", - config); - - *config = params->macc_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_macc_config() leave\n"); - ia_css_macc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_macc_config(struct ia_css_isp_parameters *params, - const struct ia_css_macc_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_macc_config() enter:\n"); - ia_css_macc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->macc_config = *config; - params->config_changed[IA_CSS_MACC_ID] = true; - params->config_changed[IA_CSS_MACC_ID] = true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_macc_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_ctc_config(const struct ia_css_isp_parameters *params, - struct ia_css_ctc_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_ctc_config() enter: config=%p\n", - config); - - *config = params->ctc_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_ctc_config() leave\n"); - ia_css_ctc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_ctc_config(struct ia_css_isp_parameters *params, - const struct ia_css_ctc_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_ctc_config() enter:\n"); - ia_css_ctc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->ctc_config = *config; - params->config_changed[IA_CSS_CTC_ID] = true; - params->config_changed[IA_CSS_CTC_ID] = true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_ctc_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_aa_config(const struct ia_css_isp_parameters *params, - struct ia_css_aa_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_aa_config() enter: config=%p\n", - config); - - *config = params->aa_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_aa_config() leave\n"); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_aa_config(struct ia_css_isp_parameters *params, - const struct ia_css_aa_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_aa_config() enter:\n"); - params->aa_config = *config; - params->config_changed[IA_CSS_AA_ID] = true; - params->config_changed[IA_CSS_AA_ID] = true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_aa_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_yuv2rgb_config(const struct ia_css_isp_parameters *params, - struct ia_css_cc_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_yuv2rgb_config() enter: config=%p\n", - config); - - *config = params->yuv2rgb_cc_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_yuv2rgb_config() leave\n"); - ia_css_yuv2rgb_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_yuv2rgb_config(struct ia_css_isp_parameters *params, - const struct ia_css_cc_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_yuv2rgb_config() enter:\n"); - ia_css_yuv2rgb_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->yuv2rgb_cc_config = *config; - params->config_changed[IA_CSS_YUV2RGB_ID] = true; - params->config_changed[IA_CSS_YUV2RGB_ID] = true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_yuv2rgb_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_rgb2yuv_config(const struct ia_css_isp_parameters *params, - struct ia_css_cc_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_rgb2yuv_config() enter: config=%p\n", - config); - - *config = params->rgb2yuv_cc_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_rgb2yuv_config() leave\n"); - ia_css_rgb2yuv_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_rgb2yuv_config(struct ia_css_isp_parameters *params, - const struct ia_css_cc_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_rgb2yuv_config() enter:\n"); - ia_css_rgb2yuv_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->rgb2yuv_cc_config = *config; - params->config_changed[IA_CSS_RGB2YUV_ID] = true; - params->config_changed[IA_CSS_RGB2YUV_ID] = true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_rgb2yuv_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_csc_config(const struct ia_css_isp_parameters *params, - struct ia_css_cc_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_csc_config() enter: config=%p\n", - config); - - *config = params->cc_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_csc_config() leave\n"); - ia_css_csc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_csc_config(struct ia_css_isp_parameters *params, - const struct ia_css_cc_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_csc_config() enter:\n"); - ia_css_csc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->cc_config = *config; - params->config_changed[IA_CSS_CSC_ID] = true; - params->config_changed[IA_CSS_CSC_ID] = true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_csc_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_nr_config(const struct ia_css_isp_parameters *params, - struct ia_css_nr_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_nr_config() enter: config=%p\n", - config); - - *config = params->nr_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_nr_config() leave\n"); - ia_css_nr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_nr_config(struct ia_css_isp_parameters *params, - const struct ia_css_nr_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_nr_config() enter:\n"); - ia_css_nr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->nr_config = *config; - params->config_changed[IA_CSS_BNR_ID] = true; - params->config_changed[IA_CSS_NR_ID] = true; - params->config_changed[IA_CSS_NR_ID] = true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_nr_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_gc_config(const struct ia_css_isp_parameters *params, - struct ia_css_gc_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_gc_config() enter: config=%p\n", - config); - - *config = params->gc_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_gc_config() leave\n"); - ia_css_gc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_gc_config(struct ia_css_isp_parameters *params, - const struct ia_css_gc_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_gc_config() enter:\n"); - ia_css_gc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->gc_config = *config; - params->config_changed[IA_CSS_GC_ID] = true; - params->config_changed[IA_CSS_GC_ID] = true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_gc_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_sdis_horicoef_config(const struct ia_css_isp_parameters *params, - struct ia_css_dvs_coefficients *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_sdis_horicoef_config() enter: config=%p\n", - config); - - *config = params->dvs_coefs; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_sdis_horicoef_config() leave\n"); - ia_css_sdis_horicoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_sdis_horicoef_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs_coefficients *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_set_sdis_horicoef_config() enter:\n"); - ia_css_sdis_horicoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->dvs_coefs = *config; - params->config_changed[IA_CSS_SDIS_HORICOEF_ID] = true; - params->config_changed[IA_CSS_SDIS_VERTCOEF_ID] = true; - params->config_changed[IA_CSS_SDIS_HORIPROJ_ID] = true; - params->config_changed[IA_CSS_SDIS_VERTPROJ_ID] = true; - params->config_changed[IA_CSS_SDIS_HORICOEF_ID] = true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_sdis_horicoef_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_sdis_vertcoef_config(const struct ia_css_isp_parameters *params, - struct ia_css_dvs_coefficients *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_sdis_vertcoef_config() enter: config=%p\n", - config); - - *config = params->dvs_coefs; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_sdis_vertcoef_config() leave\n"); - ia_css_sdis_vertcoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_sdis_vertcoef_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs_coefficients *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_set_sdis_vertcoef_config() enter:\n"); - ia_css_sdis_vertcoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->dvs_coefs = *config; - params->config_changed[IA_CSS_SDIS_HORICOEF_ID] = true; - params->config_changed[IA_CSS_SDIS_VERTCOEF_ID] = true; - params->config_changed[IA_CSS_SDIS_HORIPROJ_ID] = true; - params->config_changed[IA_CSS_SDIS_VERTPROJ_ID] = true; - params->config_changed[IA_CSS_SDIS_VERTCOEF_ID] = true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_sdis_vertcoef_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_sdis_horiproj_config(const struct ia_css_isp_parameters *params, - struct ia_css_dvs_coefficients *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_sdis_horiproj_config() enter: config=%p\n", - config); - - *config = params->dvs_coefs; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_sdis_horiproj_config() leave\n"); - ia_css_sdis_horiproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_sdis_horiproj_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs_coefficients *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_set_sdis_horiproj_config() enter:\n"); - ia_css_sdis_horiproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->dvs_coefs = *config; - params->config_changed[IA_CSS_SDIS_HORICOEF_ID] = true; - params->config_changed[IA_CSS_SDIS_VERTCOEF_ID] = true; - params->config_changed[IA_CSS_SDIS_HORIPROJ_ID] = true; - params->config_changed[IA_CSS_SDIS_VERTPROJ_ID] = true; - params->config_changed[IA_CSS_SDIS_HORIPROJ_ID] = true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_sdis_horiproj_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_sdis_vertproj_config(const struct ia_css_isp_parameters *params, - struct ia_css_dvs_coefficients *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_sdis_vertproj_config() enter: config=%p\n", - config); - - *config = params->dvs_coefs; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_sdis_vertproj_config() leave\n"); - ia_css_sdis_vertproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_sdis_vertproj_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs_coefficients *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_set_sdis_vertproj_config() enter:\n"); - ia_css_sdis_vertproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->dvs_coefs = *config; - params->config_changed[IA_CSS_SDIS_HORICOEF_ID] = true; - params->config_changed[IA_CSS_SDIS_VERTCOEF_ID] = true; - params->config_changed[IA_CSS_SDIS_HORIPROJ_ID] = true; - params->config_changed[IA_CSS_SDIS_VERTPROJ_ID] = true; - params->config_changed[IA_CSS_SDIS_VERTPROJ_ID] = true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_sdis_vertproj_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_sdis2_horicoef_config(const struct ia_css_isp_parameters *params, - struct ia_css_dvs2_coefficients *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_sdis2_horicoef_config() enter: config=%p\n", - config); - - *config = params->dvs2_coefs; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_sdis2_horicoef_config() leave\n"); - ia_css_sdis2_horicoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_sdis2_horicoef_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs2_coefficients *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_set_sdis2_horicoef_config() enter:\n"); - ia_css_sdis2_horicoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->dvs2_coefs = *config; - params->config_changed[IA_CSS_SDIS2_HORICOEF_ID] = true; - params->config_changed[IA_CSS_SDIS2_VERTCOEF_ID] = true; - params->config_changed[IA_CSS_SDIS2_HORIPROJ_ID] = true; - params->config_changed[IA_CSS_SDIS2_VERTPROJ_ID] = true; - params->config_changed[IA_CSS_SDIS2_HORICOEF_ID] = true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_sdis2_horicoef_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_sdis2_vertcoef_config(const struct ia_css_isp_parameters *params, - struct ia_css_dvs2_coefficients *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_sdis2_vertcoef_config() enter: config=%p\n", - config); - - *config = params->dvs2_coefs; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_sdis2_vertcoef_config() leave\n"); - ia_css_sdis2_vertcoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_sdis2_vertcoef_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs2_coefficients *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_set_sdis2_vertcoef_config() enter:\n"); - ia_css_sdis2_vertcoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->dvs2_coefs = *config; - params->config_changed[IA_CSS_SDIS2_HORICOEF_ID] = true; - params->config_changed[IA_CSS_SDIS2_VERTCOEF_ID] = true; - params->config_changed[IA_CSS_SDIS2_HORIPROJ_ID] = true; - params->config_changed[IA_CSS_SDIS2_VERTPROJ_ID] = true; - params->config_changed[IA_CSS_SDIS2_VERTCOEF_ID] = true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_sdis2_vertcoef_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_sdis2_horiproj_config(const struct ia_css_isp_parameters *params, - struct ia_css_dvs2_coefficients *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_sdis2_horiproj_config() enter: config=%p\n", - config); - - *config = params->dvs2_coefs; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_sdis2_horiproj_config() leave\n"); - ia_css_sdis2_horiproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_sdis2_horiproj_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs2_coefficients *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_set_sdis2_horiproj_config() enter:\n"); - ia_css_sdis2_horiproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->dvs2_coefs = *config; - params->config_changed[IA_CSS_SDIS2_HORICOEF_ID] = true; - params->config_changed[IA_CSS_SDIS2_VERTCOEF_ID] = true; - params->config_changed[IA_CSS_SDIS2_HORIPROJ_ID] = true; - params->config_changed[IA_CSS_SDIS2_VERTPROJ_ID] = true; - params->config_changed[IA_CSS_SDIS2_HORIPROJ_ID] = true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_sdis2_horiproj_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_sdis2_vertproj_config(const struct ia_css_isp_parameters *params, - struct ia_css_dvs2_coefficients *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_sdis2_vertproj_config() enter: config=%p\n", - config); - - *config = params->dvs2_coefs; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_sdis2_vertproj_config() leave\n"); - ia_css_sdis2_vertproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_sdis2_vertproj_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs2_coefficients *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_set_sdis2_vertproj_config() enter:\n"); - ia_css_sdis2_vertproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->dvs2_coefs = *config; - params->config_changed[IA_CSS_SDIS2_HORICOEF_ID] = true; - params->config_changed[IA_CSS_SDIS2_VERTCOEF_ID] = true; - params->config_changed[IA_CSS_SDIS2_HORIPROJ_ID] = true; - params->config_changed[IA_CSS_SDIS2_VERTPROJ_ID] = true; - params->config_changed[IA_CSS_SDIS2_VERTPROJ_ID] = true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_sdis2_vertproj_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_r_gamma_config(const struct ia_css_isp_parameters *params, - struct ia_css_rgb_gamma_table *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_r_gamma_config() enter: config=%p\n", - config); - - *config = params->r_gamma_table; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_r_gamma_config() leave\n"); - ia_css_r_gamma_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_r_gamma_config(struct ia_css_isp_parameters *params, - const struct ia_css_rgb_gamma_table *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_r_gamma_config() enter:\n"); - ia_css_r_gamma_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->r_gamma_table = *config; - params->config_changed[IA_CSS_R_GAMMA_ID] = true; - params->config_changed[IA_CSS_R_GAMMA_ID] = true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_r_gamma_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_g_gamma_config(const struct ia_css_isp_parameters *params, - struct ia_css_rgb_gamma_table *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_g_gamma_config() enter: config=%p\n", - config); - - *config = params->g_gamma_table; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_g_gamma_config() leave\n"); - ia_css_g_gamma_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_g_gamma_config(struct ia_css_isp_parameters *params, - const struct ia_css_rgb_gamma_table *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_g_gamma_config() enter:\n"); - ia_css_g_gamma_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->g_gamma_table = *config; - params->config_changed[IA_CSS_G_GAMMA_ID] = true; - params->config_changed[IA_CSS_G_GAMMA_ID] = true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_g_gamma_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_b_gamma_config(const struct ia_css_isp_parameters *params, - struct ia_css_rgb_gamma_table *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_b_gamma_config() enter: config=%p\n", - config); - - *config = params->b_gamma_table; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_b_gamma_config() leave\n"); - ia_css_b_gamma_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_b_gamma_config(struct ia_css_isp_parameters *params, - const struct ia_css_rgb_gamma_table *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_b_gamma_config() enter:\n"); - ia_css_b_gamma_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->b_gamma_table = *config; - params->config_changed[IA_CSS_B_GAMMA_ID] = true; - params->config_changed[IA_CSS_B_GAMMA_ID] = true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_b_gamma_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_xnr_table_config(const struct ia_css_isp_parameters *params, - struct ia_css_xnr_table *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_xnr_table_config() enter: config=%p\n", - config); - - *config = params->xnr_table; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_xnr_table_config() leave\n"); - ia_css_xnr_table_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_xnr_table_config(struct ia_css_isp_parameters *params, - const struct ia_css_xnr_table *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_set_xnr_table_config() enter:\n"); - ia_css_xnr_table_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->xnr_table = *config; - params->config_changed[IA_CSS_XNR_TABLE_ID] = true; - params->config_changed[IA_CSS_XNR_TABLE_ID] = true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_xnr_table_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_formats_config(const struct ia_css_isp_parameters *params, - struct ia_css_formats_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_formats_config() enter: config=%p\n", - config); - - *config = params->formats_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_formats_config() leave\n"); - ia_css_formats_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_formats_config(struct ia_css_isp_parameters *params, - const struct ia_css_formats_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_formats_config() enter:\n"); - ia_css_formats_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->formats_config = *config; - params->config_changed[IA_CSS_FORMATS_ID] = true; - params->config_changed[IA_CSS_FORMATS_ID] = true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_formats_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_xnr_config(const struct ia_css_isp_parameters *params, - struct ia_css_xnr_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_xnr_config() enter: config=%p\n", - config); - - *config = params->xnr_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_xnr_config() leave\n"); - ia_css_xnr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_xnr_config(struct ia_css_isp_parameters *params, - const struct ia_css_xnr_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_xnr_config() enter:\n"); - ia_css_xnr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->xnr_config = *config; - params->config_changed[IA_CSS_XNR_ID] = true; - params->config_changed[IA_CSS_XNR_ID] = true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_xnr_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_xnr3_config(const struct ia_css_isp_parameters *params, - struct ia_css_xnr3_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_xnr3_config() enter: config=%p\n", - config); - - *config = params->xnr3_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_xnr3_config() leave\n"); - ia_css_xnr3_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_xnr3_config(struct ia_css_isp_parameters *params, - const struct ia_css_xnr3_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_xnr3_config() enter:\n"); - ia_css_xnr3_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->xnr3_config = *config; - params->config_changed[IA_CSS_XNR3_ID] = true; - params->config_changed[IA_CSS_XNR3_ID] = true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_xnr3_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_s3a_config(const struct ia_css_isp_parameters *params, - struct ia_css_3a_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_s3a_config() enter: config=%p\n", - config); - - *config = params->s3a_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_s3a_config() leave\n"); - ia_css_s3a_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_s3a_config(struct ia_css_isp_parameters *params, - const struct ia_css_3a_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_s3a_config() enter:\n"); - ia_css_s3a_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->s3a_config = *config; - params->config_changed[IA_CSS_BH_ID] = true; - params->config_changed[IA_CSS_S3A_ID] = true; - params->config_changed[IA_CSS_S3A_ID] = true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_s3a_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_output_config(const struct ia_css_isp_parameters *params, - struct ia_css_output_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_output_config() enter: config=%p\n", - config); - - *config = params->output_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_output_config() leave\n"); - ia_css_output_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_output_config(struct ia_css_isp_parameters *params, - const struct ia_css_output_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_output_config() enter:\n"); - ia_css_output_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->output_config = *config; - params->config_changed[IA_CSS_OUTPUT_ID] = true; - params->config_changed[IA_CSS_OUTPUT_ID] = true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_output_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_global_access_function() */ - -void -ia_css_get_configs(struct ia_css_isp_parameters *params, - const struct ia_css_isp_config *config) -{ - ia_css_get_dp_config(params, config->dp_config); - ia_css_get_wb_config(params, config->wb_config); - ia_css_get_tnr_config(params, config->tnr_config); - ia_css_get_ob_config(params, config->ob_config); - ia_css_get_de_config(params, config->de_config); - ia_css_get_anr_config(params, config->anr_config); - ia_css_get_anr2_config(params, config->anr_thres); - ia_css_get_ce_config(params, config->ce_config); - ia_css_get_ecd_config(params, config->ecd_config); - ia_css_get_ynr_config(params, config->ynr_config); - ia_css_get_fc_config(params, config->fc_config); - ia_css_get_cnr_config(params, config->cnr_config); - ia_css_get_macc_config(params, config->macc_config); - ia_css_get_ctc_config(params, config->ctc_config); - ia_css_get_aa_config(params, config->aa_config); - ia_css_get_yuv2rgb_config(params, config->yuv2rgb_cc_config); - ia_css_get_rgb2yuv_config(params, config->rgb2yuv_cc_config); - ia_css_get_csc_config(params, config->cc_config); - ia_css_get_nr_config(params, config->nr_config); - ia_css_get_gc_config(params, config->gc_config); - ia_css_get_sdis_horicoef_config(params, config->dvs_coefs); - ia_css_get_sdis_vertcoef_config(params, config->dvs_coefs); - ia_css_get_sdis_horiproj_config(params, config->dvs_coefs); - ia_css_get_sdis_vertproj_config(params, config->dvs_coefs); - ia_css_get_sdis2_horicoef_config(params, config->dvs2_coefs); - ia_css_get_sdis2_vertcoef_config(params, config->dvs2_coefs); - ia_css_get_sdis2_horiproj_config(params, config->dvs2_coefs); - ia_css_get_sdis2_vertproj_config(params, config->dvs2_coefs); - ia_css_get_r_gamma_config(params, config->r_gamma_table); - ia_css_get_g_gamma_config(params, config->g_gamma_table); - ia_css_get_b_gamma_config(params, config->b_gamma_table); - ia_css_get_xnr_table_config(params, config->xnr_table); - ia_css_get_formats_config(params, config->formats_config); - ia_css_get_xnr_config(params, config->xnr_config); - ia_css_get_xnr3_config(params, config->xnr3_config); - ia_css_get_s3a_config(params, config->s3a_config); - ia_css_get_output_config(params, config->output_config); -} - -/* Code generated by genparam/gencode.c:gen_global_access_function() */ - -void -ia_css_set_configs(struct ia_css_isp_parameters *params, - const struct ia_css_isp_config *config) -{ - ia_css_set_dp_config(params, config->dp_config); - ia_css_set_wb_config(params, config->wb_config); - ia_css_set_tnr_config(params, config->tnr_config); - ia_css_set_ob_config(params, config->ob_config); - ia_css_set_de_config(params, config->de_config); - ia_css_set_anr_config(params, config->anr_config); - ia_css_set_anr2_config(params, config->anr_thres); - ia_css_set_ce_config(params, config->ce_config); - ia_css_set_ecd_config(params, config->ecd_config); - ia_css_set_ynr_config(params, config->ynr_config); - ia_css_set_fc_config(params, config->fc_config); - ia_css_set_cnr_config(params, config->cnr_config); - ia_css_set_macc_config(params, config->macc_config); - ia_css_set_ctc_config(params, config->ctc_config); - ia_css_set_aa_config(params, config->aa_config); - ia_css_set_yuv2rgb_config(params, config->yuv2rgb_cc_config); - ia_css_set_rgb2yuv_config(params, config->rgb2yuv_cc_config); - ia_css_set_csc_config(params, config->cc_config); - ia_css_set_nr_config(params, config->nr_config); - ia_css_set_gc_config(params, config->gc_config); - ia_css_set_sdis_horicoef_config(params, config->dvs_coefs); - ia_css_set_sdis_vertcoef_config(params, config->dvs_coefs); - ia_css_set_sdis_horiproj_config(params, config->dvs_coefs); - ia_css_set_sdis_vertproj_config(params, config->dvs_coefs); - ia_css_set_sdis2_horicoef_config(params, config->dvs2_coefs); - ia_css_set_sdis2_vertcoef_config(params, config->dvs2_coefs); - ia_css_set_sdis2_horiproj_config(params, config->dvs2_coefs); - ia_css_set_sdis2_vertproj_config(params, config->dvs2_coefs); - ia_css_set_r_gamma_config(params, config->r_gamma_table); - ia_css_set_g_gamma_config(params, config->g_gamma_table); - ia_css_set_b_gamma_config(params, config->b_gamma_table); - ia_css_set_xnr_table_config(params, config->xnr_table); - ia_css_set_formats_config(params, config->formats_config); - ia_css_set_xnr_config(params, config->xnr_config); - ia_css_set_xnr3_config(params, config->xnr3_config); - ia_css_set_s3a_config(params, config->s3a_config); - ia_css_set_output_config(params, config->output_config); -} diff --git a/drivers/staging/media/atomisp/pci/css_2401_system/hive/ia_css_isp_configs.c b/drivers/staging/media/atomisp/pci/css_2401_system/hive/ia_css_isp_configs.c deleted file mode 100644 index 1a021ae841fe..000000000000 --- a/drivers/staging/media/atomisp/pci/css_2401_system/hive/ia_css_isp_configs.c +++ /dev/null @@ -1,386 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -/* Generated code: do not edit or commmit. */ - -#define IA_CSS_INCLUDE_CONFIGURATIONS -#include "ia_css_pipeline.h" -#include "ia_css_isp_configs.h" -#include "ia_css_debug.h" -#include "assert_support.h" - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_iterator( - const struct ia_css_binary *binary, - const struct ia_css_iterator_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_iterator() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.iterator.size; - offset = binary->info->mem_offsets.offsets.config->dmem.iterator.offset; - } - if (size) { - ia_css_iterator_config((struct sh_css_isp_iterator_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_iterator() leave:\n"); -} - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_copy_output( - const struct ia_css_binary *binary, - const struct ia_css_copy_output_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_copy_output() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.copy_output.size; - offset = binary->info->mem_offsets.offsets.config->dmem.copy_output.offset; - } - if (size) { - ia_css_copy_output_config((struct sh_css_isp_copy_output_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_copy_output() leave:\n"); -} - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_crop( - const struct ia_css_binary *binary, - const struct ia_css_crop_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_crop() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.crop.size; - offset = binary->info->mem_offsets.offsets.config->dmem.crop.offset; - } - if (size) { - ia_css_crop_config((struct sh_css_isp_crop_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_crop() leave:\n"); -} - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_fpn( - const struct ia_css_binary *binary, - const struct ia_css_fpn_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_fpn() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.fpn.size; - offset = binary->info->mem_offsets.offsets.config->dmem.fpn.offset; - } - if (size) { - ia_css_fpn_config((struct sh_css_isp_fpn_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_fpn() leave:\n"); -} - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_dvs( - const struct ia_css_binary *binary, - const struct ia_css_dvs_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_dvs() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.dvs.size; - offset = binary->info->mem_offsets.offsets.config->dmem.dvs.offset; - } - if (size) { - ia_css_dvs_config((struct sh_css_isp_dvs_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_dvs() leave:\n"); -} - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_qplane( - const struct ia_css_binary *binary, - const struct ia_css_qplane_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_qplane() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.qplane.size; - offset = binary->info->mem_offsets.offsets.config->dmem.qplane.offset; - } - if (size) { - ia_css_qplane_config((struct sh_css_isp_qplane_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_qplane() leave:\n"); -} - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_output0( - const struct ia_css_binary *binary, - const struct ia_css_output0_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_output0() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.output0.size; - offset = binary->info->mem_offsets.offsets.config->dmem.output0.offset; - } - if (size) { - ia_css_output0_config((struct sh_css_isp_output_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_output0() leave:\n"); -} - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_output1( - const struct ia_css_binary *binary, - const struct ia_css_output1_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_output1() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.output1.size; - offset = binary->info->mem_offsets.offsets.config->dmem.output1.offset; - } - if (size) { - ia_css_output1_config((struct sh_css_isp_output_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_output1() leave:\n"); -} - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_output( - const struct ia_css_binary *binary, - const struct ia_css_output_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_output() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.output.size; - offset = binary->info->mem_offsets.offsets.config->dmem.output.offset; - } - if (size) { - ia_css_output_config((struct sh_css_isp_output_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_output() leave:\n"); -} - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_raw( - const struct ia_css_binary *binary, - const struct ia_css_raw_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_raw() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.raw.size; - offset = binary->info->mem_offsets.offsets.config->dmem.raw.offset; - } - if (size) { - ia_css_raw_config((struct sh_css_isp_raw_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_raw() leave:\n"); -} - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_tnr( - const struct ia_css_binary *binary, - const struct ia_css_tnr_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_tnr() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.tnr.size; - offset = binary->info->mem_offsets.offsets.config->dmem.tnr.offset; - } - if (size) { - ia_css_tnr_config((struct sh_css_isp_tnr_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_tnr() leave:\n"); -} - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_ref( - const struct ia_css_binary *binary, - const struct ia_css_ref_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_ref() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.ref.size; - offset = binary->info->mem_offsets.offsets.config->dmem.ref.offset; - } - if (size) { - ia_css_ref_config((struct sh_css_isp_ref_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_ref() leave:\n"); -} - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_vf( - const struct ia_css_binary *binary, - const struct ia_css_vf_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_vf() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.vf.size; - offset = binary->info->mem_offsets.offsets.config->dmem.vf.offset; - } - if (size) { - ia_css_vf_config((struct sh_css_isp_vf_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_vf() leave:\n"); -} diff --git a/drivers/staging/media/atomisp/pci/css_2401_system/hive/ia_css_isp_states.c b/drivers/staging/media/atomisp/pci/css_2401_system/hive/ia_css_isp_states.c deleted file mode 100644 index 514ffe0303cb..000000000000 --- a/drivers/staging/media/atomisp/pci/css_2401_system/hive/ia_css_isp_states.c +++ /dev/null @@ -1,224 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -/* Generated code: do not edit or commmit. */ - -#include "ia_css_pipeline.h" -#include "ia_css_isp_states.h" -#include "ia_css_debug.h" -#include "assert_support.h" - -/* Code generated by genparam/genstate.c:gen_init_function() */ - -static void -ia_css_initialize_aa_state( - const struct ia_css_binary *binary) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_initialize_aa_state() enter:\n"); - - { - unsigned int size = binary->info->mem_offsets.offsets.state->vmem.aa.size; - unsigned int offset = binary->info->mem_offsets.offsets.state->vmem.aa.offset; - - if (size) - memset(&binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], - 0, size); - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_initialize_aa_state() leave:\n"); -} - -/* Code generated by genparam/genstate.c:gen_init_function() */ - -static void -ia_css_initialize_cnr_state( - const struct ia_css_binary *binary) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_initialize_cnr_state() enter:\n"); - - { - unsigned int size = binary->info->mem_offsets.offsets.state->vmem.cnr.size; - - unsigned int offset = binary->info->mem_offsets.offsets.state->vmem.cnr.offset; - - if (size) { - ia_css_init_cnr_state( - &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], - size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_initialize_cnr_state() leave:\n"); -} - -/* Code generated by genparam/genstate.c:gen_init_function() */ - -static void -ia_css_initialize_cnr2_state( - const struct ia_css_binary *binary) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_initialize_cnr2_state() enter:\n"); - - { - unsigned int size = binary->info->mem_offsets.offsets.state->vmem.cnr2.size; - - unsigned int offset = binary->info->mem_offsets.offsets.state->vmem.cnr2.offset; - - if (size) { - ia_css_init_cnr2_state( - &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], - size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_initialize_cnr2_state() leave:\n"); -} - -/* Code generated by genparam/genstate.c:gen_init_function() */ - -static void -ia_css_initialize_dp_state( - const struct ia_css_binary *binary) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_initialize_dp_state() enter:\n"); - - { - unsigned int size = binary->info->mem_offsets.offsets.state->vmem.dp.size; - - unsigned int offset = binary->info->mem_offsets.offsets.state->vmem.dp.offset; - - if (size) { - ia_css_init_dp_state( - &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], - size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_initialize_dp_state() leave:\n"); -} - -/* Code generated by genparam/genstate.c:gen_init_function() */ - -static void -ia_css_initialize_de_state( - const struct ia_css_binary *binary) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_initialize_de_state() enter:\n"); - - { - unsigned int size = binary->info->mem_offsets.offsets.state->vmem.de.size; - - unsigned int offset = binary->info->mem_offsets.offsets.state->vmem.de.offset; - - if (size) { - ia_css_init_de_state( - &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], - size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_initialize_de_state() leave:\n"); -} - -/* Code generated by genparam/genstate.c:gen_init_function() */ - -static void -ia_css_initialize_tnr_state( - const struct ia_css_binary *binary) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_initialize_tnr_state() enter:\n"); - - { - unsigned int size = binary->info->mem_offsets.offsets.state->dmem.tnr.size; - - unsigned int offset = binary->info->mem_offsets.offsets.state->dmem.tnr.offset; - - if (size) { - ia_css_init_tnr_state((struct sh_css_isp_tnr_dmem_state *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_DMEM].address[offset], - size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_initialize_tnr_state() leave:\n"); -} - -/* Code generated by genparam/genstate.c:gen_init_function() */ - -static void -ia_css_initialize_ref_state( - const struct ia_css_binary *binary) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_initialize_ref_state() enter:\n"); - - { - unsigned int size = binary->info->mem_offsets.offsets.state->dmem.ref.size; - - unsigned int offset = binary->info->mem_offsets.offsets.state->dmem.ref.offset; - - if (size) { - ia_css_init_ref_state((struct sh_css_isp_ref_dmem_state *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_DMEM].address[offset], - size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_initialize_ref_state() leave:\n"); -} - -/* Code generated by genparam/genstate.c:gen_init_function() */ - -static void -ia_css_initialize_ynr_state( - const struct ia_css_binary *binary) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_initialize_ynr_state() enter:\n"); - - { - unsigned int size = binary->info->mem_offsets.offsets.state->vmem.ynr.size; - - unsigned int offset = binary->info->mem_offsets.offsets.state->vmem.ynr.offset; - - if (size) { - ia_css_init_ynr_state( - &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], - size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_initialize_ynr_state() leave:\n"); -} - -/* Code generated by genparam/genstate.c:gen_state_init_table() */ - -void (*ia_css_kernel_init_state[IA_CSS_NUM_STATE_IDS])( - const struct ia_css_binary *binary) = { - ia_css_initialize_aa_state, - ia_css_initialize_cnr_state, - ia_css_initialize_cnr2_state, - ia_css_initialize_dp_state, - ia_css_initialize_de_state, - ia_css_initialize_tnr_state, - ia_css_initialize_ref_state, - ia_css_initialize_ynr_state, -}; diff --git a/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/gdc.c b/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/gdc.c index 8ed1cffc5384..25e082d6a94a 100644 --- a/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/gdc.c +++ b/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/gdc.c @@ -28,10 +28,6 @@ static inline void gdc_reg_store( const unsigned int reg, const hrt_data value); -static inline hrt_data gdc_reg_load( - const gdc_ID_t ID, - const unsigned int reg); - #ifndef __INLINE_GDC__ #include "gdc_private.h" #endif /* __INLINE_GDC__ */ @@ -117,10 +113,3 @@ static inline void gdc_reg_store( ia_css_device_store_uint32(GDC_BASE[ID] + reg * sizeof(hrt_data), value); return; } - -static inline hrt_data gdc_reg_load( - const gdc_ID_t ID, - const unsigned int reg) -{ - return ia_css_device_load_uint32(GDC_BASE[ID] + reg * sizeof(hrt_data)); -} diff --git a/drivers/staging/media/atomisp/pci/ia_css_acc_types.h b/drivers/staging/media/atomisp/pci/ia_css_acc_types.h index 36583ab12e3f..d0ce2f8ba653 100644 --- a/drivers/staging/media/atomisp/pci/ia_css_acc_types.h +++ b/drivers/staging/media/atomisp/pci/ia_css_acc_types.h @@ -222,11 +222,6 @@ struct ia_css_binary_info { struct ia_css_isp_param_isp_segments mem_initializers; /* MW: Packing (related) bools in an integer ?? */ struct { - /* ISP2401 */ - u8 luma_only; - u8 input_yuv; - u8 input_raw; - u8 reduced_pipe; u8 vf_veceven; u8 dis; diff --git a/drivers/staging/media/atomisp/pci/ia_css_event_public.h b/drivers/staging/media/atomisp/pci/ia_css_event_public.h index 08ea801dd5ac..76219d741d2e 100644 --- a/drivers/staging/media/atomisp/pci/ia_css_event_public.h +++ b/drivers/staging/media/atomisp/pci/ia_css_event_public.h @@ -157,21 +157,6 @@ struct ia_css_event { int ia_css_dequeue_psys_event(struct ia_css_event *event); -/* @brief Dequeue an event from the CSS system. - * - * @param[out] event Pointer to the event struct which will be filled by - * this function if an event is available. - * @return -ENODATA if no events are - * available or - * 0 otherwise. - * - * deprecated{Use ia_css_dequeue_psys_event instead}. - * Unless the isys event queue is explicitly enabled, this function will - * dequeue both isys (EOF) and psys events (all others). - */ -int -ia_css_dequeue_event(struct ia_css_event *event); - /* @brief Dequeue an ISYS event from the CSS system. * * @param[out] event Pointer to the event struct which will be filled by @@ -182,7 +167,7 @@ ia_css_dequeue_event(struct ia_css_event *event); * * This function dequeues an event from the ISYS event queue. The queue is * between host and the CSS system. - * Unlike the ia_css_dequeue_event() function, this function can be called + * Unlike the ia_css_dequeue_psys_event() function, this function can be called * directly from an interrupt service routine (ISR) and it is safe to call * this function in parallel with other CSS API functions (but only one * call to this function should be in flight at any point in time). diff --git a/drivers/staging/media/atomisp/pci/ia_css_isp_configs.c b/drivers/staging/media/atomisp/pci/ia_css_isp_configs.c new file mode 100644 index 000000000000..d28a76a68e43 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/ia_css_isp_configs.c @@ -0,0 +1,321 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +/* Generated code: do not edit or commmit. */ + +#define IA_CSS_INCLUDE_CONFIGURATIONS +#include "ia_css_pipeline.h" +#include "ia_css_isp_configs.h" +#include "ia_css_debug.h" +#include "assert_support.h" + +int ia_css_configure_iterator(const struct ia_css_binary *binary, + const struct ia_css_iterator_configuration *config_dmem) +{ + unsigned int offset = 0; + unsigned int size = 0; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "%s:\n", __func__); + + if (!binary->info->mem_offsets.offsets.config) + return 0; + + size = binary->info->mem_offsets.offsets.config->dmem.iterator.size; + if (!size) + return 0; + + offset = binary->info->mem_offsets.offsets.config->dmem.iterator.offset; + + ia_css_iterator_config((struct sh_css_isp_iterator_isp_config *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); + return 0; +} + +int ia_css_configure_copy_output(const struct ia_css_binary *binary, + const struct ia_css_copy_output_configuration *config_dmem) +{ + unsigned int offset = 0; + unsigned int size = 0; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "%s:\n", __func__); + + if (!binary->info->mem_offsets.offsets.config) + return 0; + + size = binary->info->mem_offsets.offsets.config->dmem.copy_output.size; + if (!size) + return 0; + + offset = binary->info->mem_offsets.offsets.config->dmem.copy_output.offset; + + ia_css_copy_output_config((struct sh_css_isp_copy_output_isp_config *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); + return 0; +} + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +int ia_css_configure_crop(const struct ia_css_binary *binary, + const struct ia_css_crop_configuration *config_dmem) +{ + unsigned int offset = 0; + unsigned int size = 0; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "%s:\n", __func__); + + if (!binary->info->mem_offsets.offsets.config) + return 0; + + size = binary->info->mem_offsets.offsets.config->dmem.crop.size; + if (!size) + return 0; + + offset = binary->info->mem_offsets.offsets.config->dmem.crop.offset; + + ia_css_crop_config((struct sh_css_isp_crop_isp_config *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); + return 0; +} + +int ia_css_configure_fpn(const struct ia_css_binary *binary, + const struct ia_css_fpn_configuration *config_dmem) +{ + unsigned int offset = 0; + unsigned int size = 0; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "%s:\n", __func__); + + if (!binary->info->mem_offsets.offsets.config) + return 0; + + size = binary->info->mem_offsets.offsets.config->dmem.fpn.size; + if (!size) + return 0; + + offset = binary->info->mem_offsets.offsets.config->dmem.fpn.offset; + ia_css_fpn_config((struct sh_css_isp_fpn_isp_config *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); + return 0; +} + +int ia_css_configure_dvs(const struct ia_css_binary *binary, + const struct ia_css_dvs_configuration *config_dmem) +{ + unsigned int offset = 0; + unsigned int size = 0; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "%s:\n", __func__); + + if (!binary->info->mem_offsets.offsets.config) + return 0; + + size = binary->info->mem_offsets.offsets.config->dmem.dvs.size; + if (!size) + return 0; + + offset = binary->info->mem_offsets.offsets.config->dmem.dvs.offset; + ia_css_dvs_config((struct sh_css_isp_dvs_isp_config *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); + return 0; +} + +int ia_css_configure_qplane(const struct ia_css_binary *binary, + const struct ia_css_qplane_configuration *config_dmem) +{ + unsigned int offset = 0; + unsigned int size = 0; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "%s:\n", __func__); + + if (!binary->info->mem_offsets.offsets.config) + return 0; + + size = binary->info->mem_offsets.offsets.config->dmem.qplane.size; + if (!size) + return 0; + + offset = binary->info->mem_offsets.offsets.config->dmem.qplane.offset; + ia_css_qplane_config((struct sh_css_isp_qplane_isp_config *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); + + return 0; +} + +int ia_css_configure_output0(const struct ia_css_binary *binary, + const struct ia_css_output0_configuration *config_dmem) +{ + unsigned int offset = 0; + unsigned int size = 0; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "%s:\n", __func__); + + if (!binary->info->mem_offsets.offsets.config) + return 0; + + size = binary->info->mem_offsets.offsets.config->dmem.output0.size; + if (!size) + return 0; + + offset = binary->info->mem_offsets.offsets.config->dmem.output0.offset; + + ia_css_output0_config((struct sh_css_isp_output_isp_config *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); + return 0; +} + +int ia_css_configure_output1(const struct ia_css_binary *binary, + const struct ia_css_output1_configuration *config_dmem) +{ + unsigned int offset = 0; + unsigned int size = 0; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "%s:\n", __func__); + + if (!binary->info->mem_offsets.offsets.config) + return 0; + + size = binary->info->mem_offsets.offsets.config->dmem.output1.size; + if (!size) + return 0; + + offset = binary->info->mem_offsets.offsets.config->dmem.output1.offset; + + ia_css_output1_config((struct sh_css_isp_output_isp_config *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); + return 0; +} + +int ia_css_configure_output(const struct ia_css_binary *binary, + const struct ia_css_output_configuration *config_dmem) +{ + unsigned int offset = 0; + unsigned int size = 0; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "%s:\n", __func__); + + if (!binary->info->mem_offsets.offsets.config) + return 0; + + size = binary->info->mem_offsets.offsets.config->dmem.output.size; + if (!size) + return 0; + + offset = binary->info->mem_offsets.offsets.config->dmem.output.offset; + + ia_css_output_config((struct sh_css_isp_output_isp_config *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); + return 0; +} + +int ia_css_configure_raw(const struct ia_css_binary *binary, + const struct ia_css_raw_configuration *config_dmem) +{ + unsigned int offset = 0; + unsigned int size = 0; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "%s:\n", __func__); + + if (!binary->info->mem_offsets.offsets.config) + return 0; + + size = binary->info->mem_offsets.offsets.config->dmem.raw.size; + if (!size) + return 0; + + offset = binary->info->mem_offsets.offsets.config->dmem.raw.offset; + + ia_css_raw_config((struct sh_css_isp_raw_isp_config *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); + return 0; +} + +int ia_css_configure_tnr(const struct ia_css_binary *binary, + const struct ia_css_tnr_configuration *config_dmem) +{ + unsigned int offset = 0; + unsigned int size = 0; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "%s:\n", __func__); + + if (!binary->info->mem_offsets.offsets.config) + return 0; + + size = binary->info->mem_offsets.offsets.config->dmem.tnr.size; + if (!size) + return 0; + + offset = binary->info->mem_offsets.offsets.config->dmem.tnr.offset; + + ia_css_tnr_config((struct sh_css_isp_tnr_isp_config *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); + return 0; +} + +int ia_css_configure_ref(const struct ia_css_binary *binary, + const struct ia_css_ref_configuration *config_dmem) +{ + unsigned int offset = 0; + unsigned int size = 0; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "%s:\n", __func__); + + if (!binary->info->mem_offsets.offsets.config) + return 0; + + size = binary->info->mem_offsets.offsets.config->dmem.ref.size; + if (!size) + return 0; + + offset = binary->info->mem_offsets.offsets.config->dmem.ref.offset; + + ia_css_ref_config((struct sh_css_isp_ref_isp_config *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); + return 0; +} + +int ia_css_configure_vf(const struct ia_css_binary *binary, + const struct ia_css_vf_configuration *config_dmem) +{ + unsigned int offset = 0; + unsigned int size = 0; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "%s:\n", __func__); + + if (!binary->info->mem_offsets.offsets.config) + return 0; + + size = binary->info->mem_offsets.offsets.config->dmem.vf.size; + if (!size) + return 0; + + offset = binary->info->mem_offsets.offsets.config->dmem.vf.offset; + + ia_css_vf_config((struct sh_css_isp_vf_isp_config *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); + return 0; +} diff --git a/drivers/staging/media/atomisp/pci/ia_css_isp_configs.h b/drivers/staging/media/atomisp/pci/ia_css_isp_configs.h index 1abb2fd6a913..fffcfc871bd2 100644 --- a/drivers/staging/media/atomisp/pci/ia_css_isp_configs.h +++ b/drivers/staging/media/atomisp/pci/ia_css_isp_configs.h @@ -23,22 +23,15 @@ #include "isp/kernels/raw/raw_1.0/ia_css_raw.host.h" #include "isp/kernels/ref/ref_1.0/ia_css_ref.host.h" #include "isp/kernels/s3a/s3a_1.0/ia_css_s3a.host.h" - -/* ISP2401 */ -#include "isp/kernels/sc/sc_1.0/ia_css_sc.host.h" - #include "isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.h" #include "isp/kernels/vf/vf_1.0/ia_css_vf.host.h" #include "isp/kernels/iterator/iterator_1.0/ia_css_iterator.host.h" #include "isp/kernels/copy_output/copy_output_1.0/ia_css_copy_output.host.h" -#endif /* IA_CSS_INCLUDE_CONFIGURATIONS */ -/* Generated code: do not edit or commmit. */ +#endif #ifndef _IA_CSS_ISP_CONFIG_H #define _IA_CSS_ISP_CONFIG_H -/* Code generated by genparam/gencode.c:gen_param_enum() */ - enum ia_css_configuration_ids { IA_CSS_ITERATOR_CONFIG_ID, IA_CSS_COPY_OUTPUT_CONFIG_ID, @@ -60,8 +53,6 @@ enum ia_css_configuration_ids { IA_CSS_NUM_CONFIGURATION_IDS }; -/* Code generated by genparam/gencode.c:gen_param_offsets() */ - struct ia_css_config_memory_offsets { struct { struct ia_css_isp_parameter iterator; @@ -73,10 +64,6 @@ struct ia_css_config_memory_offsets { struct ia_css_isp_parameter output0; struct ia_css_isp_parameter output1; struct ia_css_isp_parameter output; - - /* ISP2401 */ - struct ia_css_isp_parameter sc; - struct ia_css_isp_parameter raw; struct ia_css_isp_parameter tnr; struct ia_css_isp_parameter ref; @@ -88,96 +75,44 @@ struct ia_css_config_memory_offsets { #include "ia_css_stream.h" /* struct ia_css_stream */ #include "ia_css_binary.h" /* struct ia_css_binary */ -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_iterator( - const struct ia_css_binary *binary, - const struct ia_css_iterator_configuration *config_dmem); - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_copy_output( - const struct ia_css_binary *binary, - const struct ia_css_copy_output_configuration *config_dmem); - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_crop( - const struct ia_css_binary *binary, - const struct ia_css_crop_configuration *config_dmem); - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_fpn( - const struct ia_css_binary *binary, - const struct ia_css_fpn_configuration *config_dmem); - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_dvs( - const struct ia_css_binary *binary, - const struct ia_css_dvs_configuration *config_dmem); - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_qplane( - const struct ia_css_binary *binary, - const struct ia_css_qplane_configuration *config_dmem); - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_output0( - const struct ia_css_binary *binary, - const struct ia_css_output0_configuration *config_dmem); -/* Code generated by genparam/genconfig.c:gen_configure_function() */ +int ia_css_configure_iterator(const struct ia_css_binary *binary, + const struct ia_css_iterator_configuration *config_dmem); -void -ia_css_configure_output1( - const struct ia_css_binary *binary, - const struct ia_css_output1_configuration *config_dmem); +int ia_css_configure_copy_output(const struct ia_css_binary *binary, + const struct ia_css_copy_output_configuration *config_dmem); -/* Code generated by genparam/genconfig.c:gen_configure_function() */ +int ia_css_configure_crop(const struct ia_css_binary *binary, + const struct ia_css_crop_configuration *config_dmem); -void -ia_css_configure_output( - const struct ia_css_binary *binary, - const struct ia_css_output_configuration *config_dmem); +int ia_css_configure_fpn(const struct ia_css_binary *binary, + const struct ia_css_fpn_configuration *config_dmem); -/* Code generated by genparam/genconfig.c:gen_configure_function() */ +int ia_css_configure_dvs(const struct ia_css_binary *binary, + const struct ia_css_dvs_configuration *config_dmem); -void -ia_css_configure_raw( - const struct ia_css_binary *binary, - const struct ia_css_raw_configuration *config_dmem); +int ia_css_configure_qplane(const struct ia_css_binary *binary, + const struct ia_css_qplane_configuration *config_dmem); +int ia_css_configure_output0(const struct ia_css_binary *binary, + const struct ia_css_output0_configuration *config_dmem); -/* Code generated by genparam/genconfig.c:gen_configure_function() */ +int ia_css_configure_output1(const struct ia_css_binary *binary, + const struct ia_css_output1_configuration *config_dmem); -void -ia_css_configure_tnr( - const struct ia_css_binary *binary, - const struct ia_css_tnr_configuration *config_dmem); +int ia_css_configure_output(const struct ia_css_binary *binary, + const struct ia_css_output_configuration *config_dmem); -/* Code generated by genparam/genconfig.c:gen_configure_function() */ +int ia_css_configure_raw(const struct ia_css_binary *binary, + const struct ia_css_raw_configuration *config_dmem); -void -ia_css_configure_ref( - const struct ia_css_binary *binary, - const struct ia_css_ref_configuration *config_dmem); +int ia_css_configure_tnr(const struct ia_css_binary *binary, + const struct ia_css_tnr_configuration *config_dmem); -/* Code generated by genparam/genconfig.c:gen_configure_function() */ +int ia_css_configure_ref(const struct ia_css_binary *binary, + const struct ia_css_ref_configuration *config_dmem); -void -ia_css_configure_vf( - const struct ia_css_binary *binary, - const struct ia_css_vf_configuration *config_dmem); +int ia_css_configure_vf(const struct ia_css_binary *binary, + const struct ia_css_vf_configuration *config_dmem); #endif /* IA_CSS_INCLUDE_CONFIGURATION */ diff --git a/drivers/staging/media/atomisp/pci/css_2401_system/hive/ia_css_isp_params.c b/drivers/staging/media/atomisp/pci/ia_css_isp_params.c index d9c672d8904e..503ac65da69b 100644 --- a/drivers/staging/media/atomisp/pci/css_2401_system/hive/ia_css_isp_params.c +++ b/drivers/staging/media/atomisp/pci/ia_css_isp_params.c @@ -1721,29 +1721,6 @@ ia_css_process_xnr3( "ia_css_process_xnr3() leave:\n"); } } - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->vmem.xnr3.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->vmem.xnr3.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_xnr3() enter:\n"); - - ia_css_xnr3_vmem_encode((struct sh_css_isp_xnr3_vmem_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], - ¶ms->xnr3_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_xnr3() leave:\n"); - } - } } /* Code generated by genparam/gencode.c:gen_param_process_table() */ diff --git a/drivers/staging/media/atomisp/pci/ia_css_isp_params.h b/drivers/staging/media/atomisp/pci/ia_css_isp_params.h index 6e3082b39ed6..c2de689877d1 100644 --- a/drivers/staging/media/atomisp/pci/ia_css_isp_params.h +++ b/drivers/staging/media/atomisp/pci/ia_css_isp_params.h @@ -121,9 +121,6 @@ struct ia_css_memory_offsets { struct ia_css_isp_parameter sdis_vertcoef; struct ia_css_isp_parameter sdis2_horicoef; struct ia_css_isp_parameter sdis2_vertcoef; - - /* ISP2401 */ - struct ia_css_isp_parameter xnr3; } vmem; struct { struct ia_css_isp_parameter bh; diff --git a/drivers/staging/media/atomisp/pci/css_2400_system/hive/ia_css_isp_states.c b/drivers/staging/media/atomisp/pci/ia_css_isp_states.c index a6bc2e9eddea..a6bc2e9eddea 100644 --- a/drivers/staging/media/atomisp/pci/css_2400_system/hive/ia_css_isp_states.c +++ b/drivers/staging/media/atomisp/pci/ia_css_isp_states.c diff --git a/drivers/staging/media/atomisp/pci/ia_css_pipe.h b/drivers/staging/media/atomisp/pci/ia_css_pipe.h index bb0abf9bffb1..fb58535bff40 100644 --- a/drivers/staging/media/atomisp/pci/ia_css_pipe.h +++ b/drivers/staging/media/atomisp/pci/ia_css_pipe.h @@ -33,7 +33,7 @@ struct ia_css_preview_settings { /* 2401 only for these two - do we in fact use them for anything real */ struct ia_css_frame *delay_frames[MAX_NUM_VIDEO_DELAY_FRAMES]; - struct ia_css_frame *tnr_frames[NUM_TNR_FRAMES]; + struct ia_css_frame *tnr_frames[NUM_VIDEO_TNR_FRAMES]; struct ia_css_pipe *copy_pipe; struct ia_css_pipe *capture_pipe; @@ -81,7 +81,7 @@ struct ia_css_video_settings { struct ia_css_binary vf_pp_binary; struct ia_css_binary *yuv_scaler_binary; struct ia_css_frame *delay_frames[MAX_NUM_VIDEO_DELAY_FRAMES]; - struct ia_css_frame *tnr_frames[NUM_TNR_FRAMES]; + struct ia_css_frame *tnr_frames[NUM_VIDEO_TNR_FRAMES]; struct ia_css_frame *vf_pp_in_frame; struct ia_css_pipe *copy_pipe; struct ia_css_pipe *capture_pipe; diff --git a/drivers/staging/media/atomisp/pci/ia_css_pipe_public.h b/drivers/staging/media/atomisp/pci/ia_css_pipe_public.h index 4affd21f9e3f..7352cbf779fb 100644 --- a/drivers/staging/media/atomisp/pci/ia_css_pipe_public.h +++ b/drivers/staging/media/atomisp/pci/ia_css_pipe_public.h @@ -123,9 +123,6 @@ struct ia_css_pipe_config { processing stages. */ /* ISP2401 */ - bool enable_luma_only; - /** Enabling of monochrome mode for a pipeline. If enabled only luma processing - will be done. */ bool enable_tnr; /** Enabling of TNR (temporal noise reduction). This is only applicable to video pipes. Non video-pipes should always set this parameter to false. */ @@ -482,29 +479,6 @@ ia_css_pipe_get_qos_ext_state(struct ia_css_pipe *pipe, u32 fw_handle, bool *enable); -/* ISP2401 */ -/* @brief Update mapped CSS and ISP arguments for QoS pipe during SP runtime. - * @param[in] pipe Pipe handle. - * @param[in] fw_handle Extension firmware Handle (ia_css_fw_info.handle). - * @param[in] css_seg Parameter memory descriptors for CSS segments. - * @param[in] isp_seg Parameter memory descriptors for ISP segments. - * - * @return - * 0 : Success - * -EINVAL : Invalid Parameters - * -EBUSY : Inactive QOS Pipe - * (No active stream with this pipe) - * - * \deprecated{This interface is used to temporarily support a late-developed, - * specific use-case on a specific IPU2 platform. It will not be supported or - * maintained on IPU3 or further.} - */ -int -ia_css_pipe_update_qos_ext_mapped_arg(struct ia_css_pipe *pipe, - u32 fw_handle, - struct ia_css_isp_param_css_segments *css_seg, - struct ia_css_isp_param_isp_segments *isp_seg); - /* @brief Get selected configuration settings * @param[in] pipe The pipe. * @param[out] config Configuration settings. diff --git a/drivers/staging/media/atomisp/pci/ia_css_stream.h b/drivers/staging/media/atomisp/pci/ia_css_stream.h index 70b0378748f1..cf847586dc61 100644 --- a/drivers/staging/media/atomisp/pci/ia_css_stream.h +++ b/drivers/staging/media/atomisp/pci/ia_css_stream.h @@ -18,9 +18,7 @@ #include <type_support.h> #include <system_local.h> -#if !defined(ISP2401) #include <input_system.h> -#endif #include "ia_css_types.h" #include "ia_css_stream_public.h" @@ -30,9 +28,7 @@ struct ia_css_stream { struct ia_css_stream_config config; struct ia_css_stream_info info; -#if !defined(ISP2401) rx_cfg_t csi_rx_config; -#endif bool reconfigure_css_rx; struct ia_css_pipe *last_pipe; int num_pipes; diff --git a/drivers/staging/media/atomisp/pci/ia_css_stream_public.h b/drivers/staging/media/atomisp/pci/ia_css_stream_public.h index 83846e417ae5..47846ece8d64 100644 --- a/drivers/staging/media/atomisp/pci/ia_css_stream_public.h +++ b/drivers/staging/media/atomisp/pci/ia_css_stream_public.h @@ -102,12 +102,10 @@ struct ia_css_stream_config { isys_config[IA_CSS_STREAM_MAX_ISYS_STREAM_PER_CH]; struct ia_css_stream_input_config input_config; - /* Currently, Android and Windows platforms interpret the binning_factor parameter - * differently. In Android, the binning factor is expressed in the form - * 2^N * 2^N, whereas in Windows platform, the binning factor is N*N - * To use the Windows method of specification, the caller has to define - * macro USE_WINDOWS_BINNING_FACTOR. This is for backward compatibility only - * and will be deprecated. In the future,all platforms will use the N*N method + /* + * Currently, Linux and Windows platforms interpret the binning_factor + * parameter differently. In Linux, the binning factor is expressed + * in the form 2^N * 2^N */ /* ISP2401 */ unsigned int sensor_binning_factor; /** Binning factor used by sensor @@ -202,15 +200,6 @@ int ia_css_stream_get_info(const struct ia_css_stream *stream, struct ia_css_stream_info *stream_info); -/* @brief load (rebuild) a stream that was unloaded. - * @param[in] stream The stream - * @return 0 or the error code - * - * Rebuild a stream, including allocating structs, setting configuration and - * building the required pipes. - */ -int -ia_css_stream_load(struct ia_css_stream *stream); /* @brief Starts the stream. * @param[in] stream The stream. diff --git a/drivers/staging/media/atomisp/pci/input_system_local.h b/drivers/staging/media/atomisp/pci/input_system_local.h index b33aa2838290..357987d629cd 100644 --- a/drivers/staging/media/atomisp/pci/input_system_local.h +++ b/drivers/staging/media/atomisp/pci/input_system_local.h @@ -4,6 +4,140 @@ * (c) 2020 Mauro Carvalho Chehab <mchehab+huawei@kernel.org> */ +#include "type_support.h" +#include "input_system_global.h" + +typedef enum { + INPUT_SYSTEM_PORT_A = 0, + INPUT_SYSTEM_PORT_B, + INPUT_SYSTEM_PORT_C, + N_INPUT_SYSTEM_PORTS +} input_system_csi_port_t; + +typedef struct ctrl_unit_cfg_s ctrl_unit_cfg_t; +typedef struct input_system_network_cfg_s input_system_network_cfg_t; +typedef struct target_cfg2400_s target_cfg2400_t; +typedef struct channel_cfg_s channel_cfg_t; +typedef struct backend_channel_cfg_s backend_channel_cfg_t; +typedef struct input_system_cfg2400_s input_system_cfg2400_t; +typedef struct mipi_port_state_s mipi_port_state_t; +typedef struct rx_channel_state_s rx_channel_state_t; +typedef struct input_switch_cfg_channel_s input_switch_cfg_channel_t; +typedef struct input_switch_cfg_s input_switch_cfg_t; + +struct ctrl_unit_cfg_s { + isp2400_ib_buffer_t buffer_mipi[N_CAPTURE_UNIT_ID]; + isp2400_ib_buffer_t buffer_acquire[N_ACQUISITION_UNIT_ID]; +}; + +struct input_system_network_cfg_s { + input_system_connection_t multicast_cfg[N_CAPTURE_UNIT_ID]; + input_system_multiplex_t mux_cfg; + ctrl_unit_cfg_t ctrl_unit_cfg[N_CTRL_UNIT_ID]; +}; + +typedef struct { +// TBD. + u32 dummy_parameter; +} target_isp_cfg_t; + +typedef struct { +// TBD. + u32 dummy_parameter; +} target_sp_cfg_t; + +typedef struct { +// TBD. + u32 dummy_parameter; +} target_strm2mem_cfg_t; + +struct input_switch_cfg_channel_s { + u32 hsync_data_reg[2]; + u32 vsync_data_reg; +}; + +struct backend_channel_cfg_s { + u32 fmt_control_word_1; // Format config. + u32 fmt_control_word_2; + u32 no_side_band; +}; + +typedef union { + csi_cfg_t csi_cfg; + tpg_cfg_t tpg_cfg; + prbs_cfg_t prbs_cfg; + gpfifo_cfg_t gpfifo_cfg; +} source_cfg_t; + +struct input_switch_cfg_s { + u32 hsync_data_reg[N_RX_CHANNEL_ID * 2]; + u32 vsync_data_reg; +}; + +/* + * In 2300 ports can be configured independently and stream + * formats need to be specified. In 2400, there are only 8 + * supported configurations but the HW is fused to support + * only a single one. + * + * In 2300 the compressed format types are programmed by the + * user. In 2400 all stream formats are encoded on the stream. + * + * Use the enum to check validity of a user configuration + */ +typedef enum { + MONO_4L_1L_0L = 0, + MONO_3L_1L_0L, + MONO_2L_1L_0L, + MONO_1L_1L_0L, + STEREO_2L_1L_2L, + STEREO_3L_1L_1L, + STEREO_2L_1L_1L, + STEREO_1L_1L_1L, + N_RX_MODE +} rx_mode_t; + +#define UNCOMPRESSED_BITS_PER_PIXEL_10 10 +#define UNCOMPRESSED_BITS_PER_PIXEL_12 12 +#define COMPRESSED_BITS_PER_PIXEL_6 6 +#define COMPRESSED_BITS_PER_PIXEL_7 7 +#define COMPRESSED_BITS_PER_PIXEL_8 8 +enum mipi_compressor { + MIPI_COMPRESSOR_NONE = 0, + MIPI_COMPRESSOR_10_6_10, + MIPI_COMPRESSOR_10_7_10, + MIPI_COMPRESSOR_10_8_10, + MIPI_COMPRESSOR_12_6_12, + MIPI_COMPRESSOR_12_7_12, + MIPI_COMPRESSOR_12_8_12, + N_MIPI_COMPRESSOR_METHODS +}; + +typedef enum mipi_compressor mipi_compressor_t; + +typedef enum { + MIPI_PREDICTOR_NONE = 0, + MIPI_PREDICTOR_TYPE1, + MIPI_PREDICTOR_TYPE2, + N_MIPI_PREDICTOR_TYPES +} mipi_predictor_t; + +typedef struct rx_cfg_s rx_cfg_t; + +/* + * Applied per port + */ +struct rx_cfg_s { + rx_mode_t mode; /* The HW config */ + enum mipi_port_id port; /* The port ID to apply the control on */ + unsigned int timeout; + unsigned int initcount; + unsigned int synccount; + unsigned int rxcount; + mipi_predictor_t comp; /* Just for backward compatibility */ + bool is_two_ppc; +}; + #ifdef ISP2401 # include "isp2401_input_system_local.h" #else diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/bh/bh_2/ia_css_bh.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/bh/bh_2/ia_css_bh.host.c index 82aa69b74677..2091f001502d 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/bh/bh_2/ia_css_bh.host.c +++ b/drivers/staging/media/atomisp/pci/isp/kernels/bh/bh_2/ia_css_bh.host.c @@ -13,7 +13,6 @@ * more details. */ -#if !defined(HAS_NO_HMEM) #include "ia_css_types.h" #include "sh_css_internal.h" @@ -63,4 +62,3 @@ ia_css_bh_encode( uDIGIT_FITTING(from->ae_y_coef_b, 16, SH_CSS_AE_YCOEF_SHIFT); } -#endif diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/copy_output/copy_output_1.0/ia_css_copy_output.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/copy_output/copy_output_1.0/ia_css_copy_output.host.c index 5d34f3256a43..cc415c72ad8f 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/copy_output/copy_output_1.0/ia_css_copy_output.host.c +++ b/drivers/staging/media/atomisp/pci/isp/kernels/copy_output/copy_output_1.0/ia_css_copy_output.host.c @@ -34,14 +34,12 @@ ia_css_copy_output_config( to->enable = from->enable; } -void -ia_css_copy_output_configure( - const struct ia_css_binary *binary, - bool enable) +int ia_css_copy_output_configure(const struct ia_css_binary *binary, + bool enable) { struct ia_css_copy_output_configuration config = default_config; config.enable = enable; - ia_css_configure_copy_output(binary, &config); + return ia_css_configure_copy_output(binary, &config); } diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/copy_output/copy_output_1.0/ia_css_copy_output.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/copy_output/copy_output_1.0/ia_css_copy_output.host.h index 615cb6771884..44e3e45b0ec3 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/copy_output/copy_output_1.0/ia_css_copy_output.host.h +++ b/drivers/staging/media/atomisp/pci/isp/kernels/copy_output/copy_output_1.0/ia_css_copy_output.host.h @@ -27,9 +27,7 @@ ia_css_copy_output_config( const struct ia_css_copy_output_configuration *from, unsigned int size); -void -ia_css_copy_output_configure( - const struct ia_css_binary *binary, - bool enable); +int ia_css_copy_output_configure(const struct ia_css_binary *binary, + bool enable); #endif /* __IA_CSS_COPY_OUTPUT_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/crop/crop_1.0/ia_css_crop.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/crop/crop_1.0/ia_css_crop.host.c index 38912062edd4..8c1d50f7aae4 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/crop/crop_1.0/ia_css_crop.host.c +++ b/drivers/staging/media/atomisp/pci/isp/kernels/crop/crop_1.0/ia_css_crop.host.c @@ -36,30 +36,32 @@ ia_css_crop_encode( to->crop_pos = from->crop_pos; } -void -ia_css_crop_config( - struct sh_css_isp_crop_isp_config *to, - const struct ia_css_crop_configuration *from, - unsigned int size) +int ia_css_crop_config(struct sh_css_isp_crop_isp_config *to, + const struct ia_css_crop_configuration *from, + unsigned int size) { unsigned int elems_a = ISP_VEC_NELEMS; + int ret; + + ret = ia_css_dma_configure_from_info(&to->port_b, from->info); + if (ret) + return ret; - (void)size; - ia_css_dma_configure_from_info(&to->port_b, from->info); to->width_a_over_b = elems_a / to->port_b.elems; /* Assume divisiblity here, may need to generalize to fixed point. */ - assert(elems_a % to->port_b.elems == 0); + if (elems_a % to->port_b.elems != 0) + return -EINVAL; + + return 0; } -void -ia_css_crop_configure( - const struct ia_css_binary *binary, - const struct ia_css_frame_info *info) +int ia_css_crop_configure(const struct ia_css_binary *binary, + const struct ia_css_frame_info *info) { struct ia_css_crop_configuration config = default_config; config.info = info; - ia_css_configure_crop(binary, &config); + return ia_css_configure_crop(binary, &config); } diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/crop/crop_1.0/ia_css_crop.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/crop/crop_1.0/ia_css_crop.host.h index 21a259d33256..e700149c1e95 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/crop/crop_1.0/ia_css_crop.host.h +++ b/drivers/staging/media/atomisp/pci/isp/kernels/crop/crop_1.0/ia_css_crop.host.h @@ -28,15 +28,11 @@ ia_css_crop_encode( const struct ia_css_crop_config *from, unsigned int size); -void -ia_css_crop_config( - struct sh_css_isp_crop_isp_config *to, - const struct ia_css_crop_configuration *from, - unsigned int size); +int ia_css_crop_config(struct sh_css_isp_crop_isp_config *to, + const struct ia_css_crop_configuration *from, + unsigned int size); -void -ia_css_crop_configure( - const struct ia_css_binary *binary, - const struct ia_css_frame_info *from); +int ia_css_crop_configure(const struct ia_css_binary *binary, + const struct ia_css_frame_info *from); #endif /* __IA_CSS_CROP_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/dvs/dvs_1.0/ia_css_dvs.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/dvs/dvs_1.0/ia_css_dvs.host.c index 67f5540b48b5..07ce5b4f0816 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/dvs/dvs_1.0/ia_css_dvs.host.c +++ b/drivers/staging/media/atomisp/pci/isp/kernels/dvs/dvs_1.0/ia_css_dvs.host.c @@ -46,16 +46,14 @@ ia_css_dvs_config( DVS_NUM_BLOCKS_Y(from->info->res.height); } -void -ia_css_dvs_configure( - const struct ia_css_binary *binary, - const struct ia_css_frame_info *info) +int ia_css_dvs_configure(const struct ia_css_binary *binary, + const struct ia_css_frame_info *info) { struct ia_css_dvs_configuration config = default_config; config.info = info; - ia_css_configure_dvs(binary, &config); + return ia_css_configure_dvs(binary, &config); } static void diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/dvs/dvs_1.0/ia_css_dvs.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/dvs/dvs_1.0/ia_css_dvs.host.h index f9bc17ee0f86..332aa5496c04 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/dvs/dvs_1.0/ia_css_dvs.host.h +++ b/drivers/staging/media/atomisp/pci/isp/kernels/dvs/dvs_1.0/ia_css_dvs.host.h @@ -35,10 +35,8 @@ ia_css_dvs_config( const struct ia_css_dvs_configuration *from, unsigned int size); -void -ia_css_dvs_configure( - const struct ia_css_binary *binary, - const struct ia_css_frame_info *from); +int ia_css_dvs_configure(const struct ia_css_binary *binary, + const struct ia_css_frame_info *from); void convert_dvs_6axis_config( diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/fpn/fpn_1.0/ia_css_fpn.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/fpn/fpn_1.0/ia_css_fpn.host.c index 47b5c7956fbd..57b5e11e1cfe 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/fpn/fpn_1.0/ia_css_fpn.host.c +++ b/drivers/staging/media/atomisp/pci/isp/kernels/fpn/fpn_1.0/ia_css_fpn.host.c @@ -51,26 +51,28 @@ ia_css_fpn_dump( "fpn_enabled", fpn->enabled); } -void -ia_css_fpn_config( - struct sh_css_isp_fpn_isp_config *to, - const struct ia_css_fpn_configuration *from, - unsigned int size) +int ia_css_fpn_config(struct sh_css_isp_fpn_isp_config *to, + const struct ia_css_fpn_configuration *from, + unsigned int size) { unsigned int elems_a = ISP_VEC_NELEMS; + int ret; + + ret = ia_css_dma_configure_from_info(&to->port_b, from->info); + if (ret) + return ret; - (void)size; - ia_css_dma_configure_from_info(&to->port_b, from->info); to->width_a_over_b = elems_a / to->port_b.elems; /* Assume divisiblity here, may need to generalize to fixed point. */ - assert(elems_a % to->port_b.elems == 0); + if (elems_a % to->port_b.elems != 0) + return -EINVAL; + + return 0; } -void -ia_css_fpn_configure( - const struct ia_css_binary *binary, - const struct ia_css_frame_info *info) +int ia_css_fpn_configure(const struct ia_css_binary *binary, + const struct ia_css_frame_info *info) { struct ia_css_frame_info my_info = IA_CSS_BINARY_DEFAULT_FRAME_INFO; const struct ia_css_fpn_configuration config = { @@ -85,5 +87,5 @@ ia_css_fpn_configure( my_info.raw_bayer_order = info->raw_bayer_order; my_info.crop_info = info->crop_info; - ia_css_configure_fpn(binary, &config); + return ia_css_configure_fpn(binary, &config); } diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/fpn/fpn_1.0/ia_css_fpn.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/fpn/fpn_1.0/ia_css_fpn.host.h index 12187d213d90..bd341fa287fe 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/fpn/fpn_1.0/ia_css_fpn.host.h +++ b/drivers/staging/media/atomisp/pci/isp/kernels/fpn/fpn_1.0/ia_css_fpn.host.h @@ -31,15 +31,11 @@ ia_css_fpn_dump( const struct sh_css_isp_fpn_params *fpn, unsigned int level); -void -ia_css_fpn_config( - struct sh_css_isp_fpn_isp_config *to, - const struct ia_css_fpn_configuration *from, - unsigned int size); +int ia_css_fpn_config(struct sh_css_isp_fpn_isp_config *to, + const struct ia_css_fpn_configuration *from, + unsigned int size); -void -ia_css_fpn_configure( - const struct ia_css_binary *binary, - const struct ia_css_frame_info *from); +int ia_css_fpn_configure(const struct ia_css_binary *binary, + const struct ia_css_frame_info *from); #endif /* __IA_CSS_FPN_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/hdr/ia_css_hdr.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/hdr/ia_css_hdr.host.c index 698550cc2fcc..85a02b6adb52 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/hdr/ia_css_hdr.host.c +++ b/drivers/staging/media/atomisp/pci/isp/kernels/hdr/ia_css_hdr.host.c @@ -1,6 +1,5 @@ // SPDX-License-Identifier: GPL-2.0 /* Release Version: irci_stable_candrpv_0415_20150521_0458 */ -/* Release Version: irci_ecr-master_20150911_0724 */ /* * Support for Intel Camera Imaging ISP subsystem. * Copyright (c) 2015, Intel Corporation. diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/hdr/ia_css_hdr.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/hdr/ia_css_hdr.host.h index 04599ab590cd..83277b683c47 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/hdr/ia_css_hdr.host.h +++ b/drivers/staging/media/atomisp/pci/isp/kernels/hdr/ia_css_hdr.host.h @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0 */ /* Release Version: irci_stable_candrpv_0415_20150521_0458 */ -/* Release Version: irci_ecr-master_20150911_0724 */ /* * Support for Intel Camera Imaging ISP subsystem. * Copyright (c) 2015, Intel Corporation. diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/hdr/ia_css_hdr_param.h b/drivers/staging/media/atomisp/pci/isp/kernels/hdr/ia_css_hdr_param.h index 97a89fd3cfda..998c6d801756 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/hdr/ia_css_hdr_param.h +++ b/drivers/staging/media/atomisp/pci/isp/kernels/hdr/ia_css_hdr_param.h @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0 */ /* Release Version: irci_stable_candrpv_0415_20150521_0458 */ -/* Release Version: irci_ecr-master_20150911_0724 */ /* * Support for Intel Camera Imaging ISP subsystem. * Copyright (c) 2015, Intel Corporation. diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/hdr/ia_css_hdr_types.h b/drivers/staging/media/atomisp/pci/isp/kernels/hdr/ia_css_hdr_types.h index 1b4090880201..175c301ee96a 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/hdr/ia_css_hdr_types.h +++ b/drivers/staging/media/atomisp/pci/isp/kernels/hdr/ia_css_hdr_types.h @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0 */ /* Release Version: irci_stable_candrpv_0415_20150521_0458 */ -/* Release Version: irci_ecr-master_20150911_0724 */ /* * Support for Intel Camera Imaging ISP subsystem. * Copyright (c) 2015, Intel Corporation. diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io.host.c index ea8055148fb3..c7d88552dfde 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io.host.c +++ b/drivers/staging/media/atomisp/pci/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io.host.c @@ -22,10 +22,8 @@ #include "ia_css_isp_params.h" #include "ia_css_frame.h" -void -ia_css_bayer_io_config( - const struct ia_css_binary *binary, - const struct sh_css_binary_args *args) +int ia_css_bayer_io_config(const struct ia_css_binary *binary, + const struct sh_css_binary_args *args) { const struct ia_css_frame *in_frame = args->in_frame; const struct ia_css_frame **out_frames = (const struct ia_css_frame **) @@ -38,6 +36,7 @@ ia_css_bayer_io_config( ddr_bits_per_element); unsigned int size_get = 0, size_put = 0; unsigned int offset = 0; + int ret; if (binary->info->mem_offsets.offsets.param) { size_get = binary->info->mem_offsets.offsets.param->dmem.get.size; @@ -53,7 +52,9 @@ ia_css_bayer_io_config( "ia_css_bayer_io_config() get part enter:\n"); #endif - ia_css_dma_configure_from_info(&config, in_frame_info); + ret = ia_css_dma_configure_from_info(&config, in_frame_info); + if (ret) + return ret; // The base_address of the input frame will be set in the ISP to->width = in_frame_info->res.width; to->height = in_frame_info->res.height; @@ -79,7 +80,9 @@ ia_css_bayer_io_config( "ia_css_bayer_io_config() put part enter:\n"); #endif - ia_css_dma_configure_from_info(&config, &out_frames[0]->info); + ret = ia_css_dma_configure_from_info(&config, &out_frames[0]->info); + if (ret) + return ret; to->base_address = out_frames[0]->data; to->width = out_frames[0]->info.res.width; to->height = out_frames[0]->info.res.height; @@ -91,4 +94,5 @@ ia_css_bayer_io_config( "ia_css_bayer_io_config() put part leave:\n"); #endif } + return 0; } diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io.host.h index 635ccb1b27d0..9c7e5a1ad57b 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io.host.h +++ b/drivers/staging/media/atomisp/pci/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io.host.h @@ -21,9 +21,7 @@ #include "ia_css_binary.h" #include "sh_css_internal.h" -void -ia_css_bayer_io_config( - const struct ia_css_binary *binary, - const struct sh_css_binary_args *args); +int ia_css_bayer_io_config(const struct ia_css_binary *binary, + const struct sh_css_binary_args *args); #endif /*__BAYER_IO_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io.host.c index f8bd207b28e1..7d2ef6e26ee6 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io.host.c +++ b/drivers/staging/media/atomisp/pci/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io.host.c @@ -22,10 +22,8 @@ more details. #include "ia_css_isp_params.h" #include "ia_css_frame.h" -void -ia_css_yuv444_io_config( - const struct ia_css_binary *binary, - const struct sh_css_binary_args *args) +int ia_css_yuv444_io_config(const struct ia_css_binary *binary, + const struct sh_css_binary_args *args) { const struct ia_css_frame *in_frame = args->in_frame; const struct ia_css_frame **out_frames = (const struct ia_css_frame **) @@ -38,6 +36,7 @@ ia_css_yuv444_io_config( ddr_bits_per_element); unsigned int size_get = 0, size_put = 0; unsigned int offset = 0; + int ret; if (binary->info->mem_offsets.offsets.param) { size_get = binary->info->mem_offsets.offsets.param->dmem.get.size; @@ -53,7 +52,10 @@ ia_css_yuv444_io_config( "ia_css_yuv444_io_config() get part enter:\n"); #endif - ia_css_dma_configure_from_info(&config, in_frame_info); + ret = ia_css_dma_configure_from_info(&config, in_frame_info); + if (ret) + return ret; + // The base_address of the input frame will be set in the ISP to->width = in_frame_info->res.width; to->height = in_frame_info->res.height; @@ -79,7 +81,10 @@ ia_css_yuv444_io_config( "ia_css_yuv444_io_config() put part enter:\n"); #endif - ia_css_dma_configure_from_info(&config, &out_frames[0]->info); + ret = ia_css_dma_configure_from_info(&config, &out_frames[0]->info); + if (ret) + return ret; + to->base_address = out_frames[0]->data; to->width = out_frames[0]->info.res.width; to->height = out_frames[0]->info.res.height; @@ -91,4 +96,5 @@ ia_css_yuv444_io_config( "ia_css_yuv444_io_config() put part leave:\n"); #endif } + return 0; } diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io.host.h index e7cfd380e108..13e50590f91e 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io.host.h +++ b/drivers/staging/media/atomisp/pci/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io.host.h @@ -21,9 +21,7 @@ more details. #include "ia_css_binary.h" #include "sh_css_internal.h" -void -ia_css_yuv444_io_config( - const struct ia_css_binary *binary, - const struct sh_css_binary_args *args); +int ia_css_yuv444_io_config(const struct ia_css_binary *binary, + const struct sh_css_binary_args *args); #endif /*__YUV44_IO_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/iterator/iterator_1.0/ia_css_iterator.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/iterator/iterator_1.0/ia_css_iterator.host.c index 6d8a35a73750..5f186fb03642 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/iterator/iterator_1.0/ia_css_iterator.host.c +++ b/drivers/staging/media/atomisp/pci/isp/kernels/iterator/iterator_1.0/ia_css_iterator.host.c @@ -38,10 +38,9 @@ ia_css_iterator_config( ia_css_resolution_to_sp_resolution(&to->dvs_envelope, from->dvs_envelope); } -int -ia_css_iterator_configure( - const struct ia_css_binary *binary, - const struct ia_css_frame_info *in_info) { +int ia_css_iterator_configure(const struct ia_css_binary *binary, + const struct ia_css_frame_info *in_info) +{ struct ia_css_frame_info my_info = IA_CSS_BINARY_DEFAULT_FRAME_INFO; struct ia_css_iterator_configuration config = default_config; @@ -75,7 +74,5 @@ ia_css_iterator_configure( my_info.res.height <<= binary->vf_downscale_log2; } - ia_css_configure_iterator(binary, &config); - - return 0; + return ia_css_configure_iterator(binary, &config); } diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/output/output_1.0/ia_css_output.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/output/output_1.0/ia_css_output.host.c index c8e074f42353..be9e4ef29fce 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/output/output_1.0/ia_css_output.host.c +++ b/drivers/staging/media/atomisp/pci/isp/kernels/output/output_1.0/ia_css_output.host.c @@ -52,49 +52,45 @@ ia_css_output_encode( to->enable_vflip = from->enable_vflip; } -void -ia_css_output_config( - struct sh_css_isp_output_isp_config *to, - const struct ia_css_output_configuration *from, - unsigned int size) +int ia_css_output_config(struct sh_css_isp_output_isp_config *to, + const struct ia_css_output_configuration *from, + unsigned int size) { unsigned int elems_a = ISP_VEC_NELEMS; + int ret; + + ret = ia_css_dma_configure_from_info(&to->port_b, from->info); + if (ret) + return ret; - (void)size; - ia_css_dma_configure_from_info(&to->port_b, from->info); to->width_a_over_b = elems_a / to->port_b.elems; to->height = from->info ? from->info->res.height : 0; to->enable = from->info != NULL; ia_css_frame_info_to_frame_sp_info(&to->info, from->info); /* Assume divisiblity here, may need to generalize to fixed point. */ - assert(elems_a % to->port_b.elems == 0); + if (elems_a % to->port_b.elems != 0) + return -EINVAL; + + return 0; } -void -ia_css_output0_config( - struct sh_css_isp_output_isp_config *to, - const struct ia_css_output0_configuration *from, - unsigned int size) +int ia_css_output0_config(struct sh_css_isp_output_isp_config *to, + const struct ia_css_output0_configuration *from, + unsigned int size) { - ia_css_output_config( - to, (const struct ia_css_output_configuration *)from, size); + return ia_css_output_config(to, (const struct ia_css_output_configuration *)from, size); } -void -ia_css_output1_config( - struct sh_css_isp_output_isp_config *to, - const struct ia_css_output1_configuration *from, - unsigned int size) +int ia_css_output1_config(struct sh_css_isp_output_isp_config *to, + const struct ia_css_output1_configuration *from, + unsigned int size) { - ia_css_output_config( - to, (const struct ia_css_output_configuration *)from, size); + return ia_css_output_config(to, (const struct ia_css_output_configuration *)from, size); } -void -ia_css_output_configure( - const struct ia_css_binary *binary, - const struct ia_css_frame_info *info) +int ia_css_output_configure(const struct ia_css_binary *binary, + const struct ia_css_frame_info *info) { if (info) { struct ia_css_output_configuration config = @@ -102,14 +98,13 @@ ia_css_output_configure( config.info = info; - ia_css_configure_output(binary, &config); + return ia_css_configure_output(binary, &config); } + return 0; } -void -ia_css_output0_configure( - const struct ia_css_binary *binary, - const struct ia_css_frame_info *info) +int ia_css_output0_configure(const struct ia_css_binary *binary, + const struct ia_css_frame_info *info) { if (info) { struct ia_css_output0_configuration config = @@ -117,14 +112,13 @@ ia_css_output0_configure( config.info = info; - ia_css_configure_output0(binary, &config); + return ia_css_configure_output0(binary, &config); } + return 0; } -void -ia_css_output1_configure( - const struct ia_css_binary *binary, - const struct ia_css_frame_info *info) +int ia_css_output1_configure(const struct ia_css_binary *binary, + const struct ia_css_frame_info *info) { if (info) { struct ia_css_output1_configuration config = @@ -132,8 +126,9 @@ ia_css_output1_configure( config.info = info; - ia_css_configure_output1(binary, &config); + return ia_css_configure_output1(binary, &config); } + return 0; } void diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/output/output_1.0/ia_css_output.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/output/output_1.0/ia_css_output.host.h index 1f5a2242640e..c8523e95a394 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/output/output_1.0/ia_css_output.host.h +++ b/drivers/staging/media/atomisp/pci/isp/kernels/output/output_1.0/ia_css_output.host.h @@ -30,38 +30,26 @@ ia_css_output_encode( const struct ia_css_output_config *from, unsigned int size); -void -ia_css_output_config( - struct sh_css_isp_output_isp_config *to, - const struct ia_css_output_configuration *from, - unsigned int size); +int ia_css_output_config(struct sh_css_isp_output_isp_config *to, + const struct ia_css_output_configuration *from, + unsigned int size); -void -ia_css_output0_config( - struct sh_css_isp_output_isp_config *to, - const struct ia_css_output0_configuration *from, - unsigned int size); +int ia_css_output0_config(struct sh_css_isp_output_isp_config *to, + const struct ia_css_output0_configuration *from, + unsigned int size); -void -ia_css_output1_config( - struct sh_css_isp_output_isp_config *to, - const struct ia_css_output1_configuration *from, - unsigned int size); +int ia_css_output1_config(struct sh_css_isp_output_isp_config *to, + const struct ia_css_output1_configuration *from, + unsigned int size); -void -ia_css_output_configure( - const struct ia_css_binary *binary, - const struct ia_css_frame_info *from); +int ia_css_output_configure(const struct ia_css_binary *binary, + const struct ia_css_frame_info *from); -void -ia_css_output0_configure( - const struct ia_css_binary *binary, - const struct ia_css_frame_info *from); +int ia_css_output0_configure(const struct ia_css_binary *binary, + const struct ia_css_frame_info *from); -void -ia_css_output1_configure( - const struct ia_css_binary *binary, - const struct ia_css_frame_info *from); +int ia_css_output1_configure(const struct ia_css_binary *binary, + const struct ia_css_frame_info *from); void ia_css_output_dump( diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/qplane/qplane_2/ia_css_qplane.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/qplane/qplane_2/ia_css_qplane.host.c index 1603fd44ece3..9fd4435e96b0 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/qplane/qplane_2/ia_css_qplane.host.c +++ b/drivers/staging/media/atomisp/pci/isp/kernels/qplane/qplane_2/ia_css_qplane.host.c @@ -28,35 +28,37 @@ static const struct ia_css_qplane_configuration default_config = { .pipe = (struct sh_css_sp_pipeline *)NULL, }; -void -ia_css_qplane_config( - struct sh_css_isp_qplane_isp_config *to, - const struct ia_css_qplane_configuration *from, - unsigned int size) +int ia_css_qplane_config(struct sh_css_isp_qplane_isp_config *to, + const struct ia_css_qplane_configuration *from, + unsigned int size) { unsigned int elems_a = ISP_VEC_NELEMS; + int ret; + + ret = ia_css_dma_configure_from_info(&to->port_b, from->info); + if (ret) + return ret; - (void)size; - ia_css_dma_configure_from_info(&to->port_b, from->info); to->width_a_over_b = elems_a / to->port_b.elems; /* Assume divisiblity here, may need to generalize to fixed point. */ - assert(elems_a % to->port_b.elems == 0); + if (elems_a % to->port_b.elems != 0) + return -EINVAL; to->inout_port_config = from->pipe->inout_port_config; to->format = from->info->format; + + return 0; } -void -ia_css_qplane_configure( - const struct sh_css_sp_pipeline *pipe, - const struct ia_css_binary *binary, - const struct ia_css_frame_info *info) +int ia_css_qplane_configure(const struct sh_css_sp_pipeline *pipe, + const struct ia_css_binary *binary, + const struct ia_css_frame_info *info) { struct ia_css_qplane_configuration config = default_config; config.pipe = pipe; config.info = info; - ia_css_configure_qplane(binary, &config); + return ia_css_configure_qplane(binary, &config); } diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/qplane/qplane_2/ia_css_qplane.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/qplane/qplane_2/ia_css_qplane.host.h index 8d940959f40a..b3f8fa30c8ce 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/qplane/qplane_2/ia_css_qplane.host.h +++ b/drivers/staging/media/atomisp/pci/isp/kernels/qplane/qplane_2/ia_css_qplane.host.h @@ -29,16 +29,12 @@ #include "ia_css_qplane_types.h" #include "ia_css_qplane_param.h" -void -ia_css_qplane_config( - struct sh_css_isp_qplane_isp_config *to, - const struct ia_css_qplane_configuration *from, - unsigned int size); +int ia_css_qplane_config(struct sh_css_isp_qplane_isp_config *to, + const struct ia_css_qplane_configuration *from, + unsigned int size); -void -ia_css_qplane_configure( - const struct sh_css_sp_pipeline *pipe, - const struct ia_css_binary *binary, - const struct ia_css_frame_info *from); +int ia_css_qplane_configure(const struct sh_css_sp_pipeline *pipe, + const struct ia_css_binary *binary, + const struct ia_css_frame_info *from); #endif /* __IA_CSS_QPLANE_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/raw/raw_1.0/ia_css_raw.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/raw/raw_1.0/ia_css_raw.host.c index c505c94a7241..646d6e39c1e5 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/raw/raw_1.0/ia_css_raw.host.c +++ b/drivers/staging/media/atomisp/pci/isp/kernels/raw/raw_1.0/ia_css_raw.host.c @@ -29,12 +29,6 @@ static const struct ia_css_raw_configuration default_config = { .pipe = (struct sh_css_sp_pipeline *)NULL, }; -static inline unsigned -sh_css_elems_bytes_from_info(unsigned int raw_bit_depth) -{ - return CEIL_DIV(raw_bit_depth, 8); -} - /* MW: These areMIPI / ISYS properties, not camera function properties */ static enum sh_stream_format css2isp_stream_format(enum atomisp_input_format from) { @@ -70,17 +64,15 @@ css2isp_stream_format(enum atomisp_input_format from) { } } -void -ia_css_raw_config( - struct sh_css_isp_raw_isp_config *to, - const struct ia_css_raw_configuration *from, - unsigned int size) +int ia_css_raw_config(struct sh_css_isp_raw_isp_config *to, + const struct ia_css_raw_configuration *from, + unsigned int size) { unsigned int elems_a = ISP_VEC_NELEMS; const struct ia_css_frame_info *in_info = from->in_info; const struct ia_css_frame_info *internal_info = from->internal_info; + int ret; - (void)size; #if !defined(ISP2401) /* 2401 input system uses input width width */ in_info = internal_info; @@ -92,7 +84,9 @@ ia_css_raw_config( in_info = internal_info; #endif - ia_css_dma_configure_from_info(&to->port_b, in_info); + ret = ia_css_dma_configure_from_info(&to->port_b, in_info); + if (ret) + return ret; /* Assume divisiblity here, may need to generalize to fixed point. */ assert((in_info->format == IA_CSS_FRAME_FORMAT_RAW_PACKED) || @@ -110,16 +104,16 @@ ia_css_raw_config( to->start_line = in_info->crop_info.start_line; to->enable_left_padding = from->enable_left_padding; #endif + + return 0; } -void -ia_css_raw_configure( - const struct sh_css_sp_pipeline *pipe, - const struct ia_css_binary *binary, - const struct ia_css_frame_info *in_info, - const struct ia_css_frame_info *internal_info, - bool two_ppc, - bool deinterleaved) +int ia_css_raw_configure(const struct sh_css_sp_pipeline *pipe, + const struct ia_css_binary *binary, + const struct ia_css_frame_info *in_info, + const struct ia_css_frame_info *internal_info, + bool two_ppc, + bool deinterleaved) { u8 enable_left_padding = (uint8_t)((binary->left_padding) ? 1 : 0); struct ia_css_raw_configuration config = default_config; @@ -132,5 +126,5 @@ ia_css_raw_configure( config.deinterleaved = deinterleaved; config.enable_left_padding = enable_left_padding; - ia_css_configure_raw(binary, &config); + return ia_css_configure_raw(binary, &config); } diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/raw/raw_1.0/ia_css_raw.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/raw/raw_1.0/ia_css_raw.host.h index 346928435a8b..23da51aabc8d 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/raw/raw_1.0/ia_css_raw.host.h +++ b/drivers/staging/media/atomisp/pci/isp/kernels/raw/raw_1.0/ia_css_raw.host.h @@ -21,19 +21,15 @@ #include "ia_css_raw_types.h" #include "ia_css_raw_param.h" -void -ia_css_raw_config( - struct sh_css_isp_raw_isp_config *to, - const struct ia_css_raw_configuration *from, - unsigned int size); +int ia_css_raw_config(struct sh_css_isp_raw_isp_config *to, + const struct ia_css_raw_configuration *from, + unsigned int size); -void -ia_css_raw_configure( - const struct sh_css_sp_pipeline *pipe, - const struct ia_css_binary *binary, - const struct ia_css_frame_info *in_info, - const struct ia_css_frame_info *internal_info, - bool two_ppc, - bool deinterleaved); +int ia_css_raw_configure(const struct sh_css_sp_pipeline *pipe, + const struct ia_css_binary *binary, + const struct ia_css_frame_info *in_info, + const struct ia_css_frame_info *internal_info, + bool two_ppc, + bool deinterleaved); #endif /* __IA_CSS_RAW_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/raw_aa_binning/raw_aa_binning_1.0/ia_css_raa.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/raw_aa_binning/raw_aa_binning_1.0/ia_css_raa.host.c index 29c707ecf9f3..9b756daddee0 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/raw_aa_binning/raw_aa_binning_1.0/ia_css_raa.host.c +++ b/drivers/staging/media/atomisp/pci/isp/kernels/raw_aa_binning/raw_aa_binning_1.0/ia_css_raa.host.c @@ -13,7 +13,6 @@ * more details. */ -#if !defined(HAS_NO_HMEM) #include "ia_css_types.h" #include "sh_css_internal.h" @@ -32,4 +31,3 @@ ia_css_raa_encode( (void)from; } -#endif diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/ref/ref_1.0/ia_css_ref.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/ref/ref_1.0/ia_css_ref.host.c index 061558fbe329..08ed916a7eb8 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/ref/ref_1.0/ia_css_ref.host.c +++ b/drivers/staging/media/atomisp/pci/isp/kernels/ref/ref_1.0/ia_css_ref.host.c @@ -22,16 +22,17 @@ #include "isp.h" #include "ia_css_ref.host.h" -void -ia_css_ref_config( - struct sh_css_isp_ref_isp_config *to, - const struct ia_css_ref_configuration *from, - unsigned int size) +int ia_css_ref_config(struct sh_css_isp_ref_isp_config *to, + const struct ia_css_ref_configuration *from, + unsigned int size) { unsigned int elems_a = ISP_VEC_NELEMS, i; + int ret; if (from->ref_frames[0]) { - ia_css_dma_configure_from_info(&to->port_b, &from->ref_frames[0]->info); + ret = ia_css_dma_configure_from_info(&to->port_b, &from->ref_frames[0]->info); + if (ret) + return ret; to->width_a_over_b = elems_a / to->port_b.elems; to->dvs_frame_delay = from->dvs_frame_delay; } else { @@ -52,22 +53,25 @@ ia_css_ref_config( } /* Assume divisiblity here, may need to generalize to fixed point. */ - assert(elems_a % to->port_b.elems == 0); + if (elems_a % to->port_b.elems != 0) + return -EINVAL; + + return 0; } -void -ia_css_ref_configure( - const struct ia_css_binary *binary, - const struct ia_css_frame * const *ref_frames, - const uint32_t dvs_frame_delay) +int ia_css_ref_configure(const struct ia_css_binary *binary, + const struct ia_css_frame * const *ref_frames, + const uint32_t dvs_frame_delay) { struct ia_css_ref_configuration config; unsigned int i; for (i = 0; i < MAX_NUM_VIDEO_DELAY_FRAMES; i++) config.ref_frames[i] = ref_frames[i]; + config.dvs_frame_delay = dvs_frame_delay; - ia_css_configure_ref(binary, &config); + + return ia_css_configure_ref(binary, &config); } void diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/ref/ref_1.0/ia_css_ref.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/ref/ref_1.0/ia_css_ref.host.h index 3ce590b436a1..388cd4c367ba 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/ref/ref_1.0/ia_css_ref.host.h +++ b/drivers/staging/media/atomisp/pci/isp/kernels/ref/ref_1.0/ia_css_ref.host.h @@ -23,17 +23,13 @@ #include "ia_css_ref_param.h" #include "ia_css_ref_state.h" -void -ia_css_ref_config( - struct sh_css_isp_ref_isp_config *to, - const struct ia_css_ref_configuration *from, - unsigned int size); +int ia_css_ref_config(struct sh_css_isp_ref_isp_config *to, + const struct ia_css_ref_configuration *from, + unsigned int size); -void -ia_css_ref_configure( - const struct ia_css_binary *binary, - const struct ia_css_frame * const *ref_frames, - const uint32_t dvs_frame_delay); +int ia_css_ref_configure(const struct ia_css_binary *binary, + const struct ia_css_frame * const *ref_frames, + const uint32_t dvs_frame_delay); void ia_css_init_ref_state( diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/s3a/s3a_1.0/ia_css_s3a.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/s3a/s3a_1.0/ia_css_s3a.host.c index ba52c80df4a5..bd7b89d9475b 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/s3a/s3a_1.0/ia_css_s3a.host.c +++ b/drivers/staging/media/atomisp/pci/isp/kernels/s3a/s3a_1.0/ia_css_s3a.host.c @@ -227,10 +227,6 @@ ia_css_s3a_hmem_decode( struct ia_css_3a_statistics *host_stats, const struct ia_css_bh_table *hmem_buf) { -#if defined(HAS_NO_HMEM) - (void)host_stats; - (void)hmem_buf; -#else struct ia_css_3a_rgby_output *out_ptr; int i; @@ -291,7 +287,6 @@ ia_css_s3a_hmem_decode( out_ptr[0].g -= diff; out_ptr[0].b -= diff; out_ptr[0].y -= diff; -#endif } void diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/sc/sc_1.0/ia_css_sc.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/sc/sc_1.0/ia_css_sc.host.c index f3fb4b9b3c82..6974b3424d91 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/sc/sc_1.0/ia_css_sc.host.c +++ b/drivers/staging/media/atomisp/pci/isp/kernels/sc/sc_1.0/ia_css_sc.host.c @@ -23,35 +23,6 @@ #include "ia_css_sc.host.h" -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -/* ISP2401 */ -static void -ia_css_configure_sc( - const struct ia_css_binary *binary, - const struct ia_css_sc_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_sc() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.sc.size; - offset = binary->info->mem_offsets.offsets.config->dmem.sc.offset; - } - if (size) { - ia_css_sc_config((struct sh_css_isp_sc_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_sc() leave:\n"); -} - void ia_css_sc_encode( struct sh_css_isp_sc_params *to, @@ -73,45 +44,6 @@ ia_css_sc_dump( "sc_gain_shift", sc->gain_shift); } -/* ISP2401 */ -void -ia_css_sc_config( - struct sh_css_isp_sc_isp_config *to, - const struct ia_css_sc_configuration *from, - unsigned int size) -{ - u32 internal_org_x_bqs = from->internal_frame_origin_x_bqs_on_sctbl; - u32 internal_org_y_bqs = from->internal_frame_origin_y_bqs_on_sctbl; - u32 slice, rest, i; - - (void)size; - - /* The internal_frame_origin_x_bqs_on_sctbl is separated to 8 times of slice_vec. */ - rest = internal_org_x_bqs; - for (i = 0; i < SH_CSS_SC_INTERPED_GAIN_HOR_SLICE_TIMES; i++) { - slice = min(rest, ((uint32_t)ISP_SLICE_NELEMS)); - rest = rest - slice; - to->interped_gain_hor_slice_bqs[i] = slice; - } - - to->internal_frame_origin_y_bqs_on_sctbl = internal_org_y_bqs; -} - -/* ISP2401 */ -void -ia_css_sc_configure( - const struct ia_css_binary *binary, - u32 internal_frame_origin_x_bqs_on_sctbl, - uint32_t internal_frame_origin_y_bqs_on_sctbl) -{ - const struct ia_css_sc_configuration config = { - internal_frame_origin_x_bqs_on_sctbl, - internal_frame_origin_y_bqs_on_sctbl - }; - - ia_css_configure_sc(binary, &config); -} - /* ------ deprecated(bz675) : from ------ */ /* It looks like @parameter{} (in *.pipe) is used to generate the process/get/set functions, for parameters which should be used in the isp kernels. diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/sc/sc_1.0/ia_css_sc.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/sc/sc_1.0/ia_css_sc.host.h index f1eb568f23d4..d103103c9a87 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/sc/sc_1.0/ia_css_sc.host.h +++ b/drivers/staging/media/atomisp/pci/isp/kernels/sc/sc_1.0/ia_css_sc.host.h @@ -32,39 +32,6 @@ ia_css_sc_dump( const struct sh_css_isp_sc_params *sc, unsigned int level); -/* @brief Configure the shading correction. - * @param[out] to Parameters used in the shading correction kernel in the isp. - * @param[in] from Parameters passed from the host. - * @param[in] size Size of the sh_css_isp_sc_isp_config structure. - * - * This function passes the parameters for the shading correction from the host to the isp. - */ -/* ISP2401 */ -void -ia_css_sc_config( - struct sh_css_isp_sc_isp_config *to, - const struct ia_css_sc_configuration *from, - unsigned int size); - -/* @brief Configure the shading correction. - * @param[in] binary The binary, which has the shading correction. - * @param[in] internal_frame_origin_x_bqs_on_sctbl - * X coordinate (in bqs) of the origin of the internal frame on the shading table. - * @param[in] internal_frame_origin_y_bqs_on_sctbl - * Y coordinate (in bqs) of the origin of the internal frame on the shading table. - * - * This function calls the ia_css_configure_sc() function. - * (The ia_css_configure_sc() function is automatically generated in ia_css_isp.configs.c.) - * The ia_css_configure_sc() function calls the ia_css_sc_config() function - * to pass the parameters for the shading correction from the host to the isp. - */ -/* ISP2401 */ -void -ia_css_sc_configure( - const struct ia_css_binary *binary, - u32 internal_frame_origin_x_bqs_on_sctbl, - uint32_t internal_frame_origin_y_bqs_on_sctbl); - /* ------ deprecated(bz675) : from ------ */ void sh_css_get_shading_settings(const struct ia_css_isp_parameters *params, diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/sc/sc_1.0/ia_css_sc_types.h b/drivers/staging/media/atomisp/pci/isp/kernels/sc/sc_1.0/ia_css_sc_types.h index aae534521b7b..1d70f6b9a0ec 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/sc/sc_1.0/ia_css_sc_types.h +++ b/drivers/staging/media/atomisp/pci/isp/kernels/sc/sc_1.0/ia_css_sc_types.h @@ -118,18 +118,4 @@ struct ia_css_shading_settings { /* ------ deprecated(bz675) : to ------ */ -/* Shading Correction configuration. - * - * NOTE: The shading table size is larger than or equal to the internal frame size. - */ -/* ISP2401 */ -struct ia_css_sc_configuration { - u32 internal_frame_origin_x_bqs_on_sctbl; /** Origin X (in bqs) of internal frame on shading table. */ - u32 internal_frame_origin_y_bqs_on_sctbl; /** Origin Y (in bqs) of internal frame on shading table. */ - /** NOTE: bqs = size in BQ(Bayer Quad) unit. - 1BQ means {Gr,R,B,Gb}(2x2 pixels). - Horizontal 1 bqs corresponds to horizontal 2 pixels. - Vertical 1 bqs corresponds to vertical 2 pixels. */ -}; - #endif /* __IA_CSS_SC_TYPES_H */ diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.c index ac80e6c6e67e..53050c0c49fc 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.c +++ b/drivers/staging/media/atomisp/pci/isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.c @@ -71,40 +71,41 @@ ia_css_tnr_debug_dtrace( config->threshold_y, config->threshold_uv); } -void -ia_css_tnr_config( - struct sh_css_isp_tnr_isp_config *to, - const struct ia_css_tnr_configuration *from, - unsigned int size) +int ia_css_tnr_config(struct sh_css_isp_tnr_isp_config *to, + const struct ia_css_tnr_configuration *from, + unsigned int size) { unsigned int elems_a = ISP_VEC_NELEMS; unsigned int i; + int ret; - (void)size; - ia_css_dma_configure_from_info(&to->port_b, &from->tnr_frames[0]->info); + ret = ia_css_dma_configure_from_info(&to->port_b, &from->tnr_frames[0]->info); + if (ret) + return ret; to->width_a_over_b = elems_a / to->port_b.elems; to->frame_height = from->tnr_frames[0]->info.res.height; - for (i = 0; i < NUM_TNR_FRAMES; i++) { + for (i = 0; i < NUM_VIDEO_TNR_FRAMES; i++) { to->tnr_frame_addr[i] = from->tnr_frames[i]->data + from->tnr_frames[i]->planes.yuyv.offset; } /* Assume divisiblity here, may need to generalize to fixed point. */ - assert(elems_a % to->port_b.elems == 0); + if (elems_a % to->port_b.elems != 0) + return -EINVAL; + + return 0; } -void -ia_css_tnr_configure( - const struct ia_css_binary *binary, - const struct ia_css_frame * const *frames) +int ia_css_tnr_configure(const struct ia_css_binary *binary, + const struct ia_css_frame * const *frames) { struct ia_css_tnr_configuration config; unsigned int i; - for (i = 0; i < NUM_TNR_FRAMES; i++) + for (i = 0; i < NUM_VIDEO_TNR_FRAMES; i++) config.tnr_frames[i] = frames[i]; - ia_css_configure_tnr(binary, &config); + return ia_css_configure_tnr(binary, &config); } void @@ -114,7 +115,7 @@ ia_css_init_tnr_state( { (void)size; - assert(NUM_TNR_FRAMES >= 2); + assert(NUM_VIDEO_TNR_FRAMES >= 2); assert(sizeof(*state) == size); state->tnr_in_buf_idx = 0; state->tnr_out_buf_idx = 1; diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.h index 90d6e6b44a8d..acf92052b442 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.h +++ b/drivers/staging/media/atomisp/pci/isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.h @@ -39,16 +39,12 @@ ia_css_tnr_debug_dtrace( const struct ia_css_tnr_config *config, unsigned int level); -void -ia_css_tnr_config( - struct sh_css_isp_tnr_isp_config *to, - const struct ia_css_tnr_configuration *from, - unsigned int size); +int ia_css_tnr_config(struct sh_css_isp_tnr_isp_config *to, + const struct ia_css_tnr_configuration *from, + unsigned int size); -void -ia_css_tnr_configure( - const struct ia_css_binary *binary, - const struct ia_css_frame * const *frames); +int ia_css_tnr_configure(const struct ia_css_binary *binary, + const struct ia_css_frame * const *frames); void ia_css_init_tnr_state( diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/tnr/tnr_1.0/ia_css_tnr_param.h b/drivers/staging/media/atomisp/pci/isp/kernels/tnr/tnr_1.0/ia_css_tnr_param.h index 60a2542cf685..551dd5cfa9f1 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/tnr/tnr_1.0/ia_css_tnr_param.h +++ b/drivers/staging/media/atomisp/pci/isp/kernels/tnr/tnr_1.0/ia_css_tnr_param.h @@ -28,14 +28,14 @@ struct sh_css_isp_tnr_params { }; struct ia_css_tnr_configuration { - const struct ia_css_frame *tnr_frames[NUM_TNR_FRAMES]; + const struct ia_css_frame *tnr_frames[NUM_VIDEO_TNR_FRAMES]; }; struct sh_css_isp_tnr_isp_config { u32 width_a_over_b; u32 frame_height; struct dma_port_config port_b; - ia_css_ptr tnr_frame_addr[NUM_TNR_FRAMES]; + ia_css_ptr tnr_frame_addr[NUM_VIDEO_TNR_FRAMES]; }; #endif /* __IA_CSS_TNR_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/vf/vf_1.0/ia_css_vf.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/vf/vf_1.0/ia_css_vf.host.c index dd3670972936..aecdcbe04ce1 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/vf/vf_1.0/ia_css_vf.host.c +++ b/drivers/staging/media/atomisp/pci/isp/kernels/vf/vf_1.0/ia_css_vf.host.c @@ -26,26 +26,28 @@ #include "isp.h" -void -ia_css_vf_config( - struct sh_css_isp_vf_isp_config *to, - const struct ia_css_vf_configuration *from, - unsigned int size) +int ia_css_vf_config(struct sh_css_isp_vf_isp_config *to, + const struct ia_css_vf_configuration *from, + unsigned int size) { unsigned int elems_a = ISP_VEC_NELEMS; + int ret; - (void)size; to->vf_downscale_bits = from->vf_downscale_bits; to->enable = from->info != NULL; if (from->info) { ia_css_frame_info_to_frame_sp_info(&to->info, from->info); - ia_css_dma_configure_from_info(&to->dma.port_b, from->info); + ret = ia_css_dma_configure_from_info(&to->dma.port_b, from->info); + if (ret) + return ret; to->dma.width_a_over_b = elems_a / to->dma.port_b.elems; /* Assume divisiblity here, may need to generalize to fixed point. */ - assert(elems_a % to->dma.port_b.elems == 0); + if (elems_a % to->dma.port_b.elems != 0) + return -EINVAL; } + return 0; } /* compute the log2 of the downscale factor needed to get closest @@ -120,12 +122,11 @@ configure_dma( config->info = vf_info; } -int -ia_css_vf_configure( - const struct ia_css_binary *binary, - const struct ia_css_frame_info *out_info, - struct ia_css_frame_info *vf_info, - unsigned int *downscale_log2) { +int ia_css_vf_configure(const struct ia_css_binary *binary, + const struct ia_css_frame_info *out_info, + struct ia_css_frame_info *vf_info, + unsigned int *downscale_log2) +{ int err; struct ia_css_vf_configuration config; const struct ia_css_binary_info *info = &binary->info->sp; @@ -138,7 +139,6 @@ ia_css_vf_configure( if (vf_info) vf_info->raw_bit_depth = info->dma.vfdec_bits_per_pixel; - ia_css_configure_vf(binary, &config); - return 0; + return ia_css_configure_vf(binary, &config); } diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/vf/vf_1.0/ia_css_vf.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/vf/vf_1.0/ia_css_vf.host.h index 0e8de034a00e..d6b45d3754b0 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/vf/vf_1.0/ia_css_vf.host.h +++ b/drivers/staging/media/atomisp/pci/isp/kernels/vf/vf_1.0/ia_css_vf.host.h @@ -32,11 +32,9 @@ sh_css_vf_downscale_log2( const struct ia_css_frame_info *vf_info, unsigned int *downscale_log2); -void -ia_css_vf_config( - struct sh_css_isp_vf_isp_config *to, - const struct ia_css_vf_configuration *from, - unsigned int size); +int ia_css_vf_config(struct sh_css_isp_vf_isp_config *to, + const struct ia_css_vf_configuration *from, + unsigned int size); int ia_css_vf_configure( diff --git a/drivers/staging/media/atomisp/pci/isp/modes/interface/isp_const.h b/drivers/staging/media/atomisp/pci/isp/modes/interface/isp_const.h index 11e439d838ae..bfe4f5976771 100644 --- a/drivers/staging/media/atomisp/pci/isp/modes/interface/isp_const.h +++ b/drivers/staging/media/atomisp/pci/isp/modes/interface/isp_const.h @@ -36,17 +36,7 @@ more details. #define BITS8_ELEMENTS_PER_XMEM_ADDR CEIL_DIV(XMEM_WIDTH_BITS, 8) #define BITS16_ELEMENTS_PER_XMEM_ADDR CEIL_DIV(XMEM_WIDTH_BITS, 16) -#if ISP_VEC_NELEMS == 64 #define ISP_NWAY_LOG2 6 -#elif ISP_VEC_NELEMS == 32 -#define ISP_NWAY_LOG2 5 -#elif ISP_VEC_NELEMS == 16 -#define ISP_NWAY_LOG2 4 -#elif ISP_VEC_NELEMS == 8 -#define ISP_NWAY_LOG2 3 -#else -#error "isp_const.h ISP_VEC_NELEMS must be one of {8, 16, 32, 64}" -#endif /* ***************************** * ISP input/output buffer sizes @@ -164,9 +154,9 @@ more details. /* [isp vmem] table size[vectors] per line per color (GR,R,B,GB), multiples of NWAY */ #define ISP2400_SCTBL_VECTORS_PER_LINE_PER_COLOR \ - CEIL_DIV(ISP2400_SH_CSS_MAX_SCTBL_WIDTH_PER_COLOR, ISP_VEC_NELEMS) + CEIL_DIV(SH_CSS_MAX_SCTBL_WIDTH_PER_COLOR, ISP_VEC_NELEMS) #define ISP2401_SCTBL_VECTORS_PER_LINE_PER_COLOR \ - CEIL_DIV(ISP2401_SH_CSS_MAX_SCTBL_WIDTH_PER_COLOR, ISP_VEC_NELEMS) + CEIL_DIV(SH_CSS_MAX_SCTBL_WIDTH_PER_COLOR, ISP_VEC_NELEMS) /* [isp vmem] table size[vectors] per line for 4colors (GR,R,B,GB), multiples of NWAY */ #define SCTBL_VECTORS_PER_LINE \ diff --git a/drivers/staging/media/atomisp/pci/isp2400_input_system_local.h b/drivers/staging/media/atomisp/pci/isp2400_input_system_local.h index 2614b89b8e34..6880c9b6aa65 100644 --- a/drivers/staging/media/atomisp/pci/isp2400_input_system_local.h +++ b/drivers/staging/media/atomisp/pci/isp2400_input_system_local.h @@ -16,10 +16,6 @@ #ifndef __INPUT_SYSTEM_LOCAL_H_INCLUDED__ #define __INPUT_SYSTEM_LOCAL_H_INCLUDED__ -#include <type_support.h> - -#include "input_system_global.h" - #include "input_system_defs.h" /* HIVE_ISYS_GPREG_MULTICAST_A_IDX,... */ /* @@ -33,54 +29,7 @@ #include "isp_acquisition_defs.h" #include "input_system_ctrl_defs.h" -typedef enum { - INPUT_SYSTEM_PORT_A = 0, - INPUT_SYSTEM_PORT_B, - INPUT_SYSTEM_PORT_C, - N_INPUT_SYSTEM_PORTS -} input_system_csi_port_t; - -typedef struct ctrl_unit_cfg_s ctrl_unit_cfg_t; -typedef struct input_system_network_cfg_s input_system_network_cfg_t; -typedef struct target_cfg2400_s target_cfg2400_t; -typedef struct channel_cfg_s channel_cfg_t; -typedef struct backend_channel_cfg_s backend_channel_cfg_t; typedef struct input_system_cfg2400_s input_system_cfg2400_t; -typedef struct mipi_port_state_s mipi_port_state_t; -typedef struct rx_channel_state_s rx_channel_state_t; -typedef struct input_switch_cfg_channel_s input_switch_cfg_channel_t; -typedef struct input_switch_cfg_s input_switch_cfg_t; - -struct ctrl_unit_cfg_s { - isp2400_ib_buffer_t buffer_mipi[N_CAPTURE_UNIT_ID]; - isp2400_ib_buffer_t buffer_acquire[N_ACQUISITION_UNIT_ID]; -}; - -struct input_system_network_cfg_s { - input_system_connection_t multicast_cfg[N_CAPTURE_UNIT_ID]; - input_system_multiplex_t mux_cfg; - ctrl_unit_cfg_t ctrl_unit_cfg[N_CTRL_UNIT_ID]; -}; - -typedef struct { -// TBD. - u32 dummy_parameter; -} target_isp_cfg_t; - -typedef struct { -// TBD. - u32 dummy_parameter; -} target_sp_cfg_t; - -typedef struct { -// TBD. - u32 dummy_parameter; -} target_strm2mem_cfg_t; - -struct input_switch_cfg_channel_s { - u32 hsync_data_reg[2]; - u32 vsync_data_reg; -}; struct target_cfg2400_s { input_switch_cfg_channel_t input_switch_channel_cfg; @@ -89,24 +38,6 @@ struct target_cfg2400_s { target_strm2mem_cfg_t target_strm2mem_cfg; }; -struct backend_channel_cfg_s { - u32 fmt_control_word_1; // Format config. - u32 fmt_control_word_2; - u32 no_side_band; -}; - -typedef union { - csi_cfg_t csi_cfg; - tpg_cfg_t tpg_cfg; - prbs_cfg_t prbs_cfg; - gpfifo_cfg_t gpfifo_cfg; -} source_cfg_t; - -struct input_switch_cfg_s { - u32 hsync_data_reg[N_RX_CHANNEL_ID * 2]; - u32 vsync_data_reg; -}; - // Configuration of a channel. struct channel_cfg_s { u32 ch_id; @@ -238,47 +169,6 @@ typedef struct capture_unit_state_s capture_unit_state_t; typedef struct acquisition_unit_state_s acquisition_unit_state_t; typedef struct ctrl_unit_state_s ctrl_unit_state_t; -/* - * In 2300 ports can be configured independently and stream - * formats need to be specified. In 2400, there are only 8 - * supported configurations but the HW is fused to support - * only a single one. - * - * In 2300 the compressed format types are programmed by the - * user. In 2400 all stream formats are encoded on the stream. - * - * Use the enum to check validity of a user configuration - */ -typedef enum { - MONO_4L_1L_0L = 0, - MONO_3L_1L_0L, - MONO_2L_1L_0L, - MONO_1L_1L_0L, - STEREO_2L_1L_2L, - STEREO_3L_1L_1L, - STEREO_2L_1L_1L, - STEREO_1L_1L_1L, - N_RX_MODE -} rx_mode_t; - -typedef enum { - MIPI_PREDICTOR_NONE = 0, - MIPI_PREDICTOR_TYPE1, - MIPI_PREDICTOR_TYPE2, - N_MIPI_PREDICTOR_TYPES -} mipi_predictor_t; - -typedef enum { - MIPI_COMPRESSOR_NONE = 0, - MIPI_COMPRESSOR_10_6_10, - MIPI_COMPRESSOR_10_7_10, - MIPI_COMPRESSOR_10_8_10, - MIPI_COMPRESSOR_12_6_12, - MIPI_COMPRESSOR_12_7_12, - MIPI_COMPRESSOR_12_8_12, - N_MIPI_COMPRESSOR_METHODS -} mipi_compressor_t; - typedef enum { MIPI_FORMAT_RGB888 = 0, MIPI_FORMAT_RGB555, @@ -339,22 +229,6 @@ typedef enum { RX_IRQ_INFO_ERR_LINE_SYNC = 1UL << _HRT_CSS_RECEIVER_IRQ_ERR_LINE_SYNC_BIT, } rx_irq_info_t; -typedef struct rx_cfg_s rx_cfg_t; - -/* - * Applied per port - */ -struct rx_cfg_s { - rx_mode_t mode; /* The HW config */ - enum mipi_port_id port; /* The port ID to apply the control on */ - unsigned int timeout; - unsigned int initcount; - unsigned int synccount; - unsigned int rxcount; - mipi_predictor_t comp; /* Just for backward compatibility */ - bool is_two_ppc; -}; - /* NOTE: The base has already an offset of 0x0100 */ static const hrt_address __maybe_unused MIPI_PORT_OFFSET[N_MIPI_PORT_ID] = { 0x00000000UL, diff --git a/drivers/staging/media/atomisp/pci/isp2401_input_system_global.h b/drivers/staging/media/atomisp/pci/isp2401_input_system_global.h index f38773842646..e3c86069b390 100644 --- a/drivers/staging/media/atomisp/pci/isp2401_input_system_global.h +++ b/drivers/staging/media/atomisp/pci/isp2401_input_system_global.h @@ -44,11 +44,6 @@ typedef enum { N_INPUT_SYSTEM_SOURCE_TYPE } input_system_source_type_t; -typedef enum { - INPUT_SYSTEM_POLL_ON_WAIT_FOR_FRAME, - INPUT_SYSTEM_POLL_ON_CAPTURE_REQUEST, -} input_system_polling_mode_t; - typedef struct input_system_channel_s input_system_channel_t; struct input_system_channel_s { stream2mmio_ID_t stream2mmio_id; @@ -111,9 +106,6 @@ struct isp2401_input_system_cfg_s { input_system_source_type_t mode; - /* ISP2401 */ - input_system_polling_mode_t polling_mode; - bool online; bool raw_packed; s8 linked_isys_stream_id; @@ -165,10 +157,6 @@ struct virtual_input_system_stream_s { u8 online; s8 linked_isys_stream_id; u8 valid; - - /* ISP2401 */ - input_system_polling_mode_t polling_mode; - s32 subscr_index; }; typedef struct virtual_input_system_stream_cfg_s diff --git a/drivers/staging/media/atomisp/pci/isp2401_input_system_local.h b/drivers/staging/media/atomisp/pci/isp2401_input_system_local.h index 24026090cd35..74bfa10e670e 100644 --- a/drivers/staging/media/atomisp/pci/isp2401_input_system_local.h +++ b/drivers/staging/media/atomisp/pci/isp2401_input_system_local.h @@ -16,9 +16,6 @@ #ifndef __INPUT_SYSTEM_LOCAL_H_INCLUDED__ #define __INPUT_SYSTEM_LOCAL_H_INCLUDED__ -#include "type_support.h" -#include "input_system_global.h" - #include "csi_rx.h" #include "pixelgen.h" #include "isys_stream2mmio.h" @@ -69,29 +66,6 @@ typedef enum { /* The number of stores for compressed format types */ #define N_MIPI_COMPRESSOR_CONTEXT (N_RX_CHANNEL_ID * N_MIPI_FORMAT_CUSTOM) -#define UNCOMPRESSED_BITS_PER_PIXEL_10 10 -#define UNCOMPRESSED_BITS_PER_PIXEL_12 12 -#define COMPRESSED_BITS_PER_PIXEL_6 6 -#define COMPRESSED_BITS_PER_PIXEL_7 7 -#define COMPRESSED_BITS_PER_PIXEL_8 8 -enum mipi_compressor { - MIPI_COMPRESSOR_NONE = 0, - MIPI_COMPRESSOR_10_6_10, - MIPI_COMPRESSOR_10_7_10, - MIPI_COMPRESSOR_10_8_10, - MIPI_COMPRESSOR_12_6_12, - MIPI_COMPRESSOR_12_7_12, - MIPI_COMPRESSOR_12_8_12, - N_MIPI_COMPRESSOR_METHODS -}; - -typedef enum { - MIPI_PREDICTOR_NONE = 0, - MIPI_PREDICTOR_TYPE1, - MIPI_PREDICTOR_TYPE2, - N_MIPI_PREDICTOR_TYPES -} mipi_predictor_t; - typedef struct input_system_state_s input_system_state_t; struct input_system_state_s { ibuf_ctrl_state_t ibuf_ctrl_state[N_IBUF_CTRL_ID]; diff --git a/drivers/staging/media/atomisp/pci/runtime/binary/interface/ia_css_binary.h b/drivers/staging/media/atomisp/pci/runtime/binary/interface/ia_css_binary.h index b44099dbdacd..9935ac860bc2 100644 --- a/drivers/staging/media/atomisp/pci/runtime/binary/interface/ia_css_binary.h +++ b/drivers/staging/media/atomisp/pci/runtime/binary/interface/ia_css_binary.h @@ -94,7 +94,6 @@ struct ia_css_binary_descr { bool enable_dpc; /* ISP2401 */ - bool enable_luma_only; bool enable_tnr; bool enable_capture_pp_bli; @@ -131,8 +130,6 @@ struct ia_css_binary { int sctbl_width_per_color; int sctbl_aligned_width_per_color; int sctbl_height; - int sctbl_legacy_width_per_color; - int sctbl_legacy_height; struct ia_css_sdis_info dis; struct ia_css_resolution dvs_envelope; bool online; diff --git a/drivers/staging/media/atomisp/pci/runtime/binary/src/binary.c b/drivers/staging/media/atomisp/pci/runtime/binary/src/binary.c index 060d38749570..406ed5fb4c6a 100644 --- a/drivers/staging/media/atomisp/pci/runtime/binary/src/binary.c +++ b/drivers/staging/media/atomisp/pci/runtime/binary/src/binary.c @@ -108,7 +108,6 @@ ia_css_binary_internal_res(const struct ia_css_frame_info *in_info, binary_dvs_env.height); } -/* ISP2400 */ /* Computation results of the origin coordinate of bayer on the shading table. */ struct sh_css_shading_table_bayer_origin_compute_results { u32 bayer_scale_hor_ratio_in; /* Horizontal ratio (in) of bayer scaling. */ @@ -119,23 +118,7 @@ struct sh_css_shading_table_bayer_origin_compute_results { u32 sc_bayer_origin_y_bqs_on_shading_table; /* Y coordinate (in bqs) of bayer origin on shading table. */ }; -/* ISP2401 */ -/* Requirements for the shading correction. */ -struct sh_css_binary_sc_requirements { - /* Bayer scaling factor, for the scaling which is applied before shading correction. */ - u32 bayer_scale_hor_ratio_in; /* Horizontal ratio (in) of scaling applied BEFORE shading correction. */ - u32 bayer_scale_hor_ratio_out; /* Horizontal ratio (out) of scaling applied BEFORE shading correction. */ - u32 bayer_scale_ver_ratio_in; /* Vertical ratio (in) of scaling applied BEFORE shading correction. */ - u32 bayer_scale_ver_ratio_out; /* Vertical ratio (out) of scaling applied BEFORE shading correction. */ - - /* ISP internal frame is composed of the real sensor data and the padding data. */ - u32 sensor_data_origin_x_bqs_on_internal; /* X origin (in bqs) of sensor data on internal frame - at shading correction. */ - u32 sensor_data_origin_y_bqs_on_internal; /* Y origin (in bqs) of sensor data on internal frame - at shading correction. */ -}; - -/* ISP2400: Get the requirements for the shading correction. */ +/* Get the requirements for the shading correction. */ static int ia_css_binary_compute_shading_table_bayer_origin( const struct ia_css_binary *binary, /* [in] */ @@ -261,227 +244,12 @@ ia_css_binary_compute_shading_table_bayer_origin( return err; } -/* ISP2401: Get the requirements for the shading correction. */ -static int -sh_css_binary_get_sc_requirements(const struct ia_css_binary *binary, /* [in] */ - unsigned int required_bds_factor, /* [in] */ - const struct ia_css_stream_config *stream_config, /* [in] */ - struct sh_css_binary_sc_requirements *scr) /* [out] */ -{ - int err; - - /* Numerator and denominator of the fixed bayer downscaling factor. (numerator >= denominator) */ - unsigned int bds_num, bds_den; - - /* Horizontal/Vertical ratio of bayer scaling between input area and output area. */ - unsigned int bs_hor_ratio_in, bs_hor_ratio_out, bs_ver_ratio_in, bs_ver_ratio_out; - - /* Left padding set by InputFormatter. */ - unsigned int left_padding_bqs; - - /* Flags corresponding to NEED_BDS_FACTOR_2_00/NEED_BDS_FACTOR_1_50/NEED_BDS_FACTOR_1_25 macros - * defined in isp kernels. */ - unsigned int need_bds_factor_2_00, need_bds_factor_1_50, need_bds_factor_1_25; - - /* Left padding adjusted inside the isp kernels. */ - unsigned int left_padding_adjusted_bqs; - - /* Top padding padded inside the isp kernel for bayer downscaling binaries. */ - unsigned int top_padding_bqs; - - /* Bayer downscaling factor 1.0 by fixed-point. */ - int bds_frac_acc = FRAC_ACC; /* FRAC_ACC is defined in ia_css_fixedbds_param.h. */ - - /* Right/Down shift amount caused by filters applied BEFORE shading corrertion. */ - unsigned int right_shift_bqs_before_bs; /* right shift before bayer scaling */ - unsigned int right_shift_bqs_after_bs; /* right shift after bayer scaling */ - unsigned int down_shift_bqs_before_bs; /* down shift before bayer scaling */ - unsigned int down_shift_bqs_after_bs; /* down shift after bayer scaling */ - - /* Origin of the real sensor data area on the internal frame at shading correction. */ - unsigned int sensor_data_origin_x_bqs_on_internal; - unsigned int sensor_data_origin_y_bqs_on_internal; - - unsigned int bs_frac = bds_frac_acc; /* scaling factor 1.0 in fixed point */ - unsigned int bs_out, bs_in; /* scaling ratio in fixed point */ - - IA_CSS_ENTER_PRIVATE("binary=%p, required_bds_factor=%d, stream_config=%p", - binary, required_bds_factor, stream_config); - - /* Get the numerator and denominator of the required bayer downscaling factor. */ - err = sh_css_bds_factor_get_numerator_denominator(required_bds_factor, - &bds_num, &bds_den); - if (err) { - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; - } - - IA_CSS_LOG("bds_num=%d, bds_den=%d", bds_num, bds_den); - - /* Set the horizontal/vertical ratio of bayer scaling between input area and output area. */ - bs_hor_ratio_in = bds_num; - bs_hor_ratio_out = bds_den; - bs_ver_ratio_in = bds_num; - bs_ver_ratio_out = bds_den; - - /* Set the left padding set by InputFormatter. (ia_css_ifmtr_configure() in ifmtr.c) */ - if (stream_config->left_padding == -1) - left_padding_bqs = _ISP_BQS(binary->left_padding); - else - left_padding_bqs = (unsigned int)((int)ISP_VEC_NELEMS - _ISP_BQS(stream_config->left_padding)); - - IA_CSS_LOG("stream.left_padding=%d, binary.left_padding=%d, left_padding_bqs=%d", - stream_config->left_padding, binary->left_padding, - left_padding_bqs); - - /* Set the left padding adjusted inside the isp kernels. - * When the bds_factor isn't 1.00, the left padding size is adjusted inside the isp, - * before bayer downscaling. (scaled_hor_plane_index(), raw_compute_hphase() in raw.isp.c) - */ - need_bds_factor_2_00 = ((binary->info->sp.bds.supported_bds_factors & - (PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_2_00) | - PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_2_50) | - PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_3_00) | - PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_4_00) | - PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_4_50) | - PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_5_00) | - PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_6_00) | - PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_8_00))) != 0); - - need_bds_factor_1_50 = ((binary->info->sp.bds.supported_bds_factors & - (PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_1_50) | - PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_2_25) | - PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_3_00) | - PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_4_50) | - PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_6_00))) != 0); - - need_bds_factor_1_25 = ((binary->info->sp.bds.supported_bds_factors & - (PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_1_25) | - PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_2_50) | - PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_5_00))) != 0); - - if (binary->info->sp.pipeline.left_cropping > 0 && - (need_bds_factor_2_00 || need_bds_factor_1_50 || need_bds_factor_1_25)) { - /* - * downscale 2.0 -> first_vec_adjusted_bqs = 128 - * downscale 1.5 -> first_vec_adjusted_bqs = 96 - * downscale 1.25 -> first_vec_adjusted_bqs = 80 - */ - unsigned int first_vec_adjusted_bqs = ISP_VEC_NELEMS * bs_hor_ratio_in / bs_hor_ratio_out; - left_padding_adjusted_bqs = first_vec_adjusted_bqs - - _ISP_BQS(binary->info->sp.pipeline.left_cropping); - } else { - left_padding_adjusted_bqs = left_padding_bqs; - } - - IA_CSS_LOG("supported_bds_factors=%d, need_bds_factor:2_00=%d, 1_50=%d, 1_25=%d", - binary->info->sp.bds.supported_bds_factors, - need_bds_factor_2_00, need_bds_factor_1_50, - need_bds_factor_1_25); - IA_CSS_LOG("left_cropping=%d, left_padding_adjusted_bqs=%d", - binary->info->sp.pipeline.left_cropping, - left_padding_adjusted_bqs); - - /* Set the top padding padded inside the isp kernel for bayer downscaling binaries. - * When the bds_factor isn't 1.00, the top padding is padded inside the isp - * before bayer downscaling, because the top cropping size (input margin) is not enough. - * (calculate_input_line(), raw_compute_vphase(), dma_read_raw() in raw.isp.c) - * NOTE: In dma_read_raw(), the factor passed to raw_compute_vphase() is got by get_bds_factor_for_dma_read(). - * This factor is BDS_FPVAL_100/BDS_FPVAL_125/BDS_FPVAL_150/BDS_FPVAL_200. - */ - top_padding_bqs = 0; - if (binary->info->sp.pipeline.top_cropping > 0 && - (required_bds_factor == SH_CSS_BDS_FACTOR_1_25 || - required_bds_factor == SH_CSS_BDS_FACTOR_1_50 || - required_bds_factor == SH_CSS_BDS_FACTOR_2_00)) { - /* Calculation from calculate_input_line() and raw_compute_vphase() in raw.isp.c. */ - int top_cropping_bqs = _ISP_BQS(binary->info->sp.pipeline.top_cropping); - /* top cropping (in bqs) */ - int factor = bds_num * bds_frac_acc / - bds_den; /* downscaling factor by fixed-point */ - int top_padding_bqsxfrac_acc = (top_cropping_bqs * factor - top_cropping_bqs * - bds_frac_acc) - + (2 * bds_frac_acc - factor); /* top padding by fixed-point (in bqs) */ - - top_padding_bqs = (unsigned int)((top_padding_bqsxfrac_acc + bds_frac_acc / 2 - - 1) / bds_frac_acc); - } - - IA_CSS_LOG("top_cropping=%d, top_padding_bqs=%d", - binary->info->sp.pipeline.top_cropping, top_padding_bqs); - - /* Set the right/down shift amount caused by filters applied BEFORE bayer scaling, - * which scaling is applied BEFORE shading corrertion. - * - * When the bds_factor isn't 1.00, 3x3 anti-alias filter is applied to each color plane(Gr/R/B/Gb) - * before bayer downscaling. - * This filter shifts each color plane (Gr/R/B/Gb) to right/down directions by 1 pixel. - */ - right_shift_bqs_before_bs = 0; - down_shift_bqs_before_bs = 0; - - if (need_bds_factor_2_00 || need_bds_factor_1_50 || need_bds_factor_1_25) { - right_shift_bqs_before_bs = 1; - down_shift_bqs_before_bs = 1; - } - - IA_CSS_LOG("right_shift_bqs_before_bs=%d, down_shift_bqs_before_bs=%d", - right_shift_bqs_before_bs, down_shift_bqs_before_bs); - - /* Set the right/down shift amount caused by filters applied AFTER bayer scaling, - * which scaling is applied BEFORE shading corrertion. - * - * When DPC&BNR is processed between bayer scaling and shading correction, - * DPC&BNR moves each color plane (Gr/R/B/Gb) to right/down directions by 1 pixel. - */ - right_shift_bqs_after_bs = 0; - down_shift_bqs_after_bs = 0; - - /* if DPC&BNR is enabled in the binary */ - if (binary->info->mem_offsets.offsets.param->dmem.dp.size != 0) { - right_shift_bqs_after_bs = 1; - down_shift_bqs_after_bs = 1; - } - - IA_CSS_LOG("right_shift_bqs_after_bs=%d, down_shift_bqs_after_bs=%d", - right_shift_bqs_after_bs, down_shift_bqs_after_bs); - - bs_out = bs_hor_ratio_out * bs_frac; - bs_in = bs_hor_ratio_in * bs_frac; - sensor_data_origin_x_bqs_on_internal = - ((left_padding_adjusted_bqs + right_shift_bqs_before_bs) * bs_out + bs_in / 2) / bs_in - + right_shift_bqs_after_bs; /* "+ bs_in/2": rounding */ - - bs_out = bs_ver_ratio_out * bs_frac; - bs_in = bs_ver_ratio_in * bs_frac; - sensor_data_origin_y_bqs_on_internal = - ((top_padding_bqs + down_shift_bqs_before_bs) * bs_out + bs_in / 2) / bs_in - + down_shift_bqs_after_bs; /* "+ bs_in/2": rounding */ - - scr->bayer_scale_hor_ratio_in = (uint32_t)bs_hor_ratio_in; - scr->bayer_scale_hor_ratio_out = (uint32_t)bs_hor_ratio_out; - scr->bayer_scale_ver_ratio_in = (uint32_t)bs_ver_ratio_in; - scr->bayer_scale_ver_ratio_out = (uint32_t)bs_ver_ratio_out; - scr->sensor_data_origin_x_bqs_on_internal = (uint32_t)sensor_data_origin_x_bqs_on_internal; - scr->sensor_data_origin_y_bqs_on_internal = (uint32_t)sensor_data_origin_y_bqs_on_internal; - - IA_CSS_LOG("sc_requirements: %d, %d, %d, %d, %d, %d", - scr->bayer_scale_hor_ratio_in, - scr->bayer_scale_hor_ratio_out, - scr->bayer_scale_ver_ratio_in, scr->bayer_scale_ver_ratio_out, - scr->sensor_data_origin_x_bqs_on_internal, - scr->sensor_data_origin_y_bqs_on_internal); - - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; -} - /* Get the shading information of Shading Correction Type 1. */ static int -isp2400_binary_get_shading_info_type_1(const struct ia_css_binary *binary, /* [in] */ - unsigned int required_bds_factor, /* [in] */ - const struct ia_css_stream_config *stream_config, /* [in] */ - struct ia_css_shading_info *info) /* [out] */ +binary_get_shading_info_type_1(const struct ia_css_binary *binary, /* [in] */ + unsigned int required_bds_factor, /* [in] */ + const struct ia_css_stream_config *stream_config, /* [in] */ + struct ia_css_shading_info *info) /* [out] */ { int err; struct sh_css_shading_table_bayer_origin_compute_results res; @@ -522,173 +290,6 @@ isp2400_binary_get_shading_info_type_1(const struct ia_css_binary *binary, /* [i return err; } -/* Get the shading information of Shading Correction Type 1. */ -static int -isp2401_binary_get_shading_info_type_1(const struct ia_css_binary *binary, /* [in] */ - unsigned int required_bds_factor, /* [in] */ - const struct ia_css_stream_config *stream_config, /* [in] */ - struct ia_css_shading_info *shading_info, /* [out] */ - struct ia_css_pipe_config *pipe_config) /* [out] */ -{ - int err; - struct sh_css_binary_sc_requirements scr; - - u32 in_width_bqs, in_height_bqs, internal_width_bqs, internal_height_bqs; - u32 num_hor_grids, num_ver_grids, bqs_per_grid_cell, tbl_width_bqs, tbl_height_bqs; - u32 sensor_org_x_bqs_on_internal, sensor_org_y_bqs_on_internal, sensor_width_bqs, sensor_height_bqs; - u32 sensor_center_x_bqs_on_internal, sensor_center_y_bqs_on_internal; - u32 left, right, upper, lower; - u32 adjust_left, adjust_right, adjust_upper, adjust_lower, adjust_width_bqs, adjust_height_bqs; - u32 internal_org_x_bqs_on_tbl, internal_org_y_bqs_on_tbl; - u32 sensor_org_x_bqs_on_tbl, sensor_org_y_bqs_on_tbl; - - assert(binary); - assert(stream_config); - assert(shading_info); - assert(pipe_config); - - IA_CSS_ENTER_PRIVATE("binary=%p, required_bds_factor=%d, stream_config=%p", - binary, required_bds_factor, stream_config); - - /* Initialize by default values. */ - *shading_info = DEFAULT_SHADING_INFO_TYPE_1; - - err = sh_css_binary_get_sc_requirements(binary, required_bds_factor, stream_config, &scr); - if (err) { - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; - } - - IA_CSS_LOG("binary: id=%d, sctbl=%dx%d, deci=%d", - binary->info->sp.id, binary->sctbl_width_per_color, binary->sctbl_height, binary->deci_factor_log2); - IA_CSS_LOG("binary: in=%dx%d, in_padded_w=%d, int=%dx%d, int_padded_w=%d, out=%dx%d, out_padded_w=%d", - binary->in_frame_info.res.width, binary->in_frame_info.res.height, binary->in_frame_info.padded_width, - binary->internal_frame_info.res.width, binary->internal_frame_info.res.height, - binary->internal_frame_info.padded_width, - binary->out_frame_info[0].res.width, binary->out_frame_info[0].res.height, - binary->out_frame_info[0].padded_width); - - /* Set the input size from sensor, which includes left/top crop size. */ - in_width_bqs = _ISP_BQS(binary->in_frame_info.res.width); - in_height_bqs = _ISP_BQS(binary->in_frame_info.res.height); - - /* - * Frame size internally used in ISP, including sensor data and padding. - * This is the frame size, to which the shading correction is applied. - */ - internal_width_bqs = _ISP_BQS(binary->internal_frame_info.res.width); - internal_height_bqs = _ISP_BQS(binary->internal_frame_info.res.height); - - /* Shading table. */ - num_hor_grids = binary->sctbl_width_per_color; - num_ver_grids = binary->sctbl_height; - bqs_per_grid_cell = (1 << binary->deci_factor_log2); - tbl_width_bqs = (num_hor_grids - 1) * bqs_per_grid_cell; - tbl_height_bqs = (num_ver_grids - 1) * bqs_per_grid_cell; - - IA_CSS_LOG("tbl_width_bqs=%d, tbl_height_bqs=%d", tbl_width_bqs, tbl_height_bqs); - - /* - * Real sensor data area on the internal frame at shading correction. - * Filters and scaling are applied to the internal frame before - * shading correction, depending on the binary. - */ - sensor_org_x_bqs_on_internal = scr.sensor_data_origin_x_bqs_on_internal; - sensor_org_y_bqs_on_internal = scr.sensor_data_origin_y_bqs_on_internal; - { - unsigned int bs_frac = 8; /* scaling factor 1.0 in fixed point (8 == FRAC_ACC macro in ISP) */ - unsigned int bs_out, bs_in; /* scaling ratio in fixed point */ - - bs_out = scr.bayer_scale_hor_ratio_out * bs_frac; - bs_in = scr.bayer_scale_hor_ratio_in * bs_frac; - sensor_width_bqs = (in_width_bqs * bs_out + bs_in / 2) / bs_in; /* "+ bs_in/2": rounding */ - - bs_out = scr.bayer_scale_ver_ratio_out * bs_frac; - bs_in = scr.bayer_scale_ver_ratio_in * bs_frac; - sensor_height_bqs = (in_height_bqs * bs_out + bs_in / 2) / bs_in; /* "+ bs_in/2": rounding */ - } - - /* Center of the sensor data on the internal frame at shading correction. */ - sensor_center_x_bqs_on_internal = sensor_org_x_bqs_on_internal + sensor_width_bqs / 2; - sensor_center_y_bqs_on_internal = sensor_org_y_bqs_on_internal + sensor_height_bqs / 2; - - /* Size of left/right/upper/lower sides of the sensor center on the internal frame. */ - left = sensor_center_x_bqs_on_internal; - right = internal_width_bqs - sensor_center_x_bqs_on_internal; - upper = sensor_center_y_bqs_on_internal; - lower = internal_height_bqs - sensor_center_y_bqs_on_internal; - - /* Align the size of left/right/upper/lower sides to a multiple of the grid cell size. */ - adjust_left = CEIL_MUL(left, bqs_per_grid_cell); - adjust_right = CEIL_MUL(right, bqs_per_grid_cell); - adjust_upper = CEIL_MUL(upper, bqs_per_grid_cell); - adjust_lower = CEIL_MUL(lower, bqs_per_grid_cell); - - /* Shading table should cover the adjusted frame size. */ - adjust_width_bqs = adjust_left + adjust_right; - adjust_height_bqs = adjust_upper + adjust_lower; - - IA_CSS_LOG("adjust_width_bqs=%d, adjust_height_bqs=%d", adjust_width_bqs, adjust_height_bqs); - - if (adjust_width_bqs > tbl_width_bqs || adjust_height_bqs > tbl_height_bqs) { - IA_CSS_LEAVE_ERR_PRIVATE(-EINVAL); - return -EINVAL; - } - - /* Origin of the internal frame on the shading table. */ - internal_org_x_bqs_on_tbl = adjust_left - left; - internal_org_y_bqs_on_tbl = adjust_upper - upper; - - /* Origin of the real sensor data area on the shading table. */ - sensor_org_x_bqs_on_tbl = internal_org_x_bqs_on_tbl + sensor_org_x_bqs_on_internal; - sensor_org_y_bqs_on_tbl = internal_org_y_bqs_on_tbl + sensor_org_y_bqs_on_internal; - - /* The shading information necessary as API is stored in the shading_info. */ - shading_info->info.type_1.num_hor_grids = num_hor_grids; - shading_info->info.type_1.num_ver_grids = num_ver_grids; - shading_info->info.type_1.bqs_per_grid_cell = bqs_per_grid_cell; - - shading_info->info.type_1.bayer_scale_hor_ratio_in = scr.bayer_scale_hor_ratio_in; - shading_info->info.type_1.bayer_scale_hor_ratio_out = scr.bayer_scale_hor_ratio_out; - shading_info->info.type_1.bayer_scale_ver_ratio_in = scr.bayer_scale_ver_ratio_in; - shading_info->info.type_1.bayer_scale_ver_ratio_out = scr.bayer_scale_ver_ratio_out; - - shading_info->info.type_1.isp_input_sensor_data_res_bqs.width = in_width_bqs; - shading_info->info.type_1.isp_input_sensor_data_res_bqs.height = in_height_bqs; - - shading_info->info.type_1.sensor_data_res_bqs.width = sensor_width_bqs; - shading_info->info.type_1.sensor_data_res_bqs.height = sensor_height_bqs; - - shading_info->info.type_1.sensor_data_origin_bqs_on_sctbl.x = (int32_t)sensor_org_x_bqs_on_tbl; - shading_info->info.type_1.sensor_data_origin_bqs_on_sctbl.y = (int32_t)sensor_org_y_bqs_on_tbl; - - /* The shading information related to ISP (but, not necessary as API) is stored in the pipe_config. */ - pipe_config->internal_frame_origin_bqs_on_sctbl.x = (int32_t)internal_org_x_bqs_on_tbl; - pipe_config->internal_frame_origin_bqs_on_sctbl.y = (int32_t)internal_org_y_bqs_on_tbl; - - IA_CSS_LOG("shading_info: grids=%dx%d, cell=%d, scale=%d,%d,%d,%d, input=%dx%d, data=%dx%d, origin=(%d,%d)", - shading_info->info.type_1.num_hor_grids, - shading_info->info.type_1.num_ver_grids, - shading_info->info.type_1.bqs_per_grid_cell, - shading_info->info.type_1.bayer_scale_hor_ratio_in, - shading_info->info.type_1.bayer_scale_hor_ratio_out, - shading_info->info.type_1.bayer_scale_ver_ratio_in, - shading_info->info.type_1.bayer_scale_ver_ratio_out, - shading_info->info.type_1.isp_input_sensor_data_res_bqs.width, - shading_info->info.type_1.isp_input_sensor_data_res_bqs.height, - shading_info->info.type_1.sensor_data_res_bqs.width, - shading_info->info.type_1.sensor_data_res_bqs.height, - shading_info->info.type_1.sensor_data_origin_bqs_on_sctbl.x, - shading_info->info.type_1.sensor_data_origin_bqs_on_sctbl.y); - - IA_CSS_LOG("pipe_config: origin=(%d,%d)", - pipe_config->internal_frame_origin_bqs_on_sctbl.x, - pipe_config->internal_frame_origin_bqs_on_sctbl.y); - - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; -} - int ia_css_binary_get_shading_info(const struct ia_css_binary *binary, /* [in] */ @@ -706,24 +307,13 @@ ia_css_binary_get_shading_info(const struct ia_css_binary *binary, /* [in] */ IA_CSS_ENTER_PRIVATE("binary=%p, type=%d, required_bds_factor=%d, stream_config=%p", binary, type, required_bds_factor, stream_config); - if (type != IA_CSS_SHADING_CORRECTION_TYPE_1) { - err = -ENOTSUPP; - - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; - } - - if (!IS_ISP2401) - err = isp2400_binary_get_shading_info_type_1(binary, - required_bds_factor, - stream_config, - shading_info); + if (type == IA_CSS_SHADING_CORRECTION_TYPE_1) + err = binary_get_shading_info_type_1(binary, + required_bds_factor, + stream_config, + shading_info); else - err = isp2401_binary_get_shading_info_type_1(binary, - required_bds_factor, - stream_config, - shading_info, - pipe_config); + err = -ENOTSUPP; IA_CSS_LEAVE_ERR_PRIVATE(err); return err; @@ -805,11 +395,7 @@ ia_css_binary_3a_grid_info(const struct ia_css_binary *binary, s3a_info->deci_factor_log2 = binary->deci_factor_log2; s3a_info->elem_bit_depth = SH_CSS_BAYER_BITS; s3a_info->use_dmem = binary->info->sp.s3a.s3atbl_use_dmem; -#if defined(HAS_NO_HMEM) - s3a_info->has_histogram = 1; -#else s3a_info->has_histogram = 0; -#endif IA_CSS_LEAVE_ERR_PRIVATE(err); return err; } @@ -965,15 +551,9 @@ binary_grid_deci_factor_log2(int width, int height) /* 3A/Shading decimation factor spcification (at August 2008) * ------------------------------------------------------------------ * [Image Width (BQ)] [Decimation Factor (BQ)] [Resulting grid cells] - #ifndef ISP2401 * 1280 ?c 32 40 ?c * 640 ?c 1279 16 40 ?c 80 * ?c 639 8 ?c 80 - #else - * from 1280 32 from 40 - * from 640 to 1279 16 from 40 to 80 - * to 639 8 to 80 - #endif * ------------------------------------------------------------------ */ /* Maximum and minimum decimation factor by the specification */ @@ -1335,26 +915,14 @@ ia_css_binary_fill_info(const struct ia_css_binary_xinfo *xinfo, if (info->enable.sc) { - if (!IS_ISP2401) { - binary->sctbl_width_per_color = _ISP2400_SCTBL_WIDTH_PER_COLOR(sc_3a_dis_padded_width, s3a_log_deci); - binary->sctbl_aligned_width_per_color = ISP2400_SH_CSS_MAX_SCTBL_ALIGNED_WIDTH_PER_COLOR; - binary->sctbl_height = _ISP2400_SCTBL_HEIGHT(sc_3a_dis_height, s3a_log_deci); - } else { - binary->sctbl_width_per_color = _ISP2401_SCTBL_WIDTH_PER_COLOR(isp_internal_width, s3a_log_deci); - binary->sctbl_aligned_width_per_color = ISP2401_SH_CSS_MAX_SCTBL_ALIGNED_WIDTH_PER_COLOR; - binary->sctbl_height = _ISP2401_SCTBL_HEIGHT(isp_internal_height, s3a_log_deci); - binary->sctbl_legacy_width_per_color = _ISP_SCTBL_LEGACY_WIDTH_PER_COLOR(sc_3a_dis_padded_width, s3a_log_deci); - binary->sctbl_legacy_height = _ISP_SCTBL_LEGACY_HEIGHT(sc_3a_dis_height, s3a_log_deci); - } + binary->sctbl_width_per_color = _ISP_SCTBL_WIDTH_PER_COLOR(sc_3a_dis_padded_width, s3a_log_deci); + binary->sctbl_aligned_width_per_color = SH_CSS_MAX_SCTBL_ALIGNED_WIDTH_PER_COLOR; + binary->sctbl_height = _ISP_SCTBL_HEIGHT(sc_3a_dis_height, s3a_log_deci); } else { binary->sctbl_width_per_color = 0; binary->sctbl_aligned_width_per_color = 0; binary->sctbl_height = 0; - if (IS_ISP2401) { - binary->sctbl_legacy_width_per_color = 0; - binary->sctbl_legacy_height = 0; - } } ia_css_sdis_init_info(&binary->dis, sc_3a_dis_width, @@ -1383,20 +951,13 @@ static int __ia_css_binary_find(struct ia_css_binary_descr *descr, *req_vf_info; struct ia_css_binary_xinfo *xcandidate; -#ifndef ISP2401 bool need_ds, need_dz, need_dvs, need_xnr, need_dpc; -#else - bool need_ds, need_dz, need_dvs, need_xnr, need_dpc, need_tnr; -#endif bool striped; bool enable_yuv_ds; bool enable_high_speed; bool enable_dvs_6axis; bool enable_reduced_pipe; bool enable_capture_pp_bli; -#ifdef ISP2401 - bool enable_luma_only; -#endif int err = -EINVAL; bool continuous; unsigned int isp_pipe_version; @@ -1418,41 +979,26 @@ static int __ia_css_binary_find(struct ia_css_binary_descr *descr, stream_format = descr->stream_format; req_in_info = descr->in_info; req_bds_out_info = descr->bds_out_info; - for (i = 0; i < IA_CSS_BINARY_MAX_OUTPUT_PORTS; i++) - { + for (i = 0; i < IA_CSS_BINARY_MAX_OUTPUT_PORTS; i++) { req_out_info[i] = descr->out_info[i]; if (req_out_info[i] && (req_out_info[i]->res.width != 0)) req_bin_out_info = req_out_info[i]; } if (!req_bin_out_info) return -EINVAL; -#ifndef ISP2401 req_vf_info = descr->vf_info; -#else - - if ((descr->vf_info) && (descr->vf_info->res.width == 0)) - /* width==0 means that there is no vf pin (e.g. in SkyCam preview case) */ - req_vf_info = NULL; - else - req_vf_info = descr->vf_info; -#endif need_xnr = descr->enable_xnr; need_ds = descr->enable_fractional_ds; need_dz = false; need_dvs = false; need_dpc = descr->enable_dpc; -#ifdef ISP2401 - need_tnr = descr->enable_tnr; -#endif + enable_yuv_ds = descr->enable_yuv_ds; enable_high_speed = descr->enable_high_speed; enable_dvs_6axis = descr->enable_dvs_6axis; enable_reduced_pipe = descr->enable_reduced_pipe; enable_capture_pp_bli = descr->enable_capture_pp_bli; -#ifdef ISP2401 - enable_luma_only = descr->enable_luma_only; -#endif continuous = descr->continuous; striped = descr->striped; isp_pipe_version = descr->isp_pipe_version; @@ -1462,8 +1008,7 @@ static int __ia_css_binary_find(struct ia_css_binary_descr *descr, internal_res.width = 0; internal_res.height = 0; - if (mode == IA_CSS_BINARY_MODE_VIDEO) - { + if (mode == IA_CSS_BINARY_MODE_VIDEO) { dvs_env = descr->dvs_env; need_dz = descr->enable_dz; /* Video is the only mode that has a nodz variant. */ @@ -1472,8 +1017,7 @@ static int __ia_css_binary_find(struct ia_css_binary_descr *descr, /* print a map of the binary file */ ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "BINARY INFO:\n"); - for (i = 0; i < IA_CSS_BINARY_NUM_MODES; i++) - { + for (i = 0; i < IA_CSS_BINARY_NUM_MODES; i++) { xcandidate = binary_infos[i]; if (xcandidate) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "%d:\n", i); @@ -1488,8 +1032,7 @@ static int __ia_css_binary_find(struct ia_css_binary_descr *descr, /* printf("sh_css_binary_find: pipe version %d\n", isp_pipe_version); */ for (xcandidate = binary_infos[mode]; xcandidate; - xcandidate = xcandidate->next) - { + xcandidate = xcandidate->next) { struct ia_css_binary_info *candidate = &xcandidate->sp; /* printf("sh_css_binary_find: evaluating candidate: * %d\n",candidate->id); */ @@ -1747,24 +1290,6 @@ static int __ia_css_binary_find(struct ia_css_binary_descr *descr, continue; } -#ifdef ISP2401 - if (candidate->enable.luma_only != enable_luma_only) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_binary_find() [%d] continue: %d != %d\n", - __LINE__, candidate->enable.luma_only, - descr->enable_luma_only); - continue; - } - - if (!candidate->enable.tnr && need_tnr) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_binary_find() [%d] continue: !%d && %d\n", - __LINE__, candidate->enable.tnr, - descr->enable_tnr); - continue; - } - -#endif /* reconfigure any variable properties of the binary */ err = ia_css_binary_fill_info(xcandidate, online, two_ppc, stream_format, req_in_info, diff --git a/drivers/staging/media/atomisp/pci/runtime/debug/src/ia_css_debug.c b/drivers/staging/media/atomisp/pci/runtime/debug/src/ia_css_debug.c index 05ce0f73f5ae..f46238725eea 100644 --- a/drivers/staging/media/atomisp/pci/runtime/debug/src/ia_css_debug.c +++ b/drivers/staging/media/atomisp/pci/runtime/debug/src/ia_css_debug.c @@ -2821,7 +2821,7 @@ ia_css_debug_pipe_graph_dump_stage( "in", true); } - for (i = 0; i < NUM_TNR_FRAMES; i++) { + for (i = 0; i < NUM_VIDEO_TNR_FRAMES; i++) { if (stage->args.tnr_frames[i]) { ia_css_debug_pipe_graph_dump_frame( stage->args.tnr_frames[i], id, diff --git a/drivers/staging/media/atomisp/pci/runtime/frame/interface/ia_css_frame.h b/drivers/staging/media/atomisp/pci/runtime/frame/interface/ia_css_frame.h index 31f01e0f58aa..c756a134efc3 100644 --- a/drivers/staging/media/atomisp/pci/runtime/frame/interface/ia_css_frame.h +++ b/drivers/staging/media/atomisp/pci/runtime/frame/interface/ia_css_frame.h @@ -138,27 +138,7 @@ bool ia_css_frame_is_same_type( * @param[in] info The frame info * @return */ -void ia_css_dma_configure_from_info( - struct dma_port_config *config, - const struct ia_css_frame_info *info); - -/* ISP2401 */ -/* @brief Finds the cropping resolution - * This function finds the maximum cropping resolution in an input image keeping - * the aspect ratio for the given output resolution.Calculates the coordinates - * for cropping from the center and returns the starting pixel location of the - * region in the input image. Also returns the dimension of the cropping - * resolution. - * - * @param - * @param[in] in_res Resolution of input image - * @param[in] out_res Resolution of output image - * @param[out] crop_res Crop resolution of input image - * @return Returns 0 or -EINVAL on error - */ -int -ia_css_frame_find_crop_resolution(const struct ia_css_resolution *in_res, - const struct ia_css_resolution *out_res, - struct ia_css_resolution *crop_res); +int ia_css_dma_configure_from_info(struct dma_port_config *config, + const struct ia_css_frame_info *info); #endif /* __IA_CSS_FRAME_H__ */ diff --git a/drivers/staging/media/atomisp/pci/runtime/frame/src/frame.c b/drivers/staging/media/atomisp/pci/runtime/frame/src/frame.c index 10c4907187d9..a3aae638b0bf 100644 --- a/drivers/staging/media/atomisp/pci/runtime/frame/src/frame.c +++ b/drivers/staging/media/atomisp/pci/runtime/frame/src/frame.c @@ -168,25 +168,23 @@ int ia_css_frame_map(struct ia_css_frame **frame, if (err) return err; - if (!err) { - if (pgnr < ((PAGE_ALIGN(me->data_bytes)) >> PAGE_SHIFT)) { - dev_err(atomisp_dev, - "user space memory size is less than the expected size..\n"); - err = -ENOMEM; - goto error; - } else if (pgnr > ((PAGE_ALIGN(me->data_bytes)) >> PAGE_SHIFT)) { - dev_err(atomisp_dev, - "user space memory size is large than the expected size..\n"); - err = -ENOMEM; - goto error; - } + if (pgnr < ((PAGE_ALIGN(me->data_bytes)) >> PAGE_SHIFT)) { + dev_err(atomisp_dev, + "user space memory size is less than the expected size..\n"); + err = -ENOMEM; + goto error; + } else if (pgnr > ((PAGE_ALIGN(me->data_bytes)) >> PAGE_SHIFT)) { + dev_err(atomisp_dev, + "user space memory size is large than the expected size..\n"); + err = -ENOMEM; + goto error; + } - me->data = hmm_alloc(me->data_bytes, HMM_BO_USER, 0, data, - attribute & ATOMISP_MAP_FLAG_CACHED); + me->data = hmm_alloc(me->data_bytes, HMM_BO_USER, 0, data, + attribute & ATOMISP_MAP_FLAG_CACHED); - if (me->data == mmgr_NULL) - err = -EINVAL; - } + if (me->data == mmgr_NULL) + err = -EINVAL; error: if (err) { @@ -594,10 +592,8 @@ bool ia_css_frame_is_same_type(const struct ia_css_frame *frame_a, return is_equal; } -void -ia_css_dma_configure_from_info( - struct dma_port_config *config, - const struct ia_css_frame_info *info) +int ia_css_dma_configure_from_info(struct dma_port_config *config, + const struct ia_css_frame_info *info) { unsigned int is_raw_packed = info->format == IA_CSS_FRAME_FORMAT_RAW_PACKED; unsigned int bits_per_pixel = is_raw_packed ? info->raw_bit_depth : @@ -610,7 +606,13 @@ ia_css_dma_configure_from_info( config->elems = (uint8_t)elems_b; config->width = (uint16_t)info->res.width; config->crop = 0; - assert(config->width <= info->padded_width); + + if (config->width > info->padded_width) { + dev_err(atomisp_dev, "internal error: padded_width is too small!\n"); + return -EINVAL; + } + + return 0; } /************************************************************************** @@ -931,73 +933,3 @@ void ia_css_resolution_to_sp_resolution( to->width = (uint16_t)from->width; to->height = (uint16_t)from->height; } - -/* ISP2401 */ -int -ia_css_frame_find_crop_resolution(const struct ia_css_resolution *in_res, - const struct ia_css_resolution *out_res, - struct ia_css_resolution *crop_res) { - u32 wd_even_ceil, ht_even_ceil; - u32 in_ratio, out_ratio; - - if ((!in_res) || (!out_res) || (!crop_res)) - return -EINVAL; - - IA_CSS_ENTER_PRIVATE("in(%ux%u) -> out(%ux%u)", in_res->width, - in_res->height, out_res->width, out_res->height); - - if ((in_res->width == 0) - || (in_res->height == 0) - || (out_res->width == 0) - || (out_res->height == 0)) - return -EINVAL; - - if ((out_res->width > in_res->width) || - (out_res->height > in_res->height)) - return -EINVAL; - - /* If aspect ratio (width/height) of out_res is higher than the aspect - * ratio of the in_res, then we crop vertically, otherwise we crop - * horizontally. - */ - in_ratio = in_res->width * out_res->height; - out_ratio = out_res->width * in_res->height; - - if (in_ratio == out_ratio) - { - crop_res->width = in_res->width; - crop_res->height = in_res->height; - } else if (out_ratio > in_ratio) - { - crop_res->width = in_res->width; - crop_res->height = ROUND_DIV(out_res->height * crop_res->width, - out_res->width); - } else - { - crop_res->height = in_res->height; - crop_res->width = ROUND_DIV(out_res->width * crop_res->height, - out_res->height); - } - - /* Round new (cropped) width and height to an even number. - * binarydesc_calculate_bds_factor is such that we should consider as - * much of the input as possible. This is different only when we end up - * with an odd number in the last step. So, we take the next even number - * if it falls within the input, otherwise take the previous even no. - */ - wd_even_ceil = EVEN_CEIL(crop_res->width); - ht_even_ceil = EVEN_CEIL(crop_res->height); - if ((wd_even_ceil > in_res->width) || (ht_even_ceil > in_res->height)) - { - crop_res->width = EVEN_FLOOR(crop_res->width); - crop_res->height = EVEN_FLOOR(crop_res->height); - } else - { - crop_res->width = wd_even_ceil; - crop_res->height = ht_even_ceil; - } - - IA_CSS_LEAVE_PRIVATE("in(%ux%u) -> out(%ux%u)", crop_res->width, - crop_res->height, out_res->width, out_res->height); - return 0; -} diff --git a/drivers/staging/media/atomisp/pci/runtime/isys/src/virtual_isys.c b/drivers/staging/media/atomisp/pci/runtime/isys/src/virtual_isys.c index 82f3c19dc455..8fc7746f8639 100644 --- a/drivers/staging/media/atomisp/pci/runtime/isys/src/virtual_isys.c +++ b/drivers/staging/media/atomisp/pci/runtime/isys/src/virtual_isys.c @@ -189,17 +189,6 @@ ia_css_isys_error_t ia_css_isys_stream_create( return false; } -#ifdef ISP2401 - /* - * Early polling is required for timestamp accuracy in certain cause. - * The ISYS HW polling is started on - * ia_css_isys_stream_capture_indication() instead of - * ia_css_pipeline_sp_wait_for_isys_stream_N() as isp processing of - * capture takes longer than getting an ISYS frame - */ - isys_stream->polling_mode = isys_stream_descr->polling_mode; - -#endif /* create metadata channel */ if (isys_stream_descr->metadata.enable) { rc = create_input_system_channel(isys_stream_descr, true, diff --git a/drivers/staging/media/atomisp/pci/runtime/pipeline/src/pipeline.c b/drivers/staging/media/atomisp/pci/runtime/pipeline/src/pipeline.c index d03957d1ecf4..dfc50247ea8e 100644 --- a/drivers/staging/media/atomisp/pci/runtime/pipeline/src/pipeline.c +++ b/drivers/staging/media/atomisp/pci/runtime/pipeline/src/pipeline.c @@ -140,8 +140,7 @@ void ia_css_pipeline_start(enum ia_css_pipe_id pipe_id, false, false, false, true, SH_CSS_BDS_FACTOR_1_00, SH_CSS_PIPE_CONFIG_OVRD_NO_OVRD, IA_CSS_INPUT_MODE_MEMORY, NULL, NULL, - (enum mipi_port_id)0, - NULL, NULL); + (enum mipi_port_id)0); ia_css_pipeline_get_sp_thread_id(pipe_num, &thread_id); if (!sh_css_sp_is_running()) { diff --git a/drivers/staging/media/atomisp/pci/sh_css.c b/drivers/staging/media/atomisp/pci/sh_css.c index c4b35cbab373..1d605e533e29 100644 --- a/drivers/staging/media/atomisp/pci/sh_css.c +++ b/drivers/staging/media/atomisp/pci/sh_css.c @@ -20,6 +20,8 @@ #include "hmm.h" +#include "atomisp_internal.h" + #include "ia_css.h" #include "sh_css_hrt.h" /* only for file 2 MIPI */ #include "ia_css_buffer.h" @@ -62,9 +64,9 @@ #include "ia_css_mmu_private.h" /* sh_css_mmu_set_page_table_base_index() */ #include "gdc_device.h" /* HRT_GDC_N */ #include "dma.h" /* dma_set_max_burst_size() */ -#include "irq.h" /* virq */ -#include "sp.h" /* cnd_sp_irq_enable() */ -#include "isp.h" /* cnd_isp_irq_enable, ISP_VEC_NELEMS */ +#include "irq.h" /* virq */ +#include "sp.h" /* cnd_sp_irq_enable() */ +#include "isp.h" /* cnd_isp_irq_enable, ISP_VEC_NELEMS */ #include "gp_device.h" /* gp_device_reg_store() */ #define __INLINE_GPIO__ #include "gpio.h" @@ -74,15 +76,6 @@ #define SH_CSS_VIDEO_BUFFER_ALIGNMENT 0 -#if WITH_PC_MONITORING -#define MULTIPLE_SAMPLES 1 -#define NOF_SAMPLES 60 -#include "linux/kthread.h" -#include "linux/sched.h" -#include "linux/delay.h" -#include "sh_css_metrics.h" -static int thread_alive; -#endif /* WITH_PC_MONITORING */ #include "ia_css_spctrl.h" #include "ia_css_version_data.h" @@ -97,8 +90,9 @@ static int thread_alive; /* Size of Refcount List */ #define REFCOUNT_SIZE 1000 -/* for JPEG, we don't know the length of the image upfront, - * but since we support sensor upto 16MP, we take this as +/* + * for JPEG, we don't know the length of the image upfront, + * but since we support sensor up to 16MP, we take this as * upper limit. */ #define JPEG_BYTES (16 * 1024 * 1024) @@ -110,9 +104,10 @@ struct sh_css my_css; int __printf(1, 0) (*sh_css_printf)(const char *fmt, va_list args) = NULL; -/* modes of work: stream_create and stream_destroy will update the save/restore data - only when in working mode, not suspend/resume -*/ +/* + * modes of work: stream_create and stream_destroy will update the save/restore + * data only when in working mode, not suspend/resume + */ enum ia_sh_css_modes { sh_css_mode_none = 0, sh_css_mode_working, @@ -120,40 +115,55 @@ enum ia_sh_css_modes { sh_css_mode_resume }; -/* a stream seed, to save and restore the stream data. - the stream seed contains all the data required to "grow" the seed again after it was closed. +/** + * struct sh_css_stream_seed - a stream seed, to save and restore the + * stream data. + * + * @orig_stream: pointer to restore the original handle + * @stream: handle, used as ID too. + * @stream_config: stream config struct + * @num_pipes: number of pipes + * @pipes: pipe handles + * @orig_pipes: pointer to restore original handle + * @pipe_config: pipe config structs + * + * the stream seed contains all the data required to "grow" the seed again + * after it was closed. */ struct sh_css_stream_seed { - struct ia_css_stream - **orig_stream; /* pointer to restore the original handle */ - struct ia_css_stream *stream; /* handle, used as ID too.*/ - struct ia_css_stream_config stream_config; /* stream config struct */ + struct ia_css_stream **orig_stream; + struct ia_css_stream *stream; + struct ia_css_stream_config stream_config; int num_pipes; - struct ia_css_pipe *pipes[IA_CSS_PIPE_ID_NUM]; /* pipe handles */ - struct ia_css_pipe - **orig_pipes[IA_CSS_PIPE_ID_NUM]; /* pointer to restore original handle */ - struct ia_css_pipe_config - pipe_config[IA_CSS_PIPE_ID_NUM]; /* pipe config structs */ + struct ia_css_pipe *pipes[IA_CSS_PIPE_ID_NUM]; + struct ia_css_pipe **orig_pipes[IA_CSS_PIPE_ID_NUM]; + struct ia_css_pipe_config pipe_config[IA_CSS_PIPE_ID_NUM]; }; #define MAX_ACTIVE_STREAMS 5 -/* A global struct for save/restore to hold all the data that should sustain power-down: - MMU base, IRQ type, env for routines, binary loaded FW and the stream seeds. -*/ +/* + * A global struct for save/restore to hold all the data that should + * sustain power-down: MMU base, IRQ type, env for routines, binary loaded FW + * and the stream seeds. + */ struct sh_css_save { enum ia_sh_css_modes mode; - u32 mmu_base; /* the last mmu_base */ + u32 mmu_base; /* the last mmu_base */ enum ia_css_irq_type irq_type; struct sh_css_stream_seed stream_seeds[MAX_ACTIVE_STREAMS]; - struct ia_css_fw *loaded_fw; /* fw struct previously loaded */ - struct ia_css_env driver_env; /* driver-supplied env copy */ + struct ia_css_fw *loaded_fw; /* fw struct previously loaded */ + struct ia_css_env driver_env; /* driver-supplied env copy */ }; static bool my_css_save_initialized; /* if my_css_save was initialized */ static struct sh_css_save my_css_save; -/* pqiao NOTICE: this is for css internal buffer recycling when stopping pipeline, - this array is temporary and will be replaced by resource manager*/ +/* + * pqiao NOTICE: this is for css internal buffer recycling when stopping + * pipeline, + * this array is temporary and will be replaced by resource manager + */ + /* Taking the biggest Size for number of Elements */ #define MAX_HMM_BUFFER_NUM \ (SH_CSS_MAX_NUM_QUEUES * (IA_CSS_NUM_ELEMS_SP2HOST_BUFFER_QUEUE + 2)) @@ -181,27 +191,6 @@ allocate_delay_frames(struct ia_css_pipe *pipe); static int sh_css_pipe_start(struct ia_css_stream *stream); -/* ISP 2401 */ -/* - * @brief Stop all "ia_css_pipe" instances in the target - * "ia_css_stream" instance. - * - * @param[in] stream Point to the target "ia_css_stream" instance. - * - * @return - * - 0, if the "stop" requests have been successfully sent out. - * - CSS error code, otherwise. - * - * - * NOTE - * This API sends the "stop" requests to the "ia_css_pipe" - * instances in the same "ia_css_stream" instance. It will - * return without waiting for all "ia_css_pipe" instatnces - * being stopped. - */ -static int -sh_css_pipes_stop(struct ia_css_stream *stream); - /* * @brief Check if all "ia_css_pipe" instances in the target * "ia_css_stream" instance have stopped. @@ -213,9 +202,6 @@ sh_css_pipes_stop(struct ia_css_stream *stream); * instance have ben stopped. * - false, otherwise. */ -/* ISP 2401 */ -static bool -sh_css_pipes_have_stopped(struct ia_css_stream *stream); /* ISP 2401 */ static int @@ -224,9 +210,6 @@ ia_css_pipe_check_format(struct ia_css_pipe *pipe, /* ISP 2401 */ static int -check_pipe_resolutions(const struct ia_css_pipe *pipe); - -static int ia_css_pipe_load_extension(struct ia_css_pipe *pipe, struct ia_css_fw_info *firmware); @@ -384,10 +367,6 @@ ia_css_get_acc_configs( struct ia_css_pipe *pipe, struct ia_css_isp_config *config); -#if CONFIG_ON_FRAME_ENQUEUE() -static int set_config_on_frame_enqueue(struct ia_css_frame_info - *info, struct frame_data_wrapper *frame); -#endif #ifdef ISP2401 static unsigned int get_crop_lines_for_bayer_order(const struct @@ -396,17 +375,7 @@ static unsigned int get_crop_columns_for_bayer_order(const struct ia_css_stream_config *config); static void get_pipe_extra_pixel(struct ia_css_pipe *pipe, unsigned int *extra_row, unsigned int *extra_column); -static int -aspect_ratio_crop_init(struct ia_css_stream *curr_stream, - struct ia_css_pipe *pipes[], - bool *do_crop_status); - -static bool -aspect_ratio_crop_check(bool enabled, struct ia_css_pipe *curr_pipe); -static int -aspect_ratio_crop(struct ia_css_pipe *curr_pipe, - struct ia_css_resolution *effective_res); #endif static void @@ -447,9 +416,10 @@ static enum ia_css_frame_format yuv422_copy_formats[] = { IA_CSS_FRAME_FORMAT_YUYV }; -/* Verify whether the selected output format is can be produced +/* + * Verify whether the selected output format is can be produced * by the copy binary given the stream format. - * */ + */ static int verify_copy_out_frame_format(struct ia_css_pipe *pipe) { @@ -522,6 +492,7 @@ ia_css_stream_input_format_bits_per_pixel(struct ia_css_stream *stream) return bpp; } +/* TODO: move define to proper file in tools */ #define GP_ISEL_TPG_MODE 0x90058 #if !defined(ISP2401) @@ -573,12 +544,8 @@ sh_css_config_input_network(struct ia_css_stream *stream) vblank_cycles = vblank_lines * (width + hblank_cycles); sh_css_sp_configure_sync_gen(width, height, hblank_cycles, vblank_cycles); - if (!IS_ISP2401) { - if (pipe->stream->config.mode == IA_CSS_INPUT_MODE_TPG) { - /* TODO: move define to proper file in tools */ - ia_css_device_store_uint32(GP_ISEL_TPG_MODE, 0); - } - } + if (pipe->stream->config.mode == IA_CSS_INPUT_MODE_TPG) + ia_css_device_store_uint32(GP_ISEL_TPG_MODE, 0); } ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "sh_css_config_input_network() leave:\n"); @@ -689,13 +656,13 @@ static unsigned int csi2_protocol_calculate_max_subpixels_per_line( /* * The frame format layout is shown below. * - * Line 0: Pixel Pixel ... Pixel - * Line 1: Pixel Pixel ... Pixel - * Line 2: Pixel Pixel ... Pixel - * Line 3: Pixel Pixel ... Pixel + * Line 0: Pixel ... Pixel + * Line 1: Pixel ... Pixel + * Line 2: Pixel ... Pixel + * Line 3: Pixel ... Pixel * ... - * Line (n-2): Pixel Pixel ... Pixel - * Line (n-1): Pixel Pixel ... Pixel + * Line (n-2): Pixel ... Pixel + * Line (n-1): Pixel ... Pixel * * In this frame format, the even-line is * as wide as the odd-line. @@ -906,8 +873,10 @@ static bool sh_css_translate_stream_cfg_to_input_system_input_port_attr( isys_stream_descr->metadata.lines_per_frame = stream_cfg->metadata_config.resolution.height; #ifdef ISP2401 - /* For new input system, number of str2mmio requests must be even. - * So we round up number of metadata lines to be even. */ + /* + * For new input system, number of str2mmio requests must be even. + * So we round up number of metadata lines to be even. + */ if (isys_stream_descr->metadata.lines_per_frame > 0) isys_stream_descr->metadata.lines_per_frame += (isys_stream_descr->metadata.lines_per_frame & 1); @@ -1003,22 +972,10 @@ static bool sh_css_translate_stream_cfg_to_isys_stream_descr( isys_stream_descr->raw_packed = stream_cfg->pack_raw_pixels; isys_stream_descr->linked_isys_stream_id = (int8_t) stream_cfg->isys_config[isys_stream_idx].linked_isys_stream_id; - /* - * Early polling is required for timestamp accuracy in certain case. - * The ISYS HW polling is started on - * ia_css_isys_stream_capture_indication() instead of - * ia_css_pipeline_sp_wait_for_isys_stream_N() as isp processing of - * capture takes longer than getting an ISYS frame - * - * Only 2401 relevant ?? - */ -#if 0 // FIXME: NOT USED on Yocto Aero - isys_stream_descr->polling_mode - = early_polling ? INPUT_SYSTEM_POLL_ON_CAPTURE_REQUEST - : INPUT_SYSTEM_POLL_ON_WAIT_FOR_FRAME; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "sh_css_translate_stream_cfg_to_isys_stream_descr() leave:\n"); -#endif + + if (IS_ISP2401) + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "sh_css_translate_stream_cfg_to_isys_stream_descr() leave:\n"); return rc; } @@ -1065,17 +1022,6 @@ sh_css_config_input_network(struct ia_css_stream *stream) pipe = stream->last_pipe->pipe_settings.video.copy_pipe; } else { pipe = stream->last_pipe; - if (stream->last_pipe->config.mode == IA_CSS_PIPE_MODE_CAPTURE) { - /* - * We need to poll the ISYS HW in capture_indication itself - * for "non-continuous" capture usecase for getting accurate - * isys frame capture timestamps. - * This is because the capturepipe propcessing takes longer - * to execute than the input system frame capture. - * 2401 specific - */ - early_polling = true; - } } if (!pipe) @@ -1086,7 +1032,8 @@ sh_css_config_input_network(struct ia_css_stream *stream) binary = pipe->pipeline.stages->binary; if (binary) { - /* this was being done in ifmtr in 2400. + /* + * this was being done in ifmtr in 2400. * online and cont bypass the init_in_frameinfo_memory_defaults * so need to do it here */ @@ -1259,89 +1206,6 @@ static inline int stream_unregister_with_csi_rx( } #endif -#if WITH_PC_MONITORING -static struct task_struct *my_kthread; /* Handle for the monitoring thread */ -static int sh_binary_running; /* Enable sampling in the thread */ - -static void print_pc_histo(char *core_name, struct sh_css_pc_histogram *hist) -{ - unsigned int i; - unsigned int cnt_run = 0; - unsigned int cnt_stall = 0; - - if (!hist) - return; - - sh_css_print("%s histogram length = %d\n", core_name, hist->length); - sh_css_print("%s PC\turn\tstall\n", core_name); - - for (i = 0; i < hist->length; i++) { - if ((hist->run[i] == 0) && (hist->run[i] == hist->stall[i])) - continue; - sh_css_print("%s %d\t%d\t%d\n", - core_name, i, hist->run[i], hist->stall[i]); - cnt_run += hist->run[i]; - cnt_stall += hist->stall[i]; - } - - sh_css_print(" Statistics for %s, cnt_run = %d, cnt_stall = %d, hist->length = %d\n", - core_name, cnt_run, cnt_stall, hist->length); -} - -static void print_pc_histogram(void) -{ - struct ia_css_binary_metrics *metrics; - - for (metrics = sh_css_metrics.binary_metrics; - metrics; - metrics = metrics->next) { - if (metrics->mode == IA_CSS_BINARY_MODE_PREVIEW || - metrics->mode == IA_CSS_BINARY_MODE_VF_PP) { - sh_css_print("pc_histogram for binary %d is SKIPPED\n", - metrics->id); - continue; - } - - sh_css_print(" pc_histogram for binary %d\n", metrics->id); - print_pc_histo(" ISP", &metrics->isp_histogram); - print_pc_histo(" SP", &metrics->sp_histogram); - sh_css_print("print_pc_histogram() done for binary->id = %d, done.\n", - metrics->id); - } - - sh_css_print("PC_MONITORING:print_pc_histogram() -- DONE\n"); -} - -static int pc_monitoring(void *data) -{ - int i = 0; - - (void)data; - while (true) { - if (sh_binary_running) { - sh_css_metrics_sample_pcs(); -#if MULTIPLE_SAMPLES - for (i = 0; i < NOF_SAMPLES; i++) - sh_css_metrics_sample_pcs(); -#endif - } - usleep_range(10, 50); - } - return 0; -} - -static void spying_thread_create(void) -{ - my_kthread = kthread_run(pc_monitoring, NULL, "sh_pc_monitor"); - sh_css_metrics_enable_pc_histogram(1); -} - -static void input_frame_info(struct ia_css_frame_info frame_info) -{ - sh_css_print("SH_CSS:input_frame_info() -- frame->info.res.width = %d, frame->info.res.height = %d, format = %d\n", - frame_info.res.width, frame_info.res.height, frame_info.format); -} -#endif /* WITH_PC_MONITORING */ static void start_binary(struct ia_css_pipe *pipe, @@ -1353,15 +1217,6 @@ start_binary(struct ia_css_pipe *pipe, if (binary) sh_css_metrics_start_binary(&binary->metrics); -#if WITH_PC_MONITORING - sh_css_print("PC_MONITORING: %s() -- binary id = %d , enable_dvs_envelope = %d\n", - __func__, binary->info->sp.id, - binary->info->sp.enable.dvs_envelope); - input_frame_info(binary->in_frame_info); - - if (binary && binary->info->sp.pipeline.mode == IA_CSS_BINARY_MODE_VIDEO) - sh_binary_running = true; -#endif #if !defined(ISP2401) if (pipe->stream->reconfigure_css_rx) { @@ -1406,7 +1261,7 @@ void sh_css_binary_args_reset(struct sh_css_binary_args *args) { unsigned int i; - for (i = 0; i < NUM_TNR_FRAMES; i++) + for (i = 0; i < NUM_VIDEO_TNR_FRAMES; i++) args->tnr_frames[i] = NULL; for (i = 0; i < MAX_NUM_VIDEO_DELAY_FRAMES; i++) args->delay_frames[i] = NULL; @@ -1424,20 +1279,11 @@ static void start_pipe( enum sh_css_pipe_config_override copy_ovrd, enum ia_css_input_mode input_mode) { - const struct ia_css_coordinate *coord = NULL; - const struct ia_css_isp_parameters *params = NULL; - - IA_CSS_ENTER_PRIVATE("me = %p, copy_ovrd = %d, input_mode = %d", me, copy_ovrd, input_mode); assert(me); /* all callers are in this file and call with non null argument */ - if (!IS_ISP2401) { - coord = &me->config.internal_frame_origin_bqs_on_sctbl; - params = me->stream->isp_params_configs; - } - sh_css_sp_init_pipeline(&me->pipeline, me->mode, (uint8_t)ia_css_pipe_get_pipe_num(me), @@ -1452,9 +1298,7 @@ static void start_pipe( &me->stream->info.metadata_info , (input_mode == IA_CSS_INPUT_MODE_MEMORY) ? (enum mipi_port_id)0 : - me->stream->config.source.port.port, - coord, - params); + me->stream->config.source.port.port); if (me->config.mode != IA_CSS_PIPE_MODE_COPY) { struct ia_css_pipeline_stage *stage; @@ -1565,17 +1409,18 @@ ia_css_reset_defaults(struct sh_css *css) /* Reset everything to zero */ memset(&default_css, 0, sizeof(default_css)); - /* Initialize the non zero values*/ + /* Initialize the non zero values */ default_css.check_system_idle = true; default_css.num_cont_raw_frames = NUM_CONTINUOUS_FRAMES; - /* All should be 0: but memset does it already. + /* + * All should be 0: but memset does it already. * default_css.num_mipi_frames[N_CSI_PORTS] = 0; */ default_css.irq_type = IA_CSS_IRQ_TYPE_EDGE; - /*Set the defaults to the output */ + /* Set the defaults to the output */ *css = default_css; } @@ -1638,6 +1483,7 @@ ia_css_init(struct device *dev, const struct ia_css_env *env, * the SIZE_OF_XXX macro of the corresponding struct. If they are not * equal, functionality will break. */ + /* Check struct sh_css_ddr_address_map */ COMPILATION_ERROR_IF(sizeof(struct sh_css_ddr_address_map) != SIZE_OF_SH_CSS_DDR_ADDRESS_MAP_STRUCT); /* Check struct host_sp_queues */ @@ -1707,8 +1553,11 @@ ia_css_init(struct device *dev, const struct ia_css_env *env, mipi_init(); #ifndef ISP2401 - /* In case this has been programmed already, update internal - data structure ... DEPRECATED */ + /* + * In case this has been programmed already, update internal + * data structure ... + * DEPRECATED + */ my_css.page_table_base_index = mmu_get_page_table_base_index(MMU0_ID); #endif @@ -1746,9 +1595,8 @@ ia_css_init(struct device *dev, const struct ia_css_env *env, return err; } fw_explicitly_loaded = false; -#ifndef ISP2401 + my_css_save.loaded_fw = (struct ia_css_fw *)fw; -#endif } if (!sh_css_setup_spctrl_config(&sh_css_sp_fw, SP_PROG_NAME, &spctrl_cfg)) return -EINVAL; @@ -1759,24 +1607,17 @@ ia_css_init(struct device *dev, const struct ia_css_env *env, return err; } -#if WITH_PC_MONITORING - if (!thread_alive) { - thread_alive++; - sh_css_print("PC_MONITORING: %s() -- create thread DISABLED\n", - __func__); - spying_thread_create(); - } -#endif if (!sh_css_hrt_system_is_idle()) { IA_CSS_LEAVE_ERR(-EBUSY); return -EBUSY; } - /* can be called here, queuing works, but: - - when sp is started later, it will wipe queued items - so for now we leave it for later and make sure - updates are not called to frequently. - sh_css_init_buffer_queues(); - */ + /* + * can be called here, queuing works, but: + * - when sp is started later, it will wipe queued items + * so for now we leave it for later and make sure + * updates are not called to frequently. + * sh_css_init_buffer_queues(); + */ #if defined(ISP2401) gp_device_reg_store(GP_DEVICE0_ID, _REG_GP_SWITCH_ISYS2401_ADDR, 1); @@ -1817,10 +1658,12 @@ sh_css_flush(struct ia_css_acc_fw *fw) my_css.flush(fw); } -/* Mapping sp threads. Currently, this is done when a stream is created and +/* + * Mapping sp threads. Currently, this is done when a stream is created and * pipelines are ready to be converted to sp pipelines. Be careful if you are * doing it from stream_create since we could run out of sp threads due to - * allocation on inactive pipelines. */ + * allocation on inactive pipelines. + */ static int map_sp_threads(struct ia_css_stream *stream, bool map) { @@ -1884,8 +1727,10 @@ map_sp_threads(struct ia_css_stream *stream, bool map) return err; } -/* creates a host pipeline skeleton for all pipes in a stream. Called during - * stream_create. */ +/* + * creates a host pipeline skeleton for all pipes in a stream. Called during + * stream_create. + */ static int create_host_pipeline_structure(struct ia_css_stream *stream) { @@ -1984,8 +1829,10 @@ create_host_pipeline_structure(struct ia_css_stream *stream) return err; } -/* creates a host pipeline for all pipes in a stream. Called during - * stream_start. */ +/* + * creates a host pipeline for all pipes in a stream. Called during + * stream_start. + */ static int create_host_pipeline(struct ia_css_stream *stream) { @@ -2005,15 +1852,25 @@ create_host_pipeline(struct ia_css_stream *stream) main_pipe = stream->last_pipe; pipe_id = main_pipe->mode; - /* No continuous frame allocation for capture pipe. It uses the - * "main" pipe's frames. */ + /* + * No continuous frame allocation for capture pipe. It uses the + * "main" pipe's frames. + */ if ((pipe_id == IA_CSS_PIPE_ID_PREVIEW) || (pipe_id == IA_CSS_PIPE_ID_VIDEO)) { - /* About pipe_id == IA_CSS_PIPE_ID_PREVIEW && stream->config.mode != IA_CSS_INPUT_MODE_MEMORY: - * The original condition pipe_id == IA_CSS_PIPE_ID_PREVIEW is too strong. E.g. in SkyCam (with memory - * based input frames) there is no continuous mode and thus no need for allocated continuous frames - * This is not only for SkyCam but for all preview cases that use DDR based input frames. For this - * reason the stream->config.mode != IA_CSS_INPUT_MODE_MEMORY has beed added. + /* + * About + * pipe_id == IA_CSS_PIPE_ID_PREVIEW && + * stream->config.mode != IA_CSS_INPUT_MODE_MEMORY: + * + * The original condition pipe_id == IA_CSS_PIPE_ID_PREVIEW is + * too strong. E.g. in SkyCam (with memory based input frames) + * there is no continuous mode and thus no need for allocated + * continuous frames. + * This is not only for SkyCam but for all preview cases that + * use DDR based input frames. For this reason the + * stream->config.mode != IA_CSS_INPUT_MODE_MEMORY has beed + * added. */ if (stream->config.continuous || (pipe_id == IA_CSS_PIPE_ID_PREVIEW && @@ -2223,7 +2080,7 @@ pipe_generate_pipe_num(const struct ia_css_pipe *pipe, /* Assign a new pipe_num .... search for empty place */ for (i = 0; i < IA_CSS_PIPELINE_NUM_MAX; i++) { if (!my_css.all_pipes[i]) { - /*position is reserved */ + /* position is reserved */ my_css.all_pipes[i] = (struct ia_css_pipe *)pipe; pipe_num = i; break; @@ -2340,8 +2197,10 @@ ia_css_pipe_destroy(struct ia_css_pipe *pipe) switch (pipe->config.mode) { case IA_CSS_PIPE_MODE_PREVIEW: - /* need to take into account that this function is also called - on the internal copy pipe */ + /* + * need to take into account that this function is also called + * on the internal copy pipe + */ if (pipe->mode == IA_CSS_PIPE_ID_PREVIEW) { ia_css_frame_free_multiple(NUM_CONTINUOUS_FRAMES, pipe->continuous_frames); @@ -2369,10 +2228,10 @@ ia_css_pipe_destroy(struct ia_css_pipe *pipe) } } #ifndef ISP2401 - ia_css_frame_free_multiple(NUM_TNR_FRAMES, + ia_css_frame_free_multiple(NUM_VIDEO_TNR_FRAMES, pipe->pipe_settings.video.tnr_frames); #else - ia_css_frame_free_multiple(NUM_TNR_FRAMES, + ia_css_frame_free_multiple(NUM_VIDEO_TNR_FRAMES, pipe->pipe_settings.video.tnr_frames); #endif ia_css_frame_free_multiple(MAX_NUM_VIDEO_DELAY_FRAMES, @@ -2391,8 +2250,10 @@ ia_css_pipe_destroy(struct ia_css_pipe *pipe) break; } - sh_css_params_free_gdc_lut(pipe->scaler_pp_lut); - pipe->scaler_pp_lut = mmgr_NULL; + if (pipe->scaler_pp_lut != mmgr_NULL) { + hmm_free(pipe->scaler_pp_lut); + pipe->scaler_pp_lut = mmgr_NULL; + } my_css.active_pipes[ia_css_pipe_get_pipe_num(pipe)] = NULL; sh_css_pipe_free_shading_table(pipe); @@ -2413,15 +2274,13 @@ void ia_css_uninit(void) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_uninit() enter: void\n"); -#if WITH_PC_MONITORING - sh_css_print("PC_MONITORING: %s() -- started\n", __func__); - print_pc_histogram(); -#endif sh_css_params_free_default_gdc_lut(); /* TODO: JB: implement decent check and handling of freeing mipi frames */ - //assert(ref_count_mipi_allocation == 0); //mipi frames are not freed + if (!mipi_is_free()) + dev_warn(atomisp_dev, "mipi frames are not freed.\n"); + /* cleanup generic data */ sh_css_params_uninit(); ia_css_refcount_uninit(); @@ -2465,16 +2324,13 @@ int ia_css_irq_translate( if (status == hrt_isp_css_irq_status_error) return -EINVAL; -#if WITH_PC_MONITORING - sh_css_print("PC_MONITORING: %s() irq = %d, sh_binary_running set to 0\n", - __func__, irq); - sh_binary_running = 0; -#endif switch (irq) { case virq_sp: - /* When SP goes to idle, info is available in the - * event queue. */ + /* + * When SP goes to idle, info is available in the + * event queue. + */ infos |= IA_CSS_IRQ_INFO_EVENTS_READY; break; case virq_isp: @@ -2582,8 +2438,10 @@ sh_css_get_sw_interrupt_value(unsigned int irq) return irq_value; } -/* configure and load the copy binary, the next binary is used to - determine whether the copy binary needs to do left padding. */ +/* + * configure and load the copy binary, the next binary is used to + * determine whether the copy binary needs to do left padding. + */ static int load_copy_binary( struct ia_css_pipe *pipe, struct ia_css_binary *copy_binary, @@ -2670,13 +2528,11 @@ alloc_continuous_frames(struct ia_css_pipe *pipe, bool init_time) ref_info.padded_width = CEIL_MUL(ref_info.res.width, 2 * ISP_VEC_NELEMS); #endif -#if !defined(HAS_NO_PACKED_RAW_PIXELS) if (pipe->stream->config.pack_raw_pixels) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "alloc_continuous_frames() IA_CSS_FRAME_FORMAT_RAW_PACKED\n"); ref_info.format = IA_CSS_FRAME_FORMAT_RAW_PACKED; } else -#endif { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "alloc_continuous_frames() IA_CSS_FRAME_FORMAT_RAW\n"); @@ -2780,7 +2636,8 @@ load_preview_binaries(struct ia_css_pipe *pipe) if (err) return err; - /* Note: the current selection of vf_pp binary and + /* + * Note: the current selection of vf_pp binary and * parameterization of the preview binary contains a few pieces * of hardcoded knowledge. This needs to be cleaned up such that * the binary selection becomes more generic. @@ -2793,7 +2650,7 @@ load_preview_binaries(struct ia_css_pipe *pipe) * The decision if the vf_pp binary is needed for YUV downscaling is * made after the preview binary selection, since some preview binaries * can perform the requested YUV downscaling. - * */ + */ need_vf_pp = pipe->config.enable_dz; need_vf_pp |= pipe_out_info->format != IA_CSS_FRAME_FORMAT_YUV_LINE && !(pipe_out_info->format == IA_CSS_FRAME_FORMAT_NV12 || @@ -2805,11 +2662,12 @@ load_preview_binaries(struct ia_css_pipe *pipe) prev_vf_info = pipe->vf_yuv_ds_input_info; else prev_vf_info = *pipe_out_info; - /* If vf_pp is needed, then preview must output yuv_line. + /* + * If vf_pp is needed, then preview must output yuv_line. * The exception is when vf_pp is manually disabled, that is only * used in combination with a pipeline extension that requires * yuv_line as input. - * */ + */ if (need_vf_pp) ia_css_frame_info_set_format(&prev_vf_info, IA_CSS_FRAME_FORMAT_YUV_LINE); @@ -2827,22 +2685,12 @@ load_preview_binaries(struct ia_css_pipe *pipe) if (err) return err; - if (IS_ISP2401) { - /* The delay latency determines the number of invalid frames after - * a stream is started. */ - pipe->num_invalid_frames = pipe->dvs_frame_delay; - pipe->info.num_invalid_frames = pipe->num_invalid_frames; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "load_preview_binaries() num_invalid_frames=%d dvs_frame_delay=%d\n", - pipe->num_invalid_frames, pipe->dvs_frame_delay); - } - /* The vf_pp binary is needed when (further) YUV downscaling is required */ need_vf_pp |= mycs->preview_binary.out_frame_info[0].res.width != pipe_out_info->res.width; need_vf_pp |= mycs->preview_binary.out_frame_info[0].res.height != pipe_out_info->res.height; - /* When vf_pp is needed, then the output format of the selected + /* + * When vf_pp is needed, then the output format of the selected * preview binary must be yuv_line. If this is not the case, * then the preview binary selection is done again. */ @@ -2886,12 +2734,14 @@ load_preview_binaries(struct ia_css_pipe *pipe) } #ifdef ISP2401 - /* When the input system is 2401, only the Direct Sensor Mode + /* + * When the input system is 2401, only the Direct Sensor Mode * Offline Preview uses the ISP copy binary. */ need_isp_copy_binary = !online && sensor; #else - /* About pipe->stream->config.mode == IA_CSS_INPUT_MODE_MEMORY: + /* + * About pipe->stream->config.mode == IA_CSS_INPUT_MODE_MEMORY: * This is typical the case with SkyCam (which has no input system) but it also applies to all cases * where the driver chooses for memory based input frames. In these cases, a copy binary (which typical * copies sensor data to DDR) does not have much use. @@ -3245,8 +3095,10 @@ get_crop_columns_for_bayer_order(const struct ia_css_stream_config *config) return 0; } -/* This function is to get the sum of all extra pixels in addition to the effective - * input, it includes dvs envelop and filter run-in */ +/* + * This function is to get the sum of all extra pixels in addition to the effective + * input, it includes dvs envelop and filter run-in + */ static void get_pipe_extra_pixel(struct ia_css_pipe *pipe, unsigned int *extra_row, unsigned int *extra_column) { @@ -3255,7 +3107,8 @@ static void get_pipe_extra_pixel(struct ia_css_pipe *pipe, unsigned int i; struct ia_css_resolution dvs_env = pipe->config.dvs_envelope; - /* The dvs envelope info may not be correctly sent down via pipe config + /* + * The dvs envelope info may not be correctly sent down via pipe config * The check is made and the correct value is populated in the binary info * Use this value when computing crop, else excess lines may get trimmed */ @@ -3349,7 +3202,8 @@ ia_css_get_crop_offsets( * 2. Require the special support for the online use cases. */ - /* ISP expects GRBG bayer order, we skip one line and/or one row + /* + * ISP expects GRBG bayer order, we skip one line and/or one row * to correct in case the input bayer order is different. */ column += get_crop_columns_for_bayer_order(&pipe->stream->config); @@ -3467,7 +3321,8 @@ static int create_host_video_pipeline(struct ia_css_pipe *pipe) me->dvs_frame_delay = pipe->dvs_frame_delay; #ifdef ISP2401 - /* When the input system is 2401, always enable 'in_frameinfo_memory' + /* + * When the input system is 2401, always enable 'in_frameinfo_memory' * except for the following: online or continuous */ need_in_frameinfo_memory = !(pipe->stream->config.online || @@ -3523,7 +3378,8 @@ static int create_host_video_pipeline(struct ia_css_pipe *pipe) in_frame = me->stages->args.out_frame[0]; } else if (pipe->stream->config.continuous) { #ifdef ISP2401 - /* When continuous is enabled, configure in_frame with the + /* + * When continuous is enabled, configure in_frame with the * last pipe, which is the copy pipe. */ in_frame = pipe->stream->last_pipe->continuous_frames[0]; @@ -3535,8 +3391,10 @@ static int create_host_video_pipeline(struct ia_css_pipe *pipe) ia_css_pipe_util_set_output_frames(out_frames, 0, need_yuv_pp ? NULL : out_frame); - /* when the video binary supports a second output pin, - it can directly produce the vf_frame. */ + /* + * when the video binary supports a second output pin, + * it can directly produce the vf_frame. + */ if (need_vf_pp) { ia_css_pipe_get_generic_stage_desc(&stage_desc, video_binary, out_frames, in_frame, NULL); @@ -3568,7 +3426,7 @@ static int create_host_video_pipeline(struct ia_css_pipe *pipe) if (video_stage) { int frm; - for (frm = 0; frm < NUM_TNR_FRAMES; frm++) { + for (frm = 0; frm < NUM_VIDEO_TNR_FRAMES; frm++) { video_stage->args.tnr_frames[frm] = pipe->pipe_settings.video.tnr_frames[frm]; } @@ -3708,7 +3566,8 @@ create_host_preview_pipeline(struct ia_css_pipe *pipe) ia_css_pipeline_clean(me); #ifdef ISP2401 - /* When the input system is 2401, always enable 'in_frameinfo_memory' + /* + * When the input system is 2401, always enable 'in_frameinfo_memory' * except for the following: * - Direct Sensor Mode Online Preview * - Buffered Sensor Mode Online Preview @@ -3757,7 +3616,8 @@ create_host_preview_pipeline(struct ia_css_pipe *pipe) in_frame = me->stages->args.out_frame[0]; } else if (pipe->stream->config.continuous) { #ifdef ISP2401 - /* When continuous is enabled, configure in_frame with the + /* + * When continuous is enabled, configure in_frame with the * last pipe, which is the copy pipe. */ if (continuous || !online) @@ -3837,8 +3697,7 @@ preview_start(struct ia_css_pipe *pipe) struct ia_css_pipe *acc_pipe; enum sh_css_pipe_config_override copy_ovrd; enum ia_css_input_mode preview_pipe_input_mode; - const struct ia_css_coordinate *coord = NULL; - const struct ia_css_isp_parameters *params = NULL; + unsigned int thread_id; IA_CSS_ENTER_PRIVATE("pipe = %p", pipe); if ((!pipe) || (!pipe->stream) || (pipe->mode != IA_CSS_PIPE_ID_PREVIEW)) { @@ -3862,22 +3721,13 @@ preview_start(struct ia_css_pipe *pipe) } send_raw_frames(pipe); - { - unsigned int thread_id; - - ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(pipe), &thread_id); - copy_ovrd = 1 << thread_id; - - if (pipe->stream->cont_capt) { - ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(capture_pipe), - &thread_id); - copy_ovrd |= 1 << thread_id; - } - } + ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(pipe), &thread_id); + copy_ovrd = 1 << thread_id; - if (IS_ISP2401) { - coord = &pipe->config.internal_frame_origin_bqs_on_sctbl; - params = pipe->stream->isp_params_configs; + if (pipe->stream->cont_capt) { + ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(capture_pipe), + &thread_id); + copy_ovrd |= 1 << thread_id; } /* Construct and load the copy pipe */ @@ -3892,12 +3742,12 @@ preview_start(struct ia_css_pipe *pipe) pipe->stream->config.mode, &pipe->stream->config.metadata_config, &pipe->stream->info.metadata_info, - pipe->stream->config.source.port.port, - coord, - params); + pipe->stream->config.source.port.port); - /* make the preview pipe start with mem mode input, copy handles - the actual mode */ + /* + * make the preview pipe start with mem mode input, copy handles + * the actual mode + */ preview_pipe_input_mode = IA_CSS_INPUT_MODE_MEMORY; } @@ -3915,9 +3765,7 @@ preview_start(struct ia_css_pipe *pipe) IA_CSS_INPUT_MODE_MEMORY, &pipe->stream->config.metadata_config, &pipe->stream->info.metadata_info, - (enum mipi_port_id)0, - coord, - params); + (enum mipi_port_id)0); } if (acc_pipe) { @@ -3933,9 +3781,7 @@ preview_start(struct ia_css_pipe *pipe) IA_CSS_INPUT_MODE_MEMORY, NULL, NULL, - (enum mipi_port_id)0, - coord, - params); + (enum mipi_port_id)0); } start_pipe(pipe, copy_ovrd, preview_pipe_input_mode); @@ -3968,38 +3814,7 @@ ia_css_pipe_enqueue_buffer(struct ia_css_pipe *pipe, } buf_type = buffer->type; - /* following code will be enabled when IA_CSS_BUFFER_TYPE_SEC_OUTPUT_FRAME - is removed */ -#if 0 - if (buf_type == IA_CSS_BUFFER_TYPE_OUTPUT_FRAME) { - bool found_pipe = false; - - for (i = 0; i < IA_CSS_PIPE_MAX_OUTPUT_STAGE; i++) { - if ((buffer->data.frame->info.res.width == pipe->output_info[i].res.width) && - (buffer->data.frame->info.res.height == pipe->output_info[i].res.height)) { - buf_type += i; - found_pipe = true; - break; - } - } - if (!found_pipe) - return -EINVAL; - } - if (buf_type == IA_CSS_BUFFER_TYPE_VF_OUTPUT_FRAME) { - bool found_pipe = false; - for (i = 0; i < IA_CSS_PIPE_MAX_OUTPUT_STAGE; i++) { - if ((buffer->data.frame->info.res.width == pipe->vf_output_info[i].res.width) && - (buffer->data.frame->info.res.height == pipe->vf_output_info[i].res.height)) { - buf_type += i; - found_pipe = true; - break; - } - } - if (!found_pipe) - return -EINVAL; - } -#endif pipe_id = pipe->mode; IA_CSS_LOG("pipe_id=%d, buf_type=%d", pipe_id, buf_type); @@ -4086,15 +3901,6 @@ ia_css_pipe_enqueue_buffer(struct ia_css_pipe *pipe, "ia_css_pipe_enqueue_buffer() buf_type=%d, data(DDR address)=0x%x\n", buf_type, buffer->data.frame->data); -#if CONFIG_ON_FRAME_ENQUEUE() - return_err = set_config_on_frame_enqueue( - &buffer->data.frame->info, - &ddr_buffer.payload.frame); - if (return_err) { - IA_CSS_LEAVE_ERR(return_err); - return return_err; - } -#endif } /* start of test for using rmgr for acq/rel memory */ @@ -4124,8 +3930,10 @@ ia_css_pipe_enqueue_buffer(struct ia_css_pipe *pipe, } for (stage = pipeline->stages; stage; stage = stage->next) { - /* The SP will read the params - after it got empty 3a and dis */ + /* + * The SP will read the params after it got + * empty 3a and dis + */ if (STATS_ENABLED(stage)) { /* there is a stage that needs it */ return_err = ia_css_bufq_enqueue_buffer(thread_id, @@ -4142,14 +3950,12 @@ ia_css_pipe_enqueue_buffer(struct ia_css_pipe *pipe, return_err = ia_css_bufq_enqueue_buffer(thread_id, queue_id, (uint32_t)h_vbuf->vptr); -#if defined(SH_CSS_ENABLE_PER_FRAME_PARAMS) if (!return_err && buf_type == IA_CSS_BUFFER_TYPE_OUTPUT_FRAME) { IA_CSS_LOG("pfp: enqueued OF %d to q %d thread %d", ddr_buffer.payload.frame.frame_data, queue_id, thread_id); } -#endif } if (!return_err) { @@ -4191,7 +3997,7 @@ ia_css_pipe_enqueue_buffer(struct ia_css_pipe *pipe, /* * TODO: Free up the hmm memory space. - */ + */ int ia_css_pipe_dequeue_buffer(struct ia_css_pipe *pipe, struct ia_css_buffer *buffer) @@ -4258,7 +4064,8 @@ ia_css_pipe_dequeue_buffer(struct ia_css_pipe *pipe, hmm_buffer_record = sh_css_hmm_buffer_record_validate( ddr_buffer_addr, buf_type); if (hmm_buffer_record) { - /* valid hmm_buffer_record found. Save the kernel_ptr + /* + * valid hmm_buffer_record found. Save the kernel_ptr * for validation after performing hmm_load. The * vbuf handle and buffer_record can be released. */ @@ -4276,7 +4083,8 @@ ia_css_pipe_dequeue_buffer(struct ia_css_pipe *pipe, &ddr_buffer, sizeof(struct sh_css_hmm_buffer)); - /* if the kernel_ptr is 0 or an invalid, return an error. + /* + * if the kernel_ptr is 0 or an invalid, return an error. * do not access the buffer via the kernal_ptr. */ if ((ddr_buffer.kernel_ptr == 0) || @@ -4290,8 +4098,11 @@ ia_css_pipe_dequeue_buffer(struct ia_css_pipe *pipe, } if (ddr_buffer.kernel_ptr != 0) { - /* buffer->exp_id : all instances to be removed later once the driver change - * is completed. See patch #5758 for reference */ + /* + * buffer->exp_id : all instances to be removed later + * once the driver change is completed. See patch #5758 + * for reference + */ buffer->exp_id = 0; buffer->driver_cookie = ddr_buffer.cookie_ptr; buffer->timing_data = ddr_buffer.timing_data; @@ -4307,8 +4118,10 @@ ia_css_pipe_dequeue_buffer(struct ia_css_pipe *pipe, case IA_CSS_BUFFER_TYPE_SEC_OUTPUT_FRAME: if (pipe && pipe->stop_requested) { #if !defined(ISP2401) - /* free mipi frames only for old input system - * for 2401 it is done in ia_css_stream_destroy call + /* + * free mipi frames only for old input + * system for 2401 it is done in + * ia_css_stream_destroy call */ return_err = free_mipi_frames(pipe); if (return_err) { @@ -4345,12 +4158,10 @@ ia_css_pipe_dequeue_buffer(struct ia_css_pipe *pipe, sh_css_sp_get_binary_copy_size(); #endif } -#if defined(SH_CSS_ENABLE_PER_FRAME_PARAMS) if (buf_type == IA_CSS_BUFFER_TYPE_OUTPUT_FRAME) { IA_CSS_LOG("pfp: dequeued OF %d with config id %d thread %d", frame->data, frame->isp_config_id, thread_id); } -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_pipe_dequeue_buffer() buf_type=%d, data(DDR address)=0x%x\n", @@ -4419,45 +4230,41 @@ ia_css_pipe_dequeue_buffer(struct ia_css_pipe *pipe, * 4) "enum ia_css_event_type convert_event_sp_to_host_domain" (sh_css.c) */ static enum ia_css_event_type convert_event_sp_to_host_domain[] = { - IA_CSS_EVENT_TYPE_OUTPUT_FRAME_DONE, /** Output frame ready. */ - IA_CSS_EVENT_TYPE_SECOND_OUTPUT_FRAME_DONE, /** Second output frame ready. */ - IA_CSS_EVENT_TYPE_VF_OUTPUT_FRAME_DONE, /** Viewfinder Output frame ready. */ - IA_CSS_EVENT_TYPE_SECOND_VF_OUTPUT_FRAME_DONE, /** Second viewfinder Output frame ready. */ - IA_CSS_EVENT_TYPE_3A_STATISTICS_DONE, /** Indication that 3A statistics are available. */ - IA_CSS_EVENT_TYPE_DIS_STATISTICS_DONE, /** Indication that DIS statistics are available. */ - IA_CSS_EVENT_TYPE_PIPELINE_DONE, /** Pipeline Done event, sent after last pipeline stage. */ - IA_CSS_EVENT_TYPE_FRAME_TAGGED, /** Frame tagged. */ - IA_CSS_EVENT_TYPE_INPUT_FRAME_DONE, /** Input frame ready. */ - IA_CSS_EVENT_TYPE_METADATA_DONE, /** Metadata ready. */ - IA_CSS_EVENT_TYPE_LACE_STATISTICS_DONE, /** Indication that LACE statistics are available. */ - IA_CSS_EVENT_TYPE_ACC_STAGE_COMPLETE, /** Extension stage executed. */ - IA_CSS_EVENT_TYPE_TIMER, /** Timing measurement data. */ - IA_CSS_EVENT_TYPE_PORT_EOF, /** End Of Frame event, sent when in buffered sensor mode. */ - IA_CSS_EVENT_TYPE_FW_WARNING, /** Performance warning encountered by FW */ - IA_CSS_EVENT_TYPE_FW_ASSERT, /** Assertion hit by FW */ + IA_CSS_EVENT_TYPE_OUTPUT_FRAME_DONE, /* Output frame ready. */ + IA_CSS_EVENT_TYPE_SECOND_OUTPUT_FRAME_DONE, /* Second output frame ready. */ + IA_CSS_EVENT_TYPE_VF_OUTPUT_FRAME_DONE, /* Viewfinder Output frame ready. */ + IA_CSS_EVENT_TYPE_SECOND_VF_OUTPUT_FRAME_DONE, /* Second viewfinder Output frame ready. */ + IA_CSS_EVENT_TYPE_3A_STATISTICS_DONE, /* Indication that 3A statistics are available. */ + IA_CSS_EVENT_TYPE_DIS_STATISTICS_DONE, /* Indication that DIS statistics are available. */ + IA_CSS_EVENT_TYPE_PIPELINE_DONE, /* Pipeline Done event, sent after last pipeline stage. */ + IA_CSS_EVENT_TYPE_FRAME_TAGGED, /* Frame tagged. */ + IA_CSS_EVENT_TYPE_INPUT_FRAME_DONE, /* Input frame ready. */ + IA_CSS_EVENT_TYPE_METADATA_DONE, /* Metadata ready. */ + IA_CSS_EVENT_TYPE_LACE_STATISTICS_DONE, /* Indication that LACE statistics are available. */ + IA_CSS_EVENT_TYPE_ACC_STAGE_COMPLETE, /* Extension stage executed. */ + IA_CSS_EVENT_TYPE_TIMER, /* Timing measurement data. */ + IA_CSS_EVENT_TYPE_PORT_EOF, /* End Of Frame event, sent when in buffered sensor mode. */ + IA_CSS_EVENT_TYPE_FW_WARNING, /* Performance warning encountered by FW */ + IA_CSS_EVENT_TYPE_FW_ASSERT, /* Assertion hit by FW */ 0, /* error if sp passes SH_CSS_SP_EVENT_NR_OF_TYPES as a valid event. */ }; int -ia_css_dequeue_event(struct ia_css_event *event) -{ - return ia_css_dequeue_psys_event(event); -} - -int ia_css_dequeue_psys_event(struct ia_css_event *event) { enum ia_css_pipe_id pipe_id = 0; u8 payload[4] = {0, 0, 0, 0}; int ret_err; - /*TODO: + /* + * TODO: * a) use generic decoding function , same as the one used by sp. * b) group decode and dequeue into eventQueue module * * We skip the IA_CSS_ENTER logging call * to avoid flooding the logs when the host application - * uses polling. */ + * uses polling. + */ if (!event) return -EINVAL; @@ -4476,9 +4283,11 @@ ia_css_dequeue_psys_event(struct ia_css_event *event) ia_css_bufq_enqueue_psys_event( IA_CSS_PSYS_SW_EVENT_EVENT_DEQUEUED, 0, 0, 0); - /* Events are decoded into 4 bytes of payload, the first byte + /* + * Events are decoded into 4 bytes of payload, the first byte * contains the sp event type. This is converted to a host enum. - * TODO: can this enum conversion be eliminated */ + * TODO: can this enum conversion be eliminated + */ event->type = convert_event_sp_to_host_domain[payload[0]]; /* Some sane default values since not all events use all fields. */ event->pipe = NULL; @@ -4491,7 +4300,10 @@ ia_css_dequeue_psys_event(struct ia_css_event *event) event->timer_subcode = 0; if (event->type == IA_CSS_EVENT_TYPE_TIMER) { - /* timer event ??? get the 2nd event and decode the data into the event struct */ + /* + * timer event ??? get the 2nd event and decode the data + * into the event struct + */ u32 tmp_data; /* 1st event: LSB 16-bit timer data and code */ event->timer_data = ((payload[1] & 0xFF) | ((payload[3] & 0xFF) << 8)); @@ -4500,8 +4312,10 @@ ia_css_dequeue_psys_event(struct ia_css_event *event) ret_err = ia_css_bufq_dequeue_psys_event(payload); if (ret_err) { /* no 2nd event ??? an error */ - /* Putting IA_CSS_ERROR is resulting in failures in - * Merrifield smoke testing */ + /* + * Putting IA_CSS_ERROR is resulting in failures in + * Merrifield smoke testing + */ IA_CSS_WARNING("Timer: Error de-queuing the 2nd TIMER event!!!\n"); return ret_err; } @@ -4515,11 +4329,15 @@ ia_css_dequeue_psys_event(struct ia_css_event *event) event->timer_data |= (tmp_data << 16); event->timer_subcode = payload[2]; } else { - /* It's a non timer event. So clear first half of the timer event data. - * If the second part of the TIMER event is not received, we discard - * the first half of the timer data and process the non timer event without - * affecting the flow. So the non timer event falls through - * the code. */ + /* + * It's a non timer event. So clear first half of the + * timer event data. + * If the second part of the TIMER event is not + * received, we discard the first half of the timer + * data and process the non timer event without + * affecting the flow. So the non timer event falls + * through the code. + */ event->timer_data = 0; event->timer_code = 0; event->timer_subcode = 0; @@ -4540,9 +4358,11 @@ ia_css_dequeue_psys_event(struct ia_css_event *event) event->fw_assert_line_no = (payload[2] << 8) + payload[3]; /* payload[2] is line_no>>8, payload[3] is line_no&0xff */ } else if (event->type != IA_CSS_EVENT_TYPE_TIMER) { - /* pipe related events. + /* + * pipe related events. * payload[1] contains the pipe_num, - * payload[2] contains the pipe_id. These are different. */ + * payload[2] contains the pipe_id. These are different. + */ event->pipe = find_pipe_by_num(payload[1]); pipe_id = (enum ia_css_pipe_id)payload[2]; /* Check to see if pipe still exists */ @@ -4594,9 +4414,11 @@ ia_css_dequeue_isys_event(struct ia_css_event *event) u8 payload[4] = {0, 0, 0, 0}; int err = 0; - /* We skip the IA_CSS_ENTER logging call + /* + * We skip the IA_CSS_ENTER logging call * to avoid flooding the logs when the host application - * uses polling. */ + * uses polling. + */ if (!event) return -EINVAL; @@ -4720,7 +4542,8 @@ sh_css_pipe_start(struct ia_css_stream *stream) return err; } - /* Force ISP parameter calculation after a mode change + /* + * Force ISP parameter calculation after a mode change * Acceleration API examples pass NULL for stream but they * don't use ISP parameters anyway. So this should be okay. * The SP binary (jpeg) copy does not use any parameters. @@ -4889,185 +4712,6 @@ ia_css_stream_get_buffer_depth(struct ia_css_stream *stream, return 0; } -/* - * @brief Stop all "ia_css_pipe" instances in the target - * "ia_css_stream" instance. - * - * Refer to "Local prototypes" for more info. - */ -/* ISP2401 */ -static int -sh_css_pipes_stop(struct ia_css_stream *stream) -{ - int err = 0; - struct ia_css_pipe *main_pipe; - enum ia_css_pipe_id main_pipe_id; - int i; - - if (!stream) { - IA_CSS_LOG("stream does NOT exist!"); - err = -EINVAL; - goto ERR; - } - - main_pipe = stream->last_pipe; - if (!main_pipe) { - IA_CSS_LOG("main_pipe does NOT exist!"); - err = -EINVAL; - goto ERR; - } - - main_pipe_id = main_pipe->mode; - IA_CSS_ENTER_PRIVATE("main_pipe_id=%d", main_pipe_id); - - /* - * Stop all "ia_css_pipe" instances in this target - * "ia_css_stream" instance. - */ - for (i = 0; i < stream->num_pipes; i++) { - /* send the "stop" request to the "ia_css_pipe" instance */ - IA_CSS_LOG("Send the stop-request to the pipe: pipe_id=%d", - stream->pipes[i]->pipeline.pipe_id); - err = ia_css_pipeline_request_stop(&stream->pipes[i]->pipeline); - - /* - * Exit this loop if "ia_css_pipeline_request_stop()" - * returns the error code. - * - * The error code would be generated in the following - * two cases: - * (1) The Scalar Processor has already been stopped. - * (2) The "Host->SP" event queue is full. - * - * As the convention of using CSS API 2.0/2.1, such CSS - * error code would be propogated from the CSS-internal - * API returned value to the CSS API returned value. Then - * the CSS driver should capture these error code and - * handle it in the driver exception handling mechanism. - */ - if (err) - goto ERR; - } - - /* - * In the CSS firmware use scenario "Continuous Preview" - * as well as "Continuous Video", the "ia_css_pipe" instance - * "Copy Pipe" is activated. This "Copy Pipe" is private to - * the CSS firmware so that it is not listed in the target - * "ia_css_stream" instance. - * - * We need to stop this "Copy Pipe", as well. - */ - if (main_pipe->stream->config.continuous) { - struct ia_css_pipe *copy_pipe = NULL; - - /* get the reference to "Copy Pipe" */ - if (main_pipe_id == IA_CSS_PIPE_ID_PREVIEW) - copy_pipe = main_pipe->pipe_settings.preview.copy_pipe; - else if (main_pipe_id == IA_CSS_PIPE_ID_VIDEO) - copy_pipe = main_pipe->pipe_settings.video.copy_pipe; - - /* return the error code if "Copy Pipe" does NOT exist */ - if (!copy_pipe) { - IA_CSS_LOG("Copy Pipe does NOT exist!"); - err = -EINVAL; - goto ERR; - } - - /* send the "stop" request to "Copy Pipe" */ - IA_CSS_LOG("Send the stop-request to the pipe: pipe_id=%d", - copy_pipe->pipeline.pipe_id); - err = ia_css_pipeline_request_stop(©_pipe->pipeline); - } - -ERR: - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; -} - -/* - * @brief Check if all "ia_css_pipe" instances in the target - * "ia_css_stream" instance have stopped. - * - * Refer to "Local prototypes" for more info. - */ -/* ISP2401 */ -static bool -sh_css_pipes_have_stopped(struct ia_css_stream *stream) -{ - bool rval = true; - - struct ia_css_pipe *main_pipe; - enum ia_css_pipe_id main_pipe_id; - - int i; - - if (!stream) { - IA_CSS_LOG("stream does NOT exist!"); - rval = false; - goto RET; - } - - main_pipe = stream->last_pipe; - - if (!main_pipe) { - IA_CSS_LOG("main_pipe does NOT exist!"); - rval = false; - goto RET; - } - - main_pipe_id = main_pipe->mode; - IA_CSS_ENTER_PRIVATE("main_pipe_id=%d", main_pipe_id); - - /* - * Check if every "ia_css_pipe" instance in this target - * "ia_css_stream" instance has stopped. - */ - for (i = 0; i < stream->num_pipes; i++) { - rval = rval && ia_css_pipeline_has_stopped(&stream->pipes[i]->pipeline); - IA_CSS_LOG("Pipe has stopped: pipe_id=%d, stopped=%d", - stream->pipes[i]->pipeline.pipe_id, - rval); - } - - /* - * In the CSS firmware use scenario "Continuous Preview" - * as well as "Continuous Video", the "ia_css_pipe" instance - * "Copy Pipe" is activated. This "Copy Pipe" is private to - * the CSS firmware so that it is not listed in the target - * "ia_css_stream" instance. - * - * We need to check if this "Copy Pipe" has stopped, as well. - */ - if (main_pipe->stream->config.continuous) { - struct ia_css_pipe *copy_pipe = NULL; - - /* get the reference to "Copy Pipe" */ - if (main_pipe_id == IA_CSS_PIPE_ID_PREVIEW) - copy_pipe = main_pipe->pipe_settings.preview.copy_pipe; - else if (main_pipe_id == IA_CSS_PIPE_ID_VIDEO) - copy_pipe = main_pipe->pipe_settings.video.copy_pipe; - - /* return if "Copy Pipe" does NOT exist */ - if (!copy_pipe) { - IA_CSS_LOG("Copy Pipe does NOT exist!"); - - rval = false; - goto RET; - } - - /* check if "Copy Pipe" has stopped or not */ - rval = rval && ia_css_pipeline_has_stopped(©_pipe->pipeline); - IA_CSS_LOG("Pipe has stopped: pipe_id=%d, stopped=%d", - copy_pipe->pipeline.pipe_id, - rval); - } - -RET: - IA_CSS_LEAVE_PRIVATE("rval=%d", rval); - return rval; -} - #if !defined(ISP2401) unsigned int sh_css_get_mipi_sizes_for_check(const unsigned int port, const unsigned int idx) @@ -5137,11 +4781,13 @@ sh_css_pipe_get_shading_info(struct ia_css_pipe *pipe, (const struct ia_css_stream_config *)&pipe->stream->config, shading_info, pipe_config); - /* Other function calls can be added here when other shading correction types will be added - * in the future. + /* + * Other function calls can be added here when other shading + * correction types will be added in the future. */ } else { - /* When the pipe does not have a binary which has the shading + /* + * When the pipe does not have a binary which has the shading * correction, this function does not need to fill the shading * information. It is not a error case, and then * this function should return 0. @@ -5180,6 +4826,8 @@ sh_css_pipe_get_grid_info(struct ia_css_pipe *pipe, ia_css_binary_dvs_stat_grid_info(binary, info, pipe); } else { memset(&info->dvs_grid, 0, sizeof(info->dvs_grid)); + memset(&info->dvs_grid.dvs_stat_grid_info, 0, + sizeof(info->dvs_grid.dvs_stat_grid_info)); } if (binary) { @@ -5254,7 +4902,8 @@ static int load_video_binaries(struct ia_css_pipe *pipe) IA_CSS_ENTER_PRIVATE(""); assert(pipe); assert(pipe->mode == IA_CSS_PIPE_ID_VIDEO); - /* we only test the video_binary because offline video doesn't need a + /* + * we only test the video_binary because offline video doesn't need a * vf_pp binary and online does not (always use) the copy_binary. * All are always reset at the same time anyway. */ @@ -5367,7 +5016,8 @@ static int load_video_binaries(struct ia_css_pipe *pipe) if (err) return err; - /* In the case where video_vf_info is not NULL, this allows + /* + * In the case where video_vf_info is not NULL, this allows * us to find a potential video library with desired vf format. * If success, no vf_pp binary is needed. * If failed, we will look up video binary with YUV_LINE vf format @@ -5382,17 +5032,23 @@ static int load_video_binaries(struct ia_css_pipe *pipe) else return err; } else if (video_vf_info) { - /* The first video binary lookup is successful, but we may - * still need vf_pp binary based on additiona check */ + /* + * The first video binary lookup is successful, but we + * may still need vf_pp binary based on additional check + */ num_output_pins = mycs->video_binary.info->num_output_pins; vf_ds_log2 = mycs->video_binary.vf_downscale_log2; - /* If the binary has dual output pins, we need vf_pp if the resolution - * is different. */ + /* + * If the binary has dual output pins, we need vf_pp + * if the resolution is different. + */ need_vf_pp |= ((num_output_pins == 2) && vf_res_different_than_output); - /* If the binary has single output pin, we need vf_pp if additional - * scaling is needed for vf */ + /* + * If the binary has single output pin, we need vf_pp + * if additional scaling is needed for vf + */ need_vf_pp |= ((num_output_pins == 1) && ((video_vf_info->res.width << vf_ds_log2 != pipe_out_info->res.width) || (video_vf_info->res.height << vf_ds_log2 != pipe_out_info->res.height))); @@ -5422,19 +5078,25 @@ static int load_video_binaries(struct ia_css_pipe *pipe) } } - /* If a video binary does not use a ref_frame, we set the frame delay - * to 0. This is the case for the 1-stage low-power video binary. */ + /* + * If a video binary does not use a ref_frame, we set the frame delay + * to 0. This is the case for the 1-stage low-power video binary. + */ if (!mycs->video_binary.info->sp.enable.ref_frame) pipe->dvs_frame_delay = 0; - /* The delay latency determines the number of invalid frames after - * a stream is started. */ + /* + * The delay latency determines the number of invalid frames after + * a stream is started. + */ pipe->num_invalid_frames = pipe->dvs_frame_delay; pipe->info.num_invalid_frames = pipe->num_invalid_frames; - /* Viewfinder frames also decrement num_invalid_frames. If the pipe + /* + * Viewfinder frames also decrement num_invalid_frames. If the pipe * outputs a viewfinder output, then we need double the number of - * invalid frames */ + * invalid frames + */ if (video_vf_info) pipe->num_invalid_frames *= 2; @@ -5446,7 +5108,8 @@ static int load_video_binaries(struct ia_css_pipe *pipe) #if !defined(ISP2401) /* Copy */ if (!online && !continuous) { - /* TODO: what exactly needs doing, prepend the copy binary to + /* + * TODO: what exactly needs doing, prepend the copy binary to * video base this only on !online? */ err = load_copy_binary(pipe, @@ -5459,7 +5122,6 @@ static int load_video_binaries(struct ia_css_pipe *pipe) (void)continuous; #endif -#if !defined(HAS_OUTPUT_SYSTEM) if (pipe->enable_viewfinder[IA_CSS_PIPE_OUTPUT_STAGE_0] && need_vf_pp) { struct ia_css_binary_descr vf_pp_descr; @@ -5469,8 +5131,11 @@ static int load_video_binaries(struct ia_css_pipe *pipe) &mycs->video_binary.vf_frame_info, pipe_vf_out_info); } else { - /* output from main binary is not yuv line. currently this is - * possible only when bci is enabled on vfpp output */ + /* + * output from main binary is not yuv line. currently + * this is possible only when bci is enabled on vfpp + * output + */ assert(pipe->config.enable_vfpp_bci); ia_css_pipe_get_yuvscaler_binarydesc(pipe, &vf_pp_descr, &mycs->video_binary.vf_frame_info, @@ -5482,7 +5147,6 @@ static int load_video_binaries(struct ia_css_pipe *pipe) if (err) return err; } -#endif err = allocate_delay_frames(pipe); @@ -5490,35 +5154,10 @@ static int load_video_binaries(struct ia_css_pipe *pipe) return err; if (mycs->video_binary.info->sp.enable.block_output) { - unsigned int tnr_width; - unsigned int tnr_height; - tnr_info = mycs->video_binary.out_frame_info[0]; - if (IS_ISP2401) { - /* Select resolution for TNR. If - * output_system_in_resolution(GDC_out_resolution) is - * being used, then select that as it will also be in resolution for - * TNR. At present, it only make sense for Skycam */ - if (pipe->config.output_system_in_res.width && - pipe->config.output_system_in_res.height) { - tnr_width = pipe->config.output_system_in_res.width; - tnr_height = pipe->config.output_system_in_res.height; - } else { - tnr_width = tnr_info.res.width; - tnr_height = tnr_info.res.height; - } - - /* Make tnr reference buffers output block width(in pix) align */ - tnr_info.res.width = CEIL_MUL(tnr_width, - (mycs->video_binary.info->sp.block.block_width * ISP_NWAY)); - tnr_info.padded_width = tnr_info.res.width; - } else { - tnr_height = tnr_info.res.height; - } - /* Make tnr reference buffers output block height align */ - tnr_info.res.height = CEIL_MUL(tnr_height, + tnr_info.res.height = CEIL_MUL(tnr_info.res.height, mycs->video_binary.info->sp.block.output_block_height); } else { tnr_info = mycs->video_binary.internal_frame_info; @@ -5526,7 +5165,7 @@ static int load_video_binaries(struct ia_css_pipe *pipe) tnr_info.format = IA_CSS_FRAME_FORMAT_YUV_LINE; tnr_info.raw_bit_depth = SH_CSS_TNR_BIT_DEPTH; - for (i = 0; i < NUM_TNR_FRAMES; i++) { + for (i = 0; i < NUM_VIDEO_TNR_FRAMES; i++) { if (mycs->tnr_frames[i]) { ia_css_frame_free(mycs->tnr_frames[i]); mycs->tnr_frames[i] = NULL; @@ -5574,9 +5213,7 @@ static int video_start(struct ia_css_pipe *pipe) struct ia_css_pipe *copy_pipe, *capture_pipe; enum sh_css_pipe_config_override copy_ovrd; enum ia_css_input_mode video_pipe_input_mode; - - const struct ia_css_coordinate *coord = NULL; - const struct ia_css_isp_parameters *params = NULL; + unsigned int thread_id; IA_CSS_ENTER_PRIVATE("pipe = %p", pipe); if ((!pipe) || (pipe->mode != IA_CSS_PIPE_ID_VIDEO)) { @@ -5598,22 +5235,14 @@ static int video_start(struct ia_css_pipe *pipe) return err; send_raw_frames(pipe); - { - unsigned int thread_id; - - ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(pipe), &thread_id); - copy_ovrd = 1 << thread_id; - if (pipe->stream->cont_capt) { - ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(capture_pipe), - &thread_id); - copy_ovrd |= 1 << thread_id; - } - } + ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(pipe), &thread_id); + copy_ovrd = 1 << thread_id; - if (IS_ISP2401) { - coord = &pipe->config.internal_frame_origin_bqs_on_sctbl; - params = pipe->stream->isp_params_configs; + if (pipe->stream->cont_capt) { + ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(capture_pipe), + &thread_id); + copy_ovrd |= 1 << thread_id; } /* Construct and load the copy pipe */ @@ -5628,12 +5257,12 @@ static int video_start(struct ia_css_pipe *pipe) pipe->stream->config.mode, &pipe->stream->config.metadata_config, &pipe->stream->info.metadata_info, - pipe->stream->config.source.port.port, - coord, - params); + pipe->stream->config.source.port.port); - /* make the video pipe start with mem mode input, copy handles - the actual mode */ + /* + * make the video pipe start with mem mode input, copy handles + * the actual mode + */ video_pipe_input_mode = IA_CSS_INPUT_MODE_MEMORY; } @@ -5651,9 +5280,7 @@ static int video_start(struct ia_css_pipe *pipe) IA_CSS_INPUT_MODE_MEMORY, &pipe->stream->config.metadata_config, &pipe->stream->info.metadata_info, - (enum mipi_port_id)0, - coord, - params); + (enum mipi_port_id)0); } start_pipe(pipe, copy_ovrd, video_pipe_input_mode); @@ -5763,12 +5390,6 @@ static bool need_capture_pp( assert(pipe); assert(pipe->mode == IA_CSS_PIPE_ID_CAPTURE); - if (IS_ISP2401) { - /* ldc and capture_pp are not supported in the same pipeline */ - if (need_capt_ldc(pipe)) - return false; - } - /* determine whether we need to use the capture_pp binary. * This is needed for: * 1. XNR or @@ -5891,9 +5512,11 @@ static int load_primary_binaries( } need_pp = need_capture_pp(pipe); - /* we use the vf output info to get the primary/capture_pp binary - configured for vf_veceven. It will select the closest downscaling - factor. */ + /* + * we use the vf output info to get the primary/capture_pp binary + * configured for vf_veceven. It will select the closest downscaling + * factor. + */ vf_info = *pipe_vf_out_info; /* @@ -5905,13 +5528,15 @@ static int load_primary_binaries( * required. This should not be considered as a clean solution. * Proper investigation should be done to come up with the clean * solution. - * */ + */ ia_css_frame_info_set_format(&vf_info, IA_CSS_FRAME_FORMAT_YUV_LINE); - /* TODO: All this yuv_scaler and capturepp calculation logic + /* + * TODO: All this yuv_scaler and capturepp calculation logic * can be shared later. Capture_pp is also a yuv_scale binary * with extra XNR funcionality. Therefore, it can be made as the - * first step of the cascade. */ + * first step of the cascade. + */ capt_pp_out_info = pipe->out_yuv_ds_input_info; capt_pp_out_info.format = IA_CSS_FRAME_FORMAT_YUV420; capt_pp_out_info.res.width /= MAX_PREFERRED_YUV_DS_PER_STEP; @@ -5973,33 +5598,13 @@ static int load_primary_binaries( /* TODO Do we disable ldc for skycam */ need_ldc = need_capt_ldc(pipe); - if (IS_ISP2401 && need_ldc) { - /* ldc and capt_pp are not supported in the same pipeline */ - struct ia_css_binary_descr capt_ldc_descr; - - ia_css_pipe_get_ldc_binarydesc(pipe, - &capt_ldc_descr, &prim_out_info, - &capt_pp_out_info); - - err = ia_css_binary_find(&capt_ldc_descr, - &mycs->capture_ldc_binary); - if (err) { - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; - } - need_pp = false; - need_ldc = false; - } /* we build up the pipeline starting at the end */ /* Capture post-processing */ if (need_pp) { struct ia_css_binary_descr capture_pp_descr; - if (!IS_ISP2401) - capt_pp_in_info = need_ldc ? &capt_ldc_out_info : &prim_out_info; - else - capt_pp_in_info = &prim_out_info; + capt_pp_in_info = need_ldc ? &capt_ldc_out_info : &prim_out_info; ia_css_pipe_get_capturepp_binarydesc(pipe, &capture_pp_descr, @@ -6057,15 +5662,15 @@ static int load_primary_binaries( vf_pp_in_info = &mycs->primary_binary[mycs->num_primary_stage - 1].vf_frame_info; /* - * WARNING: The #if def flag has been added below as a - * temporary solution to solve the problem of enabling the - * view finder in a single binary in a capture flow. The - * vf-pp stage has been removed for Skycam in the solution - * provided. The vf-pp stage should be re-introduced when - * required. Thisshould not be considered as a clean solution. - * Proper * investigation should be done to come up with the clean - * solution. - * */ + * WARNING: The #if def flag has been added below as a + * temporary solution to solve the problem of enabling the + * view finder in a single binary in a capture flow. The + * vf-pp stage has been removed for Skycam in the solution + * provided. The vf-pp stage should be re-introduced when + * required. Thisshould not be considered as a clean solution. + * Proper * investigation should be done to come up with the clean + * solution. + */ if (pipe->enable_viewfinder[IA_CSS_PIPE_OUTPUT_STAGE_0]) { struct ia_css_binary_descr vf_pp_descr; @@ -6083,9 +5688,10 @@ static int load_primary_binaries( return err; #ifdef ISP2401 - /* When the input system is 2401, only the Direct Sensor Mode - * Offline Capture uses the ISP copy binary. - */ + /* + * When the input system is 2401, only the Direct Sensor Mode + * Offline Capture uses the ISP copy binary. + */ need_isp_copy_binary = !online && sensor; #else need_isp_copy_binary = !online && !continuous && !memory; @@ -6139,17 +5745,19 @@ allocate_delay_frames(struct ia_css_pipe *pipe) struct ia_css_video_settings *mycs_video = &pipe->pipe_settings.video; ref_info = mycs_video->video_binary.internal_frame_info; - /*The ref frame expects - * 1. Y plane - * 2. UV plane with line interleaving, like below - * UUUUUU(width/2 times) VVVVVVVV..(width/2 times) - * - * This format is not YUV420(which has Y, U and V planes). - * Its closer to NV12, except that the UV plane has UV - * interleaving, like UVUVUVUVUVUVUVUVU... - * - * TODO: make this ref_frame format as a separate frame format - */ + + /* + * The ref frame expects + * 1. Y plane + * 2. UV plane with line interleaving, like below + * UUUUUU(width/2 times) VVVVVVVV..(width/2 times) + * + * This format is not YUV420(which has Y, U and V planes). + * Its closer to NV12, except that the UV plane has UV + * interleaving, like UVUVUVUVUVUVUVUVU... + * + * TODO: make this ref_frame format as a separate frame format + */ ref_info.format = IA_CSS_FRAME_FORMAT_NV12; delay_frames = mycs_video->delay_frames; } @@ -6158,17 +5766,19 @@ allocate_delay_frames(struct ia_css_pipe *pipe) struct ia_css_preview_settings *mycs_preview = &pipe->pipe_settings.preview; ref_info = mycs_preview->preview_binary.internal_frame_info; - /*The ref frame expects - * 1. Y plane - * 2. UV plane with line interleaving, like below - * UUUUUU(width/2 times) VVVVVVVV..(width/2 times) - * - * This format is not YUV420(which has Y, U and V planes). - * Its closer to NV12, except that the UV plane has UV - * interleaving, like UVUVUVUVUVUVUVUVU... - * - * TODO: make this ref_frame format as a separate frame format - */ + + /* + * The ref frame expects + * 1. Y plane + * 2. UV plane with line interleaving, like below + * UUUUUU(width/2 times) VVVVVVVV..(width/2 times) + * + * This format is not YUV420(which has Y, U and V planes). + * Its closer to NV12, except that the UV plane has UV + * interleaving, like UVUVUVUVUVUVUVUVU... + * + * TODO: make this ref_frame format as a separate frame format + */ ref_info.format = IA_CSS_FRAME_FORMAT_NV12; delay_frames = mycs_preview->delay_frames; } @@ -6625,9 +6235,11 @@ need_yuv_scaler_stage(const struct ia_css_pipe *pipe) return false; } -/* TODO: it is temporarily created from ia_css_pipe_create_cas_scaler_desc */ -/* which has some hard-coded knowledge which prevents reuse of the function. */ -/* Later, merge this with ia_css_pipe_create_cas_scaler_desc */ +/* + * TODO: it is temporarily created from ia_css_pipe_create_cas_scaler_desc + * which has some hard-coded knowledge which prevents reuse of the function. + * Later, merge this with ia_css_pipe_create_cas_scaler_desc + */ static int ia_css_pipe_create_cas_scaler_desc_single_output( struct ia_css_frame_info *cas_scaler_in_info, struct ia_css_frame_info *cas_scaler_out_info, @@ -7024,22 +6636,22 @@ load_yuvpp_binaries(struct ia_css_pipe *pipe) #if defined(ISP2401) /* - * NOTES - * - Why does the "yuvpp" pipe needs "isp_copy_binary" (i.e. ISP Copy) when - * its input is "ATOMISP_INPUT_FORMAT_YUV422_8"? - * - * In most use cases, the first stage in the "yuvpp" pipe is the "yuv_scale_ - * binary". However, the "yuv_scale_binary" does NOT support the input-frame - * format as "IA_CSS_STREAM _FORMAT_YUV422_8". - * - * Hence, the "isp_copy_binary" is required to be present in front of the "yuv - * _scale_binary". It would translate the input-frame to the frame formats that - * are supported by the "yuv_scale_binary". - * - * Please refer to "FrameWork/css/isp/pipes/capture_pp/capture_pp_1.0/capture_ - * pp_defs.h" for the list of input-frame formats that are supported by the - * "yuv_scale_binary". - */ + * NOTES + * - Why does the "yuvpp" pipe needs "isp_copy_binary" (i.e. ISP Copy) when + * its input is "ATOMISP_INPUT_FORMAT_YUV422_8"? + * + * In most use cases, the first stage in the "yuvpp" pipe is the "yuv_scale_ + * binary". However, the "yuv_scale_binary" does NOT support the input-frame + * format as "IA_CSS_STREAM _FORMAT_YUV422_8". + * + * Hence, the "isp_copy_binary" is required to be present in front of the "yuv + * _scale_binary". It would translate the input-frame to the frame formats that + * are supported by the "yuv_scale_binary". + * + * Please refer to "FrameWork/css/isp/pipes/capture_pp/capture_pp_1.0/capture_ + * pp_defs.h" for the list of input-frame formats that are supported by the + * "yuv_scale_binary". + */ need_isp_copy_binary = (pipe->stream->config.input_config.format == ATOMISP_INPUT_FORMAT_YUV422_8); #else /* !ISP2401 */ @@ -7055,23 +6667,23 @@ load_yuvpp_binaries(struct ia_css_pipe *pipe) goto ERR; /* - * NOTES - * - Why is "pipe->pipe_settings.capture.copy_binary.online" specified? - * - * In some use cases, the first stage in the "yuvpp" pipe is the - * "isp_copy_binary". The "isp_copy_binary" is designed to process - * the input from either the system DDR or from the IPU internal VMEM. - * So it provides the flag "online" to specify where its input is from, - * i.e.: - * - * (1) "online <= true", the input is from the IPU internal VMEM. - * (2) "online <= false", the input is from the system DDR. - * - * In other use cases, the first stage in the "yuvpp" pipe is the - * "yuv_scale_binary". "The "yuv_scale_binary" is designed to process the - * input ONLY from the system DDR. So it does not provide the flag "online" - * to specify where its input is from. - */ + * NOTES + * - Why is "pipe->pipe_settings.capture.copy_binary.online" specified? + * + * In some use cases, the first stage in the "yuvpp" pipe is the + * "isp_copy_binary". The "isp_copy_binary" is designed to process + * the input from either the system DDR or from the IPU internal VMEM. + * So it provides the flag "online" to specify where its input is from, + * i.e.: + * + * (1) "online <= true", the input is from the IPU internal VMEM. + * (2) "online <= false", the input is from the system DDR. + * + * In other use cases, the first stage in the "yuvpp" pipe is the + * "yuv_scale_binary". "The "yuv_scale_binary" is designed to process the + * input ONLY from the system DDR. So it does not provide the flag "online" + * to specify where its input is from. + */ pipe->pipe_settings.capture.copy_binary.online = pipe->stream->config.online; } @@ -7162,6 +6774,7 @@ static int yuvpp_start(struct ia_css_pipe *pipe) int err = 0; enum sh_css_pipe_config_override copy_ovrd; enum ia_css_input_mode yuvpp_pipe_input_mode; + unsigned int thread_id; IA_CSS_ENTER_PRIVATE("pipe = %p", pipe); if ((!pipe) || (pipe->mode != IA_CSS_PIPE_ID_YUVPP)) { @@ -7181,12 +6794,8 @@ static int yuvpp_start(struct ia_css_pipe *pipe) return err; } - { - unsigned int thread_id; - - ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(pipe), &thread_id); - copy_ovrd = 1 << thread_id; - } + ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(pipe), &thread_id); + copy_ovrd = 1 << thread_id; start_pipe(pipe, copy_ovrd, yuvpp_pipe_input_mode); @@ -7264,8 +6873,11 @@ sh_css_pipe_load_binaries(struct ia_css_pipe *pipe) } if (err) { if (sh_css_pipe_unload_binaries(pipe)) { - /* currently css does not support multiple error returns in a single function, - * using -EINVAL in this case */ + /* + * currently css does not support multiple error + * returns in a single function, using -EINVAL in + * this case + */ err = -EINVAL; } } @@ -7316,12 +6928,13 @@ create_host_yuvpp_pipeline(struct ia_css_pipe *pipe) num_output_stage = pipe->pipe_settings.yuvpp.num_output; #ifdef ISP2401 - /* When the input system is 2401, always enable 'in_frameinfo_memory' - * except for the following: - * - Direct Sensor Mode Online Capture - * - Direct Sensor Mode Continuous Capture - * - Buffered Sensor Mode Continuous Capture - */ + /* + * When the input system is 2401, always enable 'in_frameinfo_memory' + * except for the following: + * - Direct Sensor Mode Online Capture + * - Direct Sensor Mode Continuous Capture + * - Buffered Sensor Mode Continuous Capture + */ sensor = pipe->stream->config.mode == IA_CSS_INPUT_MODE_SENSOR; buffered_sensor = pipe->stream->config.mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR; online = pipe->stream->config.online; @@ -7332,19 +6945,23 @@ create_host_yuvpp_pipeline(struct ia_css_pipe *pipe) /* Construct in_frame info (only in case we have dynamic input */ need_in_frameinfo_memory = pipe->stream->config.mode == IA_CSS_INPUT_MODE_MEMORY; #endif - /* the input frame can come from: - * a) memory: connect yuvscaler to me->in_frame - * b) sensor, via copy binary: connect yuvscaler to copy binary later on */ + /* + * the input frame can come from: + * + * a) memory: connect yuvscaler to me->in_frame + * b) sensor, via copy binary: connect yuvscaler to copy binary later + * on + */ if (need_in_frameinfo_memory) { /* TODO: improve for different input formats. */ /* - * "pipe->stream->config.input_config.format" represents the sensor output - * frame format, e.g. YUV422 8-bit. - * - * "in_frame_format" represents the imaging pipe's input frame format, e.g. - * Bayer-Quad RAW. - */ + * "pipe->stream->config.input_config.format" represents the sensor output + * frame format, e.g. YUV422 8-bit. + * + * "in_frame_format" represents the imaging pipe's input frame format, e.g. + * Bayer-Quad RAW. + */ int in_frame_format; if (pipe->stream->config.input_config.format == @@ -7353,22 +6970,22 @@ create_host_yuvpp_pipeline(struct ia_css_pipe *pipe) } else if (pipe->stream->config.input_config.format == ATOMISP_INPUT_FORMAT_YUV422_8) { /* - * When the sensor output frame format is "ATOMISP_INPUT_FORMAT_YUV422_8", - * the "isp_copy_var" binary is selected as the first stage in the yuvpp - * pipe. - * - * For the "isp_copy_var" binary, it reads the YUV422-8 pixels from - * the frame buffer (at DDR) to the frame-line buffer (at VMEM). - * - * By now, the "isp_copy_var" binary does NOT provide a separated - * frame-line buffer to store the YUV422-8 pixels. Instead, it stores - * the YUV422-8 pixels in the frame-line buffer which is designed to - * store the Bayer-Quad RAW pixels. - * - * To direct the "isp_copy_var" binary reading from the RAW frame-line - * buffer, its input frame format must be specified as "IA_CSS_FRAME_ - * FORMAT_RAW". - */ + * When the sensor output frame format is "ATOMISP_INPUT_FORMAT_YUV422_8", + * the "isp_copy_var" binary is selected as the first stage in the yuvpp + * pipe. + * + * For the "isp_copy_var" binary, it reads the YUV422-8 pixels from + * the frame buffer (at DDR) to the frame-line buffer (at VMEM). + * + * By now, the "isp_copy_var" binary does NOT provide a separated + * frame-line buffer to store the YUV422-8 pixels. Instead, it stores + * the YUV422-8 pixels in the frame-line buffer which is designed to + * store the Bayer-Quad RAW pixels. + * + * To direct the "isp_copy_var" binary reading from the RAW frame-line + * buffer, its input frame format must be specified as "IA_CSS_FRAME_ + * FORMAT_RAW". + */ in_frame_format = IA_CSS_FRAME_FORMAT_RAW; } else { in_frame_format = IA_CSS_FRAME_FORMAT_NV12; @@ -7667,13 +7284,14 @@ create_host_regular_capture_pipeline(struct ia_css_pipe *pipe) ia_css_pipe_util_create_output_frames(out_frames); #ifdef ISP2401 - /* When the input system is 2401, always enable 'in_frameinfo_memory' - * except for the following: - * - Direct Sensor Mode Online Capture - * - Direct Sensor Mode Online Capture - * - Direct Sensor Mode Continuous Capture - * - Buffered Sensor Mode Continuous Capture - */ + /* + * When the input system is 2401, always enable 'in_frameinfo_memory' + * except for the following: + * - Direct Sensor Mode Online Capture + * - Direct Sensor Mode Online Capture + * - Direct Sensor Mode Continuous Capture + * - Buffered Sensor Mode Continuous Capture + */ sensor = (pipe->stream->config.mode == IA_CSS_INPUT_MODE_SENSOR); buffered_sensor = (pipe->stream->config.mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR); online = pipe->stream->config.online; @@ -7806,15 +7424,15 @@ create_host_regular_capture_pipeline(struct ia_css_pipe *pipe) local_out_frame = NULL; ia_css_pipe_util_set_output_frames(out_frames, 0, local_out_frame); /* - * WARNING: The #if def flag has been added below as a - * temporary solution to solve the problem of enabling the - * view finder in a single binary in a capture flow. The - * vf-pp stage has been removed from Skycam in the solution - * provided. The vf-pp stage should be re-introduced when - * required. This * should not be considered as a clean solution. - * Proper investigation should be done to come up with the clean - * solution. - * */ + * WARNING: The #if def flag has been added below as a + * temporary solution to solve the problem of enabling the + * view finder in a single binary in a capture flow. The + * vf-pp stage has been removed from Skycam in the solution + * provided. The vf-pp stage should be re-introduced when + * required. This * should not be considered as a clean solution. + * Proper investigation should be done to come up with the clean + * solution. + */ ia_css_pipe_get_generic_stage_desc(&stage_desc, primary_binary[i], out_frames, @@ -7828,8 +7446,7 @@ create_host_regular_capture_pipeline(struct ia_css_pipe *pipe) return err; } } - /* If we use copy iso primary, - the input must be yuv iso raw */ + /* If we use copy iso primary, the input must be yuv iso raw */ current_stage->args.copy_vf = primary_binary[0]->info->sp.pipeline.mode == IA_CSS_BINARY_MODE_COPY; @@ -7888,7 +7505,6 @@ create_host_regular_capture_pipeline(struct ia_css_pipe *pipe) } } -#ifndef ISP2401 if (need_pp && current_stage) { struct ia_css_frame *local_in_frame = NULL; @@ -7908,20 +7524,6 @@ create_host_regular_capture_pipeline(struct ia_css_pipe *pipe) } err = add_capture_pp_stage(pipe, me, local_in_frame, need_yuv_pp ? NULL : out_frame, -#else - /* ldc and capture_pp not supported in same pipeline */ - if (need_ldc && current_stage) { - in_frame = current_stage->args.out_frame[0]; - ia_css_pipe_util_set_output_frames(out_frames, 0, out_frame); - ia_css_pipe_get_generic_stage_desc(&stage_desc, capture_ldc_binary, - out_frames, in_frame, NULL); - err = ia_css_pipeline_create_and_add_stage(me, &stage_desc, - NULL); - } else if (need_pp && current_stage) { - in_frame = current_stage->args.out_frame[0]; - err = add_capture_pp_stage(pipe, me, in_frame, - need_yuv_pp ? NULL : out_frame, -#endif capture_pp_binary, ¤t_stage); if (err) { @@ -7954,14 +7556,14 @@ create_host_regular_capture_pipeline(struct ia_css_pipe *pipe) } /* - * WARNING: The #if def flag has been added below as a - * temporary solution to solve the problem of enabling the - * view finder in a single binary in a capture flow. The vf-pp - * stage has been removed from Skycam in the solution provided. - * The vf-pp stage should be re-introduced when required. This - * should not be considered as a clean solution. Proper - * investigation should be done to come up with the clean solution. - * */ + * WARNING: The #if def flag has been added below as a + * temporary solution to solve the problem of enabling the + * view finder in a single binary in a capture flow. The vf-pp + * stage has been removed from Skycam in the solution provided. + * The vf-pp stage should be re-introduced when required. This + * should not be considered as a clean solution. Proper + * investigation should be done to come up with the clean solution. + */ if (mode != IA_CSS_CAPTURE_MODE_RAW && mode != IA_CSS_CAPTURE_MODE_BAYER && current_stage && vf_frame) { @@ -8005,6 +7607,7 @@ create_host_capture_pipeline(struct ia_css_pipe *pipe) static int capture_start(struct ia_css_pipe *pipe) { struct ia_css_pipeline *me; + unsigned int thread_id; int err = 0; enum sh_css_pipe_config_override copy_ovrd; @@ -8034,7 +7637,7 @@ static int capture_start(struct ia_css_pipe *pipe) IA_CSS_LEAVE_ERR_PRIVATE(err); return err; } -#elif defined(ISP2401) +#else if (pipe->config.mode != IA_CSS_PIPE_MODE_COPY) { err = send_mipi_frames(pipe); if (err) { @@ -8042,23 +7645,19 @@ static int capture_start(struct ia_css_pipe *pipe) return err; } } - #endif - { - unsigned int thread_id; + ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(pipe), &thread_id); + copy_ovrd = 1 << thread_id; - ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(pipe), &thread_id); - copy_ovrd = 1 << thread_id; - } start_pipe(pipe, copy_ovrd, pipe->stream->config.mode); #if !defined(ISP2401) /* - * old isys: for IA_CSS_PIPE_MODE_COPY pipe, isys rx has to be configured, - * which is currently done in start_binary(); but COPY pipe contains no binary, - * and does not call start_binary(); so we need to configure the rx here. - */ + * old isys: for IA_CSS_PIPE_MODE_COPY pipe, isys rx has to be configured, + * which is currently done in start_binary(); but COPY pipe contains no binary, + * and does not call start_binary(); so we need to configure the rx here. + */ if (pipe->config.mode == IA_CSS_PIPE_MODE_COPY && pipe->stream->reconfigure_css_rx) { ia_css_isys_rx_configure(&pipe->stream->csi_rx_config, @@ -8174,7 +7773,8 @@ append_firmware(struct ia_css_fw_info **l, struct ia_css_fw_info *firmware) while (*l) l = &(*l)->next; *l = firmware; - /*firmware->next = NULL;*/ /* when multiple acc extensions are loaded, 'next' can be not NULL */ + /* when multiple acc extensions are loaded, 'next' can be not NULL */ + /*firmware->next = NULL;*/ IA_CSS_LEAVE_PRIVATE(""); } @@ -8360,9 +7960,9 @@ sh_css_pipeline_add_acc_stage(struct ia_css_pipeline *pipeline, } /* - * @brief Tag a specific frame in continuous capture. - * Refer to "sh_css_internal.h" for details. - */ + * @brief Tag a specific frame in continuous capture. + * Refer to "sh_css_internal.h" for details. + */ int ia_css_stream_capture_frame(struct ia_css_stream *stream, unsigned int exp_id) { @@ -8389,10 +7989,12 @@ int ia_css_stream_capture_frame(struct ia_css_stream *stream, sh_css_create_tag_descr(0, 0, 0, exp_id, &tag_descr); /* Encode the tag descriptor into a 32-bit value */ encoded_tag_descr = sh_css_encode_tag_descr(&tag_descr); - /* Enqueue the encoded tag to the host2sp queue. - * Note: The pipe and stage IDs for tag_cmd queue are hard-coded to 0 - * on both host and the SP side. - * It is mainly because it is enough to have only one tag_cmd queue */ + /* + * Enqueue the encoded tag to the host2sp queue. + * Note: The pipe and stage IDs for tag_cmd queue are hard-coded to 0 + * on both host and the SP side. + * It is mainly because it is enough to have only one tag_cmd queue + */ err = ia_css_bufq_enqueue_tag_cmd(encoded_tag_descr); IA_CSS_LEAVE_ERR(err); @@ -8400,9 +8002,9 @@ int ia_css_stream_capture_frame(struct ia_css_stream *stream, } /* - * @brief Configure the continuous capture. - * Refer to "sh_css_internal.h" for details. - */ + * @brief Configure the continuous capture. + * Refer to "sh_css_internal.h" for details. + */ int ia_css_stream_capture(struct ia_css_stream *stream, int num_captures, unsigned int skip, int offset) { @@ -8438,10 +8040,12 @@ int ia_css_stream_capture(struct ia_css_stream *stream, int num_captures, return -EBUSY; } - /* Enqueue the encoded tag to the host2sp queue. - * Note: The pipe and stage IDs for tag_cmd queue are hard-coded to 0 - * on both host and the SP side. - * It is mainly because it is enough to have only one tag_cmd queue */ + /* + * Enqueue the encoded tag to the host2sp queue. + * Note: The pipe and stage IDs for tag_cmd queue are hard-coded to 0 + * on both host and the SP side. + * It is mainly because it is enough to have only one tag_cmd queue + */ return_err = ia_css_bufq_enqueue_tag_cmd((uint32_t)encoded_tag_descr); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, @@ -8486,9 +8090,7 @@ sh_css_init_host_sp_control_vars(void) unsigned int HIVE_ADDR_host_sp_queues_initialized; unsigned int HIVE_ADDR_sp_sleep_mode; unsigned int HIVE_ADDR_ia_css_dmaproxy_sp_invalidate_tlb; -#ifndef ISP2401 unsigned int HIVE_ADDR_sp_stop_copy_preview; -#endif unsigned int HIVE_ADDR_host_sp_com; unsigned int o = offsetof(struct host_sp_communication, host2sp_command) / sizeof(int); @@ -8505,20 +8107,9 @@ sh_css_init_host_sp_control_vars(void) fw->info.sp.host_sp_queues_initialized; HIVE_ADDR_sp_sleep_mode = fw->info.sp.sleep_mode; HIVE_ADDR_ia_css_dmaproxy_sp_invalidate_tlb = fw->info.sp.invalidate_tlb; -#ifndef ISP2401 HIVE_ADDR_sp_stop_copy_preview = fw->info.sp.stop_copy_preview; -#endif HIVE_ADDR_host_sp_com = fw->info.sp.host_sp_com; - (void)HIVE_ADDR_ia_css_ispctrl_sp_isp_started; /* Suppres warnings in CRUN */ - - (void)HIVE_ADDR_sp_sleep_mode; - (void)HIVE_ADDR_ia_css_dmaproxy_sp_invalidate_tlb; -#ifndef ISP2401 - (void)HIVE_ADDR_sp_stop_copy_preview; -#endif - (void)HIVE_ADDR_host_sp_com; - sp_dmem_store_uint32(SP0_ID, (unsigned int)sp_address_of(ia_css_ispctrl_sp_isp_started), (uint32_t)(0)); @@ -8532,11 +8123,9 @@ sh_css_init_host_sp_control_vars(void) sp_dmem_store_uint32(SP0_ID, (unsigned int)sp_address_of(ia_css_dmaproxy_sp_invalidate_tlb), (uint32_t)(false)); -#ifndef ISP2401 sp_dmem_store_uint32(SP0_ID, (unsigned int)sp_address_of(sp_stop_copy_preview), my_css.stop_copy_preview ? (uint32_t)(1) : (uint32_t)(0)); -#endif store_sp_array_uint(host_sp_com, o, host2sp_cmd_ready); for (i = 0; i < N_CSI_PORTS; i++) { @@ -8586,9 +8175,11 @@ void ia_css_stream_config_defaults(struct ia_css_stream_config *stream_config) stream_config->online = true; stream_config->left_padding = -1; stream_config->pixels_per_clock = 1; - /* temporary default value for backwards compatibility. - * This field used to be hardcoded within CSS but this has now - * been moved to the stream_config struct. */ + /* + * temporary default value for backwards compatibility. + * This field used to be hardcoded within CSS but this has now + * been moved to the stream_config struct. + */ stream_config->source.port.rxcount = 0x04040404; } @@ -8602,7 +8193,7 @@ ia_css_acc_pipe_create(struct ia_css_pipe *pipe) return -EINVAL; } - /* There is not meaning for num_execs = 0 semantically. Run atleast once. */ + /* There is not meaning for num_execs = 0 semantically. Run at least once. */ if (pipe->config.acc_num_execs == 0) pipe->config.acc_num_execs = 1; @@ -8673,9 +8264,11 @@ ia_css_pipe_create_extra(const struct ia_css_pipe_config *config, ia_css_pipe_extra_config_defaults(&internal_pipe->extra_config); if (config->mode == IA_CSS_PIPE_MODE_ACC) { - /* Temporary hack to migrate acceleration to CSS 2.0. - * In the future the code for all pipe types should be - * unified. */ + /* + * Temporary hack to migrate acceleration to CSS 2.0. + * In the future the code for all pipe types should be + * unified. + */ *pipe = internal_pipe; if (!internal_pipe->config.acc_extension && internal_pipe->config.num_acc_stages == @@ -8687,21 +8280,23 @@ ia_css_pipe_create_extra(const struct ia_css_pipe_config *config, return ia_css_acc_pipe_create(internal_pipe); } - /* Use config value when dvs_frame_delay setting equal to 2, otherwise always 1 by default */ + /* + * Use config value when dvs_frame_delay setting equal to 2, + * otherwise always 1 by default + */ if (internal_pipe->config.dvs_frame_delay == IA_CSS_FRAME_DELAY_2) internal_pipe->dvs_frame_delay = 2; else internal_pipe->dvs_frame_delay = 1; - /* we still keep enable_raw_binning for backward compatibility, for any new - fractional bayer downscaling, we should use bayer_ds_out_res. if both are - specified, bayer_ds_out_res will take precedence.if none is specified, we - set bayer_ds_out_res equal to IF output resolution(IF may do cropping on - sensor output) or use default decimation factor 1. */ - if (internal_pipe->extra_config.enable_raw_binning && - internal_pipe->config.bayer_ds_out_res.width) { - /* fill some code here, if no code is needed, please remove it during integration */ - } + /* + * we still keep enable_raw_binning for backward compatibility, + * for any new fractional bayer downscaling, we should use + * bayer_ds_out_res. if both are specified, bayer_ds_out_res will + * take precedence.if none is specified, we set bayer_ds_out_res + * equal to IF output resolution(IF may do cropping on sensor output) + * or use default decimation factor 1. + */ /* YUV downscaling */ if ((internal_pipe->config.vf_pp_in_res.width || @@ -8905,8 +8500,10 @@ ia_css_stream_configure_rx(struct ia_css_stream *stream) if (config->compression.type == IA_CSS_CSI2_COMPRESSION_TYPE_NONE) stream->csi_rx_config.comp = MIPI_PREDICTOR_NONE; else - /* not implemented yet, requires extension of the rx_cfg_t - * struct */ + /* + * not implemented yet, requires extension of the rx_cfg_t + * struct + */ return -EINVAL; stream->csi_rx_config.is_two_ppc = (stream->config.pixels_per_clock == 2); @@ -8993,56 +8590,15 @@ metadata_info_init(const struct ia_css_metadata_config *mdc, return -EINVAL; md->resolution = mdc->resolution; - /* We round up the stride to a multiple of the width - * of the port going to DDR, this is a HW requirements (DMA). */ + /* + * We round up the stride to a multiple of the width + * of the port going to DDR, this is a HW requirements (DMA). + */ md->stride = CEIL_MUL(mdc->resolution.width, HIVE_ISP_DDR_WORD_BYTES); md->size = mdc->resolution.height * md->stride; return 0; } -/* ISP2401 */ -static int check_pipe_resolutions(const struct ia_css_pipe *pipe) -{ - int err = 0; - - IA_CSS_ENTER_PRIVATE(""); - - if (!pipe || !pipe->stream) { - IA_CSS_ERROR("null arguments"); - err = -EINVAL; - goto EXIT; - } - - if (ia_css_util_check_res(pipe->config.input_effective_res.width, - pipe->config.input_effective_res.height) != 0) { - IA_CSS_ERROR("effective resolution not supported"); - err = -EINVAL; - goto EXIT; - } - if (!ia_css_util_resolution_is_zero( - pipe->stream->config.input_config.input_res)) { - if (!ia_css_util_res_leq(pipe->config.input_effective_res, - pipe->stream->config.input_config.input_res)) { - IA_CSS_ERROR("effective resolution is larger than input resolution"); - err = -EINVAL; - goto EXIT; - } - } - if (!ia_css_util_resolution_is_even(pipe->config.output_info[0].res)) { - IA_CSS_ERROR("output resolution must be even"); - err = -EINVAL; - goto EXIT; - } - if (!ia_css_util_resolution_is_even(pipe->config.vf_output_info[0].res)) { - IA_CSS_ERROR("VF resolution must be even"); - err = -EINVAL; - goto EXIT; - } -EXIT: - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; -} - int ia_css_stream_create(const struct ia_css_stream_config *stream_config, int num_pipes, @@ -9057,9 +8613,6 @@ ia_css_stream_create(const struct ia_css_stream_config *stream_config, int err = -EINVAL; struct ia_css_metadata_info md_info; struct ia_css_resolution effective_res; -#ifdef ISP2401 - bool aspect_ratio_crop_enabled = false; -#endif IA_CSS_ENTER("num_pipes=%d", num_pipes); ia_css_debug_dump_stream_config(stream_config, num_pipes); @@ -9236,14 +8789,6 @@ ia_css_stream_create(const struct ia_css_stream_config *stream_config, IA_CSS_LOG("mode sensor/default"); } -#ifdef ISP2401 - err = aspect_ratio_crop_init(curr_stream, pipes, - &aspect_ratio_crop_enabled); - if (err) { - IA_CSS_LEAVE_ERR(err); - goto ERR; - } -#endif for (i = 0; i < num_pipes; i++) { struct ia_css_resolution effective_res; @@ -9256,22 +8801,6 @@ ia_css_stream_create(const struct ia_css_stream_config *stream_config, if (effective_res.height == 0 || effective_res.width == 0) { effective_res = curr_pipe->stream->config.input_config.effective_res; -#if defined(ISP2401) - /* The aspect ratio cropping is currently only - * supported on the new input system. */ - if (aspect_ratio_crop_check(aspect_ratio_crop_enabled, curr_pipe)) { - struct ia_css_resolution crop_res; - - err = aspect_ratio_crop(curr_pipe, &crop_res); - if (!err) { - effective_res = crop_res; - } else { - /* in case of error fallback to default - * effective resolution from driver. */ - IA_CSS_LOG("aspect_ratio_crop() failed with err(%d)", err); - } - } -#endif curr_pipe->config.input_effective_res = effective_res; } IA_CSS_LOG("effective_res=%dx%d", @@ -9279,17 +8808,6 @@ ia_css_stream_create(const struct ia_css_stream_config *stream_config, effective_res.height); } - if (IS_ISP2401) { - for (i = 0; i < num_pipes; i++) { - if (pipes[i]->config.mode != IA_CSS_PIPE_MODE_ACC && - pipes[i]->config.mode != IA_CSS_PIPE_MODE_COPY) { - err = check_pipe_resolutions(pipes[i]); - if (err) - goto ERR; - } - } - } - err = ia_css_stream_isp_parameters_init(curr_stream); if (err) goto ERR; @@ -9327,9 +8845,7 @@ ia_css_stream_create(const struct ia_css_stream_config *stream_config, if (num_pipes >= 2) { curr_stream->cont_capt = true; curr_stream->disable_cont_vf = curr_stream->config.disable_cont_viewfinder; - - if (!IS_ISP2401) - curr_stream->stop_copy_preview = my_css.stop_copy_preview; + curr_stream->stop_copy_preview = my_css.stop_copy_preview; } /* Create copy pipe here, since it may not be exposed to the driver */ @@ -9387,16 +8903,15 @@ ia_css_stream_create(const struct ia_css_stream_config *stream_config, /* set current stream */ curr_pipe->stream = curr_stream; - if (!IS_ISP2401) { - /* take over effective info */ + /* take over effective info */ + + effective_res = curr_pipe->config.input_effective_res; + err = ia_css_util_check_res( + effective_res.width, + effective_res.height); + if (err) + goto ERR; - effective_res = curr_pipe->config.input_effective_res; - err = ia_css_util_check_res( - effective_res.width, - effective_res.height); - if (err) - goto ERR; - } /* sensor binning per pipe */ if (sensor_binning_changed) sh_css_pipe_free_shading_table(curr_pipe); @@ -9421,9 +8936,6 @@ ia_css_stream_create(const struct ia_css_stream_config *stream_config, goto ERR; } - if (IS_ISP2401) - pipe_info->output_system_in_res_info = curr_pipe->config.output_system_in_res; - if (!spcopyonly) { if (!IS_ISP2401) err = sh_css_pipe_get_shading_info(curr_pipe, @@ -9523,8 +9035,6 @@ ia_css_stream_destroy(struct ia_css_stream *stream) if ((stream->last_pipe) && ia_css_pipeline_is_mapped(stream->last_pipe->pipe_num)) { #if defined(ISP2401) - bool free_mpi; - for (i = 0; i < stream->num_pipes; i++) { struct ia_css_pipe *entry = stream->pipes[i]; unsigned int sp_thread_id; @@ -9548,19 +9058,16 @@ ia_css_stream_destroy(struct ia_css_stream *stream) } } } - free_mpi = stream->config.mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR; - if (IS_ISP2401) { - free_mpi |= stream->config.mode == IA_CSS_INPUT_MODE_TPG; - free_mpi |= stream->config.mode == IA_CSS_INPUT_MODE_PRBS; - } - - if (free_mpi) { + if (stream->config.mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR) { for (i = 0; i < stream->num_pipes; i++) { struct ia_css_pipe *entry = stream->pipes[i]; - /* free any mipi frames that are remaining: - * some test stream create-destroy cycles do not generate output frames - * and the mipi buffer is not freed in the deque function - */ + /* + * free any mipi frames that are remaining: + * some test stream create-destroy cycles do + * not generate output frames + * and the mipi buffer is not freed in the + * deque function + */ if (entry) free_mipi_frames(entry); } @@ -9638,58 +9145,6 @@ ia_css_stream_get_info(const struct ia_css_stream *stream, return 0; } -/* - * Rebuild a stream, including allocating structs, setting configuration and - * building the required pipes. - * The data is taken from the css_save struct updated upon stream creation. - * The stream handle is used to identify the correct entry in the css_save struct - */ -int -ia_css_stream_load(struct ia_css_stream *stream) -{ - int i, j, err; - - if (IS_ISP2401) { - /* TODO remove function - DEPRECATED */ - (void)stream; - return -ENOTSUPP; - } - - assert(stream); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_stream_load() enter,\n"); - for (i = 0; i < MAX_ACTIVE_STREAMS; i++) { - if (my_css_save.stream_seeds[i].stream != stream) - continue; - - for (j = 0; j < my_css_save.stream_seeds[i].num_pipes; j++) { - int k; - - err = ia_css_pipe_create(&my_css_save.stream_seeds[i].pipe_config[j], - &my_css_save.stream_seeds[i].pipes[j]); - if (!err) - continue; - - for (k = 0; k < j; k++) - ia_css_pipe_destroy(my_css_save.stream_seeds[i].pipes[k]); - return err; - } - err = ia_css_stream_create(&my_css_save.stream_seeds[i].stream_config, - my_css_save.stream_seeds[i].num_pipes, - my_css_save.stream_seeds[i].pipes, - &my_css_save.stream_seeds[i].stream); - if (!err) - break; - - ia_css_stream_destroy(stream); - for (j = 0; j < my_css_save.stream_seeds[i].num_pipes; j++) - ia_css_pipe_destroy(my_css_save.stream_seeds[i].pipes[j]); - return err; - } - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_stream_load() exit,\n"); - return 0; -} - int ia_css_stream_start(struct ia_css_stream *stream) { @@ -9763,16 +9218,14 @@ ia_css_stream_stop(struct ia_css_stream *stream) } #endif - if (!IS_ISP2401) - err = ia_css_pipeline_request_stop(&stream->last_pipe->pipeline); - else - err = sh_css_pipes_stop(stream); - + err = ia_css_pipeline_request_stop(&stream->last_pipe->pipeline); if (err) return err; - /* Ideally, unmapping should happen after pipeline_stop, but current - * semantics do not allow that. */ + /* + * Ideally, unmapping should happen after pipeline_stop, but current + * semantics do not allow that. + */ /* err = map_sp_threads(stream, false); */ return err; @@ -9785,19 +9238,16 @@ ia_css_stream_has_stopped(struct ia_css_stream *stream) assert(stream); - if (!IS_ISP2401) - stopped = ia_css_pipeline_has_stopped(&stream->last_pipe->pipeline); - else - stopped = sh_css_pipes_have_stopped(stream); + stopped = ia_css_pipeline_has_stopped(&stream->last_pipe->pipeline); return stopped; } /* ISP2400 */ /* - * Destroy the stream and all the pipes related to it. - * The stream handle is used to identify the correct entry in the css_save struct - */ + * Destroy the stream and all the pipes related to it. + * The stream handle is used to identify the correct entry in the css_save struct + */ int ia_css_stream_unload(struct ia_css_stream *stream) { @@ -10060,11 +9510,12 @@ ia_css_pipe_get_pipe_num(const struct ia_css_pipe *pipe) { assert(pipe); - /* KW was not sure this function was not returning a value - that was out of range; so added an assert, and, for the - case when asserts are not enabled, clip to the largest - value; pipe_num is unsigned so the value cannot be too small - */ + /* + * KW was not sure this function was not returning a value + * that was out of range; so added an assert, and, for the + * case when asserts are not enabled, clip to the largest + * value; pipe_num is unsigned so the value cannot be too small + */ assert(pipe->pipe_num < IA_CSS_PIPELINE_NUM_MAX); if (pipe->pipe_num >= IA_CSS_PIPELINE_NUM_MAX) @@ -10119,10 +9570,10 @@ ia_css_start_sp(void) } /* - * Time to wait SP for termincate. Only condition when this can happen - * is a fatal hw failure, but we must be able to detect this and emit - * a proper error trace. - */ + * Time to wait SP for termincate. Only condition when this can happen + * is a fatal hw failure, but we must be able to detect this and emit + * a proper error trace. + */ #define SP_SHUTDOWN_TIMEOUT_US 200000 int @@ -10142,14 +9593,10 @@ ia_css_stop_sp(void) } /* For now, stop whole SP */ - if (!IS_ISP2401) { - sh_css_write_host2sp_command(host2sp_cmd_terminate); - } else { - if (!sh_css_write_host2sp_command(host2sp_cmd_terminate)) { - IA_CSS_ERROR("Call to 'sh-css_write_host2sp_command()' failed"); - ia_css_debug_dump_sp_sw_debug_info(); - ia_css_debug_dump_debug_info(NULL); - } + if (!sh_css_write_host2sp_command(host2sp_cmd_terminate)) { + IA_CSS_ERROR("Call to 'sh-css_write_host2sp_command()' failed"); + ia_css_debug_dump_sp_sw_debug_info(); + ia_css_debug_dump_debug_info(NULL); } sh_css_sp_set_sp_running(false); @@ -10245,9 +9692,7 @@ void ia_css_pipe_map_queue(struct ia_css_pipe *pipe, bool map) ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_OUTPUT_FRAME, map); ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_PARAMETER_SET, map); ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_PER_FRAME_PARAMETER_SET, map); -#if defined SH_CSS_ENABLE_METADATA ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_METADATA, map); -#endif if (pipe->pipe_settings.preview.preview_binary.info && pipe->pipe_settings.preview.preview_binary.info->sp.enable.s3a) ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_3A_STATISTICS, map); @@ -10260,9 +9705,7 @@ void ia_css_pipe_map_queue(struct ia_css_pipe *pipe, bool map) ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_VF_OUTPUT_FRAME, map); ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_PARAMETER_SET, map); ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_PER_FRAME_PARAMETER_SET, map); -#if defined SH_CSS_ENABLE_METADATA ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_METADATA, map); -#endif if (pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_PRIMARY) { for (i = 0; i < pipe->pipe_settings.capture.num_primary_stage; i++) { if (pipe->pipe_settings.capture.primary_binary[i].info && @@ -10287,9 +9730,7 @@ void ia_css_pipe_map_queue(struct ia_css_pipe *pipe, bool map) ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_VF_OUTPUT_FRAME, map); ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_PARAMETER_SET, map); ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_PER_FRAME_PARAMETER_SET, map); -#if defined SH_CSS_ENABLE_METADATA ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_METADATA, map); -#endif if (pipe->pipe_settings.video.video_binary.info && pipe->pipe_settings.video.video_binary.info->sp.enable.s3a) ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_3A_STATISTICS, map); @@ -10302,18 +9743,14 @@ void ia_css_pipe_map_queue(struct ia_css_pipe *pipe, bool map) ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_INPUT_FRAME, map); if (!pipe->stream->config.continuous) ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_OUTPUT_FRAME, map); -#if defined SH_CSS_ENABLE_METADATA ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_METADATA, map); -#endif } else if (pipe->mode == IA_CSS_PIPE_ID_ACC) { if (need_input_queue) ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_INPUT_FRAME, map); ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_OUTPUT_FRAME, map); ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_PARAMETER_SET, map); ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_PER_FRAME_PARAMETER_SET, map); -#if defined SH_CSS_ENABLE_METADATA ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_METADATA, map); -#endif } else if (pipe->mode == IA_CSS_PIPE_ID_YUVPP) { unsigned int idx; @@ -10325,38 +9762,11 @@ void ia_css_pipe_map_queue(struct ia_css_pipe *pipe, bool map) if (need_input_queue) ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_INPUT_FRAME, map); ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_PARAMETER_SET, map); -#if defined SH_CSS_ENABLE_METADATA ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_METADATA, map); -#endif } IA_CSS_LEAVE(""); } -#if CONFIG_ON_FRAME_ENQUEUE() -static int set_config_on_frame_enqueue(struct ia_css_frame_info - *info, struct frame_data_wrapper *frame) -{ - frame->config_on_frame_enqueue.padded_width = 0; - - /* currently we support configuration on frame enqueue only on YUV formats */ - /* on other formats the padded_width is zeroed for no configuration override */ - switch (info->format) { - case IA_CSS_FRAME_FORMAT_YUV420: - case IA_CSS_FRAME_FORMAT_NV12: - if (info->padded_width > info->res.width) - frame->config_on_frame_enqueue.padded_width = info->padded_width; - else if ((info->padded_width < info->res.width) && (info->padded_width > 0)) - return -EINVAL; - - /* nothing to do if width == padded width or padded width is zeroed (the same) */ - break; - default: - break; - } - - return 0; -} -#endif int ia_css_unlock_raw_frame(struct ia_css_stream *stream, uint32_t exp_id) @@ -10365,8 +9775,10 @@ ia_css_unlock_raw_frame(struct ia_css_stream *stream, uint32_t exp_id) IA_CSS_ENTER(""); - /* Only continuous streams have a tagger to which we can send the - * unlock message. */ + /* + * Only continuous streams have a tagger to which we can send the + * unlock message. + */ if (!stream || !stream->config.continuous) { IA_CSS_ERROR("invalid stream pointer"); return -EINVAL; @@ -10378,8 +9790,10 @@ ia_css_unlock_raw_frame(struct ia_css_stream *stream, uint32_t exp_id) return -EINVAL; } - /* Send the event. Since we verified that the exp_id is valid, - * we can safely assign it to an 8-bit argument here. */ + /* + * Send the event. Since we verified that the exp_id is valid, + * we can safely assign it to an 8-bit argument here. + */ ret = ia_css_bufq_enqueue_psys_event( IA_CSS_PSYS_SW_EVENT_UNLOCK_RAW_BUFFER, exp_id, 0, 0); @@ -10387,9 +9801,10 @@ ia_css_unlock_raw_frame(struct ia_css_stream *stream, uint32_t exp_id) return ret; } -/* @brief Set the state (Enable or Disable) of the Extension stage in the - * given pipe. - */ +/* + * @brief Set the state (Enable or Disable) of the Extension stage in the + * given pipe. + */ int ia_css_pipe_set_qos_ext_state(struct ia_css_pipe *pipe, uint32_t fw_handle, bool enable) @@ -10433,9 +9848,10 @@ ia_css_pipe_set_qos_ext_state(struct ia_css_pipe *pipe, uint32_t fw_handle, return err; } -/* @brief Get the state (Enable or Disable) of the Extension stage in the - * given pipe. - */ +/* + * @brief Get the state (Enable or Disable) of the Extension stage in the + * given pipe. + */ int ia_css_pipe_get_qos_ext_state(struct ia_css_pipe *pipe, uint32_t fw_handle, bool *enable) @@ -10471,215 +9887,6 @@ ia_css_pipe_get_qos_ext_state(struct ia_css_pipe *pipe, uint32_t fw_handle, return err; } -/* ISP2401 */ -int -ia_css_pipe_update_qos_ext_mapped_arg(struct ia_css_pipe *pipe, - u32 fw_handle, - struct ia_css_isp_param_css_segments *css_seg, - struct ia_css_isp_param_isp_segments *isp_seg) -{ - unsigned int HIVE_ADDR_sp_group; - static struct sh_css_sp_group sp_group; - static struct sh_css_sp_stage sp_stage; - static struct sh_css_isp_stage isp_stage; - const struct ia_css_fw_info *fw; - unsigned int thread_id; - struct ia_css_pipeline_stage *stage; - int err = 0; - int stage_num = 0; - enum ia_css_isp_memories mem; - bool enabled; - - IA_CSS_ENTER(""); - - fw = &sh_css_sp_fw; - - /* Parameter Check */ - if (!pipe || !pipe->stream) { - IA_CSS_ERROR("Invalid Pipe."); - err = -EINVAL; - } else if (!(pipe->config.acc_extension)) { - IA_CSS_ERROR("Invalid Pipe (No Extension Firmware)."); - err = -EINVAL; - } else if (!sh_css_sp_is_running()) { - IA_CSS_ERROR("Leaving: queue unavailable."); - err = -EBUSY; - } else { - /* Query the thread_id and stage_num corresponding to the Extension firmware */ - ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(pipe), &thread_id); - err = ia_css_pipeline_get_stage_from_fw(&pipe->pipeline, fw_handle, &stage); - if (!err) { - /* Get the Extension State */ - enabled = (SH_CSS_QOS_STAGE_IS_ENABLED(&sh_css_sp_group.pipe[thread_id], - stage->stage_num)) ? true : false; - /* Update mapped arg only when extension stage is not enabled */ - if (enabled) { - IA_CSS_ERROR("Leaving: cannot update when stage is enabled."); - err = -EBUSY; - } else { - stage_num = stage->stage_num; - - HIVE_ADDR_sp_group = fw->info.sp.group; - sp_dmem_load(SP0_ID, - (unsigned int)sp_address_of(sp_group), - &sp_group, - sizeof(struct sh_css_sp_group)); - hmm_load(sp_group.pipe[thread_id].sp_stage_addr[stage_num], - &sp_stage, sizeof(struct sh_css_sp_stage)); - - hmm_load(sp_stage.isp_stage_addr, - &isp_stage, sizeof(struct sh_css_isp_stage)); - - for (mem = 0; mem < N_IA_CSS_ISP_MEMORIES; mem++) { - isp_stage.mem_initializers.params[IA_CSS_PARAM_CLASS_PARAM][mem].address = - css_seg->params[IA_CSS_PARAM_CLASS_PARAM][mem].address; - isp_stage.mem_initializers.params[IA_CSS_PARAM_CLASS_PARAM][mem].size = - css_seg->params[IA_CSS_PARAM_CLASS_PARAM][mem].size; - isp_stage.binary_info.mem_initializers.params[IA_CSS_PARAM_CLASS_PARAM][mem].address - = - isp_seg->params[IA_CSS_PARAM_CLASS_PARAM][mem].address; - isp_stage.binary_info.mem_initializers.params[IA_CSS_PARAM_CLASS_PARAM][mem].size - = - isp_seg->params[IA_CSS_PARAM_CLASS_PARAM][mem].size; - } - - hmm_store(sp_stage.isp_stage_addr, - &isp_stage, - sizeof(struct sh_css_isp_stage)); - } - } - } - IA_CSS_LEAVE("err:%d handle:%u", err, fw_handle); - return err; -} - -#ifdef ISP2401 -static int -aspect_ratio_crop_init(struct ia_css_stream *curr_stream, - struct ia_css_pipe *pipes[], - bool *do_crop_status) -{ - int err = 0; - int i; - struct ia_css_pipe *curr_pipe; - u32 pipe_mask = 0; - - if ((!curr_stream) || - (curr_stream->num_pipes == 0) || - (!pipes) || - (!do_crop_status)) { - err = -EINVAL; - IA_CSS_LEAVE_ERR(err); - return err; - } - - for (i = 0; i < curr_stream->num_pipes; i++) { - curr_pipe = pipes[i]; - pipe_mask |= (1 << curr_pipe->config.mode); - } - - *do_crop_status = - (((pipe_mask & (1 << IA_CSS_PIPE_MODE_PREVIEW)) || - (pipe_mask & (1 << IA_CSS_PIPE_MODE_VIDEO))) && - (pipe_mask & (1 << IA_CSS_PIPE_MODE_CAPTURE)) && - curr_stream->config.continuous); - return 0; -} - -static bool -aspect_ratio_crop_check(bool enabled, struct ia_css_pipe *curr_pipe) -{ - bool status = false; - - if ((curr_pipe) && enabled) { - if ((curr_pipe->config.mode == IA_CSS_PIPE_MODE_PREVIEW) || - (curr_pipe->config.mode == IA_CSS_PIPE_MODE_VIDEO) || - (curr_pipe->config.mode == IA_CSS_PIPE_MODE_CAPTURE)) - status = true; - } - - return status; -} - -static int -aspect_ratio_crop(struct ia_css_pipe *curr_pipe, - struct ia_css_resolution *effective_res) -{ - int err = 0; - struct ia_css_resolution crop_res; - struct ia_css_resolution *in_res = NULL; - struct ia_css_resolution *out_res = NULL; - bool use_bds_output_info = false; - bool use_vf_pp_in_res = false; - bool use_capt_pp_in_res = false; - - if ((!curr_pipe) || - (!effective_res)) { - err = -EINVAL; - IA_CSS_LEAVE_ERR(err); - return err; - } - - if ((curr_pipe->config.mode != IA_CSS_PIPE_MODE_PREVIEW) && - (curr_pipe->config.mode != IA_CSS_PIPE_MODE_VIDEO) && - (curr_pipe->config.mode != IA_CSS_PIPE_MODE_CAPTURE)) { - err = -EINVAL; - IA_CSS_LEAVE_ERR(err); - return err; - } - - use_bds_output_info = - ((curr_pipe->bds_output_info.res.width != 0) && - (curr_pipe->bds_output_info.res.height != 0)); - - use_vf_pp_in_res = - ((curr_pipe->config.vf_pp_in_res.width != 0) && - (curr_pipe->config.vf_pp_in_res.height != 0)); - - use_capt_pp_in_res = - ((curr_pipe->config.capt_pp_in_res.width != 0) && - (curr_pipe->config.capt_pp_in_res.height != 0)); - - in_res = &curr_pipe->stream->config.input_config.effective_res; - out_res = &curr_pipe->output_info[0].res; - - switch (curr_pipe->config.mode) { - case IA_CSS_PIPE_MODE_PREVIEW: - if (use_bds_output_info) - out_res = &curr_pipe->bds_output_info.res; - else if (use_vf_pp_in_res) - out_res = &curr_pipe->config.vf_pp_in_res; - break; - case IA_CSS_PIPE_MODE_VIDEO: - if (use_bds_output_info) - out_res = &curr_pipe->bds_output_info.res; - break; - case IA_CSS_PIPE_MODE_CAPTURE: - if (use_capt_pp_in_res) - out_res = &curr_pipe->config.capt_pp_in_res; - break; - case IA_CSS_PIPE_MODE_ACC: - case IA_CSS_PIPE_MODE_COPY: - case IA_CSS_PIPE_MODE_YUVPP: - default: - IA_CSS_ERROR("aspect ratio cropping invalid args: mode[%d]\n", - curr_pipe->config.mode); - assert(0); - break; - } - - err = ia_css_frame_find_crop_resolution(in_res, out_res, &crop_res); - if (!err) - *effective_res = crop_res; - else - /* in case of error fallback to default - * effective resolution from driver. */ - IA_CSS_LOG("ia_css_frame_find_crop_resolution() failed with err(%d)", err); - - return err; -} -#endif - static void sh_css_hmm_buffer_record_init(void) { diff --git a/drivers/staging/media/atomisp/pci/sh_css_defs.h b/drivers/staging/media/atomisp/pci/sh_css_defs.h index 30a84a587b2a..7eb10b226f0a 100644 --- a/drivers/staging/media/atomisp/pci/sh_css_defs.h +++ b/drivers/staging/media/atomisp/pci/sh_css_defs.h @@ -117,13 +117,8 @@ RGB[0,8191],coef[-8192,8191] -> RGB[0,8191] #define SH_CSS_NUM_INPUT_BUF_LINES 4 /* Left cropping only applicable for sufficiently large nway */ -#if ISP_VEC_NELEMS == 16 -#define SH_CSS_MAX_LEFT_CROPPING 0 -#define SH_CSS_MAX_TOP_CROPPING 0 -#else #define SH_CSS_MAX_LEFT_CROPPING 12 #define SH_CSS_MAX_TOP_CROPPING 12 -#endif #define SH_CSS_SP_MAX_WIDTH 1280 @@ -137,13 +132,8 @@ RGB[0,8191],coef[-8192,8191] -> RGB[0,8191] #define SH_CSS_MIN_DVS_ENVELOPE 12U /* The FPGA system (vec_nelems == 16) only supports upto 5MP */ -#if ISP_VEC_NELEMS == 16 -#define SH_CSS_MAX_SENSOR_WIDTH 2560 -#define SH_CSS_MAX_SENSOR_HEIGHT 1920 -#else #define SH_CSS_MAX_SENSOR_WIDTH 4608 #define SH_CSS_MAX_SENSOR_HEIGHT 3450 -#endif /* Limited to reduce vmem pressure */ #if ISP_VMEM_DEPTH >= 3072 @@ -178,50 +168,20 @@ RGB[0,8191],coef[-8192,8191] -> RGB[0,8191] #define SH_CSS_MORPH_TABLE_ELEMS_PER_DDR_WORD \ (HIVE_ISP_DDR_WORD_BYTES / SH_CSS_MORPH_TABLE_ELEM_BYTES) -#define ISP2400_SH_CSS_MAX_SCTBL_WIDTH_PER_COLOR (SH_CSS_MAX_BQ_GRID_WIDTH + 1) -#define ISP2400_SH_CSS_MAX_SCTBL_HEIGHT_PER_COLOR (SH_CSS_MAX_BQ_GRID_HEIGHT + 1) - -#define ISP2400_SH_CSS_MAX_SCTBL_ALIGNED_WIDTH_PER_COLOR \ - CEIL_MUL(ISP2400_SH_CSS_MAX_SCTBL_WIDTH_PER_COLOR, ISP_VEC_NELEMS) - -/* TODO: I will move macros of "*_SCTBL_*" to SC kernel. - "+ 2" should be "+ SH_CSS_SCTBL_CENTERING_MARGIN + SH_CSS_SCTBL_LAST_GRID_COUNT". (michie, Sep/23/2014) */ -#define ISP2401_SH_CSS_MAX_SCTBL_WIDTH_PER_COLOR (SH_CSS_MAX_BQ_GRID_WIDTH + 2) -#define ISP2401_SH_CSS_MAX_SCTBL_HEIGHT_PER_COLOR (SH_CSS_MAX_BQ_GRID_HEIGHT + 2) +#define SH_CSS_MAX_SCTBL_WIDTH_PER_COLOR (SH_CSS_MAX_BQ_GRID_WIDTH + 1) +#define SH_CSS_MAX_SCTBL_HEIGHT_PER_COLOR (SH_CSS_MAX_BQ_GRID_HEIGHT + 1) -#define ISP2401_SH_CSS_MAX_SCTBL_ALIGNED_WIDTH_PER_COLOR \ - CEIL_MUL(ISP2400_SH_CSS_MAX_SCTBL_WIDTH_PER_COLOR, ISP_VEC_NELEMS) +#define SH_CSS_MAX_SCTBL_ALIGNED_WIDTH_PER_COLOR \ + CEIL_MUL(SH_CSS_MAX_SCTBL_WIDTH_PER_COLOR, ISP_VEC_NELEMS) /* Each line of this table is aligned to the maximum line width. */ #define SH_CSS_MAX_S3ATBL_WIDTH SH_CSS_MAX_BQ_GRID_WIDTH /* Video mode specific DVS define */ /* The video binary supports a delay of 1 or 2 frames */ -#define VIDEO_FRAME_DELAY 2 +#define MAX_DVS_FRAME_DELAY 2 /* +1 because DVS reads the previous and writes the current frame concurrently */ -#define MAX_NUM_VIDEO_DELAY_FRAMES (VIDEO_FRAME_DELAY + 1) - -/* Preview mode specific DVS define. */ -/* In preview we only need GDC functionality (and not the DVS functionality) */ -/* The minimum number of DVS frames you need is 2, one were GDC reads from and another where GDC writes into */ -#define NUM_PREVIEW_DVS_FRAMES (2) - -/* TNR is no longer exclusive to video, SkyCam preview has TNR too (same kernel as video). - * All uses the generic define NUM_TNR_FRAMES. The define NUM_VIDEO_TNR_FRAMES has been deprecated. - * - * Notes - * 1) The value depends on the used TNR kernel and is not something that depends on the mode - * and it is not something you just could choice. - * 2) For the luma only pipeline a version that supports two different sets of TNR reference frames - * is being used. - *. - */ -#define NUM_VALID_TNR_REF_FRAMES (1) /* At least one valid TNR reference frame is required */ -#define NUM_TNR_FRAMES_PER_REF_BUF_SET (2) -/* In luma-only mode alternate illuminated frames are supported, that requires two double buffers */ -#define NUM_TNR_REF_BUF_SETS (1) - -#define NUM_TNR_FRAMES (NUM_TNR_FRAMES_PER_REF_BUF_SET * NUM_TNR_REF_BUF_SETS) +#define MAX_NUM_VIDEO_DELAY_FRAMES (MAX_DVS_FRAME_DELAY + 1) #define NUM_VIDEO_TNR_FRAMES 2 @@ -250,11 +210,11 @@ RGB[0,8191],coef[-8192,8191] -> RGB[0,8191] CEIL_MUL(_ISP_MORPH_TABLE_WIDTH(width), \ SH_CSS_MORPH_TABLE_ELEMS_PER_DDR_WORD) -#define _ISP2400_SCTBL_WIDTH_PER_COLOR(input_width, deci_factor_log2) \ +#define _ISP_SCTBL_WIDTH_PER_COLOR(input_width, deci_factor_log2) \ (ISP_BQ_GRID_WIDTH(input_width, deci_factor_log2) + 1) -#define _ISP2400_SCTBL_HEIGHT(input_height, deci_factor_log2) \ +#define _ISP_SCTBL_HEIGHT(input_height, deci_factor_log2) \ (ISP_BQ_GRID_HEIGHT(input_height, deci_factor_log2) + 1) -#define _ISP2400_SCTBL_ALIGNED_WIDTH_PER_COLOR(input_width, deci_factor_log2) \ +#define _ISP_SCTBL_ALIGNED_WIDTH_PER_COLOR(input_width, deci_factor_log2) \ CEIL_MUL(_ISP_SCTBL_WIDTH_PER_COLOR(input_width, deci_factor_log2), \ ISP_VEC_NELEMS) diff --git a/drivers/staging/media/atomisp/pci/sh_css_firmware.c b/drivers/staging/media/atomisp/pci/sh_css_firmware.c index e1a16a50e588..94149647b98b 100644 --- a/drivers/staging/media/atomisp/pci/sh_css_firmware.c +++ b/drivers/staging/media/atomisp/pci/sh_css_firmware.c @@ -56,8 +56,7 @@ static struct firmware_header *firmware_header; * which will be replaced with the actual RELEASE_VERSION * during package generation. Please do not modify */ -static const char *isp2400_release_version = STR(irci_stable_candrpv_0415_20150521_0458); -static const char *isp2401_release_version = STR(irci_ecr - master_20150911_0724); +static const char *release_version = STR(irci_stable_candrpv_0415_20150521_0458); #define MAX_FW_REL_VER_NAME 300 static char FW_rel_ver_name[MAX_FW_REL_VER_NAME] = "---"; @@ -190,13 +189,6 @@ sh_css_check_firmware_version(struct device *dev, const char *fw_data) { struct sh_css_fw_bi_file_h *file_header; - const char *release_version; - - if (!IS_ISP2401) - release_version = isp2400_release_version; - else - release_version = isp2401_release_version; - firmware_header = (struct firmware_header *)fw_data; file_header = &firmware_header->file_header; @@ -232,12 +224,6 @@ sh_css_load_firmware(struct device *dev, const char *fw_data, struct ia_css_fw_info *binaries; struct sh_css_fw_bi_file_h *file_header; int ret; - const char *release_version; - - if (!IS_ISP2401) - release_version = isp2400_release_version; - else - release_version = isp2401_release_version; firmware_header = (struct firmware_header *)fw_data; file_header = &firmware_header->file_header; diff --git a/drivers/staging/media/atomisp/pci/sh_css_firmware.h b/drivers/staging/media/atomisp/pci/sh_css_firmware.h index 66cd38f08f71..a73ce703adfb 100644 --- a/drivers/staging/media/atomisp/pci/sh_css_firmware.h +++ b/drivers/staging/media/atomisp/pci/sh_css_firmware.h @@ -29,9 +29,6 @@ struct sh_css_fw_bi_file_h { }; extern struct ia_css_fw_info sh_css_sp_fw; -#if defined(HAS_BL) -extern struct ia_css_fw_info sh_css_bl_fw; -#endif /* HAS_BL */ extern struct ia_css_blob_descr *sh_css_blob_info; extern unsigned int sh_css_num_binaries; diff --git a/drivers/staging/media/atomisp/pci/sh_css_internal.h b/drivers/staging/media/atomisp/pci/sh_css_internal.h index 496faa7297a5..435b3cedd1c3 100644 --- a/drivers/staging/media/atomisp/pci/sh_css_internal.h +++ b/drivers/staging/media/atomisp/pci/sh_css_internal.h @@ -86,12 +86,6 @@ #define SH_CSS_MAX_IF_CONFIGS 3 /* Must match with IA_CSS_NR_OF_CONFIGS (not defined yet).*/ #define SH_CSS_IF_CONFIG_NOT_NEEDED 0xFF -#define SH_CSS_ENABLE_METADATA - -#if defined(SH_CSS_ENABLE_METADATA) && !defined(ISP2401) -#define SH_CSS_ENABLE_METADATA_THREAD -#endif - /* * SH_CSS_MAX_SP_THREADS: * sp threads visible to host with connected communication queues @@ -101,7 +95,7 @@ * these threads can't be used as image pipe */ -#if defined(SH_CSS_ENABLE_METADATA_THREAD) +#if !defined(ISP2401) #define SH_CSS_SP_INTERNAL_METADATA_THREAD 1 #else #define SH_CSS_SP_INTERNAL_METADATA_THREAD 0 @@ -276,7 +270,7 @@ struct sh_css_binary_args { struct ia_css_frame *in_frame; /* input frame */ const struct ia_css_frame *delay_frames[MAX_NUM_VIDEO_DELAY_FRAMES]; /* reference input frame */ - const struct ia_css_frame *tnr_frames[NUM_TNR_FRAMES]; /* tnr frames */ + const struct ia_css_frame *tnr_frames[NUM_VIDEO_TNR_FRAMES]; /* tnr frames */ struct ia_css_frame *out_frame[IA_CSS_BINARY_MAX_OUTPUT_PORTS]; /* output frame */ struct ia_css_frame *out_vf_frame; /* viewfinder output frame */ @@ -526,7 +520,6 @@ struct sh_css_sp_pipeline { this struct; needs cleanup */ s32 num_execs; /* number of times to run if this is an acceleration pipe. */ -#if defined(SH_CSS_ENABLE_METADATA) struct { u32 format; /* Metadata format in hrt format */ u32 width; /* Width of a line */ @@ -535,10 +528,7 @@ struct sh_css_sp_pipeline { u32 size; /* Total size (in bytes) */ ia_css_ptr cont_buf; /* Address of continuous buffer */ } metadata; -#endif -#if defined(SH_CSS_ENABLE_PER_FRAME_PARAMS) u32 output_frame_queue_id; -#endif union { struct { u32 bytes_available; @@ -551,14 +541,6 @@ struct sh_css_sp_pipeline { u32 raw_bit_depth; } raw; } copy; - -/* ISP2401 */ - - /* Parameters passed to Shading Correction kernel. */ - struct { - u32 internal_frame_origin_x_bqs_on_sctbl; /* Origin X (bqs) of internal frame on shading table */ - u32 internal_frame_origin_y_bqs_on_sctbl; /* Origin Y (bqs) of internal frame on shading table */ - } shading; }; /* @@ -580,9 +562,7 @@ struct ia_css_frames_sp { struct ia_css_frame_sp_info internal_frame_info; struct ia_css_buffer_sp s3a_buf; struct ia_css_buffer_sp dvs_buf; -#if defined SH_CSS_ENABLE_METADATA struct ia_css_buffer_sp metadata_buf; -#endif }; /* Information for a single pipeline stage for an ISP */ @@ -695,8 +675,6 @@ struct sh_css_sp_output { unsigned int sw_interrupt_value[SH_CSS_NUM_SDW_IRQS]; }; -#define CONFIG_ON_FRAME_ENQUEUE() 0 - /** * @brief Data structure for the circular buffer. * The circular buffer is empty if "start == end". The @@ -734,9 +712,6 @@ struct sh_css_hmm_buffer { u32 exp_id; u32 isp_parameters_id; /** Unique ID to track which config was actually applied to a particular frame */ -#if CONFIG_ON_FRAME_ENQUEUE() - struct sh_css_config_on_frame_enqueue config_on_frame_enqueue; -#endif } frame; ia_css_ptr ddr_ptrs; } payload; @@ -752,16 +727,9 @@ struct sh_css_hmm_buffer { clock_value_t isys_eof_clock_tick; }; -#if CONFIG_ON_FRAME_ENQUEUE() -#define SIZE_OF_FRAME_STRUCT \ - (SIZE_OF_HRT_VADDRESS + \ - (3 * sizeof(uint32_t)) + \ - sizeof(uint32_t)) -#else #define SIZE_OF_FRAME_STRUCT \ (SIZE_OF_HRT_VADDRESS + \ (3 * sizeof(uint32_t))) -#endif #define SIZE_OF_PAYLOAD_UNION \ (MAX(MAX(MAX(MAX( \ diff --git a/drivers/staging/media/atomisp/pci/sh_css_metadata.c b/drivers/staging/media/atomisp/pci/sh_css_metadata.c deleted file mode 100644 index 04a4b7da85e2..000000000000 --- a/drivers/staging/media/atomisp/pci/sh_css_metadata.c +++ /dev/null @@ -1,17 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -/* This file will contain the code to implement the functions declared in ia_css_metadata.h - and associated helper functions */ diff --git a/drivers/staging/media/atomisp/pci/sh_css_metrics.c b/drivers/staging/media/atomisp/pci/sh_css_metrics.c index 9744bbebe1bc..8ded6cdd1575 100644 --- a/drivers/staging/media/atomisp/pci/sh_css_metrics.c +++ b/drivers/staging/media/atomisp/pci/sh_css_metrics.c @@ -123,40 +123,15 @@ sh_css_metrics_sample_pcs(void) unsigned int pc; unsigned int msink; -#if SUSPEND - unsigned int sc = 0; - unsigned int stopped_sc = 0; - unsigned int resume_sc = 0; -#endif -#if MULTIPLE_PCS - int i; - unsigned int pc_tab[NOF_PCS]; - - for (i = 0; i < NOF_PCS; i++) - pc_tab[i] = 0; -#endif if (!pc_histogram_enabled) return; if (isp_histogram) { -#if SUSPEND - /* STOP the ISP */ - isp_ctrl_store(ISP0_ID, ISP_SC_REG, STOP_MASK); -#endif msink = isp_ctrl_load(ISP0_ID, ISP_CTRL_SINK_REG); -#if MULTIPLE_PCS - for (i = 0; i < NOF_PCS; i++) - pc_tab[i] = isp_ctrl_load(ISP0_ID, ISP_PC_REG); -#else pc = isp_ctrl_load(ISP0_ID, ISP_PC_REG); -#endif -#if SUSPEND - /* RESUME the ISP */ - isp_ctrl_store(ISP0_ID, ISP_SC_REG, RESUME_MASK); -#endif isp_histogram->msink[pc] &= msink; stall = (msink != 0x7FF); diff --git a/drivers/staging/media/atomisp/pci/sh_css_mipi.c b/drivers/staging/media/atomisp/pci/sh_css_mipi.c index 75489f7d75ee..0acf75497ae7 100644 --- a/drivers/staging/media/atomisp/pci/sh_css_mipi.c +++ b/drivers/staging/media/atomisp/pci/sh_css_mipi.c @@ -33,47 +33,6 @@ static u32 ref_count_mipi_allocation[N_CSI_PORTS]; /* Initialized in mipi_init */ -/* - * Check if a source port or TPG/PRBS ID is valid - */ -static bool ia_css_mipi_is_source_port_valid(struct ia_css_pipe *pipe, - unsigned int *pport) -{ - bool ret = true; - unsigned int port = 0; - unsigned int max_ports = 0; - - switch (pipe->stream->config.mode) { - case IA_CSS_INPUT_MODE_BUFFERED_SENSOR: - port = (unsigned int)pipe->stream->config.source.port.port; - max_ports = N_CSI_PORTS; - break; - case IA_CSS_INPUT_MODE_TPG: - port = (unsigned int)pipe->stream->config.source.tpg.id; - max_ports = N_CSS_TPG_IDS; - break; - case IA_CSS_INPUT_MODE_PRBS: - port = (unsigned int)pipe->stream->config.source.prbs.id; - max_ports = N_CSS_PRBS_IDS; - break; - default: - assert(false); - ret = false; - break; - } - - if (ret) { - assert(port < max_ports); - - if (port >= max_ports) - ret = false; - } - - *pport = port; - - return ret; -} - /* Assumptions: * - A line is multiple of 4 bytes = 1 word. * - Each frame has SOF and EOF (each 1 word). @@ -133,15 +92,11 @@ ia_css_mipi_frame_calculate_size(const unsigned int width, break; case ATOMISP_INPUT_FORMAT_YUV420_10: /* odd 4p, 5B, 40bits, even 4p, 10B, 80bits */ case ATOMISP_INPUT_FORMAT_RAW_10: /* 4p, 5B, 40bits */ -#if !defined(HAS_NO_PACKED_RAW_PIXELS) /* The changes will be reverted as soon as RAW * Buffers are deployed by the 2401 Input System * in the non-continuous use scenario. */ bits_per_pixel = 10; -#else - bits_per_pixel = 16; -#endif break; case ATOMISP_INPUT_FORMAT_YUV420_8_LEGACY: /* 2p, 3B, 24bits */ case ATOMISP_INPUT_FORMAT_RAW_12: /* 2p, 3B, 24bits */ @@ -231,6 +186,10 @@ ia_css_mipi_frame_calculate_size(const unsigned int width, return err; } +/* + * Check if a source port or TPG/PRBS ID is valid + */ + #if !defined(ISP2401) int ia_css_mipi_frame_enable_check_on_size(const enum mipi_port_id port, @@ -265,16 +224,31 @@ mipi_init(void) ref_count_mipi_allocation[i] = 0; } -int -calculate_mipi_buff_size( - struct ia_css_stream_config *stream_cfg, - unsigned int *size_mem_words) +bool mipi_is_free(void) +{ + unsigned int i; + + for (i = 0; i < N_CSI_PORTS; i++) + if (ref_count_mipi_allocation[i]) + return false; + + return true; +} + +#if defined(ISP2401) +/* + * @brief Calculate the required MIPI buffer sizes. + * Based on the stream configuration, calculate the + * required MIPI buffer sizes (in DDR words). + * + * @param[in] stream_cfg Point to the target stream configuration + * @param[out] size_mem_words MIPI buffer size in DDR words. + * + * @return + */ +static int calculate_mipi_buff_size(struct ia_css_stream_config *stream_cfg, + unsigned int *size_mem_words) { -#if !defined(ISP2401) - int err = -EINVAL; - (void)stream_cfg; - (void)size_mem_words; -#else unsigned int width; unsigned int height; enum atomisp_input_format format; @@ -366,26 +340,9 @@ calculate_mipi_buff_size( *size_mem_words = mem_words_per_buff; IA_CSS_LEAVE_ERR(err); -#endif return err; } - -static bool buffers_needed(struct ia_css_pipe *pipe) -{ - if (!IS_ISP2401) { - if (pipe->stream->config.mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR) - return false; - else - return true; - } - - if (pipe->stream->config.mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR || - pipe->stream->config.mode == IA_CSS_INPUT_MODE_TPG || - pipe->stream->config.mode == IA_CSS_INPUT_MODE_PRBS) - return false; - - return true; -} +#endif int allocate_mipi_frames(struct ia_css_pipe *pipe, @@ -415,43 +372,25 @@ allocate_mipi_frames(struct ia_css_pipe *pipe, } #endif - - if (!buffers_needed(pipe)) { + if (pipe->stream->config.mode != IA_CSS_INPUT_MODE_BUFFERED_SENSOR) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "allocate_mipi_frames(%p) exit: no buffers needed for pipe mode.\n", pipe); return 0; /* AM TODO: Check */ } - if (!IS_ISP2401) - port = (unsigned int)pipe->stream->config.source.port.port; - else - err = ia_css_mipi_is_source_port_valid(pipe, &port); - - assert(port < N_CSI_PORTS); - - if (port >= N_CSI_PORTS || err) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "allocate_mipi_frames(%p) exit: error: port is not correct (port=%d).\n", - pipe, port); + port = (unsigned int)pipe->stream->config.source.port.port; + if (port >= N_CSI_PORTS) { + IA_CSS_ERROR("allocate_mipi_frames(%p) exit: port is not correct (port=%d).", + pipe, port); return -EINVAL; } #ifdef ISP2401 - err = calculate_mipi_buff_size( - &pipe->stream->config, - &my_css.mipi_frame_size[port]); -#endif - -#if !defined(ISP2401) - if (ref_count_mipi_allocation[port] != 0) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "allocate_mipi_frames(%p) exit: already allocated for this port (port=%d).\n", - pipe, port); - return 0; - } -#else - /* 2401 system allows multiple streams to use same physical port. This is not + err = calculate_mipi_buff_size(&pipe->stream->config, + &my_css.mipi_frame_size[port]); + /* + * 2401 system allows multiple streams to use same physical port. This is not * true for 2400 system. Currently 2401 uses MIPI buffers as a temporary solution. * TODO AM: Once that is changed (removed) this code should be removed as well. * In that case only 2400 related code should remain. @@ -463,6 +402,13 @@ allocate_mipi_frames(struct ia_css_pipe *pipe, pipe, port); return 0; } +#else + if (ref_count_mipi_allocation[port] != 0) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "allocate_mipi_frames(%p) exit: already allocated for this port (port=%d).\n", + pipe, port); + return 0; + } #endif ref_count_mipi_allocation[port]++; @@ -494,9 +440,8 @@ allocate_mipi_frames(struct ia_css_pipe *pipe, my_css.mipi_frames[port][j] = NULL; } } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "allocate_mipi_frames(%p, %d) exit: error: allocation failed.\n", - pipe, port); + IA_CSS_ERROR("allocate_mipi_frames(%p, %d) exit: allocation failed.", + pipe, port); return err; } } @@ -539,30 +484,22 @@ free_mipi_frames(struct ia_css_pipe *pipe) if (pipe) { assert(pipe->stream); if ((!pipe) || (!pipe->stream)) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "free_mipi_frames(%p) exit: error: pipe or stream is null.\n", - pipe); + IA_CSS_ERROR("free_mipi_frames(%p) exit: pipe or stream is null.", + pipe); return -EINVAL; } - if (!buffers_needed(pipe)) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "free_mipi_frames(%p) exit: error: wrong mode.\n", - pipe); + if (pipe->stream->config.mode != IA_CSS_INPUT_MODE_BUFFERED_SENSOR) { + IA_CSS_ERROR("free_mipi_frames(%p) exit: wrong mode.", + pipe); return err; } - if (!IS_ISP2401) - port = (unsigned int)pipe->stream->config.source.port.port; - else - err = ia_css_mipi_is_source_port_valid(pipe, &port); - - assert(port < N_CSI_PORTS); + port = (unsigned int)pipe->stream->config.source.port.port; - if (port >= N_CSI_PORTS || err) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "free_mipi_frames(%p, %d) exit: error: pipe port is not correct.\n", - pipe, port); + if (port >= N_CSI_PORTS) { + IA_CSS_ERROR("free_mipi_frames(%p, %d) exit: pipe port is not correct.", + pipe, port); return err; } @@ -570,9 +507,8 @@ free_mipi_frames(struct ia_css_pipe *pipe) #if !defined(ISP2401) assert(ref_count_mipi_allocation[port] == 1); if (ref_count_mipi_allocation[port] != 1) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "free_mipi_frames(%p) exit: error: wrong ref_count (ref_count=%d).\n", - pipe, ref_count_mipi_allocation[port]); + IA_CSS_ERROR("free_mipi_frames(%p) exit: wrong ref_count (ref_count=%d).", + pipe, ref_count_mipi_allocation[port]); return err; } #endif @@ -640,11 +576,7 @@ send_mipi_frames(struct ia_css_pipe *pipe) { int err = -EINVAL; unsigned int i; -#ifndef ISP2401 unsigned int port; -#else - unsigned int port = 0; -#endif IA_CSS_ENTER_PRIVATE("pipe=%p", pipe); @@ -657,21 +589,16 @@ send_mipi_frames(struct ia_css_pipe *pipe) /* multi stream video needs mipi buffers */ /* nothing to be done in other cases. */ - if (!buffers_needed(pipe)) { + if (pipe->stream->config.mode != IA_CSS_INPUT_MODE_BUFFERED_SENSOR) { IA_CSS_LOG("nothing to be done for this mode"); return 0; /* TODO: AM: maybe this should be returning an error. */ } - if (!IS_ISP2401) - port = (unsigned int)pipe->stream->config.source.port.port; - else - err = ia_css_mipi_is_source_port_valid(pipe, &port); - - assert(port < N_CSI_PORTS); + port = (unsigned int)pipe->stream->config.source.port.port; - if (port >= N_CSI_PORTS || err) { - IA_CSS_ERROR("send_mipi_frames(%p) exit: invalid port specified (port=%d).\n", + if (port >= N_CSI_PORTS) { + IA_CSS_ERROR("send_mipi_frames(%p) exit: invalid port specified (port=%d).", pipe, port); return err; } diff --git a/drivers/staging/media/atomisp/pci/sh_css_mipi.h b/drivers/staging/media/atomisp/pci/sh_css_mipi.h index 52f08a103883..e6c86d0ac483 100644 --- a/drivers/staging/media/atomisp/pci/sh_css_mipi.h +++ b/drivers/staging/media/atomisp/pci/sh_css_mipi.h @@ -23,6 +23,8 @@ void mipi_init(void); +bool mipi_is_free(void); + int allocate_mipi_frames(struct ia_css_pipe *pipe, struct ia_css_stream_info *info); @@ -32,19 +34,4 @@ free_mipi_frames(struct ia_css_pipe *pipe); int send_mipi_frames(struct ia_css_pipe *pipe); -/** - * @brief Calculate the required MIPI buffer sizes. - * Based on the stream configuration, calculate the - * required MIPI buffer sizes (in DDR words). - * - * @param[in] stream_cfg Point to the target stream configuration - * @param[out] size_mem_words MIPI buffer size in DDR words. - * - * @return - */ -int -calculate_mipi_buff_size( - struct ia_css_stream_config *stream_cfg, - unsigned int *size_mem_words); - #endif /* __SH_CSS_MIPI_H */ diff --git a/drivers/staging/media/atomisp/pci/sh_css_morph.c b/drivers/staging/media/atomisp/pci/sh_css_morph.c deleted file mode 100644 index edd1da941ccb..000000000000 --- a/drivers/staging/media/atomisp/pci/sh_css_morph.c +++ /dev/null @@ -1,17 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -/* This file will contain the code to implement the functions declared in ia_css_morph.h - and associated helper functions */ diff --git a/drivers/staging/media/atomisp/pci/sh_css_param_shading.c b/drivers/staging/media/atomisp/pci/sh_css_param_shading.c index 69cc4e423d8b..41a4c9162319 100644 --- a/drivers/staging/media/atomisp/pci/sh_css_param_shading.c +++ b/drivers/staging/media/atomisp/pci/sh_css_param_shading.c @@ -118,8 +118,10 @@ crop_and_interpolate(unsigned int cropped_width, int ty, src_y0, src_y1; unsigned int sy0, sy1, dy0, dy1, divy; - /* calculate target point and make sure it falls within - the table */ + /* + * calculate target point and make sure it falls within + * the table + */ ty = out_start_row + i * out_cell_size; /* calculate closest source points in shading table and @@ -166,19 +168,24 @@ crop_and_interpolate(unsigned int cropped_width, src_x1 = clamp(src_x1, 0, (int)table_width - 1); tx = min(clamp(tx, 0, (int)sensor_width - 1), (int)table_cell_w); - /* calculate closest source points for distance - computation */ + /* + * calculate closest source points for distance + * computation + */ sx0 = min(src_x0 * in_cell_size, sensor_width - 1); sx1 = min(src_x1 * in_cell_size, sensor_width - 1); - /* calculate distances between source and target - pixels */ + /* + * calculate distances between source and target + * pixels + */ dx0 = tx - sx0; dx1 = sx1 - tx; divx = sx1 - sx0; /* if we're at the edge, we just use the closest - point still in the grid. We make up for the divider - in this case by setting the distance to - out_cell_size, since it's actually 0. */ + * point still in the grid. We make up for the divider + * in this case by setting the distance to + * out_cell_size, since it's actually 0. + */ if (divx == 0) { dx0 = 1; divx = 1; @@ -242,8 +249,8 @@ prepare_shading_table(const struct ia_css_shading_table *in_table, if (!in_table) { sh_css_params_shading_id_table_generate(target_table, - binary->sctbl_legacy_width_per_color, - binary->sctbl_legacy_height); + binary->sctbl_width_per_color, + binary->sctbl_height); return; } @@ -271,43 +278,33 @@ prepare_shading_table(const struct ia_css_shading_table *in_table, bds_denominator - binary->info->sp.pipeline.top_cropping; -#if !defined(USE_WINDOWS_BINNING_FACTOR) - /* @deprecated{This part of the code will be replaced by the code - * in the #else section below to make the calculation same across - * all platforms. - * Android and Windows platforms interpret the binning_factor parameter - * differently. In Android, the binning factor is expressed in the form - * 2^N * 2^N, whereas in Windows platform, the binning factor is N*N} + /* + * We take into account the binning done by the sensor. We do this + * by cropping the non-binned part of the shading table and then + * increasing the size of a grid cell with this same binning factor. */ - - /* We take into account the binning done by the sensor. We do this - by cropping the non-binned part of the shading table and then - increasing the size of a grid cell with this same binning factor. */ input_width <<= sensor_binning; input_height <<= sensor_binning; - /* We also scale the padding by the same binning factor. This will - make it much easier later on to calculate the padding of the - shading table. */ + /* + * We also scale the padding by the same binning factor. This will + * make it much easier later on to calculate the padding of the + * shading table. + */ left_padding <<= sensor_binning; right_padding <<= sensor_binning; top_padding <<= sensor_binning; -#else - input_width *= sensor_binning; - input_height *= sensor_binning; - left_padding *= sensor_binning; - right_padding *= sensor_binning; - top_padding *= sensor_binning; -#endif /*USE_WINDOWS_BINNING_FACTOR*/ - - /* during simulation, the used resolution can exceed the sensor - resolution, so we clip it. */ + + /* + * during simulation, the used resolution can exceed the sensor + * resolution, so we clip it. + */ input_width = min(input_width, in_table->sensor_width); input_height = min(input_height, in_table->sensor_height); /* This prepare_shading_table() function is called only in legacy API (not in new API). Then, the legacy shading table width and height should be used. */ - table_width = binary->sctbl_legacy_width_per_color; - table_height = binary->sctbl_legacy_height; + table_width = binary->sctbl_width_per_color; + table_height = binary->sctbl_height; result = ia_css_shading_table_alloc(table_width, table_height); if (!result) { @@ -318,8 +315,10 @@ prepare_shading_table(const struct ia_css_shading_table *in_table, result->sensor_height = in_table->sensor_height; result->fraction_bits = in_table->fraction_bits; - /* now we crop the original shading table and then interpolate to the - requested resolution and decimation factor. */ + /* + * now we crop the original shading table and then interpolate to the + * requested resolution and decimation factor. + */ for (i = 0; i < IA_CSS_SC_NUM_COLORS; i++) { crop_and_interpolate(input_width, input_height, left_padding, right_padding, top_padding, @@ -376,9 +375,10 @@ ia_css_shading_table_free(struct ia_css_shading_table *table) if (!table) return; - /* We only output logging when the table is not NULL, otherwise + /* + * We only output logging when the table is not NULL, otherwise * logs will give the impression that a table was freed. - * */ + */ IA_CSS_ENTER(""); for (i = 0; i < IA_CSS_SC_NUM_COLORS; i++) { diff --git a/drivers/staging/media/atomisp/pci/sh_css_params.c b/drivers/staging/media/atomisp/pci/sh_css_params.c index dbd3bfe3d343..09f87c285b8d 100644 --- a/drivers/staging/media/atomisp/pci/sh_css_params.c +++ b/drivers/staging/media/atomisp/pci/sh_css_params.c @@ -16,12 +16,10 @@ #include "gdc_device.h" /* gdc_lut_store(), ... */ #include "isp.h" /* ISP_VEC_ELEMBITS */ #include "vamem.h" -#if !defined(HAS_NO_HMEM) #ifndef __INLINE_HMEM__ #define __INLINE_HMEM__ #endif #include "hmem.h" -#endif /* !defined(HAS_NO_HMEM) */ #define IA_CSS_INCLUDE_PARAMETERS #define IA_CSS_INCLUDE_ACC_PARAMETERS @@ -96,9 +94,6 @@ #include "xnr/xnr_3.0/ia_css_xnr3.host.h" -#if defined(HAS_OUTPUT_SYSTEM) -#include <components/output_system/sc_output_system_1.0/host/output_system.host.h> -#endif #include "sh_css_frac.h" #include "ia_css_bufq.h" @@ -107,15 +102,10 @@ (sizeof(char) * (binary)->in_frame_info.res.height * \ (binary)->in_frame_info.padded_width) -#define ISP2400_SCTBL_BYTES(binary) \ +#define SCTBL_BYTES(binary) \ (sizeof(unsigned short) * (binary)->sctbl_height * \ (binary)->sctbl_aligned_width_per_color * IA_CSS_SC_NUM_COLORS) -#define ISP2401_SCTBL_BYTES(binary) \ - (sizeof(unsigned short) * max((binary)->sctbl_height, (binary)->sctbl_legacy_height) * \ - /* height should be the larger height between new api and legacy api */ \ - (binary)->sctbl_aligned_width_per_color * IA_CSS_SC_NUM_COLORS) - #define MORPH_PLANE_BYTES(binary) \ (SH_CSS_MORPH_TABLE_ELEM_BYTES * (binary)->morph_tbl_aligned_width * \ (binary)->morph_tbl_height) @@ -734,13 +724,11 @@ sh_css_set_global_isp_config_on_pipe( const struct ia_css_isp_config *config, struct ia_css_pipe *pipe); -#if defined(SH_CSS_ENABLE_PER_FRAME_PARAMS) static int sh_css_set_per_frame_isp_config_on_pipe( struct ia_css_stream *stream, const struct ia_css_isp_config *config, struct ia_css_pipe *pipe); -#endif static int sh_css_update_uds_and_crop_info_based_on_zoom_region( @@ -1031,16 +1019,6 @@ sh_css_params_set_binning_factor(struct ia_css_stream *stream, } static void -sh_css_update_shading_table_status(struct ia_css_pipe *pipe, - struct ia_css_isp_parameters *params) -{ - if (params && pipe && (pipe->pipe_num != params->sc_table_last_pipe_num)) { - params->sc_table_dirty = true; - params->sc_table_last_pipe_num = pipe->pipe_num; - } -} - -static void sh_css_set_shading_table(struct ia_css_stream *stream, struct ia_css_isp_parameters *params, const struct ia_css_shading_table *table) @@ -1053,10 +1031,9 @@ sh_css_set_shading_table(struct ia_css_stream *stream, if (!table->enable) table = NULL; - if ((table != params->sc_table) || params->sc_table_dirty) { + if (table != params->sc_table) { params->sc_table = table; params->sc_table_changed = true; - params->sc_table_dirty = false; /* Not very clean, this goes to sh_css.c to invalidate the * shading table for all pipes. Should replaced by a loop * and a pipe-specific call. @@ -1510,10 +1487,8 @@ ia_css_translate_3a_statistics( ia_css_s3a_vmem_decode(host_stats, isp_stats->vmem_stats_hi, isp_stats->vmem_stats_lo); } -#if !defined(HAS_NO_HMEM) IA_CSS_LOG("3A: HMEM"); ia_css_s3a_hmem_decode(host_stats, isp_stats->hmem_stats); -#endif IA_CSS_LEAVE("void"); } @@ -1616,57 +1591,6 @@ ia_css_set_param_exceptions(const struct ia_css_pipe *pipe, params->dp_config.r = params->wb_config.r; params->dp_config.b = params->wb_config.b; params->dp_config.gb = params->wb_config.gb; - - if (IS_ISP2401) { - assert(pipe); - assert(pipe->mode < IA_CSS_PIPE_ID_NUM); - - if (pipe->mode < IA_CSS_PIPE_ID_NUM) { - params->pipe_dp_config[pipe->mode].gr = params->wb_config.gr; - params->pipe_dp_config[pipe->mode].r = params->wb_config.r; - params->pipe_dp_config[pipe->mode].b = params->wb_config.b; - params->pipe_dp_config[pipe->mode].gb = params->wb_config.gb; - } - } -} - -/* ISP2401 */ -static void -sh_css_set_dp_config(const struct ia_css_pipe *pipe, - struct ia_css_isp_parameters *params, - const struct ia_css_dp_config *config) -{ - if (!config) - return; - - assert(params); - assert(pipe); - assert(pipe->mode < IA_CSS_PIPE_ID_NUM); - - IA_CSS_ENTER_PRIVATE("config=%p", config); - ia_css_dp_debug_dtrace(config, IA_CSS_DEBUG_TRACE_PRIVATE); - if (pipe->mode < IA_CSS_PIPE_ID_NUM) { - params->pipe_dp_config[pipe->mode] = *config; - params->pipe_dpc_config_changed[pipe->mode] = true; - } - IA_CSS_LEAVE_PRIVATE("void"); -} - -static void -sh_css_get_dp_config(const struct ia_css_pipe *pipe, - const struct ia_css_isp_parameters *params, - struct ia_css_dp_config *config) -{ - if (!config) - return; - - assert(params); - assert(pipe); - IA_CSS_ENTER_PRIVATE("config=%p", config); - - *config = params->pipe_dp_config[pipe->mode]; - - IA_CSS_LEAVE_PRIVATE("void"); } static void @@ -1740,9 +1664,7 @@ sh_css_set_pipe_dvs_6axis_config(const struct ia_css_pipe *pipe, copy_dvs_6axis_table(params->pipe_dvs_6axis_config[pipe->mode], dvs_config); -#if !defined(HAS_NO_DVS_6AXIS_CONFIG_UPDATE) params->pipe_dvs_6axis_config_changed[pipe->mode] = true; -#endif IA_CSS_LEAVE_PRIVATE("void"); } @@ -1908,11 +1830,9 @@ ia_css_stream_set_isp_config_on_pipe( IA_CSS_ENTER("stream=%p, config=%p, pipe=%p", stream, config, pipe); -#if defined(SH_CSS_ENABLE_PER_FRAME_PARAMS) if (config->output_frame) err = sh_css_set_per_frame_isp_config_on_pipe(stream, config, pipe); else -#endif err = sh_css_set_global_isp_config_on_pipe(stream->pipes[0], config, pipe); IA_CSS_LEAVE_ERR(err); @@ -1933,11 +1853,9 @@ ia_css_pipe_set_isp_config(struct ia_css_pipe *pipe, ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "config=%p\n", config); -#if defined(SH_CSS_ENABLE_PER_FRAME_PARAMS) if (config->output_frame) err = sh_css_set_per_frame_isp_config_on_pipe(pipe->stream, config, pipe); else -#endif err = sh_css_set_global_isp_config_on_pipe(pipe, config, pipe_in); IA_CSS_LEAVE_ERR(err); return err; @@ -1972,7 +1890,6 @@ sh_css_set_global_isp_config_on_pipe( return err; } -#if defined(SH_CSS_ENABLE_PER_FRAME_PARAMS) static int sh_css_set_per_frame_isp_config_on_pipe( struct ia_css_stream *stream, @@ -2042,7 +1959,6 @@ exit: IA_CSS_LEAVE_ERR_PRIVATE(err); return err; } -#endif static int sh_css_init_isp_params_from_config(struct ia_css_pipe *pipe, @@ -2067,7 +1983,6 @@ sh_css_init_isp_params_from_config(struct ia_css_pipe *pipe, sh_css_set_pipe_dvs_6axis_config(pipe, params, config->dvs_6axis_config); sh_css_set_dz_config(params, config->dz_config); sh_css_set_motion_vector(params, config->motion_vector); - sh_css_update_shading_table_status(pipe_in, params); sh_css_set_shading_table(pipe->stream, params, config->shading_table); sh_css_set_morph_table(params, config->morph_table); sh_css_set_macc_table(params, config->macc_table); @@ -2083,16 +1998,6 @@ sh_css_init_isp_params_from_config(struct ia_css_pipe *pipe, params->output_frame = config->output_frame; params->isp_parameters_id = config->isp_config_id; - /* Currently we do not offer CSS interface to set different - * configurations for DPC, i.e. depending on DPC being enabled - * before (NORM+OBC) or after. The folllowing code to set the - * DPC configuration should be updated when this interface is made - * available */ - if (IS_ISP2401) { - sh_css_set_dp_config(pipe, params, config->dp_config); - ia_css_set_param_exceptions(pipe, params); - } - if (0 == sh_css_select_dp_10bpp_config(pipe, &is_dp_10bpp)) { /* return an error when both DPC and BDS is enabled by the @@ -2107,8 +2012,7 @@ sh_css_init_isp_params_from_config(struct ia_css_pipe *pipe, goto exit; } - if (!IS_ISP2401) - ia_css_set_param_exceptions(pipe, params); + ia_css_set_param_exceptions(pipe, params); exit: IA_CSS_LEAVE_ERR_PRIVATE(err); @@ -2143,7 +2047,6 @@ ia_css_pipe_get_isp_config(struct ia_css_pipe *pipe, sh_css_get_ee_config(params, config->ee_config); sh_css_get_baa_config(params, config->baa_config); sh_css_get_pipe_dvs_6axis_config(pipe, params, config->dvs_6axis_config); - sh_css_get_dp_config(pipe, params, config->dp_config); sh_css_get_macc_table(params, config->macc_table); sh_css_get_gamma_table(params, config->gamma_table); sh_css_get_ctc_table(params, config->ctc_table); @@ -2250,9 +2153,7 @@ ia_css_isp_3a_statistics_allocate(const struct ia_css_3a_grid_info *grid) me->vmem_size = ISP_S3ATBL_HI_LO_STRIDE_BYTES * grid->aligned_height; } -#if !defined(HAS_NO_HMEM) me->hmem_size = sizeof_hmem(HMEM0_ID); -#endif /* All subsections need to be aligned to the system bus width */ me->dmem_size = CEIL_MUL(me->dmem_size, HIVE_ISP_DDR_WORD_BYTES); @@ -2431,7 +2332,7 @@ sh_css_create_isp_params(struct ia_css_stream *stream, unsigned int i; struct sh_css_ddr_address_map *ddr_ptrs; struct sh_css_ddr_address_map_size *ddr_ptrs_size; - int err = 0; + int err; size_t params_size; struct ia_css_isp_parameters *params = kvmalloc(sizeof(struct ia_css_isp_parameters), GFP_KERNEL); @@ -2473,7 +2374,11 @@ sh_css_create_isp_params(struct ia_css_stream *stream, succ &= (ddr_ptrs->macc_tbl != mmgr_NULL); *isp_params_out = params; - return err; + + if (!succ) + return -ENOMEM; + + return 0; } static bool @@ -2521,29 +2426,7 @@ sh_css_init_isp_params_from_global(struct ia_css_stream *stream, ia_css_set_ob_config(params, &default_ob_config); ia_css_set_dp_config(params, &default_dp_config); - if (!IS_ISP2401) { - ia_css_set_param_exceptions(pipe_in, params); - } else { - for (i = 0; i < stream->num_pipes; i++) { - if (sh_css_select_dp_10bpp_config(stream->pipes[i], - &is_dp_10bpp) == 0) { - /* set the return value as false if both DPC and - * BDS is enabled by the user. But we do not return - * the value immediately to enable internal firmware - * feature testing. */ - if (is_dp_10bpp) { - sh_css_set_dp_config(stream->pipes[i], params, &default_dp_10bpp_config); - } else { - sh_css_set_dp_config(stream->pipes[i], params, &default_dp_config); - } - } else { - retval = false; - goto exit; - } - - ia_css_set_param_exceptions(stream->pipes[i], params); - } - } + ia_css_set_param_exceptions(pipe_in, params); ia_css_set_de_config(params, &default_de_config); ia_css_set_gc_config(params, &default_gc_config); @@ -2580,8 +2463,6 @@ sh_css_init_isp_params_from_global(struct ia_css_stream *stream, params->sc_table = NULL; params->sc_table_changed = true; - params->sc_table_dirty = false; - params->sc_table_last_pipe_num = 0; ia_css_sdis2_clear_coefficients(¶ms->dvs2_coefs); params->dvs2_coef_table_changed = true; @@ -2639,29 +2520,15 @@ sh_css_init_isp_params_from_global(struct ia_css_stream *stream, * BDS is enabled by the user. But we do not return * the value immediately to enable internal firmware * feature testing. */ - - if (is_dp_10bpp) { - retval = false; - /* FIXME: should it ignore this error? */ - } + retval = !is_dp_10bpp; + /* FIXME: should it ignore this error? */ } else { retval = false; goto exit; } - if (IS_ISP2401) { - if (stream->pipes[i]->mode < IA_CSS_PIPE_ID_NUM) { - sh_css_set_dp_config(stream->pipes[i], params, - &stream_params->pipe_dp_config[stream->pipes[i]->mode]); - ia_css_set_param_exceptions(stream->pipes[i], params); - } else { - retval = false; - goto exit; - } - } } - if (!IS_ISP2401) - ia_css_set_param_exceptions(pipe_in, params); + ia_css_set_param_exceptions(pipe_in, params); params->fpn_config.data = stream_params->fpn_config.data; params->config_changed[IA_CSS_FPN_ID] = @@ -2672,13 +2539,10 @@ sh_css_init_isp_params_from_global(struct ia_css_stream *stream, sh_css_set_morph_table(params, stream_params->morph_table); if (stream_params->sc_table) { - sh_css_update_shading_table_status(pipe_in, params); sh_css_set_shading_table(stream, params, stream_params->sc_table); } else { params->sc_table = NULL; params->sc_table_changed = true; - params->sc_table_dirty = false; - params->sc_table_last_pipe_num = 0; } /* Only IA_CSS_PIPE_ID_VIDEO & IA_CSS_PIPE_ID_CAPTURE will support dvs_6axis_config*/ @@ -2771,18 +2635,6 @@ static void host_lut_store(const void *lut) gdc_lut_store((gdc_ID_t)i, (const int (*)[HRT_GDC_N]) lut); } -/* Note that allocation is in ipu address space. */ -inline ia_css_ptr sh_css_params_alloc_gdc_lut(void) -{ - return hmm_alloc(sizeof(zoom_table), HMM_BO_PRIVATE, 0, NULL, 0); -} - -inline void sh_css_params_free_gdc_lut(ia_css_ptr addr) -{ - if (addr != mmgr_NULL) - hmm_free(addr); -} - int ia_css_pipe_set_bci_scaler_lut(struct ia_css_pipe *pipe, const void *lut) { @@ -2809,14 +2661,13 @@ int ia_css_pipe_set_bci_scaler_lut(struct ia_css_pipe *pipe, } /* Free any existing tables. */ - sh_css_params_free_gdc_lut(pipe->scaler_pp_lut); - pipe->scaler_pp_lut = mmgr_NULL; + if (pipe->scaler_pp_lut != mmgr_NULL) { + hmm_free(pipe->scaler_pp_lut); + pipe->scaler_pp_lut = mmgr_NULL; + } if (!stream_started) { - if (!IS_ISP2401) - pipe->scaler_pp_lut = hmm_alloc(sizeof(zoom_table), HMM_BO_PRIVATE, 0, NULL, 0); - else - pipe->scaler_pp_lut = sh_css_params_alloc_gdc_lut(); + pipe->scaler_pp_lut = hmm_alloc(sizeof(zoom_table), HMM_BO_PRIVATE, 0, NULL, 0); if (pipe->scaler_pp_lut == mmgr_NULL) { ia_css_debug_dtrace(IA_CSS_DEBUG_ERROR, @@ -2858,10 +2709,7 @@ int sh_css_params_map_and_store_default_gdc_lut(void) host_lut_store((void *)zoom_table); - if (!IS_ISP2401) - default_gdc_lut = hmm_alloc(sizeof(zoom_table), HMM_BO_PRIVATE, 0, NULL, 0); - else - default_gdc_lut = sh_css_params_alloc_gdc_lut(); + default_gdc_lut = hmm_alloc(sizeof(zoom_table), HMM_BO_PRIVATE, 0, NULL, 0); if (default_gdc_lut == mmgr_NULL) return -ENOMEM; @@ -2879,8 +2727,10 @@ void sh_css_params_free_default_gdc_lut(void) { IA_CSS_ENTER_PRIVATE("void"); - sh_css_params_free_gdc_lut(default_gdc_lut); - default_gdc_lut = mmgr_NULL; + if (default_gdc_lut != mmgr_NULL) { + hmm_free(default_gdc_lut); + default_gdc_lut = mmgr_NULL; + } IA_CSS_LEAVE_PRIVATE("void"); } @@ -3252,15 +3102,10 @@ sh_css_param_update_isp_params(struct ia_css_pipe *curr_pipe, isp_pipe_version = ia_css_pipe_get_isp_pipe_version(pipe); ia_css_pipeline_get_sp_thread_id(pipe_num, &thread_id); -#if defined(SH_CSS_ENABLE_PER_FRAME_PARAMS) ia_css_query_internal_queue_id(params->output_frame ? IA_CSS_BUFFER_TYPE_PER_FRAME_PARAMETER_SET : IA_CSS_BUFFER_TYPE_PARAMETER_SET, thread_id, &queue_id); -#else - ia_css_query_internal_queue_id(IA_CSS_BUFFER_TYPE_PARAMETER_SET, thread_id, - &queue_id); -#endif if (!sh_css_sp_is_running()) { /* SP is not running. The queues are not valid */ err = -EBUSY; @@ -3356,12 +3201,10 @@ sh_css_param_update_isp_params(struct ia_css_pipe *curr_pipe, err = ia_css_bufq_enqueue_buffer(thread_id, queue_id, (uint32_t)cpy); if (err) { free_ia_css_isp_parameter_set_info(cpy); -#if defined(SH_CSS_ENABLE_PER_FRAME_PARAMS) IA_CSS_LOG("pfp: FAILED to add config id %d for OF %d to q %d on thread %d", isp_params_info.isp_parameters_id, isp_params_info.output_frame_ptr, queue_id, thread_id); -#endif break; } else { /* TMP: check discrepancy between nr of enqueued @@ -3383,12 +3226,10 @@ sh_css_param_update_isp_params(struct ia_css_pipe *curr_pipe, (uint8_t)thread_id, (uint8_t)queue_id, 0); -#if defined(SH_CSS_ENABLE_PER_FRAME_PARAMS) IA_CSS_LOG("pfp: added config id %d for OF %d to q %d on thread %d", isp_params_info.isp_parameters_id, isp_params_info.output_frame_ptr, queue_id, thread_id); -#endif } /* clean-up old copy */ ia_css_dequeue_param_buffers(/*pipe_num*/); @@ -3466,18 +3307,12 @@ sh_css_params_write_to_ddr_internal( if (binary->info->sp.enable.sc) { u32 enable_conv; - size_t bytes; - - if (!IS_ISP2401) - bytes = ISP2400_SCTBL_BYTES(binary); - else - bytes = ISP2401_SCTBL_BYTES(binary); enable_conv = params->shading_settings.enable_shading_table_conversion; buff_realloced = reallocate_buffer(&ddr_map->sc_tbl, &ddr_map_size->sc_tbl, - bytes, + SCTBL_BYTES(binary), params->sc_table_changed, &err); if (err) { @@ -3562,31 +3397,9 @@ sh_css_params_write_to_ddr_internal( } } - /* DPC configuration is made pipe specific to allow flexibility in positioning of the - * DPC kernel. The code below sets the pipe specific configuration to - * individual binaries. */ - if (IS_ISP2401 && - params->pipe_dpc_config_changed[pipe_id] && binary->info->sp.enable.dpc) { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.dp.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.dp.offset; - - if (size) { - ia_css_dp_encode((struct sh_css_isp_dp_params *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->pipe_dp_config[pipe_id], size); - - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - } - } - if (params->config_changed[IA_CSS_MACC_ID] && binary->info->sp.enable.macc) { unsigned int i, j, idx; - unsigned int idx_map[] = { + static const unsigned int idx_map[] = { 0, 1, 3, 2, 6, 7, 5, 4, 12, 13, 15, 14, 10, 11, 9, 8 }; @@ -3665,13 +3478,7 @@ sh_css_params_write_to_ddr_internal( if (!params->pipe_dvs_6axis_config[pipe_id]) { struct ia_css_resolution dvs_offset = {0}; - if (!IS_ISP2401) { - dvs_offset.width = (PIX_SHIFT_FILTER_RUN_IN_X + binary->dvs_envelope.width) / 2; - } else { - if (binary->dvs_envelope.width || binary->dvs_envelope.height) { - dvs_offset.width = (PIX_SHIFT_FILTER_RUN_IN_X + binary->dvs_envelope.width) / 2; - } - } + dvs_offset.width = (PIX_SHIFT_FILTER_RUN_IN_X + binary->dvs_envelope.width) / 2; dvs_offset.height = (PIX_SHIFT_FILTER_RUN_IN_Y + binary->dvs_envelope.height) / 2; params->pipe_dvs_6axis_config[pipe_id] = @@ -4335,12 +4142,8 @@ ia_css_3a_statistics_allocate(const struct ia_css_3a_grid_info *grid) me->data = kvmalloc(grid_size * sizeof(*me->data), GFP_KERNEL); if (!me->data) goto err; -#if !defined(HAS_NO_HMEM) /* No weighted histogram, no structure, treat the histogram data as a byte dump in a byte array */ me->rgby_data = kvmalloc(sizeof_hmem(HMEM0_ID), GFP_KERNEL); -#else - me->rgby_data = NULL; -#endif IA_CSS_LEAVE("return=%p", me); return me; diff --git a/drivers/staging/media/atomisp/pci/sh_css_params.h b/drivers/staging/media/atomisp/pci/sh_css_params.h index 62a7b6ada237..bbca19d0e8fc 100644 --- a/drivers/staging/media/atomisp/pci/sh_css_params.h +++ b/drivers/staging/media/atomisp/pci/sh_css_params.h @@ -121,8 +121,6 @@ struct ia_css_isp_parameters { bool dvs2_coef_table_changed; bool morph_table_changed; bool sc_table_changed; - bool sc_table_dirty; - unsigned int sc_table_last_pipe_num; bool anr_thres_changed; /* ---- deprecated: replaced with pipe_dvs_6axis_config_changed ---- */ bool dvs_6axis_config_changed; @@ -168,12 +166,6 @@ ia_css_params_alloc_convert_sctbl( struct ia_css_isp_config * sh_css_pipe_isp_config_get(struct ia_css_pipe *pipe); -/* ipu address allocation/free for gdc lut */ -ia_css_ptr -sh_css_params_alloc_gdc_lut(void); -void -sh_css_params_free_gdc_lut(ia_css_ptr addr); - int sh_css_params_map_and_store_default_gdc_lut(void); diff --git a/drivers/staging/media/atomisp/pci/sh_css_shading.c b/drivers/staging/media/atomisp/pci/sh_css_shading.c deleted file mode 100644 index 462caf9cb571..000000000000 --- a/drivers/staging/media/atomisp/pci/sh_css_shading.c +++ /dev/null @@ -1,17 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -/* This file will contain the code to implement the functions declared in ia_css_shading.h - and associated helper functions */ diff --git a/drivers/staging/media/atomisp/pci/sh_css_sp.c b/drivers/staging/media/atomisp/pci/sh_css_sp.c index a73e8ca1e225..615500a7d3c4 100644 --- a/drivers/staging/media/atomisp/pci/sh_css_sp.c +++ b/drivers/staging/media/atomisp/pci/sh_css_sp.c @@ -330,9 +330,7 @@ sh_css_sp_start_isys_copy(struct ia_css_frame *out_frame, unsigned int thread_id; u8 stage_num = 0; struct sh_css_sp_pipeline *pipe; -#if defined SH_CSS_ENABLE_METADATA enum sh_css_queue_id queue_id; -#endif assert(out_frame); @@ -372,7 +370,6 @@ sh_css_sp_start_isys_copy(struct ia_css_frame *out_frame, set_output_frame_buffer(out_frame, 0); -#if defined SH_CSS_ENABLE_METADATA if (pipe->metadata.height > 0) { ia_css_query_internal_queue_id(IA_CSS_BUFFER_TYPE_METADATA, thread_id, &queue_id); @@ -380,7 +377,6 @@ sh_css_sp_start_isys_copy(struct ia_css_frame *out_frame, queue_id, mmgr_EXCEPTION, IA_CSS_BUFFER_TYPE_METADATA); } -#endif ia_css_debug_pipe_graph_dump_sp_raw_copy(out_frame); } @@ -812,29 +808,47 @@ is_sp_stage(struct ia_css_pipeline_stage *stage) return stage->sp_func != IA_CSS_PIPELINE_NO_FUNC; } -static int -configure_isp_from_args( - const struct sh_css_sp_pipeline *pipeline, - const struct ia_css_binary *binary, - const struct sh_css_binary_args *args, - bool two_ppc, - bool deinterleaved) +static int configure_isp_from_args(const struct sh_css_sp_pipeline *pipeline, + const struct ia_css_binary *binary, + const struct sh_css_binary_args *args, + bool two_ppc, + bool deinterleaved) { - ia_css_fpn_configure(binary, &binary->in_frame_info); - ia_css_crop_configure(binary, &args->delay_frames[0]->info); - ia_css_qplane_configure(pipeline, binary, &binary->in_frame_info); - ia_css_output0_configure(binary, &args->out_frame[0]->info); - ia_css_output1_configure(binary, &args->out_vf_frame->info); - ia_css_copy_output_configure(binary, args->copy_output); - ia_css_output0_configure(binary, &args->out_frame[0]->info); -#ifdef ISP2401 - ia_css_sc_configure(binary, pipeline->shading.internal_frame_origin_x_bqs_on_sctbl, - pipeline->shading.internal_frame_origin_y_bqs_on_sctbl); -#endif - ia_css_iterator_configure(binary, &args->in_frame->info); - ia_css_dvs_configure(binary, &args->out_frame[0]->info); - ia_css_output_configure(binary, &args->out_frame[0]->info); - ia_css_raw_configure(pipeline, binary, &args->in_frame->info, &binary->in_frame_info, two_ppc, deinterleaved); + int ret; + + ret = ia_css_fpn_configure(binary, &binary->in_frame_info); + if (ret) + return ret; + ret = ia_css_crop_configure(binary, &args->delay_frames[0]->info); + if (ret) + return ret; + ret = ia_css_qplane_configure(pipeline, binary, &binary->in_frame_info); + if (ret) + return ret; + ret = ia_css_output0_configure(binary, &args->out_frame[0]->info); + if (ret) + return ret; + ret = ia_css_output1_configure(binary, &args->out_vf_frame->info); + if (ret) + return ret; + ret = ia_css_copy_output_configure(binary, args->copy_output); + if (ret) + return ret; + ret = ia_css_output0_configure(binary, &args->out_frame[0]->info); + if (ret) + return ret; + ret = ia_css_iterator_configure(binary, &args->in_frame->info); + if (ret) + return ret; + ret = ia_css_dvs_configure(binary, &args->out_frame[0]->info); + if (ret) + return ret; + ret = ia_css_output_configure(binary, &args->out_frame[0]->info); + if (ret) + return ret; + ret = ia_css_raw_configure(pipeline, binary, &args->in_frame->info, &binary->in_frame_info, two_ppc, deinterleaved); + if (ret) + return ret; /* * FIXME: args->delay_frames can be NULL here @@ -846,10 +860,13 @@ configure_isp_from_args( * without crashing, but the pipeline should likely be built without * adding it at the first place (or there are a hidden bug somewhere) */ - ia_css_ref_configure(binary, args->delay_frames, pipeline->dvs_frame_delay); - ia_css_tnr_configure(binary, args->tnr_frames); - ia_css_bayer_io_config(binary, args); - return 0; + ret = ia_css_ref_configure(binary, args->delay_frames, pipeline->dvs_frame_delay); + if (ret) + return ret; + ret = ia_css_tnr_configure(binary, args->tnr_frames); + if (ret) + return ret; + return ia_css_bayer_io_config(binary, args); } static void @@ -883,9 +900,7 @@ initialize_stage_frames(struct ia_css_frames_sp *frames) initialize_frame_buffer_attribute(&frames->out_vf.buf_attr); initialize_frame_buffer_attribute(&frames->s3a_buf); initialize_frame_buffer_attribute(&frames->dvs_buf); -#if defined SH_CSS_ENABLE_METADATA initialize_frame_buffer_attribute(&frames->metadata_buf); -#endif } static int @@ -1011,24 +1026,20 @@ sh_css_sp_init_stage(struct ia_css_binary *binary, mmgr_EXCEPTION, IA_CSS_BUFFER_TYPE_DIS_STATISTICS); } -#if defined SH_CSS_ENABLE_METADATA ia_css_query_internal_queue_id(IA_CSS_BUFFER_TYPE_METADATA, thread_id, &queue_id); sh_css_copy_buffer_attr_to_spbuffer(&sh_css_sp_stage.frames.metadata_buf, queue_id, mmgr_EXCEPTION, IA_CSS_BUFFER_TYPE_METADATA); -#endif if (err) return err; #ifdef ISP2401 - if (stage == 0) { - pipe = find_pipe_by_num(sh_css_sp_group.pipe[thread_id].pipe_num); - if (!pipe) - return -EINVAL; - - if (args->in_frame) - ia_css_get_crop_offsets(pipe, &args->in_frame->info); - else - ia_css_get_crop_offsets(pipe, &binary->in_frame_info); - } + pipe = find_pipe_by_num(sh_css_sp_group.pipe[thread_id].pipe_num); + if (!pipe) + return -EINVAL; + + if (args->in_frame) + ia_css_get_crop_offsets(pipe, &args->in_frame->info); + else + ia_css_get_crop_offsets(pipe, &binary->in_frame_info); #else (void)pipe; /*avoid build warning*/ #endif @@ -1196,12 +1207,7 @@ sh_css_sp_init_pipeline(struct ia_css_pipeline *me, enum ia_css_input_mode input_mode, const struct ia_css_metadata_config *md_config, const struct ia_css_metadata_info *md_info, - const enum mipi_port_id port_id, - const struct ia_css_coordinate - *internal_frame_origin_bqs_on_sctbl, /* Origin of internal frame - positioned on shading table at shading correction in ISP. */ - const struct ia_css_isp_parameters *params - ) + const enum mipi_port_id port_id) { /* Get first stage */ struct ia_css_pipeline_stage *stage = NULL; @@ -1288,7 +1294,6 @@ sh_css_sp_init_pipeline(struct ia_css_pipeline *me, } sh_css_sp_group.pipe[thread_id].scaler_pp_lut = sh_css_pipe_get_pp_gdc_lut(pipe); -#if defined(SH_CSS_ENABLE_METADATA) if (md_info && md_info->size > 0) { sh_css_sp_group.pipe[thread_id].metadata.width = md_info->resolution.width; sh_css_sp_group.pipe[thread_id].metadata.height = md_info->resolution.height; @@ -1298,37 +1303,13 @@ sh_css_sp_init_pipeline(struct ia_css_pipeline *me, md_config->data_type, MIPI_PREDICTOR_NONE, &sh_css_sp_group.pipe[thread_id].metadata.format); } -#else - (void)md_config; - (void)md_info; -#endif -#if defined(SH_CSS_ENABLE_PER_FRAME_PARAMS) sh_css_sp_group.pipe[thread_id].output_frame_queue_id = (uint32_t)SH_CSS_INVALID_QUEUE_ID; if (pipe_id != IA_CSS_PIPE_ID_COPY) { ia_css_query_internal_queue_id(IA_CSS_BUFFER_TYPE_OUTPUT_FRAME, thread_id, (enum sh_css_queue_id *)( &sh_css_sp_group.pipe[thread_id].output_frame_queue_id)); } -#endif - - if (IS_ISP2401) { - /* For the shading correction type 1 (the legacy shading table conversion in css is not used), - * the parameters are passed to the isp for the shading table centering. - */ - if (internal_frame_origin_bqs_on_sctbl && - params && params->shading_settings.enable_shading_table_conversion == 0) { - sh_css_sp_group.pipe[thread_id].shading.internal_frame_origin_x_bqs_on_sctbl - = (uint32_t)internal_frame_origin_bqs_on_sctbl->x; - sh_css_sp_group.pipe[thread_id].shading.internal_frame_origin_y_bqs_on_sctbl - = (uint32_t)internal_frame_origin_bqs_on_sctbl->y; - } else { - sh_css_sp_group.pipe[thread_id].shading.internal_frame_origin_x_bqs_on_sctbl = - 0; - sh_css_sp_group.pipe[thread_id].shading.internal_frame_origin_y_bqs_on_sctbl = - 0; - } - } IA_CSS_LOG("pipe_id %d port_config %08x", pipe_id, sh_css_sp_group.pipe[thread_id].inout_port_config); diff --git a/drivers/staging/media/atomisp/pci/sh_css_sp.h b/drivers/staging/media/atomisp/pci/sh_css_sp.h index 832eed711525..f69a79b0b0da 100644 --- a/drivers/staging/media/atomisp/pci/sh_css_sp.h +++ b/drivers/staging/media/atomisp/pci/sh_css_sp.h @@ -66,12 +66,7 @@ sh_css_sp_init_pipeline(struct ia_css_pipeline *me, enum ia_css_input_mode input_mode, const struct ia_css_metadata_config *md_config, const struct ia_css_metadata_info *md_info, - const enum mipi_port_id port_id, - const struct ia_css_coordinate - *internal_frame_origin_bqs_on_sctbl, /* Origin of internal frame - positioned on shading table at shading correction in ISP. */ - const struct ia_css_isp_parameters *params - ); + const enum mipi_port_id port_id); void sh_css_sp_uninit_pipeline(unsigned int pipe_num); diff --git a/drivers/staging/media/atomisp/pci/sh_css_stream.c b/drivers/staging/media/atomisp/pci/sh_css_stream.c deleted file mode 100644 index a768ce90f51c..000000000000 --- a/drivers/staging/media/atomisp/pci/sh_css_stream.c +++ /dev/null @@ -1,17 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -/* This file will contain the code to implement the functions declared in ia_css_stream.h - and associated helper functions */ diff --git a/drivers/staging/media/atomisp/pci/system_global.h b/drivers/staging/media/atomisp/pci/system_global.h index 9b22b8c168be..060b924023ec 100644 --- a/drivers/staging/media/atomisp/pci/system_global.h +++ b/drivers/staging/media/atomisp/pci/system_global.h @@ -25,9 +25,6 @@ * N.B. the 3 input formatters are of 2 different classess */ -/* per-frame parameter handling support */ -#define SH_CSS_ENABLE_PER_FRAME_PARAMS - #define DMA_DDR_TO_VAMEM_WORKAROUND #define DMA_DDR_TO_HMEM_WORKAROUND diff --git a/drivers/staging/media/hantro/Kconfig b/drivers/staging/media/hantro/Kconfig index 20b1f6d7b69c..3c5d833322c8 100644 --- a/drivers/staging/media/hantro/Kconfig +++ b/drivers/staging/media/hantro/Kconfig @@ -1,7 +1,7 @@ # SPDX-License-Identifier: GPL-2.0 config VIDEO_HANTRO tristate "Hantro VPU driver" - depends on ARCH_MXC || ARCH_ROCKCHIP || ARCH_AT91 || COMPILE_TEST + depends on ARCH_MXC || ARCH_ROCKCHIP || ARCH_AT91 || ARCH_SUNXI || COMPILE_TEST depends on VIDEO_DEV && VIDEO_V4L2 select MEDIA_CONTROLLER select MEDIA_CONTROLLER_REQUEST_API @@ -9,6 +9,7 @@ config VIDEO_HANTRO select VIDEOBUF2_VMALLOC select V4L2_MEM2MEM_DEV select V4L2_H264 + select V4L2_VP9 help Support for the Hantro IP based Video Processing Units present on Rockchip and NXP i.MX8M SoCs, which accelerate video and image @@ -39,3 +40,11 @@ config VIDEO_HANTRO_ROCKCHIP default y help Enable support for RK3288, RK3328, and RK3399 SoCs. + +config VIDEO_HANTRO_SUNXI + bool "Hantro VPU Allwinner support" + depends on VIDEO_HANTRO + depends on ARCH_SUNXI || COMPILE_TEST + default y + help + Enable support for H6 SoC. diff --git a/drivers/staging/media/hantro/Makefile b/drivers/staging/media/hantro/Makefile index 90036831fec4..ebd5ede7bef7 100644 --- a/drivers/staging/media/hantro/Makefile +++ b/drivers/staging/media/hantro/Makefile @@ -10,8 +10,10 @@ hantro-vpu-y += \ hantro_g1.o \ hantro_g1_h264_dec.o \ hantro_g1_mpeg2_dec.o \ - hantro_g2_hevc_dec.o \ hantro_g1_vp8_dec.o \ + hantro_g2.o \ + hantro_g2_hevc_dec.o \ + hantro_g2_vp9_dec.o \ rockchip_vpu2_hw_jpeg_enc.o \ rockchip_vpu2_hw_h264_dec.o \ rockchip_vpu2_hw_mpeg2_dec.o \ @@ -20,7 +22,8 @@ hantro-vpu-y += \ hantro_h264.o \ hantro_hevc.o \ hantro_mpeg2.o \ - hantro_vp8.o + hantro_vp8.o \ + hantro_vp9.o hantro-vpu-$(CONFIG_VIDEO_HANTRO_IMX8M) += \ imx8m_vpu_hw.o @@ -30,3 +33,6 @@ hantro-vpu-$(CONFIG_VIDEO_HANTRO_SAMA5D4) += \ hantro-vpu-$(CONFIG_VIDEO_HANTRO_ROCKCHIP) += \ rockchip_vpu_hw.o + +hantro-vpu-$(CONFIG_VIDEO_HANTRO_SUNXI) += \ + sunxi_vpu_hw.o diff --git a/drivers/staging/media/hantro/hantro.h b/drivers/staging/media/hantro/hantro.h index c2e2dca38628..06d0f3597694 100644 --- a/drivers/staging/media/hantro/hantro.h +++ b/drivers/staging/media/hantro/hantro.h @@ -16,6 +16,7 @@ #include <linux/videodev2.h> #include <linux/wait.h> #include <linux/clk.h> +#include <linux/reset.h> #include <media/v4l2-ctrls.h> #include <media/v4l2-device.h> @@ -28,6 +29,7 @@ struct hantro_ctx; struct hantro_codec_ops; +struct hantro_postproc_ops; #define HANTRO_JPEG_ENCODER BIT(0) #define HANTRO_ENCODERS 0x0000ffff @@ -35,6 +37,7 @@ struct hantro_codec_ops; #define HANTRO_VP8_DECODER BIT(17) #define HANTRO_H264_DECODER BIT(18) #define HANTRO_HEVC_DECODER BIT(19) +#define HANTRO_VP9_DECODER BIT(20) #define HANTRO_DECODERS 0xffff0000 /** @@ -59,6 +62,7 @@ struct hantro_irq { * @num_dec_fmts: Number of decoder formats. * @postproc_fmts: Post-processor formats. * @num_postproc_fmts: Number of post-processor formats. + * @postproc_ops: Post-processor ops. * @codec: Supported codecs * @codec_ops: Codec ops. * @init: Initialize hardware, optional. @@ -69,7 +73,9 @@ struct hantro_irq { * @num_clocks: number of clocks in the array * @reg_names: array of register range names * @num_regs: number of register range names in the array - * @postproc_regs: &struct hantro_postproc_regs pointer + * @double_buffer: core needs double buffering + * @legacy_regs: core uses legacy register set + * @late_postproc: postproc must be set up at the end of the job */ struct hantro_variant { unsigned int enc_offset; @@ -80,6 +86,7 @@ struct hantro_variant { unsigned int num_dec_fmts; const struct hantro_fmt *postproc_fmts; unsigned int num_postproc_fmts; + const struct hantro_postproc_ops *postproc_ops; unsigned int codec; const struct hantro_codec_ops *codec_ops; int (*init)(struct hantro_dev *vpu); @@ -90,7 +97,9 @@ struct hantro_variant { int num_clocks; const char * const *reg_names; int num_regs; - const struct hantro_postproc_regs *postproc_regs; + unsigned int double_buffer : 1; + unsigned int legacy_regs : 1; + unsigned int late_postproc : 1; }; /** @@ -101,6 +110,7 @@ struct hantro_variant { * @HANTRO_MODE_MPEG2_DEC: MPEG-2 decoder. * @HANTRO_MODE_VP8_DEC: VP8 decoder. * @HANTRO_MODE_HEVC_DEC: HEVC decoder. + * @HANTRO_MODE_VP9_DEC: VP9 decoder. */ enum hantro_codec_mode { HANTRO_MODE_NONE = -1, @@ -109,6 +119,7 @@ enum hantro_codec_mode { HANTRO_MODE_MPEG2_DEC, HANTRO_MODE_VP8_DEC, HANTRO_MODE_HEVC_DEC, + HANTRO_MODE_VP9_DEC, }; /* @@ -167,6 +178,7 @@ hantro_vdev_to_func(struct video_device *vdev) * @dev: Pointer to device for convenient logging using * dev_ macros. * @clocks: Array of clock handles. + * @resets: Array of reset handles. * @reg_bases: Mapped addresses of VPU registers. * @enc_base: Mapped address of VPU encoder register for convenience. * @dec_base: Mapped address of VPU decoder register for convenience. @@ -186,6 +198,7 @@ struct hantro_dev { struct platform_device *pdev; struct device *dev; struct clk_bulk_data *clocks; + struct reset_control *resets; void __iomem **reg_bases; void __iomem *enc_base; void __iomem *dec_base; @@ -222,6 +235,7 @@ struct hantro_dev { * @mpeg2_dec: MPEG-2-decoding context. * @vp8_dec: VP8-decoding context. * @hevc_dec: HEVC-decoding context. + * @vp9_dec: VP9-decoding context. */ struct hantro_ctx { struct hantro_dev *dev; @@ -249,6 +263,7 @@ struct hantro_ctx { struct hantro_mpeg2_dec_hw_ctx mpeg2_dec; struct hantro_vp8_dec_hw_ctx vp8_dec; struct hantro_hevc_dec_hw_ctx hevc_dec; + struct hantro_vp9_dec_hw_ctx vp9_dec; }; }; @@ -262,6 +277,7 @@ struct hantro_ctx { * @max_depth: Maximum depth, for bitstream formats * @enc_fmt: Format identifier for encoder registers. * @frmsize: Supported range of frame sizes (only for bitstream formats). + * @postprocessed: Indicates if this format needs the post-processor. */ struct hantro_fmt { char *name; @@ -271,6 +287,7 @@ struct hantro_fmt { int max_depth; enum hantro_enc_fmt enc_fmt; struct v4l2_frmsize_stepwise frmsize; + bool postprocessed; }; struct hantro_reg { @@ -296,6 +313,22 @@ struct hantro_postproc_regs { struct hantro_reg display_width; }; +struct hantro_vp9_decoded_buffer_info { + /* Info needed when the decoded frame serves as a reference frame. */ + unsigned short width; + unsigned short height; + u32 bit_depth : 4; +}; + +struct hantro_decoded_buffer { + /* Must be the first field in this struct. */ + struct v4l2_m2m_buffer base; + + union { + struct hantro_vp9_decoded_buffer_info vp9; + }; +}; + /* Logging helpers */ /** @@ -366,6 +399,13 @@ static inline void vdpu_write(struct hantro_dev *vpu, u32 val, u32 reg) writel(val, vpu->dec_base + reg); } +static inline void hantro_write_addr(struct hantro_dev *vpu, + unsigned long offset, + dma_addr_t addr) +{ + vdpu_write(vpu, addr & 0xffffffff, offset); +} + static inline u32 vdpu_read(struct hantro_dev *vpu, u32 reg) { u32 val = readl(vpu->dec_base + reg); @@ -426,6 +466,12 @@ hantro_get_dec_buf_addr(struct hantro_ctx *ctx, struct vb2_buffer *vb) return vb2_dma_contig_plane_dma_addr(vb, 0); } +static inline struct hantro_decoded_buffer * +vb2_to_hantro_decoded_buf(struct vb2_buffer *buf) +{ + return container_of(buf, struct hantro_decoded_buffer, base.vb.vb2_buf); +} + void hantro_postproc_disable(struct hantro_ctx *ctx); void hantro_postproc_enable(struct hantro_ctx *ctx); void hantro_postproc_free(struct hantro_ctx *ctx); diff --git a/drivers/staging/media/hantro/hantro_drv.c b/drivers/staging/media/hantro/hantro_drv.c index fb82b9297a2b..6a51f39dde56 100644 --- a/drivers/staging/media/hantro/hantro_drv.c +++ b/drivers/staging/media/hantro/hantro_drv.c @@ -130,7 +130,7 @@ void hantro_start_prepare_run(struct hantro_ctx *ctx) v4l2_ctrl_request_setup(src_buf->vb2_buf.req_obj.req, &ctx->ctrl_handler); - if (!ctx->is_encoder) { + if (!ctx->is_encoder && !ctx->dev->variant->late_postproc) { if (hantro_needs_postproc(ctx, ctx->vpu_dst_fmt)) hantro_postproc_enable(ctx); else @@ -142,6 +142,13 @@ void hantro_end_prepare_run(struct hantro_ctx *ctx) { struct vb2_v4l2_buffer *src_buf; + if (!ctx->is_encoder && ctx->dev->variant->late_postproc) { + if (hantro_needs_postproc(ctx, ctx->vpu_dst_fmt)) + hantro_postproc_enable(ctx); + else + hantro_postproc_disable(ctx); + } + src_buf = hantro_get_src_buf(ctx); v4l2_ctrl_request_complete(src_buf->vb2_buf.req_obj.req, &ctx->ctrl_handler); @@ -232,7 +239,7 @@ queue_init(void *priv, struct vb2_queue *src_vq, struct vb2_queue *dst_vq) dst_vq->io_modes = VB2_MMAP | VB2_DMABUF; dst_vq->drv_priv = ctx; dst_vq->ops = &hantro_queue_ops; - dst_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer); + dst_vq->buf_struct_size = sizeof(struct hantro_decoded_buffer); dst_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY; dst_vq->lock = &ctx->dev->vpu_mutex; dst_vq->dev = ctx->dev->v4l2_dev.dev; @@ -263,6 +270,12 @@ static int hantro_try_ctrl(struct v4l2_ctrl *ctrl) if (sps->bit_depth_luma_minus8 != 0) /* Only 8-bit is supported */ return -EINVAL; + } else if (ctrl->id == V4L2_CID_STATELESS_VP9_FRAME) { + const struct v4l2_ctrl_vp9_frame *dec_params = ctrl->p_new.p_vp9_frame; + + /* We only support profile 0 */ + if (dec_params->profile != 0) + return -EINVAL; } return 0; } @@ -461,6 +474,16 @@ static const struct hantro_ctrl controls[] = { .step = 1, .ops = &hantro_hevc_ctrl_ops, }, + }, { + .codec = HANTRO_VP9_DECODER, + .cfg = { + .id = V4L2_CID_STATELESS_VP9_FRAME, + }, + }, { + .codec = HANTRO_VP9_DECODER, + .cfg = { + .id = V4L2_CID_STATELESS_VP9_COMPRESSED_HDR, + }, }, }; @@ -598,6 +621,9 @@ static const struct of_device_id of_hantro_match[] = { #ifdef CONFIG_VIDEO_HANTRO_SAMA5D4 { .compatible = "microchip,sama5d4-vdec", .data = &sama5d4_vdec_variant, }, #endif +#ifdef CONFIG_VIDEO_HANTRO_SUNXI + { .compatible = "allwinner,sun50i-h6-vpu-g2", .data = &sunxi_vpu_variant, }, +#endif { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, of_hantro_match); @@ -889,6 +915,10 @@ static int hantro_probe(struct platform_device *pdev) return PTR_ERR(vpu->clocks[0].clk); } + vpu->resets = devm_reset_control_array_get(&pdev->dev, false, true); + if (IS_ERR(vpu->resets)) + return PTR_ERR(vpu->resets); + num_bases = vpu->variant->num_regs ?: 1; vpu->reg_bases = devm_kcalloc(&pdev->dev, num_bases, sizeof(*vpu->reg_bases), GFP_KERNEL); @@ -907,6 +937,11 @@ static int hantro_probe(struct platform_device *pdev) vpu->enc_base = vpu->reg_bases[0] + vpu->variant->enc_offset; vpu->dec_base = vpu->reg_bases[0] + vpu->variant->dec_offset; + /** + * TODO: Eventually allow taking advantage of full 64-bit address space. + * Until then we assume the MSB portion of buffers' base addresses is + * always 0 due to this masking operation. + */ ret = dma_set_coherent_mask(vpu->dev, DMA_BIT_MASK(32)); if (ret) { dev_err(vpu->dev, "Could not set DMA coherent mask.\n"); @@ -957,10 +992,16 @@ static int hantro_probe(struct platform_device *pdev) pm_runtime_use_autosuspend(vpu->dev); pm_runtime_enable(vpu->dev); + ret = reset_control_deassert(vpu->resets); + if (ret) { + dev_err(&pdev->dev, "Failed to deassert resets\n"); + goto err_pm_disable; + } + ret = clk_bulk_prepare(vpu->variant->num_clocks, vpu->clocks); if (ret) { dev_err(&pdev->dev, "Failed to prepare clocks\n"); - return ret; + goto err_rst_assert; } ret = v4l2_device_register(&pdev->dev, &vpu->v4l2_dev); @@ -1016,6 +1057,9 @@ err_v4l2_unreg: v4l2_device_unregister(&vpu->v4l2_dev); err_clk_unprepare: clk_bulk_unprepare(vpu->variant->num_clocks, vpu->clocks); +err_rst_assert: + reset_control_assert(vpu->resets); +err_pm_disable: pm_runtime_dont_use_autosuspend(vpu->dev); pm_runtime_disable(vpu->dev); return ret; @@ -1034,6 +1078,7 @@ static int hantro_remove(struct platform_device *pdev) v4l2_m2m_release(vpu->m2m_dev); v4l2_device_unregister(&vpu->v4l2_dev); clk_bulk_unprepare(vpu->variant->num_clocks, vpu->clocks); + reset_control_assert(vpu->resets); pm_runtime_dont_use_autosuspend(vpu->dev); pm_runtime_disable(vpu->dev); return 0; diff --git a/drivers/staging/media/hantro/hantro_g2.c b/drivers/staging/media/hantro/hantro_g2.c new file mode 100644 index 000000000000..ee5f14c5f8f2 --- /dev/null +++ b/drivers/staging/media/hantro/hantro_g2.c @@ -0,0 +1,44 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Hantro VPU codec driver + * + * Copyright (C) 2021 Collabora Ltd, Andrzej Pietrasiewicz <andrzej.p@collabora.com> + */ + +#include "hantro_hw.h" +#include "hantro_g2_regs.h" + +void hantro_g2_check_idle(struct hantro_dev *vpu) +{ + int i; + + for (i = 0; i < 3; i++) { + u32 status; + + /* Make sure the VPU is idle */ + status = vdpu_read(vpu, G2_REG_INTERRUPT); + if (status & G2_REG_INTERRUPT_DEC_E) { + dev_warn(vpu->dev, "device still running, aborting"); + status |= G2_REG_INTERRUPT_DEC_ABORT_E | G2_REG_INTERRUPT_DEC_IRQ_DIS; + vdpu_write(vpu, status, G2_REG_INTERRUPT); + } + } +} + +irqreturn_t hantro_g2_irq(int irq, void *dev_id) +{ + struct hantro_dev *vpu = dev_id; + enum vb2_buffer_state state; + u32 status; + + status = vdpu_read(vpu, G2_REG_INTERRUPT); + state = (status & G2_REG_INTERRUPT_DEC_RDY_INT) ? + VB2_BUF_STATE_DONE : VB2_BUF_STATE_ERROR; + + vdpu_write(vpu, 0, G2_REG_INTERRUPT); + vdpu_write(vpu, G2_REG_CONFIG_DEC_CLK_GATE_E, G2_REG_CONFIG); + + hantro_irq_done(vpu, state); + + return IRQ_HANDLED; +} diff --git a/drivers/staging/media/hantro/hantro_g2_hevc_dec.c b/drivers/staging/media/hantro/hantro_g2_hevc_dec.c index 76a921163b9a..99d8ea7543da 100644 --- a/drivers/staging/media/hantro/hantro_g2_hevc_dec.c +++ b/drivers/staging/media/hantro/hantro_g2_hevc_dec.c @@ -8,20 +8,6 @@ #include "hantro_hw.h" #include "hantro_g2_regs.h" -#define HEVC_DEC_MODE 0xC - -#define BUS_WIDTH_32 0 -#define BUS_WIDTH_64 1 -#define BUS_WIDTH_128 2 -#define BUS_WIDTH_256 3 - -static inline void hantro_write_addr(struct hantro_dev *vpu, - unsigned long offset, - dma_addr_t addr) -{ - vdpu_write(vpu, addr & 0xffffffff, offset); -} - static void prepare_tile_info_buffer(struct hantro_ctx *ctx) { struct hantro_dev *vpu = ctx->dev; @@ -368,6 +354,8 @@ static int set_ref(struct hantro_ctx *ctx) const struct v4l2_hevc_dpb_entry *dpb = decode_params->dpb; dma_addr_t luma_addr, chroma_addr, mv_addr = 0; struct hantro_dev *vpu = ctx->dev; + struct vb2_v4l2_buffer *vb2_dst; + struct hantro_decoded_buffer *dst; size_t cr_offset = hantro_hevc_chroma_offset(sps); size_t mv_offset = hantro_hevc_motion_vectors_offset(sps); u32 max_ref_frames; @@ -448,32 +436,37 @@ static int set_ref(struct hantro_ctx *ctx) if (dpb[i].rps == V4L2_HEVC_DPB_ENTRY_RPS_LT_CURR) dpb_longterm_e |= BIT(V4L2_HEVC_DPB_ENTRIES_NUM_MAX - 1 - i); - hantro_write_addr(vpu, G2_REG_ADDR_REF(i), luma_addr); - hantro_write_addr(vpu, G2_REG_CHR_REF(i), chroma_addr); - hantro_write_addr(vpu, G2_REG_DMV_REF(i), mv_addr); + hantro_write_addr(vpu, G2_REF_LUMA_ADDR(i), luma_addr); + hantro_write_addr(vpu, G2_REF_CHROMA_ADDR(i), chroma_addr); + hantro_write_addr(vpu, G2_REF_MV_ADDR(i), mv_addr); } - luma_addr = hantro_hevc_get_ref_buf(ctx, decode_params->pic_order_cnt_val); + vb2_dst = hantro_get_dst_buf(ctx); + dst = vb2_to_hantro_decoded_buf(&vb2_dst->vb2_buf); + luma_addr = hantro_get_dec_buf_addr(ctx, &dst->base.vb.vb2_buf); if (!luma_addr) return -ENOMEM; + if (hantro_hevc_add_ref_buf(ctx, decode_params->pic_order_cnt_val, luma_addr)) + return -EINVAL; + chroma_addr = luma_addr + cr_offset; mv_addr = luma_addr + mv_offset; - hantro_write_addr(vpu, G2_REG_ADDR_REF(i), luma_addr); - hantro_write_addr(vpu, G2_REG_CHR_REF(i), chroma_addr); - hantro_write_addr(vpu, G2_REG_DMV_REF(i++), mv_addr); + hantro_write_addr(vpu, G2_REF_LUMA_ADDR(i), luma_addr); + hantro_write_addr(vpu, G2_REF_CHROMA_ADDR(i), chroma_addr); + hantro_write_addr(vpu, G2_REF_MV_ADDR(i++), mv_addr); - hantro_write_addr(vpu, G2_ADDR_DST, luma_addr); - hantro_write_addr(vpu, G2_ADDR_DST_CHR, chroma_addr); - hantro_write_addr(vpu, G2_ADDR_DST_MV, mv_addr); + hantro_write_addr(vpu, G2_OUT_LUMA_ADDR, luma_addr); + hantro_write_addr(vpu, G2_OUT_CHROMA_ADDR, chroma_addr); + hantro_write_addr(vpu, G2_OUT_MV_ADDR, mv_addr); hantro_hevc_ref_remove_unused(ctx); for (; i < V4L2_HEVC_DPB_ENTRIES_NUM_MAX; i++) { - hantro_write_addr(vpu, G2_REG_ADDR_REF(i), 0); - hantro_write_addr(vpu, G2_REG_CHR_REF(i), 0); - hantro_write_addr(vpu, G2_REG_DMV_REF(i), 0); + hantro_write_addr(vpu, G2_REF_LUMA_ADDR(i), 0); + hantro_write_addr(vpu, G2_REF_CHROMA_ADDR(i), 0); + hantro_write_addr(vpu, G2_REF_MV_ADDR(i), 0); } hantro_reg_write(vpu, &g2_refer_lterm_e, dpb_longterm_e); @@ -483,37 +476,28 @@ static int set_ref(struct hantro_ctx *ctx) static void set_buffers(struct hantro_ctx *ctx) { - struct vb2_v4l2_buffer *src_buf, *dst_buf; + struct vb2_v4l2_buffer *src_buf; struct hantro_dev *vpu = ctx->dev; - const struct hantro_hevc_dec_ctrls *ctrls = &ctx->hevc_dec.ctrls; - const struct v4l2_ctrl_hevc_sps *sps = ctrls->sps; - size_t cr_offset = hantro_hevc_chroma_offset(sps); - dma_addr_t src_dma, dst_dma; + dma_addr_t src_dma; u32 src_len, src_buf_len; src_buf = hantro_get_src_buf(ctx); - dst_buf = hantro_get_dst_buf(ctx); /* Source (stream) buffer. */ src_dma = vb2_dma_contig_plane_dma_addr(&src_buf->vb2_buf, 0); src_len = vb2_get_plane_payload(&src_buf->vb2_buf, 0); src_buf_len = vb2_plane_size(&src_buf->vb2_buf, 0); - hantro_write_addr(vpu, G2_ADDR_STR, src_dma); + hantro_write_addr(vpu, G2_STREAM_ADDR, src_dma); hantro_reg_write(vpu, &g2_stream_len, src_len); hantro_reg_write(vpu, &g2_strm_buffer_len, src_buf_len); hantro_reg_write(vpu, &g2_strm_start_offset, 0); hantro_reg_write(vpu, &g2_write_mvs_e, 1); - /* Destination (decoded frame) buffer. */ - dst_dma = hantro_get_dec_buf_addr(ctx, &dst_buf->vb2_buf); - - hantro_write_addr(vpu, G2_RASTER_SCAN, dst_dma); - hantro_write_addr(vpu, G2_RASTER_SCAN_CHR, dst_dma + cr_offset); - hantro_write_addr(vpu, G2_ADDR_TILE_SIZE, ctx->hevc_dec.tile_sizes.dma); - hantro_write_addr(vpu, G2_TILE_FILTER, ctx->hevc_dec.tile_filter.dma); - hantro_write_addr(vpu, G2_TILE_SAO, ctx->hevc_dec.tile_sao.dma); - hantro_write_addr(vpu, G2_TILE_BSD, ctx->hevc_dec.tile_bsd.dma); + hantro_write_addr(vpu, G2_TILE_SIZES_ADDR, ctx->hevc_dec.tile_sizes.dma); + hantro_write_addr(vpu, G2_TILE_FILTER_ADDR, ctx->hevc_dec.tile_filter.dma); + hantro_write_addr(vpu, G2_TILE_SAO_ADDR, ctx->hevc_dec.tile_sao.dma); + hantro_write_addr(vpu, G2_TILE_BSD_ADDR, ctx->hevc_dec.tile_bsd.dma); } static void prepare_scaling_list_buffer(struct hantro_ctx *ctx) @@ -563,24 +547,7 @@ static void prepare_scaling_list_buffer(struct hantro_ctx *ctx) for (k = 0; k < 8; k++) *p++ = sc->scaling_list_32x32[i][8 * k + j]; - hantro_write_addr(vpu, HEVC_SCALING_LIST, ctx->hevc_dec.scaling_lists.dma); -} - -static void hantro_g2_check_idle(struct hantro_dev *vpu) -{ - int i; - - for (i = 0; i < 3; i++) { - u32 status; - - /* Make sure the VPU is idle */ - status = vdpu_read(vpu, G2_REG_INTERRUPT); - if (status & G2_REG_INTERRUPT_DEC_E) { - dev_warn(vpu->dev, "device still running, aborting"); - status |= G2_REG_INTERRUPT_DEC_ABORT_E | G2_REG_INTERRUPT_DEC_IRQ_DIS; - vdpu_write(vpu, status, G2_REG_INTERRUPT); - } - } + hantro_write_addr(vpu, G2_HEVC_SCALING_LIST_ADDR, ctx->hevc_dec.scaling_lists.dma); } int hantro_g2_hevc_dec_run(struct hantro_ctx *ctx) @@ -619,9 +586,6 @@ int hantro_g2_hevc_dec_run(struct hantro_ctx *ctx) /* Don't compress buffers */ hantro_reg_write(vpu, &g2_ref_compress_bypass, 1); - /* use NV12 as output format */ - hantro_reg_write(vpu, &g2_out_rs_e, 1); - /* Bus width and max burst */ hantro_reg_write(vpu, &g2_buswidth, BUS_WIDTH_128); hantro_reg_write(vpu, &g2_max_burst, 16); diff --git a/drivers/staging/media/hantro/hantro_g2_regs.h b/drivers/staging/media/hantro/hantro_g2_regs.h index bb22fa921914..b7c6f9877b9d 100644 --- a/drivers/staging/media/hantro/hantro_g2_regs.h +++ b/drivers/staging/media/hantro/hantro_g2_regs.h @@ -27,8 +27,22 @@ #define G2_REG_INTERRUPT_DEC_IRQ_DIS BIT(4) #define G2_REG_INTERRUPT_DEC_E BIT(0) +#define HEVC_DEC_MODE 0xc +#define VP9_DEC_MODE 0xd + +#define BUS_WIDTH_32 0 +#define BUS_WIDTH_64 1 +#define BUS_WIDTH_128 2 +#define BUS_WIDTH_256 3 + #define g2_strm_swap G2_DEC_REG(2, 28, 0xf) +#define g2_strm_swap_old G2_DEC_REG(2, 27, 0x1f) +#define g2_pic_swap G2_DEC_REG(2, 22, 0x1f) #define g2_dirmv_swap G2_DEC_REG(2, 20, 0xf) +#define g2_dirmv_swap_old G2_DEC_REG(2, 17, 0x1f) +#define g2_tab0_swap_old G2_DEC_REG(2, 12, 0x1f) +#define g2_tab1_swap_old G2_DEC_REG(2, 7, 0x1f) +#define g2_tab2_swap_old G2_DEC_REG(2, 2, 0x1f) #define g2_mode G2_DEC_REG(3, 27, 0x1f) #define g2_compress_swap G2_DEC_REG(3, 20, 0xf) @@ -37,11 +51,14 @@ #define g2_out_dis G2_DEC_REG(3, 15, 0x1) #define g2_out_filtering_dis G2_DEC_REG(3, 14, 0x1) #define g2_write_mvs_e G2_DEC_REG(3, 12, 0x1) +#define g2_tab3_swap_old G2_DEC_REG(3, 7, 0x1f) +#define g2_rscan_swap G2_DEC_REG(3, 2, 0x1f) #define g2_pic_width_in_cbs G2_DEC_REG(4, 19, 0x1fff) #define g2_pic_height_in_cbs G2_DEC_REG(4, 6, 0x1fff) #define g2_num_ref_frames G2_DEC_REG(4, 0, 0x1f) +#define g2_start_bit G2_DEC_REG(5, 25, 0x7f) #define g2_scaling_list_e G2_DEC_REG(5, 24, 0x1) #define g2_cb_qp_offset G2_DEC_REG(5, 19, 0x1f) #define g2_cr_qp_offset G2_DEC_REG(5, 14, 0x1f) @@ -49,6 +66,7 @@ #define g2_tempor_mvp_e G2_DEC_REG(5, 11, 0x1) #define g2_max_cu_qpd_depth G2_DEC_REG(5, 5, 0x3f) #define g2_cu_qpd_e G2_DEC_REG(5, 4, 0x1) +#define g2_pix_shift G2_DEC_REG(5, 0, 0xf) #define g2_stream_len G2_DEC_REG(6, 0, 0xffffffff) @@ -71,24 +89,40 @@ #define g2_const_intra_e G2_DEC_REG(8, 31, 0x1) #define g2_filt_ctrl_pres G2_DEC_REG(8, 30, 0x1) +#define g2_bit_depth_y G2_DEC_REG(8, 21, 0xf) +#define g2_bit_depth_c G2_DEC_REG(8, 17, 0xf) #define g2_idr_pic_e G2_DEC_REG(8, 16, 0x1) #define g2_bit_depth_pcm_y G2_DEC_REG(8, 12, 0xf) #define g2_bit_depth_pcm_c G2_DEC_REG(8, 8, 0xf) #define g2_bit_depth_y_minus8 G2_DEC_REG(8, 6, 0x3) #define g2_bit_depth_c_minus8 G2_DEC_REG(8, 4, 0x3) +#define g2_rs_out_bit_depth G2_DEC_REG(8, 4, 0xf) #define g2_output_8_bits G2_DEC_REG(8, 3, 0x1) +#define g2_output_format G2_DEC_REG(8, 0, 0x7) +#define g2_pp_pix_shift G2_DEC_REG(8, 0, 0xf) #define g2_refidx1_active G2_DEC_REG(9, 19, 0x1f) #define g2_refidx0_active G2_DEC_REG(9, 14, 0x1f) #define g2_hdr_skip_length G2_DEC_REG(9, 0, 0x3fff) #define g2_start_code_e G2_DEC_REG(10, 31, 0x1) +#define g2_init_qp_old G2_DEC_REG(10, 25, 0x3f) #define g2_init_qp G2_DEC_REG(10, 24, 0x3f) +#define g2_num_tile_cols_old G2_DEC_REG(10, 20, 0x1f) #define g2_num_tile_cols G2_DEC_REG(10, 19, 0x1f) +#define g2_num_tile_rows_old G2_DEC_REG(10, 15, 0x1f) #define g2_num_tile_rows G2_DEC_REG(10, 14, 0x1f) #define g2_tile_e G2_DEC_REG(10, 1, 0x1) #define g2_entropy_sync_e G2_DEC_REG(10, 0, 0x1) +#define vp9_transform_mode G2_DEC_REG(11, 27, 0x7) +#define vp9_filt_sharpness G2_DEC_REG(11, 21, 0x7) +#define vp9_mcomp_filt_type G2_DEC_REG(11, 8, 0x7) +#define vp9_high_prec_mv_e G2_DEC_REG(11, 7, 0x1) +#define vp9_comp_pred_mode G2_DEC_REG(11, 4, 0x3) +#define vp9_gref_sign_bias G2_DEC_REG(11, 2, 0x1) +#define vp9_aref_sign_bias G2_DEC_REG(11, 0, 0x1) + #define g2_refer_lterm_e G2_DEC_REG(12, 16, 0xffff) #define g2_min_cb_size G2_DEC_REG(12, 13, 0x7) #define g2_max_cb_size G2_DEC_REG(12, 10, 0x7) @@ -147,6 +181,50 @@ #define g2_partial_ctb_y G2_DEC_REG(20, 30, 0x1) #define g2_pic_width_4x4 G2_DEC_REG(20, 16, 0xfff) #define g2_pic_height_4x4 G2_DEC_REG(20, 0, 0xfff) + +#define vp9_qp_delta_y_dc G2_DEC_REG(13, 23, 0x3f) +#define vp9_qp_delta_ch_dc G2_DEC_REG(13, 17, 0x3f) +#define vp9_qp_delta_ch_ac G2_DEC_REG(13, 11, 0x3f) +#define vp9_last_sign_bias G2_DEC_REG(13, 10, 0x1) +#define vp9_lossless_e G2_DEC_REG(13, 9, 0x1) +#define vp9_comp_pred_var_ref1 G2_DEC_REG(13, 7, 0x3) +#define vp9_comp_pred_var_ref0 G2_DEC_REG(13, 5, 0x3) +#define vp9_comp_pred_fixed_ref G2_DEC_REG(13, 3, 0x3) +#define vp9_segment_temp_upd_e G2_DEC_REG(13, 2, 0x1) +#define vp9_segment_upd_e G2_DEC_REG(13, 1, 0x1) +#define vp9_segment_e G2_DEC_REG(13, 0, 0x1) + +#define vp9_filt_level G2_DEC_REG(14, 18, 0x3f) +#define vp9_refpic_seg0 G2_DEC_REG(14, 15, 0x7) +#define vp9_skip_seg0 G2_DEC_REG(14, 14, 0x1) +#define vp9_filt_level_seg0 G2_DEC_REG(14, 8, 0x3f) +#define vp9_quant_seg0 G2_DEC_REG(14, 0, 0xff) + +#define vp9_refpic_seg1 G2_DEC_REG(15, 15, 0x7) +#define vp9_skip_seg1 G2_DEC_REG(15, 14, 0x1) +#define vp9_filt_level_seg1 G2_DEC_REG(15, 8, 0x3f) +#define vp9_quant_seg1 G2_DEC_REG(15, 0, 0xff) + +#define vp9_refpic_seg2 G2_DEC_REG(16, 15, 0x7) +#define vp9_skip_seg2 G2_DEC_REG(16, 14, 0x1) +#define vp9_filt_level_seg2 G2_DEC_REG(16, 8, 0x3f) +#define vp9_quant_seg2 G2_DEC_REG(16, 0, 0xff) + +#define vp9_refpic_seg3 G2_DEC_REG(17, 15, 0x7) +#define vp9_skip_seg3 G2_DEC_REG(17, 14, 0x1) +#define vp9_filt_level_seg3 G2_DEC_REG(17, 8, 0x3f) +#define vp9_quant_seg3 G2_DEC_REG(17, 0, 0xff) + +#define vp9_refpic_seg4 G2_DEC_REG(18, 15, 0x7) +#define vp9_skip_seg4 G2_DEC_REG(18, 14, 0x1) +#define vp9_filt_level_seg4 G2_DEC_REG(18, 8, 0x3f) +#define vp9_quant_seg4 G2_DEC_REG(18, 0, 0xff) + +#define vp9_refpic_seg5 G2_DEC_REG(19, 15, 0x7) +#define vp9_skip_seg5 G2_DEC_REG(19, 14, 0x1) +#define vp9_filt_level_seg5 G2_DEC_REG(19, 8, 0x3f) +#define vp9_quant_seg5 G2_DEC_REG(19, 0, 0xff) + #define hevc_cur_poc_00 G2_DEC_REG(46, 24, 0xff) #define hevc_cur_poc_01 G2_DEC_REG(46, 16, 0xff) #define hevc_cur_poc_02 G2_DEC_REG(46, 8, 0xff) @@ -167,9 +245,48 @@ #define hevc_cur_poc_14 G2_DEC_REG(49, 8, 0xff) #define hevc_cur_poc_15 G2_DEC_REG(49, 0, 0xff) +#define vp9_refpic_seg6 G2_DEC_REG(31, 15, 0x7) +#define vp9_skip_seg6 G2_DEC_REG(31, 14, 0x1) +#define vp9_filt_level_seg6 G2_DEC_REG(31, 8, 0x3f) +#define vp9_quant_seg6 G2_DEC_REG(31, 0, 0xff) + +#define vp9_refpic_seg7 G2_DEC_REG(32, 15, 0x7) +#define vp9_skip_seg7 G2_DEC_REG(32, 14, 0x1) +#define vp9_filt_level_seg7 G2_DEC_REG(32, 8, 0x3f) +#define vp9_quant_seg7 G2_DEC_REG(32, 0, 0xff) + +#define vp9_lref_width G2_DEC_REG(33, 16, 0xffff) +#define vp9_lref_height G2_DEC_REG(33, 0, 0xffff) + +#define vp9_gref_width G2_DEC_REG(34, 16, 0xffff) +#define vp9_gref_height G2_DEC_REG(34, 0, 0xffff) + +#define vp9_aref_width G2_DEC_REG(35, 16, 0xffff) +#define vp9_aref_height G2_DEC_REG(35, 0, 0xffff) + +#define vp9_lref_hor_scale G2_DEC_REG(36, 16, 0xffff) +#define vp9_lref_ver_scale G2_DEC_REG(36, 0, 0xffff) + +#define vp9_gref_hor_scale G2_DEC_REG(37, 16, 0xffff) +#define vp9_gref_ver_scale G2_DEC_REG(37, 0, 0xffff) + +#define vp9_aref_hor_scale G2_DEC_REG(38, 16, 0xffff) +#define vp9_aref_ver_scale G2_DEC_REG(38, 0, 0xffff) + +#define vp9_filt_ref_adj_0 G2_DEC_REG(46, 24, 0x7f) +#define vp9_filt_ref_adj_1 G2_DEC_REG(46, 16, 0x7f) +#define vp9_filt_ref_adj_2 G2_DEC_REG(46, 8, 0x7f) +#define vp9_filt_ref_adj_3 G2_DEC_REG(46, 0, 0x7f) + +#define vp9_filt_mb_adj_0 G2_DEC_REG(47, 24, 0x7f) +#define vp9_filt_mb_adj_1 G2_DEC_REG(47, 16, 0x7f) +#define vp9_filt_mb_adj_2 G2_DEC_REG(47, 8, 0x7f) +#define vp9_filt_mb_adj_3 G2_DEC_REG(47, 0, 0x7f) + #define g2_apf_threshold G2_DEC_REG(55, 0, 0xffff) #define g2_clk_gate_e G2_DEC_REG(58, 16, 0x1) +#define g2_double_buffer_e G2_DEC_REG(58, 15, 0x1) #define g2_buswidth G2_DEC_REG(58, 8, 0x7) #define g2_max_burst G2_DEC_REG(58, 0, 0xff) @@ -177,20 +294,24 @@ #define G2_REG_CONFIG_DEC_CLK_GATE_E BIT(16) #define G2_REG_CONFIG_DEC_CLK_GATE_IDLE_E BIT(17) -#define G2_ADDR_DST (G2_SWREG(65)) -#define G2_REG_ADDR_REF(i) (G2_SWREG(67) + ((i) * 0x8)) -#define G2_ADDR_DST_CHR (G2_SWREG(99)) -#define G2_REG_CHR_REF(i) (G2_SWREG(101) + ((i) * 0x8)) -#define G2_ADDR_DST_MV (G2_SWREG(133)) -#define G2_REG_DMV_REF(i) (G2_SWREG(135) + ((i) * 0x8)) -#define G2_ADDR_TILE_SIZE (G2_SWREG(167)) -#define G2_ADDR_STR (G2_SWREG(169)) -#define HEVC_SCALING_LIST (G2_SWREG(171)) -#define G2_RASTER_SCAN (G2_SWREG(175)) -#define G2_RASTER_SCAN_CHR (G2_SWREG(177)) -#define G2_TILE_FILTER (G2_SWREG(179)) -#define G2_TILE_SAO (G2_SWREG(181)) -#define G2_TILE_BSD (G2_SWREG(183)) +#define G2_OUT_LUMA_ADDR (G2_SWREG(65)) +#define G2_REF_LUMA_ADDR(i) (G2_SWREG(67) + ((i) * 0x8)) +#define G2_VP9_SEGMENT_WRITE_ADDR (G2_SWREG(79)) +#define G2_VP9_SEGMENT_READ_ADDR (G2_SWREG(81)) +#define G2_OUT_CHROMA_ADDR (G2_SWREG(99)) +#define G2_REF_CHROMA_ADDR(i) (G2_SWREG(101) + ((i) * 0x8)) +#define G2_OUT_MV_ADDR (G2_SWREG(133)) +#define G2_REF_MV_ADDR(i) (G2_SWREG(135) + ((i) * 0x8)) +#define G2_TILE_SIZES_ADDR (G2_SWREG(167)) +#define G2_STREAM_ADDR (G2_SWREG(169)) +#define G2_HEVC_SCALING_LIST_ADDR (G2_SWREG(171)) +#define G2_VP9_CTX_COUNT_ADDR (G2_SWREG(171)) +#define G2_VP9_PROBS_ADDR (G2_SWREG(173)) +#define G2_RS_OUT_LUMA_ADDR (G2_SWREG(175)) +#define G2_RS_OUT_CHROMA_ADDR (G2_SWREG(177)) +#define G2_TILE_FILTER_ADDR (G2_SWREG(179)) +#define G2_TILE_SAO_ADDR (G2_SWREG(181)) +#define G2_TILE_BSD_ADDR (G2_SWREG(183)) #define g2_strm_buffer_len G2_DEC_REG(258, 0, 0xffffffff) #define g2_strm_start_offset G2_DEC_REG(259, 0, 0xffffffff) diff --git a/drivers/staging/media/hantro/hantro_g2_vp9_dec.c b/drivers/staging/media/hantro/hantro_g2_vp9_dec.c new file mode 100644 index 000000000000..91c21b634fab --- /dev/null +++ b/drivers/staging/media/hantro/hantro_g2_vp9_dec.c @@ -0,0 +1,1022 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Hantro VP9 codec driver + * + * Copyright (C) 2021 Collabora Ltd. + */ +#include "media/videobuf2-core.h" +#include "media/videobuf2-dma-contig.h" +#include "media/videobuf2-v4l2.h" +#include <linux/kernel.h> +#include <linux/vmalloc.h> +#include <media/v4l2-mem2mem.h> +#include <media/v4l2-vp9.h> + +#include "hantro.h" +#include "hantro_vp9.h" +#include "hantro_g2_regs.h" + +#define G2_ALIGN 16 + +enum hantro_ref_frames { + INTRA_FRAME = 0, + LAST_FRAME = 1, + GOLDEN_FRAME = 2, + ALTREF_FRAME = 3, + MAX_REF_FRAMES = 4 +}; + +static int start_prepare_run(struct hantro_ctx *ctx, const struct v4l2_ctrl_vp9_frame **dec_params) +{ + const struct v4l2_ctrl_vp9_compressed_hdr *prob_updates; + struct hantro_vp9_dec_hw_ctx *vp9_ctx = &ctx->vp9_dec; + struct v4l2_ctrl *ctrl; + unsigned int fctx_idx; + + /* v4l2-specific stuff */ + hantro_start_prepare_run(ctx); + + ctrl = v4l2_ctrl_find(&ctx->ctrl_handler, V4L2_CID_STATELESS_VP9_FRAME); + if (WARN_ON(!ctrl)) + return -EINVAL; + *dec_params = ctrl->p_cur.p; + + ctrl = v4l2_ctrl_find(&ctx->ctrl_handler, V4L2_CID_STATELESS_VP9_COMPRESSED_HDR); + if (WARN_ON(!ctrl)) + return -EINVAL; + prob_updates = ctrl->p_cur.p; + vp9_ctx->cur.tx_mode = prob_updates->tx_mode; + + /* + * vp9 stuff + * + * by this point the userspace has done all parts of 6.2 uncompressed_header() + * except this fragment: + * if ( FrameIsIntra || error_resilient_mode ) { + * setup_past_independence ( ) + * if ( frame_type == KEY_FRAME || error_resilient_mode == 1 || + * reset_frame_context == 3 ) { + * for ( i = 0; i < 4; i ++ ) { + * save_probs( i ) + * } + * } else if ( reset_frame_context == 2 ) { + * save_probs( frame_context_idx ) + * } + * frame_context_idx = 0 + * } + */ + fctx_idx = v4l2_vp9_reset_frame_ctx(*dec_params, vp9_ctx->frame_context); + vp9_ctx->cur.frame_context_idx = fctx_idx; + + /* 6.1 frame(sz): load_probs() and load_probs2() */ + vp9_ctx->probability_tables = vp9_ctx->frame_context[fctx_idx]; + + /* + * The userspace has also performed 6.3 compressed_header(), but handling the + * probs in a special way. All probs which need updating, except MV-related, + * have been read from the bitstream and translated through inv_map_table[], + * but no 6.3.6 inv_recenter_nonneg(v, m) has been performed. The values passed + * by userspace are either translated values (there are no 0 values in + * inv_map_table[]), or zero to indicate no update. All MV-related probs which need + * updating have been read from the bitstream and (mv_prob << 1) | 1 has been + * performed. The values passed by userspace are either new values + * to replace old ones (the above mentioned shift and bitwise or never result in + * a zero) or zero to indicate no update. + * fw_update_probs() performs actual probs updates or leaves probs as-is + * for values for which a zero was passed from userspace. + */ + v4l2_vp9_fw_update_probs(&vp9_ctx->probability_tables, prob_updates, *dec_params); + + return 0; +} + +static size_t chroma_offset(const struct hantro_ctx *ctx, + const struct v4l2_ctrl_vp9_frame *dec_params) +{ + int bytes_per_pixel = dec_params->bit_depth == 8 ? 1 : 2; + + return ctx->src_fmt.width * ctx->src_fmt.height * bytes_per_pixel; +} + +static size_t mv_offset(const struct hantro_ctx *ctx, + const struct v4l2_ctrl_vp9_frame *dec_params) +{ + size_t cr_offset = chroma_offset(ctx, dec_params); + + return ALIGN((cr_offset * 3) / 2, G2_ALIGN); +} + +static struct hantro_decoded_buffer * +get_ref_buf(struct hantro_ctx *ctx, struct vb2_v4l2_buffer *dst, u64 timestamp) +{ + struct v4l2_m2m_ctx *m2m_ctx = ctx->fh.m2m_ctx; + struct vb2_queue *cap_q = &m2m_ctx->cap_q_ctx.q; + int buf_idx; + + /* + * If a ref is unused or invalid, address of current destination + * buffer is returned. + */ + buf_idx = vb2_find_timestamp(cap_q, timestamp, 0); + if (buf_idx < 0) + return vb2_to_hantro_decoded_buf(&dst->vb2_buf); + + return vb2_to_hantro_decoded_buf(vb2_get_buffer(cap_q, buf_idx)); +} + +static void update_dec_buf_info(struct hantro_decoded_buffer *buf, + const struct v4l2_ctrl_vp9_frame *dec_params) +{ + buf->vp9.width = dec_params->frame_width_minus_1 + 1; + buf->vp9.height = dec_params->frame_height_minus_1 + 1; + buf->vp9.bit_depth = dec_params->bit_depth; +} + +static void update_ctx_cur_info(struct hantro_vp9_dec_hw_ctx *vp9_ctx, + struct hantro_decoded_buffer *buf, + const struct v4l2_ctrl_vp9_frame *dec_params) +{ + vp9_ctx->cur.valid = true; + vp9_ctx->cur.reference_mode = dec_params->reference_mode; + vp9_ctx->cur.interpolation_filter = dec_params->interpolation_filter; + vp9_ctx->cur.flags = dec_params->flags; + vp9_ctx->cur.timestamp = buf->base.vb.vb2_buf.timestamp; +} + +static void config_output(struct hantro_ctx *ctx, + struct hantro_decoded_buffer *dst, + const struct v4l2_ctrl_vp9_frame *dec_params) +{ + dma_addr_t luma_addr, chroma_addr, mv_addr; + + hantro_reg_write(ctx->dev, &g2_out_dis, 0); + if (!ctx->dev->variant->legacy_regs) + hantro_reg_write(ctx->dev, &g2_output_format, 0); + + luma_addr = hantro_get_dec_buf_addr(ctx, &dst->base.vb.vb2_buf); + hantro_write_addr(ctx->dev, G2_OUT_LUMA_ADDR, luma_addr); + + chroma_addr = luma_addr + chroma_offset(ctx, dec_params); + hantro_write_addr(ctx->dev, G2_OUT_CHROMA_ADDR, chroma_addr); + + mv_addr = luma_addr + mv_offset(ctx, dec_params); + hantro_write_addr(ctx->dev, G2_OUT_MV_ADDR, mv_addr); +} + +struct hantro_vp9_ref_reg { + const struct hantro_reg width; + const struct hantro_reg height; + const struct hantro_reg hor_scale; + const struct hantro_reg ver_scale; + u32 y_base; + u32 c_base; +}; + +static void config_ref(struct hantro_ctx *ctx, + struct hantro_decoded_buffer *dst, + const struct hantro_vp9_ref_reg *ref_reg, + const struct v4l2_ctrl_vp9_frame *dec_params, + u64 ref_ts) +{ + struct hantro_decoded_buffer *buf; + dma_addr_t luma_addr, chroma_addr; + u32 refw, refh; + + buf = get_ref_buf(ctx, &dst->base.vb, ref_ts); + refw = buf->vp9.width; + refh = buf->vp9.height; + + hantro_reg_write(ctx->dev, &ref_reg->width, refw); + hantro_reg_write(ctx->dev, &ref_reg->height, refh); + + hantro_reg_write(ctx->dev, &ref_reg->hor_scale, (refw << 14) / dst->vp9.width); + hantro_reg_write(ctx->dev, &ref_reg->ver_scale, (refh << 14) / dst->vp9.height); + + luma_addr = hantro_get_dec_buf_addr(ctx, &buf->base.vb.vb2_buf); + hantro_write_addr(ctx->dev, ref_reg->y_base, luma_addr); + + chroma_addr = luma_addr + chroma_offset(ctx, dec_params); + hantro_write_addr(ctx->dev, ref_reg->c_base, chroma_addr); +} + +static void config_ref_registers(struct hantro_ctx *ctx, + const struct v4l2_ctrl_vp9_frame *dec_params, + struct hantro_decoded_buffer *dst, + struct hantro_decoded_buffer *mv_ref) +{ + static const struct hantro_vp9_ref_reg ref_regs[] = { + { + /* Last */ + .width = vp9_lref_width, + .height = vp9_lref_height, + .hor_scale = vp9_lref_hor_scale, + .ver_scale = vp9_lref_ver_scale, + .y_base = G2_REF_LUMA_ADDR(0), + .c_base = G2_REF_CHROMA_ADDR(0), + }, { + /* Golden */ + .width = vp9_gref_width, + .height = vp9_gref_height, + .hor_scale = vp9_gref_hor_scale, + .ver_scale = vp9_gref_ver_scale, + .y_base = G2_REF_LUMA_ADDR(4), + .c_base = G2_REF_CHROMA_ADDR(4), + }, { + /* Altref */ + .width = vp9_aref_width, + .height = vp9_aref_height, + .hor_scale = vp9_aref_hor_scale, + .ver_scale = vp9_aref_ver_scale, + .y_base = G2_REF_LUMA_ADDR(5), + .c_base = G2_REF_CHROMA_ADDR(5), + }, + }; + dma_addr_t mv_addr; + + config_ref(ctx, dst, &ref_regs[0], dec_params, dec_params->last_frame_ts); + config_ref(ctx, dst, &ref_regs[1], dec_params, dec_params->golden_frame_ts); + config_ref(ctx, dst, &ref_regs[2], dec_params, dec_params->alt_frame_ts); + + mv_addr = hantro_get_dec_buf_addr(ctx, &mv_ref->base.vb.vb2_buf) + + mv_offset(ctx, dec_params); + hantro_write_addr(ctx->dev, G2_REF_MV_ADDR(0), mv_addr); + + hantro_reg_write(ctx->dev, &vp9_last_sign_bias, + dec_params->ref_frame_sign_bias & V4L2_VP9_SIGN_BIAS_LAST ? 1 : 0); + + hantro_reg_write(ctx->dev, &vp9_gref_sign_bias, + dec_params->ref_frame_sign_bias & V4L2_VP9_SIGN_BIAS_GOLDEN ? 1 : 0); + + hantro_reg_write(ctx->dev, &vp9_aref_sign_bias, + dec_params->ref_frame_sign_bias & V4L2_VP9_SIGN_BIAS_ALT ? 1 : 0); +} + +static void recompute_tile_info(unsigned short *tile_info, unsigned int tiles, unsigned int sbs) +{ + int i; + unsigned int accumulated = 0; + unsigned int next_accumulated; + + for (i = 1; i <= tiles; ++i) { + next_accumulated = i * sbs / tiles; + *tile_info++ = next_accumulated - accumulated; + accumulated = next_accumulated; + } +} + +static void +recompute_tile_rc_info(struct hantro_ctx *ctx, + unsigned int tile_r, unsigned int tile_c, + unsigned int sbs_r, unsigned int sbs_c) +{ + struct hantro_vp9_dec_hw_ctx *vp9_ctx = &ctx->vp9_dec; + + recompute_tile_info(vp9_ctx->tile_r_info, tile_r, sbs_r); + recompute_tile_info(vp9_ctx->tile_c_info, tile_c, sbs_c); + + vp9_ctx->last_tile_r = tile_r; + vp9_ctx->last_tile_c = tile_c; + vp9_ctx->last_sbs_r = sbs_r; + vp9_ctx->last_sbs_c = sbs_c; +} + +static inline unsigned int first_tile_row(unsigned int tile_r, unsigned int sbs_r) +{ + if (tile_r == sbs_r + 1) + return 1; + + if (tile_r == sbs_r + 2) + return 2; + + return 0; +} + +static void +fill_tile_info(struct hantro_ctx *ctx, + unsigned int tile_r, unsigned int tile_c, + unsigned int sbs_r, unsigned int sbs_c, + unsigned short *tile_mem) +{ + struct hantro_vp9_dec_hw_ctx *vp9_ctx = &ctx->vp9_dec; + unsigned int i, j; + bool first = true; + + for (i = first_tile_row(tile_r, sbs_r); i < tile_r; ++i) { + unsigned short r_info = vp9_ctx->tile_r_info[i]; + + if (first) { + if (i > 0) + r_info += vp9_ctx->tile_r_info[0]; + if (i == 2) + r_info += vp9_ctx->tile_r_info[1]; + first = false; + } + for (j = 0; j < tile_c; ++j) { + *tile_mem++ = vp9_ctx->tile_c_info[j]; + *tile_mem++ = r_info; + } + } +} + +static void +config_tiles(struct hantro_ctx *ctx, + const struct v4l2_ctrl_vp9_frame *dec_params, + struct hantro_decoded_buffer *dst) +{ + struct hantro_vp9_dec_hw_ctx *vp9_ctx = &ctx->vp9_dec; + struct hantro_aux_buf *misc = &vp9_ctx->misc; + struct hantro_aux_buf *tile_edge = &vp9_ctx->tile_edge; + dma_addr_t addr; + unsigned short *tile_mem; + unsigned int rows, cols; + + addr = misc->dma + vp9_ctx->tile_info_offset; + hantro_write_addr(ctx->dev, G2_TILE_SIZES_ADDR, addr); + + tile_mem = misc->cpu + vp9_ctx->tile_info_offset; + if (dec_params->tile_cols_log2 || dec_params->tile_rows_log2) { + unsigned int tile_r = (1 << dec_params->tile_rows_log2); + unsigned int tile_c = (1 << dec_params->tile_cols_log2); + unsigned int sbs_r = hantro_vp9_num_sbs(dst->vp9.height); + unsigned int sbs_c = hantro_vp9_num_sbs(dst->vp9.width); + + if (tile_r != vp9_ctx->last_tile_r || tile_c != vp9_ctx->last_tile_c || + sbs_r != vp9_ctx->last_sbs_r || sbs_c != vp9_ctx->last_sbs_c) + recompute_tile_rc_info(ctx, tile_r, tile_c, sbs_r, sbs_c); + + fill_tile_info(ctx, tile_r, tile_c, sbs_r, sbs_c, tile_mem); + + cols = tile_c; + rows = tile_r; + hantro_reg_write(ctx->dev, &g2_tile_e, 1); + } else { + tile_mem[0] = hantro_vp9_num_sbs(dst->vp9.width); + tile_mem[1] = hantro_vp9_num_sbs(dst->vp9.height); + + cols = 1; + rows = 1; + hantro_reg_write(ctx->dev, &g2_tile_e, 0); + } + + if (ctx->dev->variant->legacy_regs) { + hantro_reg_write(ctx->dev, &g2_num_tile_cols_old, cols); + hantro_reg_write(ctx->dev, &g2_num_tile_rows_old, rows); + } else { + hantro_reg_write(ctx->dev, &g2_num_tile_cols, cols); + hantro_reg_write(ctx->dev, &g2_num_tile_rows, rows); + } + + /* provide aux buffers even if no tiles are used */ + addr = tile_edge->dma; + hantro_write_addr(ctx->dev, G2_TILE_FILTER_ADDR, addr); + + addr = tile_edge->dma + vp9_ctx->bsd_ctrl_offset; + hantro_write_addr(ctx->dev, G2_TILE_BSD_ADDR, addr); +} + +static void +update_feat_and_flag(struct hantro_vp9_dec_hw_ctx *vp9_ctx, + const struct v4l2_vp9_segmentation *seg, + unsigned int feature, + unsigned int segid) +{ + u8 mask = V4L2_VP9_SEGMENT_FEATURE_ENABLED(feature); + + vp9_ctx->feature_data[segid][feature] = seg->feature_data[segid][feature]; + vp9_ctx->feature_enabled[segid] &= ~mask; + vp9_ctx->feature_enabled[segid] |= (seg->feature_enabled[segid] & mask); +} + +static inline s16 clip3(s16 x, s16 y, s16 z) +{ + return (z < x) ? x : (z > y) ? y : z; +} + +static s16 feat_val_clip3(s16 feat_val, s16 feature_data, bool absolute, u8 clip) +{ + if (absolute) + return feature_data; + + return clip3(0, 255, feat_val + feature_data); +} + +static void config_segment(struct hantro_ctx *ctx, const struct v4l2_ctrl_vp9_frame *dec_params) +{ + struct hantro_vp9_dec_hw_ctx *vp9_ctx = &ctx->vp9_dec; + const struct v4l2_vp9_segmentation *seg; + s16 feat_val; + unsigned char feat_id; + unsigned int segid; + bool segment_enabled, absolute, update_data; + + static const struct hantro_reg seg_regs[8][V4L2_VP9_SEG_LVL_MAX] = { + { vp9_quant_seg0, vp9_filt_level_seg0, vp9_refpic_seg0, vp9_skip_seg0 }, + { vp9_quant_seg1, vp9_filt_level_seg1, vp9_refpic_seg1, vp9_skip_seg1 }, + { vp9_quant_seg2, vp9_filt_level_seg2, vp9_refpic_seg2, vp9_skip_seg2 }, + { vp9_quant_seg3, vp9_filt_level_seg3, vp9_refpic_seg3, vp9_skip_seg3 }, + { vp9_quant_seg4, vp9_filt_level_seg4, vp9_refpic_seg4, vp9_skip_seg4 }, + { vp9_quant_seg5, vp9_filt_level_seg5, vp9_refpic_seg5, vp9_skip_seg5 }, + { vp9_quant_seg6, vp9_filt_level_seg6, vp9_refpic_seg6, vp9_skip_seg6 }, + { vp9_quant_seg7, vp9_filt_level_seg7, vp9_refpic_seg7, vp9_skip_seg7 }, + }; + + segment_enabled = !!(dec_params->seg.flags & V4L2_VP9_SEGMENTATION_FLAG_ENABLED); + hantro_reg_write(ctx->dev, &vp9_segment_e, segment_enabled); + hantro_reg_write(ctx->dev, &vp9_segment_upd_e, + !!(dec_params->seg.flags & V4L2_VP9_SEGMENTATION_FLAG_UPDATE_MAP)); + hantro_reg_write(ctx->dev, &vp9_segment_temp_upd_e, + !!(dec_params->seg.flags & V4L2_VP9_SEGMENTATION_FLAG_TEMPORAL_UPDATE)); + + seg = &dec_params->seg; + absolute = !!(seg->flags & V4L2_VP9_SEGMENTATION_FLAG_ABS_OR_DELTA_UPDATE); + update_data = !!(seg->flags & V4L2_VP9_SEGMENTATION_FLAG_UPDATE_DATA); + + for (segid = 0; segid < 8; ++segid) { + /* Quantizer segment feature */ + feat_id = V4L2_VP9_SEG_LVL_ALT_Q; + feat_val = dec_params->quant.base_q_idx; + if (segment_enabled) { + if (update_data) + update_feat_and_flag(vp9_ctx, seg, feat_id, segid); + if (v4l2_vp9_seg_feat_enabled(vp9_ctx->feature_enabled, feat_id, segid)) + feat_val = feat_val_clip3(feat_val, + vp9_ctx->feature_data[segid][feat_id], + absolute, 255); + } + hantro_reg_write(ctx->dev, &seg_regs[segid][feat_id], feat_val); + + /* Loop filter segment feature */ + feat_id = V4L2_VP9_SEG_LVL_ALT_L; + feat_val = dec_params->lf.level; + if (segment_enabled) { + if (update_data) + update_feat_and_flag(vp9_ctx, seg, feat_id, segid); + if (v4l2_vp9_seg_feat_enabled(vp9_ctx->feature_enabled, feat_id, segid)) + feat_val = feat_val_clip3(feat_val, + vp9_ctx->feature_data[segid][feat_id], + absolute, 63); + } + hantro_reg_write(ctx->dev, &seg_regs[segid][feat_id], feat_val); + + /* Reference frame segment feature */ + feat_id = V4L2_VP9_SEG_LVL_REF_FRAME; + feat_val = 0; + if (segment_enabled) { + if (update_data) + update_feat_and_flag(vp9_ctx, seg, feat_id, segid); + if (!(dec_params->flags & V4L2_VP9_FRAME_FLAG_KEY_FRAME) && + v4l2_vp9_seg_feat_enabled(vp9_ctx->feature_enabled, feat_id, segid)) + feat_val = vp9_ctx->feature_data[segid][feat_id] + 1; + } + hantro_reg_write(ctx->dev, &seg_regs[segid][feat_id], feat_val); + + /* Skip segment feature */ + feat_id = V4L2_VP9_SEG_LVL_SKIP; + feat_val = 0; + if (segment_enabled) { + if (update_data) + update_feat_and_flag(vp9_ctx, seg, feat_id, segid); + feat_val = v4l2_vp9_seg_feat_enabled(vp9_ctx->feature_enabled, + feat_id, segid) ? 1 : 0; + } + hantro_reg_write(ctx->dev, &seg_regs[segid][feat_id], feat_val); + } +} + +static void config_loop_filter(struct hantro_ctx *ctx, const struct v4l2_ctrl_vp9_frame *dec_params) +{ + bool d = dec_params->lf.flags & V4L2_VP9_LOOP_FILTER_FLAG_DELTA_ENABLED; + + hantro_reg_write(ctx->dev, &vp9_filt_level, dec_params->lf.level); + hantro_reg_write(ctx->dev, &g2_out_filtering_dis, dec_params->lf.level == 0); + hantro_reg_write(ctx->dev, &vp9_filt_sharpness, dec_params->lf.sharpness); + + hantro_reg_write(ctx->dev, &vp9_filt_ref_adj_0, d ? dec_params->lf.ref_deltas[0] : 0); + hantro_reg_write(ctx->dev, &vp9_filt_ref_adj_1, d ? dec_params->lf.ref_deltas[1] : 0); + hantro_reg_write(ctx->dev, &vp9_filt_ref_adj_2, d ? dec_params->lf.ref_deltas[2] : 0); + hantro_reg_write(ctx->dev, &vp9_filt_ref_adj_3, d ? dec_params->lf.ref_deltas[3] : 0); + hantro_reg_write(ctx->dev, &vp9_filt_mb_adj_0, d ? dec_params->lf.mode_deltas[0] : 0); + hantro_reg_write(ctx->dev, &vp9_filt_mb_adj_1, d ? dec_params->lf.mode_deltas[1] : 0); +} + +static void config_picture_dimensions(struct hantro_ctx *ctx, struct hantro_decoded_buffer *dst) +{ + u32 pic_w_4x4, pic_h_4x4; + + hantro_reg_write(ctx->dev, &g2_pic_width_in_cbs, (dst->vp9.width + 7) / 8); + hantro_reg_write(ctx->dev, &g2_pic_height_in_cbs, (dst->vp9.height + 7) / 8); + pic_w_4x4 = roundup(dst->vp9.width, 8) >> 2; + pic_h_4x4 = roundup(dst->vp9.height, 8) >> 2; + hantro_reg_write(ctx->dev, &g2_pic_width_4x4, pic_w_4x4); + hantro_reg_write(ctx->dev, &g2_pic_height_4x4, pic_h_4x4); +} + +static void +config_bit_depth(struct hantro_ctx *ctx, const struct v4l2_ctrl_vp9_frame *dec_params) +{ + if (ctx->dev->variant->legacy_regs) { + u8 pp_shift = 0; + + hantro_reg_write(ctx->dev, &g2_bit_depth_y, dec_params->bit_depth); + hantro_reg_write(ctx->dev, &g2_bit_depth_c, dec_params->bit_depth); + hantro_reg_write(ctx->dev, &g2_rs_out_bit_depth, dec_params->bit_depth); + + if (dec_params->bit_depth > 8) + pp_shift = 16 - dec_params->bit_depth; + + hantro_reg_write(ctx->dev, &g2_pp_pix_shift, pp_shift); + hantro_reg_write(ctx->dev, &g2_pix_shift, 0); + } else { + hantro_reg_write(ctx->dev, &g2_bit_depth_y_minus8, dec_params->bit_depth - 8); + hantro_reg_write(ctx->dev, &g2_bit_depth_c_minus8, dec_params->bit_depth - 8); + } +} + +static inline bool is_lossless(const struct v4l2_vp9_quantization *quant) +{ + return quant->base_q_idx == 0 && quant->delta_q_uv_ac == 0 && + quant->delta_q_uv_dc == 0 && quant->delta_q_y_dc == 0; +} + +static void +config_quant(struct hantro_ctx *ctx, const struct v4l2_ctrl_vp9_frame *dec_params) +{ + hantro_reg_write(ctx->dev, &vp9_qp_delta_y_dc, dec_params->quant.delta_q_y_dc); + hantro_reg_write(ctx->dev, &vp9_qp_delta_ch_dc, dec_params->quant.delta_q_uv_dc); + hantro_reg_write(ctx->dev, &vp9_qp_delta_ch_ac, dec_params->quant.delta_q_uv_ac); + hantro_reg_write(ctx->dev, &vp9_lossless_e, is_lossless(&dec_params->quant)); +} + +static u32 +hantro_interp_filter_from_v4l2(unsigned int interpolation_filter) +{ + switch (interpolation_filter) { + case V4L2_VP9_INTERP_FILTER_EIGHTTAP: + return 0x1; + case V4L2_VP9_INTERP_FILTER_EIGHTTAP_SMOOTH: + return 0; + case V4L2_VP9_INTERP_FILTER_EIGHTTAP_SHARP: + return 0x2; + case V4L2_VP9_INTERP_FILTER_BILINEAR: + return 0x3; + case V4L2_VP9_INTERP_FILTER_SWITCHABLE: + return 0x4; + } + + return 0; +} + +static void +config_others(struct hantro_ctx *ctx, const struct v4l2_ctrl_vp9_frame *dec_params, + bool intra_only, bool resolution_change) +{ + struct hantro_vp9_dec_hw_ctx *vp9_ctx = &ctx->vp9_dec; + + hantro_reg_write(ctx->dev, &g2_idr_pic_e, intra_only); + + hantro_reg_write(ctx->dev, &vp9_transform_mode, vp9_ctx->cur.tx_mode); + + hantro_reg_write(ctx->dev, &vp9_mcomp_filt_type, intra_only ? + 0 : hantro_interp_filter_from_v4l2(dec_params->interpolation_filter)); + + hantro_reg_write(ctx->dev, &vp9_high_prec_mv_e, + !!(dec_params->flags & V4L2_VP9_FRAME_FLAG_ALLOW_HIGH_PREC_MV)); + + hantro_reg_write(ctx->dev, &vp9_comp_pred_mode, dec_params->reference_mode); + + hantro_reg_write(ctx->dev, &g2_tempor_mvp_e, + !(dec_params->flags & V4L2_VP9_FRAME_FLAG_ERROR_RESILIENT) && + !(dec_params->flags & V4L2_VP9_FRAME_FLAG_KEY_FRAME) && + !(vp9_ctx->last.flags & V4L2_VP9_FRAME_FLAG_KEY_FRAME) && + !(dec_params->flags & V4L2_VP9_FRAME_FLAG_INTRA_ONLY) && + !resolution_change && + vp9_ctx->last.flags & V4L2_VP9_FRAME_FLAG_SHOW_FRAME + ); + + hantro_reg_write(ctx->dev, &g2_write_mvs_e, + !(dec_params->flags & V4L2_VP9_FRAME_FLAG_KEY_FRAME)); +} + +static void +config_compound_reference(struct hantro_ctx *ctx, + const struct v4l2_ctrl_vp9_frame *dec_params) +{ + u32 comp_fixed_ref, comp_var_ref[2]; + bool last_ref_frame_sign_bias; + bool golden_ref_frame_sign_bias; + bool alt_ref_frame_sign_bias; + bool comp_ref_allowed = 0; + + comp_fixed_ref = 0; + comp_var_ref[0] = 0; + comp_var_ref[1] = 0; + + last_ref_frame_sign_bias = dec_params->ref_frame_sign_bias & V4L2_VP9_SIGN_BIAS_LAST; + golden_ref_frame_sign_bias = dec_params->ref_frame_sign_bias & V4L2_VP9_SIGN_BIAS_GOLDEN; + alt_ref_frame_sign_bias = dec_params->ref_frame_sign_bias & V4L2_VP9_SIGN_BIAS_ALT; + + /* 6.3.12 Frame reference mode syntax */ + comp_ref_allowed |= golden_ref_frame_sign_bias != last_ref_frame_sign_bias; + comp_ref_allowed |= alt_ref_frame_sign_bias != last_ref_frame_sign_bias; + + if (comp_ref_allowed) { + if (last_ref_frame_sign_bias == + golden_ref_frame_sign_bias) { + comp_fixed_ref = ALTREF_FRAME; + comp_var_ref[0] = LAST_FRAME; + comp_var_ref[1] = GOLDEN_FRAME; + } else if (last_ref_frame_sign_bias == + alt_ref_frame_sign_bias) { + comp_fixed_ref = GOLDEN_FRAME; + comp_var_ref[0] = LAST_FRAME; + comp_var_ref[1] = ALTREF_FRAME; + } else { + comp_fixed_ref = LAST_FRAME; + comp_var_ref[0] = GOLDEN_FRAME; + comp_var_ref[1] = ALTREF_FRAME; + } + } + + hantro_reg_write(ctx->dev, &vp9_comp_pred_fixed_ref, comp_fixed_ref); + hantro_reg_write(ctx->dev, &vp9_comp_pred_var_ref0, comp_var_ref[0]); + hantro_reg_write(ctx->dev, &vp9_comp_pred_var_ref1, comp_var_ref[1]); +} + +#define INNER_LOOP \ +do { \ + for (m = 0; m < ARRAY_SIZE(adaptive->coef[0][0][0][0]); ++m) { \ + memcpy(adaptive->coef[i][j][k][l][m], \ + probs->coef[i][j][k][l][m], \ + sizeof(probs->coef[i][j][k][l][m])); \ + \ + adaptive->coef[i][j][k][l][m][3] = 0; \ + } \ +} while (0) + +static void config_probs(struct hantro_ctx *ctx, const struct v4l2_ctrl_vp9_frame *dec_params) +{ + struct hantro_vp9_dec_hw_ctx *vp9_ctx = &ctx->vp9_dec; + struct hantro_aux_buf *misc = &vp9_ctx->misc; + struct hantro_g2_all_probs *all_probs = misc->cpu; + struct hantro_g2_probs *adaptive; + struct hantro_g2_mv_probs *mv; + const struct v4l2_vp9_segmentation *seg = &dec_params->seg; + const struct v4l2_vp9_frame_context *probs = &vp9_ctx->probability_tables; + int i, j, k, l, m; + + for (i = 0; i < ARRAY_SIZE(all_probs->kf_y_mode_prob); ++i) + for (j = 0; j < ARRAY_SIZE(all_probs->kf_y_mode_prob[0]); ++j) { + memcpy(all_probs->kf_y_mode_prob[i][j], + v4l2_vp9_kf_y_mode_prob[i][j], + ARRAY_SIZE(all_probs->kf_y_mode_prob[i][j])); + + all_probs->kf_y_mode_prob_tail[i][j][0] = + v4l2_vp9_kf_y_mode_prob[i][j][8]; + } + + memcpy(all_probs->mb_segment_tree_probs, seg->tree_probs, + sizeof(all_probs->mb_segment_tree_probs)); + + memcpy(all_probs->segment_pred_probs, seg->pred_probs, + sizeof(all_probs->segment_pred_probs)); + + for (i = 0; i < ARRAY_SIZE(all_probs->kf_uv_mode_prob); ++i) { + memcpy(all_probs->kf_uv_mode_prob[i], v4l2_vp9_kf_uv_mode_prob[i], + ARRAY_SIZE(all_probs->kf_uv_mode_prob[i])); + + all_probs->kf_uv_mode_prob_tail[i][0] = v4l2_vp9_kf_uv_mode_prob[i][8]; + } + + adaptive = &all_probs->probs; + + for (i = 0; i < ARRAY_SIZE(adaptive->inter_mode); ++i) { + memcpy(adaptive->inter_mode[i], probs->inter_mode[i], + ARRAY_SIZE(probs->inter_mode[i])); + + adaptive->inter_mode[i][3] = 0; + } + + memcpy(adaptive->is_inter, probs->is_inter, sizeof(adaptive->is_inter)); + + for (i = 0; i < ARRAY_SIZE(adaptive->uv_mode); ++i) { + memcpy(adaptive->uv_mode[i], probs->uv_mode[i], + sizeof(adaptive->uv_mode[i])); + adaptive->uv_mode_tail[i][0] = probs->uv_mode[i][8]; + } + + memcpy(adaptive->tx8, probs->tx8, sizeof(adaptive->tx8)); + memcpy(adaptive->tx16, probs->tx16, sizeof(adaptive->tx16)); + memcpy(adaptive->tx32, probs->tx32, sizeof(adaptive->tx32)); + + for (i = 0; i < ARRAY_SIZE(adaptive->y_mode); ++i) { + memcpy(adaptive->y_mode[i], probs->y_mode[i], + ARRAY_SIZE(adaptive->y_mode[i])); + + adaptive->y_mode_tail[i][0] = probs->y_mode[i][8]; + } + + for (i = 0; i < ARRAY_SIZE(adaptive->partition[0]); ++i) { + memcpy(adaptive->partition[0][i], v4l2_vp9_kf_partition_probs[i], + sizeof(v4l2_vp9_kf_partition_probs[i])); + + adaptive->partition[0][i][3] = 0; + } + + for (i = 0; i < ARRAY_SIZE(adaptive->partition[1]); ++i) { + memcpy(adaptive->partition[1][i], probs->partition[i], + sizeof(probs->partition[i])); + + adaptive->partition[1][i][3] = 0; + } + + memcpy(adaptive->interp_filter, probs->interp_filter, + sizeof(adaptive->interp_filter)); + + memcpy(adaptive->comp_mode, probs->comp_mode, sizeof(adaptive->comp_mode)); + + memcpy(adaptive->skip, probs->skip, sizeof(adaptive->skip)); + + mv = &adaptive->mv; + + memcpy(mv->joint, probs->mv.joint, sizeof(mv->joint)); + memcpy(mv->sign, probs->mv.sign, sizeof(mv->sign)); + memcpy(mv->class0_bit, probs->mv.class0_bit, sizeof(mv->class0_bit)); + memcpy(mv->fr, probs->mv.fr, sizeof(mv->fr)); + memcpy(mv->class0_hp, probs->mv.class0_hp, sizeof(mv->class0_hp)); + memcpy(mv->hp, probs->mv.hp, sizeof(mv->hp)); + memcpy(mv->classes, probs->mv.classes, sizeof(mv->classes)); + memcpy(mv->class0_fr, probs->mv.class0_fr, sizeof(mv->class0_fr)); + memcpy(mv->bits, probs->mv.bits, sizeof(mv->bits)); + + memcpy(adaptive->single_ref, probs->single_ref, sizeof(adaptive->single_ref)); + + memcpy(adaptive->comp_ref, probs->comp_ref, sizeof(adaptive->comp_ref)); + + for (i = 0; i < ARRAY_SIZE(adaptive->coef); ++i) + for (j = 0; j < ARRAY_SIZE(adaptive->coef[0]); ++j) + for (k = 0; k < ARRAY_SIZE(adaptive->coef[0][0]); ++k) + for (l = 0; l < ARRAY_SIZE(adaptive->coef[0][0][0]); ++l) + INNER_LOOP; + + hantro_write_addr(ctx->dev, G2_VP9_PROBS_ADDR, misc->dma); +} + +static void config_counts(struct hantro_ctx *ctx) +{ + struct hantro_vp9_dec_hw_ctx *vp9_dec = &ctx->vp9_dec; + struct hantro_aux_buf *misc = &vp9_dec->misc; + dma_addr_t addr = misc->dma + vp9_dec->ctx_counters_offset; + + hantro_write_addr(ctx->dev, G2_VP9_CTX_COUNT_ADDR, addr); +} + +static void config_seg_map(struct hantro_ctx *ctx, + const struct v4l2_ctrl_vp9_frame *dec_params, + bool intra_only, bool update_map) +{ + struct hantro_vp9_dec_hw_ctx *vp9_ctx = &ctx->vp9_dec; + struct hantro_aux_buf *segment_map = &vp9_ctx->segment_map; + dma_addr_t addr; + + if (intra_only || + (dec_params->flags & V4L2_VP9_FRAME_FLAG_ERROR_RESILIENT)) { + memset(segment_map->cpu, 0, segment_map->size); + memset(vp9_ctx->feature_data, 0, sizeof(vp9_ctx->feature_data)); + memset(vp9_ctx->feature_enabled, 0, sizeof(vp9_ctx->feature_enabled)); + } + + addr = segment_map->dma + vp9_ctx->active_segment * vp9_ctx->segment_map_size; + hantro_write_addr(ctx->dev, G2_VP9_SEGMENT_READ_ADDR, addr); + + addr = segment_map->dma + (1 - vp9_ctx->active_segment) * vp9_ctx->segment_map_size; + hantro_write_addr(ctx->dev, G2_VP9_SEGMENT_WRITE_ADDR, addr); + + if (update_map) + vp9_ctx->active_segment = 1 - vp9_ctx->active_segment; +} + +static void +config_source(struct hantro_ctx *ctx, const struct v4l2_ctrl_vp9_frame *dec_params, + struct vb2_v4l2_buffer *vb2_src) +{ + dma_addr_t stream_base, tmp_addr; + unsigned int headres_size; + u32 src_len, start_bit, src_buf_len; + + headres_size = dec_params->uncompressed_header_size + + dec_params->compressed_header_size; + + stream_base = vb2_dma_contig_plane_dma_addr(&vb2_src->vb2_buf, 0); + + tmp_addr = stream_base + headres_size; + if (ctx->dev->variant->legacy_regs) + hantro_write_addr(ctx->dev, G2_STREAM_ADDR, (tmp_addr & ~0xf)); + else + hantro_write_addr(ctx->dev, G2_STREAM_ADDR, stream_base); + + start_bit = (tmp_addr & 0xf) * 8; + hantro_reg_write(ctx->dev, &g2_start_bit, start_bit); + + src_len = vb2_get_plane_payload(&vb2_src->vb2_buf, 0); + src_len += start_bit / 8 - headres_size; + hantro_reg_write(ctx->dev, &g2_stream_len, src_len); + + if (!ctx->dev->variant->legacy_regs) { + tmp_addr &= ~0xf; + hantro_reg_write(ctx->dev, &g2_strm_start_offset, tmp_addr - stream_base); + src_buf_len = vb2_plane_size(&vb2_src->vb2_buf, 0); + hantro_reg_write(ctx->dev, &g2_strm_buffer_len, src_buf_len); + } +} + +static void +config_registers(struct hantro_ctx *ctx, const struct v4l2_ctrl_vp9_frame *dec_params, + struct vb2_v4l2_buffer *vb2_src, struct vb2_v4l2_buffer *vb2_dst) +{ + struct hantro_decoded_buffer *dst, *last, *mv_ref; + struct hantro_vp9_dec_hw_ctx *vp9_ctx = &ctx->vp9_dec; + const struct v4l2_vp9_segmentation *seg; + bool intra_only, resolution_change; + + /* vp9 stuff */ + dst = vb2_to_hantro_decoded_buf(&vb2_dst->vb2_buf); + + if (vp9_ctx->last.valid) + last = get_ref_buf(ctx, &dst->base.vb, vp9_ctx->last.timestamp); + else + last = dst; + + update_dec_buf_info(dst, dec_params); + update_ctx_cur_info(vp9_ctx, dst, dec_params); + seg = &dec_params->seg; + + intra_only = !!(dec_params->flags & + (V4L2_VP9_FRAME_FLAG_KEY_FRAME | + V4L2_VP9_FRAME_FLAG_INTRA_ONLY)); + + if (!intra_only && + !(dec_params->flags & V4L2_VP9_FRAME_FLAG_ERROR_RESILIENT) && + vp9_ctx->last.valid) + mv_ref = last; + else + mv_ref = dst; + + resolution_change = dst->vp9.width != last->vp9.width || + dst->vp9.height != last->vp9.height; + + /* configure basic registers */ + hantro_reg_write(ctx->dev, &g2_mode, VP9_DEC_MODE); + if (!ctx->dev->variant->legacy_regs) { + hantro_reg_write(ctx->dev, &g2_strm_swap, 0xf); + hantro_reg_write(ctx->dev, &g2_dirmv_swap, 0xf); + hantro_reg_write(ctx->dev, &g2_compress_swap, 0xf); + hantro_reg_write(ctx->dev, &g2_ref_compress_bypass, 1); + } else { + hantro_reg_write(ctx->dev, &g2_strm_swap_old, 0x1f); + hantro_reg_write(ctx->dev, &g2_pic_swap, 0x10); + hantro_reg_write(ctx->dev, &g2_dirmv_swap_old, 0x10); + hantro_reg_write(ctx->dev, &g2_tab0_swap_old, 0x10); + hantro_reg_write(ctx->dev, &g2_tab1_swap_old, 0x10); + hantro_reg_write(ctx->dev, &g2_tab2_swap_old, 0x10); + hantro_reg_write(ctx->dev, &g2_tab3_swap_old, 0x10); + hantro_reg_write(ctx->dev, &g2_rscan_swap, 0x10); + } + hantro_reg_write(ctx->dev, &g2_buswidth, BUS_WIDTH_128); + hantro_reg_write(ctx->dev, &g2_max_burst, 16); + hantro_reg_write(ctx->dev, &g2_apf_threshold, 8); + hantro_reg_write(ctx->dev, &g2_clk_gate_e, 1); + hantro_reg_write(ctx->dev, &g2_max_cb_size, 6); + hantro_reg_write(ctx->dev, &g2_min_cb_size, 3); + if (ctx->dev->variant->double_buffer) + hantro_reg_write(ctx->dev, &g2_double_buffer_e, 1); + + config_output(ctx, dst, dec_params); + + if (!intra_only) + config_ref_registers(ctx, dec_params, dst, mv_ref); + + config_tiles(ctx, dec_params, dst); + config_segment(ctx, dec_params); + config_loop_filter(ctx, dec_params); + config_picture_dimensions(ctx, dst); + config_bit_depth(ctx, dec_params); + config_quant(ctx, dec_params); + config_others(ctx, dec_params, intra_only, resolution_change); + config_compound_reference(ctx, dec_params); + config_probs(ctx, dec_params); + config_counts(ctx); + config_seg_map(ctx, dec_params, intra_only, + seg->flags & V4L2_VP9_SEGMENTATION_FLAG_UPDATE_MAP); + config_source(ctx, dec_params, vb2_src); +} + +int hantro_g2_vp9_dec_run(struct hantro_ctx *ctx) +{ + const struct v4l2_ctrl_vp9_frame *decode_params; + struct vb2_v4l2_buffer *src; + struct vb2_v4l2_buffer *dst; + int ret; + + hantro_g2_check_idle(ctx->dev); + + ret = start_prepare_run(ctx, &decode_params); + if (ret) { + hantro_end_prepare_run(ctx); + return ret; + } + + src = hantro_get_src_buf(ctx); + dst = hantro_get_dst_buf(ctx); + + config_registers(ctx, decode_params, src, dst); + + hantro_end_prepare_run(ctx); + + vdpu_write(ctx->dev, G2_REG_INTERRUPT_DEC_E, G2_REG_INTERRUPT); + + return 0; +} + +#define copy_tx_and_skip(p1, p2) \ +do { \ + memcpy((p1)->tx8, (p2)->tx8, sizeof((p1)->tx8)); \ + memcpy((p1)->tx16, (p2)->tx16, sizeof((p1)->tx16)); \ + memcpy((p1)->tx32, (p2)->tx32, sizeof((p1)->tx32)); \ + memcpy((p1)->skip, (p2)->skip, sizeof((p1)->skip)); \ +} while (0) + +void hantro_g2_vp9_dec_done(struct hantro_ctx *ctx) +{ + struct hantro_vp9_dec_hw_ctx *vp9_ctx = &ctx->vp9_dec; + unsigned int fctx_idx; + + if (!(vp9_ctx->cur.flags & V4L2_VP9_FRAME_FLAG_REFRESH_FRAME_CTX)) + goto out_update_last; + + fctx_idx = vp9_ctx->cur.frame_context_idx; + + if (!(vp9_ctx->cur.flags & V4L2_VP9_FRAME_FLAG_PARALLEL_DEC_MODE)) { + /* error_resilient_mode == 0 && frame_parallel_decoding_mode == 0 */ + struct v4l2_vp9_frame_context *probs = &vp9_ctx->probability_tables; + bool frame_is_intra = vp9_ctx->cur.flags & + (V4L2_VP9_FRAME_FLAG_KEY_FRAME | V4L2_VP9_FRAME_FLAG_INTRA_ONLY); + struct tx_and_skip { + u8 tx8[2][1]; + u8 tx16[2][2]; + u8 tx32[2][3]; + u8 skip[3]; + } _tx_skip, *tx_skip = &_tx_skip; + struct v4l2_vp9_frame_symbol_counts *counts; + struct symbol_counts *hantro_cnts; + u32 tx16p[2][4]; + int i; + + /* buffer the forward-updated TX and skip probs */ + if (frame_is_intra) + copy_tx_and_skip(tx_skip, probs); + + /* 6.1.2 refresh_probs(): load_probs() and load_probs2() */ + *probs = vp9_ctx->frame_context[fctx_idx]; + + /* if FrameIsIntra then undo the effect of load_probs2() */ + if (frame_is_intra) + copy_tx_and_skip(probs, tx_skip); + + counts = &vp9_ctx->cnts; + hantro_cnts = vp9_ctx->misc.cpu + vp9_ctx->ctx_counters_offset; + for (i = 0; i < ARRAY_SIZE(tx16p); ++i) { + memcpy(tx16p[i], + hantro_cnts->tx16x16_count[i], + sizeof(hantro_cnts->tx16x16_count[0])); + tx16p[i][3] = 0; + } + counts->tx16p = &tx16p; + + v4l2_vp9_adapt_coef_probs(probs, counts, + !vp9_ctx->last.valid || + vp9_ctx->last.flags & V4L2_VP9_FRAME_FLAG_KEY_FRAME, + frame_is_intra); + + if (!frame_is_intra) { + /* load_probs2() already done */ + u32 mv_mode[7][4]; + + for (i = 0; i < ARRAY_SIZE(mv_mode); ++i) { + mv_mode[i][0] = hantro_cnts->inter_mode_counts[i][1][0]; + mv_mode[i][1] = hantro_cnts->inter_mode_counts[i][2][0]; + mv_mode[i][2] = hantro_cnts->inter_mode_counts[i][0][0]; + mv_mode[i][3] = hantro_cnts->inter_mode_counts[i][2][1]; + } + counts->mv_mode = &mv_mode; + v4l2_vp9_adapt_noncoef_probs(&vp9_ctx->probability_tables, counts, + vp9_ctx->cur.reference_mode, + vp9_ctx->cur.interpolation_filter, + vp9_ctx->cur.tx_mode, vp9_ctx->cur.flags); + } + } + + vp9_ctx->frame_context[fctx_idx] = vp9_ctx->probability_tables; + +out_update_last: + vp9_ctx->last = vp9_ctx->cur; +} diff --git a/drivers/staging/media/hantro/hantro_h1_jpeg_enc.c b/drivers/staging/media/hantro/hantro_h1_jpeg_enc.c index 56cf261a8e95..1450013d3685 100644 --- a/drivers/staging/media/hantro/hantro_h1_jpeg_enc.c +++ b/drivers/staging/media/hantro/hantro_h1_jpeg_enc.c @@ -113,9 +113,8 @@ int hantro_h1_jpeg_enc_run(struct hantro_ctx *ctx) hantro_h1_set_src_img_ctrl(vpu, ctx); hantro_h1_jpeg_enc_set_buffers(vpu, ctx, &src_buf->vb2_buf); - hantro_h1_jpeg_enc_set_qtable(vpu, - hantro_jpeg_get_qtable(0), - hantro_jpeg_get_qtable(1)); + hantro_h1_jpeg_enc_set_qtable(vpu, jpeg_ctx.hw_luma_qtable, + jpeg_ctx.hw_chroma_qtable); reg = H1_REG_AXI_CTRL_OUTPUT_SWAP16 | H1_REG_AXI_CTRL_INPUT_SWAP16 @@ -140,7 +139,7 @@ int hantro_h1_jpeg_enc_run(struct hantro_ctx *ctx) return 0; } -void hantro_jpeg_enc_done(struct hantro_ctx *ctx) +void hantro_h1_jpeg_enc_done(struct hantro_ctx *ctx) { struct hantro_dev *vpu = ctx->dev; u32 bytesused = vepu_read(vpu, H1_REG_STR_BUF_LIMIT) / 8; diff --git a/drivers/staging/media/hantro/hantro_hevc.c b/drivers/staging/media/hantro/hantro_hevc.c index ee03123e7704..b49a41d7ae91 100644 --- a/drivers/staging/media/hantro/hantro_hevc.c +++ b/drivers/staging/media/hantro/hantro_hevc.c @@ -44,47 +44,6 @@ size_t hantro_hevc_motion_vectors_offset(const struct v4l2_ctrl_hevc_sps *sps) return ALIGN((cr_offset * 3) / 2, G2_ALIGN); } -static size_t hantro_hevc_mv_size(const struct v4l2_ctrl_hevc_sps *sps) -{ - u32 min_cb_log2_size_y = sps->log2_min_luma_coding_block_size_minus3 + 3; - u32 ctb_log2_size_y = min_cb_log2_size_y + sps->log2_diff_max_min_luma_coding_block_size; - u32 pic_width_in_ctbs_y = (sps->pic_width_in_luma_samples + (1 << ctb_log2_size_y) - 1) - >> ctb_log2_size_y; - u32 pic_height_in_ctbs_y = (sps->pic_height_in_luma_samples + (1 << ctb_log2_size_y) - 1) - >> ctb_log2_size_y; - size_t mv_size; - - mv_size = pic_width_in_ctbs_y * pic_height_in_ctbs_y * - (1 << (2 * (ctb_log2_size_y - 4))) * 16; - - vpu_debug(4, "%dx%d (CTBs) %zu MV bytes\n", - pic_width_in_ctbs_y, pic_height_in_ctbs_y, mv_size); - - return mv_size; -} - -static size_t hantro_hevc_ref_size(struct hantro_ctx *ctx) -{ - const struct hantro_hevc_dec_ctrls *ctrls = &ctx->hevc_dec.ctrls; - const struct v4l2_ctrl_hevc_sps *sps = ctrls->sps; - - return hantro_hevc_motion_vectors_offset(sps) + hantro_hevc_mv_size(sps); -} - -static void hantro_hevc_ref_free(struct hantro_ctx *ctx) -{ - struct hantro_hevc_dec_hw_ctx *hevc_dec = &ctx->hevc_dec; - struct hantro_dev *vpu = ctx->dev; - int i; - - for (i = 0; i < NUM_REF_PICTURES; i++) { - if (hevc_dec->ref_bufs[i].cpu) - dma_free_coherent(vpu->dev, hevc_dec->ref_bufs[i].size, - hevc_dec->ref_bufs[i].cpu, - hevc_dec->ref_bufs[i].dma); - } -} - static void hantro_hevc_ref_init(struct hantro_ctx *ctx) { struct hantro_hevc_dec_hw_ctx *hevc_dec = &ctx->hevc_dec; @@ -108,37 +67,25 @@ dma_addr_t hantro_hevc_get_ref_buf(struct hantro_ctx *ctx, } } - /* Allocate a new reference buffer */ + return 0; +} + +int hantro_hevc_add_ref_buf(struct hantro_ctx *ctx, int poc, dma_addr_t addr) +{ + struct hantro_hevc_dec_hw_ctx *hevc_dec = &ctx->hevc_dec; + int i; + + /* Add a new reference buffer */ for (i = 0; i < NUM_REF_PICTURES; i++) { if (hevc_dec->ref_bufs_poc[i] == UNUSED_REF) { - if (!hevc_dec->ref_bufs[i].cpu) { - struct hantro_dev *vpu = ctx->dev; - - /* - * Allocate the space needed for the raw data + - * motion vector data. Optimizations could be to - * allocate raw data in non coherent memory and only - * clear the motion vector data. - */ - hevc_dec->ref_bufs[i].cpu = - dma_alloc_coherent(vpu->dev, - hantro_hevc_ref_size(ctx), - &hevc_dec->ref_bufs[i].dma, - GFP_KERNEL); - if (!hevc_dec->ref_bufs[i].cpu) - return 0; - - hevc_dec->ref_bufs[i].size = hantro_hevc_ref_size(ctx); - } hevc_dec->ref_bufs_used |= 1 << i; - memset(hevc_dec->ref_bufs[i].cpu, 0, hantro_hevc_ref_size(ctx)); hevc_dec->ref_bufs_poc[i] = poc; - - return hevc_dec->ref_bufs[i].dma; + hevc_dec->ref_bufs[i].dma = addr; + return 0; } } - return 0; + return -EINVAL; } void hantro_hevc_ref_remove_unused(struct hantro_ctx *ctx) @@ -314,8 +261,6 @@ void hantro_hevc_dec_exit(struct hantro_ctx *ctx) hevc_dec->tile_bsd.cpu, hevc_dec->tile_bsd.dma); hevc_dec->tile_bsd.cpu = NULL; - - hantro_hevc_ref_free(ctx); } int hantro_hevc_dec_init(struct hantro_ctx *ctx) diff --git a/drivers/staging/media/hantro/hantro_hw.h b/drivers/staging/media/hantro/hantro_hw.h index 267a6d33a47b..4a19ae8940b9 100644 --- a/drivers/staging/media/hantro/hantro_hw.h +++ b/drivers/staging/media/hantro/hantro_hw.h @@ -12,6 +12,7 @@ #include <linux/interrupt.h> #include <linux/v4l2-controls.h> #include <media/v4l2-ctrls.h> +#include <media/v4l2-vp9.h> #include <media/videobuf2-core.h> #define DEC_8190_ALIGN_MASK 0x07U @@ -166,6 +167,82 @@ struct hantro_vp8_dec_hw_ctx { }; /** + * struct hantro_vp9_frame_info + * + * @valid: frame info valid flag + * @frame_context_idx: index of frame context + * @reference_mode: inter prediction type + * @tx_mode: transform mode + * @interpolation_filter: filter selection for inter prediction + * @flags: frame flags + * @timestamp: frame timestamp + */ +struct hantro_vp9_frame_info { + u32 valid : 1; + u32 frame_context_idx : 2; + u32 reference_mode : 2; + u32 tx_mode : 3; + u32 interpolation_filter : 3; + u32 flags; + u64 timestamp; +}; + +#define MAX_SB_COLS 64 +#define MAX_SB_ROWS 34 + +/** + * struct hantro_vp9_dec_hw_ctx + * + * @tile_edge: auxiliary DMA buffer for tile edge processing + * @segment_map: auxiliary DMA buffer for segment map + * @misc: auxiliary DMA buffer for tile info, probabilities and hw counters + * @cnts: vp9 library struct for abstracting hw counters access + * @probability_tables: VP9 probability tables implied by the spec + * @frame_context: VP9 frame contexts + * @cur: current frame information + * @last: last frame information + * @bsd_ctrl_offset: bsd offset into tile_edge + * @segment_map_size: size of segment map + * @ctx_counters_offset: hw counters offset into misc + * @tile_info_offset: tile info offset into misc + * @tile_r_info: per-tile information array + * @tile_c_info: per-tile information array + * @last_tile_r: last number of tile rows + * @last_tile_c: last number of tile cols + * @last_sbs_r: last number of superblock rows + * @last_sbs_c: last number of superblock cols + * @active_segment: number of active segment (alternating between 0 and 1) + * @feature_enabled: segmentation feature enabled flags + * @feature_data: segmentation feature data + */ +struct hantro_vp9_dec_hw_ctx { + struct hantro_aux_buf tile_edge; + struct hantro_aux_buf segment_map; + struct hantro_aux_buf misc; + struct v4l2_vp9_frame_symbol_counts cnts; + struct v4l2_vp9_frame_context probability_tables; + struct v4l2_vp9_frame_context frame_context[4]; + struct hantro_vp9_frame_info cur; + struct hantro_vp9_frame_info last; + + unsigned int bsd_ctrl_offset; + unsigned int segment_map_size; + unsigned int ctx_counters_offset; + unsigned int tile_info_offset; + + unsigned short tile_r_info[MAX_SB_ROWS]; + unsigned short tile_c_info[MAX_SB_COLS]; + unsigned int last_tile_r; + unsigned int last_tile_c; + unsigned int last_sbs_r; + unsigned int last_sbs_c; + + unsigned int active_segment; + u8 feature_enabled[8]; + s16 feature_data[8][4]; +}; + +/** * struct hantro_postproc_ctx * * @dec_q: References buffers, in decoder format. @@ -175,6 +252,17 @@ struct hantro_postproc_ctx { }; /** + * struct hantro_postproc_ops - post-processor operations + * + * @enable: Enable the post-processor block. Optional. + * @disable: Disable the post-processor block. Optional. + */ +struct hantro_postproc_ops { + void (*enable)(struct hantro_ctx *ctx); + void (*disable)(struct hantro_ctx *ctx); +}; + +/** * struct hantro_codec_ops - codec mode specific operations * * @init: If needed, can be used for initialization. @@ -220,8 +308,10 @@ extern const struct hantro_variant rk3288_vpu_variant; extern const struct hantro_variant rk3328_vpu_variant; extern const struct hantro_variant rk3399_vpu_variant; extern const struct hantro_variant sama5d4_vdec_variant; +extern const struct hantro_variant sunxi_vpu_variant; -extern const struct hantro_postproc_regs hantro_g1_postproc_regs; +extern const struct hantro_postproc_ops hantro_g1_postproc_ops; +extern const struct hantro_postproc_ops hantro_g2_postproc_ops; extern const u32 hantro_vp8_dec_mc_filter[8][6]; @@ -239,7 +329,8 @@ int hantro_h1_jpeg_enc_run(struct hantro_ctx *ctx); int rockchip_vpu2_jpeg_enc_run(struct hantro_ctx *ctx); int hantro_jpeg_enc_init(struct hantro_ctx *ctx); void hantro_jpeg_enc_exit(struct hantro_ctx *ctx); -void hantro_jpeg_enc_done(struct hantro_ctx *ctx); +void hantro_h1_jpeg_enc_done(struct hantro_ctx *ctx); +void rockchip_vpu2_jpeg_enc_done(struct hantro_ctx *ctx); dma_addr_t hantro_h264_get_ref_buf(struct hantro_ctx *ctx, unsigned int dpb_idx); @@ -256,10 +347,29 @@ void hantro_hevc_dec_exit(struct hantro_ctx *ctx); int hantro_g2_hevc_dec_run(struct hantro_ctx *ctx); int hantro_hevc_dec_prepare_run(struct hantro_ctx *ctx); dma_addr_t hantro_hevc_get_ref_buf(struct hantro_ctx *ctx, int poc); +int hantro_hevc_add_ref_buf(struct hantro_ctx *ctx, int poc, dma_addr_t addr); void hantro_hevc_ref_remove_unused(struct hantro_ctx *ctx); size_t hantro_hevc_chroma_offset(const struct v4l2_ctrl_hevc_sps *sps); size_t hantro_hevc_motion_vectors_offset(const struct v4l2_ctrl_hevc_sps *sps); +static inline unsigned short hantro_vp9_num_sbs(unsigned short dimension) +{ + return (dimension + 63) / 64; +} + +static inline size_t +hantro_vp9_mv_size(unsigned int width, unsigned int height) +{ + int num_ctbs; + + /* + * There can be up to (CTBs x 64) number of blocks, + * and the motion vector for each block needs 16 bytes. + */ + num_ctbs = hantro_vp9_num_sbs(width) * hantro_vp9_num_sbs(height); + return (num_ctbs * 64) * 16; +} + static inline size_t hantro_h264_mv_size(unsigned int width, unsigned int height) { @@ -287,6 +397,16 @@ hantro_h264_mv_size(unsigned int width, unsigned int height) return 64 * MB_WIDTH(width) * MB_WIDTH(height) + 32; } +static inline size_t +hantro_hevc_mv_size(unsigned int width, unsigned int height) +{ + /* + * A CTB can be 64x64, 32x32 or 16x16. + * Allocated memory for the "worse" case: 16x16 + */ + return width * height / 16; +} + int hantro_g1_mpeg2_dec_run(struct hantro_ctx *ctx); int rockchip_vpu2_mpeg2_dec_run(struct hantro_ctx *ctx); void hantro_mpeg2_dec_copy_qtable(u8 *qtable, @@ -301,4 +421,11 @@ void hantro_vp8_dec_exit(struct hantro_ctx *ctx); void hantro_vp8_prob_update(struct hantro_ctx *ctx, const struct v4l2_ctrl_vp8_frame *hdr); +int hantro_g2_vp9_dec_run(struct hantro_ctx *ctx); +void hantro_g2_vp9_dec_done(struct hantro_ctx *ctx); +int hantro_vp9_dec_init(struct hantro_ctx *ctx); +void hantro_vp9_dec_exit(struct hantro_ctx *ctx); +void hantro_g2_check_idle(struct hantro_dev *vpu); +irqreturn_t hantro_g2_irq(int irq, void *dev_id); + #endif /* HANTRO_HW_H_ */ diff --git a/drivers/staging/media/hantro/hantro_jpeg.c b/drivers/staging/media/hantro/hantro_jpeg.c index 36c140fc6a36..df62fbdff7c9 100644 --- a/drivers/staging/media/hantro/hantro_jpeg.c +++ b/drivers/staging/media/hantro/hantro_jpeg.c @@ -36,8 +36,6 @@ static const unsigned char luma_q_table[] = { 0x48, 0x5c, 0x5f, 0x62, 0x70, 0x64, 0x67, 0x63 }; -static unsigned char luma_q_table_reordered[ARRAY_SIZE(luma_q_table)]; - static const unsigned char chroma_q_table[] = { 0x11, 0x12, 0x18, 0x2f, 0x63, 0x63, 0x63, 0x63, 0x12, 0x15, 0x1a, 0x42, 0x63, 0x63, 0x63, 0x63, @@ -49,8 +47,6 @@ static const unsigned char chroma_q_table[] = { 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, 0x63 }; -static unsigned char chroma_q_table_reordered[ARRAY_SIZE(chroma_q_table)]; - static const unsigned char zigzag[64] = { 0, 1, 8, 16, 9, 2, 3, 10, 17, 24, 32, 25, 18, 11, 4, 5, @@ -277,7 +273,7 @@ jpeg_scale_quant_table(unsigned char *file_q_tab, } } -static void jpeg_set_quality(unsigned char *buffer, int quality) +static void jpeg_set_quality(struct hantro_jpeg_ctx *ctx) { int scale; @@ -285,24 +281,15 @@ static void jpeg_set_quality(unsigned char *buffer, int quality) * Non-linear scaling factor: * [5,50] -> [1000..100], [51,100] -> [98..0] */ - if (quality < 50) - scale = 5000 / quality; + if (ctx->quality < 50) + scale = 5000 / ctx->quality; else - scale = 200 - 2 * quality; - - jpeg_scale_quant_table(buffer + LUMA_QUANT_OFF, - luma_q_table_reordered, - luma_q_table, scale); - jpeg_scale_quant_table(buffer + CHROMA_QUANT_OFF, - chroma_q_table_reordered, - chroma_q_table, scale); -} + scale = 200 - 2 * ctx->quality; -unsigned char *hantro_jpeg_get_qtable(int index) -{ - if (index == 0) - return luma_q_table_reordered; - return chroma_q_table_reordered; + jpeg_scale_quant_table(ctx->buffer + LUMA_QUANT_OFF, + ctx->hw_luma_qtable, luma_q_table, scale); + jpeg_scale_quant_table(ctx->buffer + CHROMA_QUANT_OFF, + ctx->hw_chroma_qtable, chroma_q_table, scale); } void hantro_jpeg_header_assemble(struct hantro_jpeg_ctx *ctx) @@ -324,7 +311,7 @@ void hantro_jpeg_header_assemble(struct hantro_jpeg_ctx *ctx) memcpy(buf + HUFF_CHROMA_AC_OFF, chroma_ac_table, sizeof(chroma_ac_table)); - jpeg_set_quality(buf, ctx->quality); + jpeg_set_quality(ctx); } int hantro_jpeg_enc_init(struct hantro_ctx *ctx) diff --git a/drivers/staging/media/hantro/hantro_jpeg.h b/drivers/staging/media/hantro/hantro_jpeg.h index 9474a00277f8..035ab25b803f 100644 --- a/drivers/staging/media/hantro/hantro_jpeg.h +++ b/drivers/staging/media/hantro/hantro_jpeg.h @@ -1,13 +1,15 @@ /* SPDX-License-Identifier: GPL-2.0+ */ #define JPEG_HEADER_SIZE 601 +#define JPEG_QUANT_SIZE 64 struct hantro_jpeg_ctx { int width; int height; int quality; unsigned char *buffer; + unsigned char hw_luma_qtable[JPEG_QUANT_SIZE]; + unsigned char hw_chroma_qtable[JPEG_QUANT_SIZE]; }; -unsigned char *hantro_jpeg_get_qtable(int index); void hantro_jpeg_header_assemble(struct hantro_jpeg_ctx *ctx); diff --git a/drivers/staging/media/hantro/hantro_postproc.c b/drivers/staging/media/hantro/hantro_postproc.c index ed8916c950a4..248abe5423f0 100644 --- a/drivers/staging/media/hantro/hantro_postproc.c +++ b/drivers/staging/media/hantro/hantro_postproc.c @@ -11,18 +11,19 @@ #include "hantro.h" #include "hantro_hw.h" #include "hantro_g1_regs.h" +#include "hantro_g2_regs.h" #define HANTRO_PP_REG_WRITE(vpu, reg_name, val) \ { \ hantro_reg_write(vpu, \ - &(vpu)->variant->postproc_regs->reg_name, \ + &hantro_g1_postproc_regs.reg_name, \ val); \ } #define HANTRO_PP_REG_WRITE_S(vpu, reg_name, val) \ { \ hantro_reg_write_s(vpu, \ - &(vpu)->variant->postproc_regs->reg_name, \ + &hantro_g1_postproc_regs.reg_name, \ val); \ } @@ -33,7 +34,7 @@ #define VPU_PP_OUT_RGB 0x0 #define VPU_PP_OUT_YUYV 0x3 -const struct hantro_postproc_regs hantro_g1_postproc_regs = { +static const struct hantro_postproc_regs hantro_g1_postproc_regs = { .pipeline_en = {G1_REG_PP_INTERRUPT, 1, 0x1}, .max_burst = {G1_REG_PP_DEV_CONFIG, 0, 0x1f}, .clk_gate = {G1_REG_PP_DEV_CONFIG, 1, 0x1}, @@ -53,27 +54,18 @@ const struct hantro_postproc_regs hantro_g1_postproc_regs = { bool hantro_needs_postproc(const struct hantro_ctx *ctx, const struct hantro_fmt *fmt) { - struct hantro_dev *vpu = ctx->dev; - if (ctx->is_encoder) return false; - - if (!vpu->variant->postproc_fmts) - return false; - - return fmt->fourcc != V4L2_PIX_FMT_NV12; + return fmt->postprocessed; } -void hantro_postproc_enable(struct hantro_ctx *ctx) +static void hantro_postproc_g1_enable(struct hantro_ctx *ctx) { struct hantro_dev *vpu = ctx->dev; struct vb2_v4l2_buffer *dst_buf; u32 src_pp_fmt, dst_pp_fmt; dma_addr_t dst_dma; - if (!vpu->variant->postproc_regs) - return; - /* Turn on pipeline mode. Must be done first. */ HANTRO_PP_REG_WRITE_S(vpu, pipeline_en, 0x1); @@ -108,6 +100,21 @@ void hantro_postproc_enable(struct hantro_ctx *ctx) HANTRO_PP_REG_WRITE(vpu, display_width, ctx->dst_fmt.width); } +static void hantro_postproc_g2_enable(struct hantro_ctx *ctx) +{ + struct hantro_dev *vpu = ctx->dev; + struct vb2_v4l2_buffer *dst_buf; + size_t chroma_offset = ctx->dst_fmt.width * ctx->dst_fmt.height; + dma_addr_t dst_dma; + + dst_buf = hantro_get_dst_buf(ctx); + dst_dma = vb2_dma_contig_plane_dma_addr(&dst_buf->vb2_buf, 0); + + hantro_write_addr(vpu, G2_RS_OUT_LUMA_ADDR, dst_dma); + hantro_write_addr(vpu, G2_RS_OUT_CHROMA_ADDR, dst_dma + chroma_offset); + hantro_reg_write(vpu, &g2_out_rs_e, 1); +} + void hantro_postproc_free(struct hantro_ctx *ctx) { struct hantro_dev *vpu = ctx->dev; @@ -132,9 +139,16 @@ int hantro_postproc_alloc(struct hantro_ctx *ctx) unsigned int num_buffers = cap_queue->num_buffers; unsigned int i, buf_size; - buf_size = ctx->dst_fmt.plane_fmt[0].sizeimage + - hantro_h264_mv_size(ctx->dst_fmt.width, - ctx->dst_fmt.height); + buf_size = ctx->dst_fmt.plane_fmt[0].sizeimage; + if (ctx->vpu_src_fmt->fourcc == V4L2_PIX_FMT_H264_SLICE) + buf_size += hantro_h264_mv_size(ctx->dst_fmt.width, + ctx->dst_fmt.height); + else if (ctx->vpu_src_fmt->fourcc == V4L2_PIX_FMT_VP9_FRAME) + buf_size += hantro_vp9_mv_size(ctx->dst_fmt.width, + ctx->dst_fmt.height); + else if (ctx->vpu_src_fmt->fourcc == V4L2_PIX_FMT_HEVC_SLICE) + buf_size += hantro_hevc_mv_size(ctx->dst_fmt.width, + ctx->dst_fmt.height); for (i = 0; i < num_buffers; ++i) { struct hantro_aux_buf *priv = &ctx->postproc.dec_q[i]; @@ -153,12 +167,42 @@ int hantro_postproc_alloc(struct hantro_ctx *ctx) return 0; } +static void hantro_postproc_g1_disable(struct hantro_ctx *ctx) +{ + struct hantro_dev *vpu = ctx->dev; + + HANTRO_PP_REG_WRITE_S(vpu, pipeline_en, 0x0); +} + +static void hantro_postproc_g2_disable(struct hantro_ctx *ctx) +{ + struct hantro_dev *vpu = ctx->dev; + + hantro_reg_write(vpu, &g2_out_rs_e, 0); +} + void hantro_postproc_disable(struct hantro_ctx *ctx) { struct hantro_dev *vpu = ctx->dev; - if (!vpu->variant->postproc_regs) - return; + if (vpu->variant->postproc_ops && vpu->variant->postproc_ops->disable) + vpu->variant->postproc_ops->disable(ctx); +} + +void hantro_postproc_enable(struct hantro_ctx *ctx) +{ + struct hantro_dev *vpu = ctx->dev; - HANTRO_PP_REG_WRITE_S(vpu, pipeline_en, 0x0); + if (vpu->variant->postproc_ops && vpu->variant->postproc_ops->enable) + vpu->variant->postproc_ops->enable(ctx); } + +const struct hantro_postproc_ops hantro_g1_postproc_ops = { + .enable = hantro_postproc_g1_enable, + .disable = hantro_postproc_g1_disable, +}; + +const struct hantro_postproc_ops hantro_g2_postproc_ops = { + .enable = hantro_postproc_g2_enable, + .disable = hantro_postproc_g2_disable, +}; diff --git a/drivers/staging/media/hantro/hantro_v4l2.c b/drivers/staging/media/hantro/hantro_v4l2.c index bcb0bdff4a9a..e595905b3bd7 100644 --- a/drivers/staging/media/hantro/hantro_v4l2.c +++ b/drivers/staging/media/hantro/hantro_v4l2.c @@ -23,8 +23,6 @@ #include <media/v4l2-ctrls.h> #include <media/v4l2-event.h> #include <media/v4l2-mem2mem.h> -#include <media/videobuf2-core.h> -#include <media/videobuf2-dma-sg.h> #include "hantro.h" #include "hantro_hw.h" @@ -285,6 +283,16 @@ static int hantro_try_fmt(const struct hantro_ctx *ctx, pix_mp->plane_fmt[0].sizeimage += hantro_h264_mv_size(pix_mp->width, pix_mp->height); + else if (ctx->vpu_src_fmt->fourcc == V4L2_PIX_FMT_VP9_FRAME && + !hantro_needs_postproc(ctx, fmt)) + pix_mp->plane_fmt[0].sizeimage += + hantro_vp9_mv_size(pix_mp->width, + pix_mp->height); + else if (ctx->vpu_src_fmt->fourcc == V4L2_PIX_FMT_HEVC_SLICE && + !hantro_needs_postproc(ctx, fmt)) + pix_mp->plane_fmt[0].sizeimage += + hantro_hevc_mv_size(pix_mp->width, + pix_mp->height); } else if (!pix_mp->plane_fmt[0].sizeimage) { /* * For coded formats the application can specify @@ -393,6 +401,7 @@ hantro_update_requires_request(struct hantro_ctx *ctx, u32 fourcc) case V4L2_PIX_FMT_VP8_FRAME: case V4L2_PIX_FMT_H264_SLICE: case V4L2_PIX_FMT_HEVC_SLICE: + case V4L2_PIX_FMT_VP9_FRAME: ctx->fh.m2m_ctx->out_q_ctx.q.requires_requests = true; break; default: diff --git a/drivers/staging/media/hantro/hantro_vp9.c b/drivers/staging/media/hantro/hantro_vp9.c new file mode 100644 index 000000000000..566cd376c097 --- /dev/null +++ b/drivers/staging/media/hantro/hantro_vp9.c @@ -0,0 +1,240 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Hantro VP9 codec driver + * + * Copyright (C) 2021 Collabora Ltd. + */ + +#include <linux/types.h> +#include <media/v4l2-mem2mem.h> + +#include "hantro.h" +#include "hantro_hw.h" +#include "hantro_vp9.h" + +#define POW2(x) (1 << (x)) + +#define MAX_LOG2_TILE_COLUMNS 6 +#define MAX_NUM_TILE_COLS POW2(MAX_LOG2_TILE_COLUMNS) +#define MAX_TILE_COLS 20 +#define MAX_TILE_ROWS 22 + +static size_t hantro_vp9_tile_filter_size(unsigned int height) +{ + u32 h, height32, size; + + h = roundup(height, 8); + + height32 = roundup(h, 64); + size = 24 * height32 * (MAX_NUM_TILE_COLS - 1); /* luma: 8, chroma: 8 + 8 */ + + return size; +} + +static size_t hantro_vp9_bsd_control_size(unsigned int height) +{ + u32 h, height32; + + h = roundup(height, 8); + height32 = roundup(h, 64); + + return 16 * (height32 / 4) * (MAX_NUM_TILE_COLS - 1); +} + +static size_t hantro_vp9_segment_map_size(unsigned int width, unsigned int height) +{ + u32 w, h; + int num_ctbs; + + w = roundup(width, 8); + h = roundup(height, 8); + num_ctbs = ((w + 63) / 64) * ((h + 63) / 64); + + return num_ctbs * 32; +} + +static inline size_t hantro_vp9_prob_tab_size(void) +{ + return roundup(sizeof(struct hantro_g2_all_probs), 16); +} + +static inline size_t hantro_vp9_count_tab_size(void) +{ + return roundup(sizeof(struct symbol_counts), 16); +} + +static inline size_t hantro_vp9_tile_info_size(void) +{ + return roundup((MAX_TILE_COLS * MAX_TILE_ROWS * 4 * sizeof(u16) + 15 + 16) & ~0xf, 16); +} + +static void *get_coeffs_arr(struct symbol_counts *cnts, int i, int j, int k, int l, int m) +{ + if (i == 0) + return &cnts->count_coeffs[j][k][l][m]; + + if (i == 1) + return &cnts->count_coeffs8x8[j][k][l][m]; + + if (i == 2) + return &cnts->count_coeffs16x16[j][k][l][m]; + + if (i == 3) + return &cnts->count_coeffs32x32[j][k][l][m]; + + return NULL; +} + +static void *get_eobs1(struct symbol_counts *cnts, int i, int j, int k, int l, int m) +{ + if (i == 0) + return &cnts->count_coeffs[j][k][l][m][3]; + + if (i == 1) + return &cnts->count_coeffs8x8[j][k][l][m][3]; + + if (i == 2) + return &cnts->count_coeffs16x16[j][k][l][m][3]; + + if (i == 3) + return &cnts->count_coeffs32x32[j][k][l][m][3]; + + return NULL; +} + +#define INNER_LOOP \ + do { \ + for (m = 0; m < ARRAY_SIZE(vp9_ctx->cnts.coeff[i][0][0][0]); ++m) { \ + vp9_ctx->cnts.coeff[i][j][k][l][m] = \ + get_coeffs_arr(cnts, i, j, k, l, m); \ + vp9_ctx->cnts.eob[i][j][k][l][m][0] = \ + &cnts->count_eobs[i][j][k][l][m]; \ + vp9_ctx->cnts.eob[i][j][k][l][m][1] = \ + get_eobs1(cnts, i, j, k, l, m); \ + } \ + } while (0) + +static void init_v4l2_vp9_count_tbl(struct hantro_ctx *ctx) +{ + struct hantro_vp9_dec_hw_ctx *vp9_ctx = &ctx->vp9_dec; + struct symbol_counts *cnts = vp9_ctx->misc.cpu + vp9_ctx->ctx_counters_offset; + int i, j, k, l, m; + + vp9_ctx->cnts.partition = &cnts->partition_counts; + vp9_ctx->cnts.skip = &cnts->mbskip_count; + vp9_ctx->cnts.intra_inter = &cnts->intra_inter_count; + vp9_ctx->cnts.tx32p = &cnts->tx32x32_count; + /* + * g2 hardware uses tx16x16_count[2][3], while the api + * expects tx16p[2][4], so this must be explicitly copied + * into vp9_ctx->cnts.tx16p when passing the data to the + * vp9 library function + */ + vp9_ctx->cnts.tx8p = &cnts->tx8x8_count; + + vp9_ctx->cnts.y_mode = &cnts->sb_ymode_counts; + vp9_ctx->cnts.uv_mode = &cnts->uv_mode_counts; + vp9_ctx->cnts.comp = &cnts->comp_inter_count; + vp9_ctx->cnts.comp_ref = &cnts->comp_ref_count; + vp9_ctx->cnts.single_ref = &cnts->single_ref_count; + vp9_ctx->cnts.filter = &cnts->switchable_interp_counts; + vp9_ctx->cnts.mv_joint = &cnts->mv_counts.joints; + vp9_ctx->cnts.sign = &cnts->mv_counts.sign; + vp9_ctx->cnts.classes = &cnts->mv_counts.classes; + vp9_ctx->cnts.class0 = &cnts->mv_counts.class0; + vp9_ctx->cnts.bits = &cnts->mv_counts.bits; + vp9_ctx->cnts.class0_fp = &cnts->mv_counts.class0_fp; + vp9_ctx->cnts.fp = &cnts->mv_counts.fp; + vp9_ctx->cnts.class0_hp = &cnts->mv_counts.class0_hp; + vp9_ctx->cnts.hp = &cnts->mv_counts.hp; + + for (i = 0; i < ARRAY_SIZE(vp9_ctx->cnts.coeff); ++i) + for (j = 0; j < ARRAY_SIZE(vp9_ctx->cnts.coeff[i]); ++j) + for (k = 0; k < ARRAY_SIZE(vp9_ctx->cnts.coeff[i][0]); ++k) + for (l = 0; l < ARRAY_SIZE(vp9_ctx->cnts.coeff[i][0][0]); ++l) + INNER_LOOP; +} + +int hantro_vp9_dec_init(struct hantro_ctx *ctx) +{ + struct hantro_dev *vpu = ctx->dev; + const struct hantro_variant *variant = vpu->variant; + struct hantro_vp9_dec_hw_ctx *vp9_dec = &ctx->vp9_dec; + struct hantro_aux_buf *tile_edge = &vp9_dec->tile_edge; + struct hantro_aux_buf *segment_map = &vp9_dec->segment_map; + struct hantro_aux_buf *misc = &vp9_dec->misc; + u32 i, max_width, max_height, size; + + if (variant->num_dec_fmts < 1) + return -EINVAL; + + for (i = 0; i < variant->num_dec_fmts; ++i) + if (variant->dec_fmts[i].fourcc == V4L2_PIX_FMT_VP9_FRAME) + break; + + if (i == variant->num_dec_fmts) + return -EINVAL; + + max_width = vpu->variant->dec_fmts[i].frmsize.max_width; + max_height = vpu->variant->dec_fmts[i].frmsize.max_height; + + size = hantro_vp9_tile_filter_size(max_height); + vp9_dec->bsd_ctrl_offset = size; + size += hantro_vp9_bsd_control_size(max_height); + + tile_edge->cpu = dma_alloc_coherent(vpu->dev, size, &tile_edge->dma, GFP_KERNEL); + if (!tile_edge->cpu) + return -ENOMEM; + + tile_edge->size = size; + memset(tile_edge->cpu, 0, size); + + size = hantro_vp9_segment_map_size(max_width, max_height); + vp9_dec->segment_map_size = size; + size *= 2; /* we need two areas of this size, used alternately */ + + segment_map->cpu = dma_alloc_coherent(vpu->dev, size, &segment_map->dma, GFP_KERNEL); + if (!segment_map->cpu) + goto err_segment_map; + + segment_map->size = size; + memset(segment_map->cpu, 0, size); + + size = hantro_vp9_prob_tab_size(); + vp9_dec->ctx_counters_offset = size; + size += hantro_vp9_count_tab_size(); + vp9_dec->tile_info_offset = size; + size += hantro_vp9_tile_info_size(); + + misc->cpu = dma_alloc_coherent(vpu->dev, size, &misc->dma, GFP_KERNEL); + if (!misc->cpu) + goto err_misc; + + misc->size = size; + memset(misc->cpu, 0, size); + + init_v4l2_vp9_count_tbl(ctx); + + return 0; + +err_misc: + dma_free_coherent(vpu->dev, segment_map->size, segment_map->cpu, segment_map->dma); + +err_segment_map: + dma_free_coherent(vpu->dev, tile_edge->size, tile_edge->cpu, tile_edge->dma); + + return -ENOMEM; +} + +void hantro_vp9_dec_exit(struct hantro_ctx *ctx) +{ + struct hantro_dev *vpu = ctx->dev; + struct hantro_vp9_dec_hw_ctx *vp9_dec = &ctx->vp9_dec; + struct hantro_aux_buf *tile_edge = &vp9_dec->tile_edge; + struct hantro_aux_buf *segment_map = &vp9_dec->segment_map; + struct hantro_aux_buf *misc = &vp9_dec->misc; + + dma_free_coherent(vpu->dev, misc->size, misc->cpu, misc->dma); + dma_free_coherent(vpu->dev, segment_map->size, segment_map->cpu, segment_map->dma); + dma_free_coherent(vpu->dev, tile_edge->size, tile_edge->cpu, tile_edge->dma); +} diff --git a/drivers/staging/media/hantro/hantro_vp9.h b/drivers/staging/media/hantro/hantro_vp9.h new file mode 100644 index 000000000000..26b69275f098 --- /dev/null +++ b/drivers/staging/media/hantro/hantro_vp9.h @@ -0,0 +1,102 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Hantro VP9 codec driver + * + * Copyright (C) 2021 Collabora Ltd. + */ + +struct hantro_g2_mv_probs { + u8 joint[3]; + u8 sign[2]; + u8 class0_bit[2][1]; + u8 fr[2][3]; + u8 class0_hp[2]; + u8 hp[2]; + u8 classes[2][10]; + u8 class0_fr[2][2][3]; + u8 bits[2][10]; +}; + +struct hantro_g2_probs { + u8 inter_mode[7][4]; + u8 is_inter[4]; + u8 uv_mode[10][8]; + u8 tx8[2][1]; + u8 tx16[2][2]; + u8 tx32[2][3]; + u8 y_mode_tail[4][1]; + u8 y_mode[4][8]; + u8 partition[2][16][4]; /* [keyframe][][], [inter][][] */ + u8 uv_mode_tail[10][1]; + u8 interp_filter[4][2]; + u8 comp_mode[5]; + u8 skip[3]; + + u8 pad1[1]; + + struct hantro_g2_mv_probs mv; + + u8 single_ref[5][2]; + u8 comp_ref[5]; + + u8 pad2[17]; + + u8 coef[4][2][2][6][6][4]; +}; + +struct hantro_g2_all_probs { + u8 kf_y_mode_prob[10][10][8]; + + u8 kf_y_mode_prob_tail[10][10][1]; + u8 ref_pred_probs[3]; + u8 mb_segment_tree_probs[7]; + u8 segment_pred_probs[3]; + u8 ref_scores[4]; + u8 prob_comppred[2]; + + u8 pad1[9]; + + u8 kf_uv_mode_prob[10][8]; + u8 kf_uv_mode_prob_tail[10][1]; + + u8 pad2[6]; + + struct hantro_g2_probs probs; +}; + +struct mv_counts { + u32 joints[4]; + u32 sign[2][2]; + u32 classes[2][11]; + u32 class0[2][2]; + u32 bits[2][10][2]; + u32 class0_fp[2][2][4]; + u32 fp[2][4]; + u32 class0_hp[2][2]; + u32 hp[2][2]; +}; + +struct symbol_counts { + u32 inter_mode_counts[7][3][2]; + u32 sb_ymode_counts[4][10]; + u32 uv_mode_counts[10][10]; + u32 partition_counts[16][4]; + u32 switchable_interp_counts[4][3]; + u32 intra_inter_count[4][2]; + u32 comp_inter_count[5][2]; + u32 single_ref_count[5][2][2]; + u32 comp_ref_count[5][2]; + u32 tx32x32_count[2][4]; + u32 tx16x16_count[2][3]; + u32 tx8x8_count[2][2]; + u32 mbskip_count[3][2]; + + struct mv_counts mv_counts; + + u32 count_coeffs[2][2][6][6][4]; + u32 count_coeffs8x8[2][2][6][6][4]; + u32 count_coeffs16x16[2][2][6][6][4]; + u32 count_coeffs32x32[2][2][6][6][4]; + + u32 count_eobs[4][2][2][6][6]; +}; diff --git a/drivers/staging/media/hantro/imx8m_vpu_hw.c b/drivers/staging/media/hantro/imx8m_vpu_hw.c index ea919bfb9891..f5991b8e553a 100644 --- a/drivers/staging/media/hantro/imx8m_vpu_hw.c +++ b/drivers/staging/media/hantro/imx8m_vpu_hw.c @@ -82,6 +82,7 @@ static const struct hantro_fmt imx8m_vpu_postproc_fmts[] = { { .fourcc = V4L2_PIX_FMT_YUYV, .codec_mode = HANTRO_MODE_NONE, + .postprocessed = true, }, }; @@ -131,10 +132,18 @@ static const struct hantro_fmt imx8m_vpu_dec_fmts[] = { }, }; -static const struct hantro_fmt imx8m_vpu_g2_dec_fmts[] = { +static const struct hantro_fmt imx8m_vpu_g2_postproc_fmts[] = { { .fourcc = V4L2_PIX_FMT_NV12, .codec_mode = HANTRO_MODE_NONE, + .postprocessed = true, + }, +}; + +static const struct hantro_fmt imx8m_vpu_g2_dec_fmts[] = { + { + .fourcc = V4L2_PIX_FMT_NV12_4L4, + .codec_mode = HANTRO_MODE_NONE, }, { .fourcc = V4L2_PIX_FMT_HEVC_SLICE, @@ -149,6 +158,19 @@ static const struct hantro_fmt imx8m_vpu_g2_dec_fmts[] = { .step_height = MB_DIM, }, }, + { + .fourcc = V4L2_PIX_FMT_VP9_FRAME, + .codec_mode = HANTRO_MODE_VP9_DEC, + .max_depth = 2, + .frmsize = { + .min_width = 48, + .max_width = 3840, + .step_width = MB_DIM, + .min_height = 48, + .max_height = 2160, + .step_height = MB_DIM, + }, + }, }; static irqreturn_t imx8m_vpu_g1_irq(int irq, void *dev_id) @@ -169,24 +191,6 @@ static irqreturn_t imx8m_vpu_g1_irq(int irq, void *dev_id) return IRQ_HANDLED; } -static irqreturn_t imx8m_vpu_g2_irq(int irq, void *dev_id) -{ - struct hantro_dev *vpu = dev_id; - enum vb2_buffer_state state; - u32 status; - - status = vdpu_read(vpu, G2_REG_INTERRUPT); - state = (status & G2_REG_INTERRUPT_DEC_RDY_INT) ? - VB2_BUF_STATE_DONE : VB2_BUF_STATE_ERROR; - - vdpu_write(vpu, 0, G2_REG_INTERRUPT); - vdpu_write(vpu, G2_REG_CONFIG_DEC_CLK_GATE_E, G2_REG_CONFIG); - - hantro_irq_done(vpu, state); - - return IRQ_HANDLED; -} - static int imx8mq_vpu_hw_init(struct hantro_dev *vpu) { vpu->ctrl_base = vpu->reg_bases[vpu->variant->num_regs - 1]; @@ -240,6 +244,13 @@ static const struct hantro_codec_ops imx8mq_vpu_g2_codec_ops[] = { .init = hantro_hevc_dec_init, .exit = hantro_hevc_dec_exit, }, + [HANTRO_MODE_VP9_DEC] = { + .run = hantro_g2_vp9_dec_run, + .done = hantro_g2_vp9_dec_done, + .reset = imx8m_vpu_g2_reset, + .init = hantro_vp9_dec_init, + .exit = hantro_vp9_dec_exit, + }, }; /* @@ -251,7 +262,7 @@ static const struct hantro_irq imx8mq_irqs[] = { }; static const struct hantro_irq imx8mq_g2_irqs[] = { - { "g2", imx8m_vpu_g2_irq }, + { "g2", hantro_g2_irq }, }; static const char * const imx8mq_clk_names[] = { "g1", "g2", "bus" }; @@ -262,7 +273,7 @@ const struct hantro_variant imx8mq_vpu_variant = { .num_dec_fmts = ARRAY_SIZE(imx8m_vpu_dec_fmts), .postproc_fmts = imx8m_vpu_postproc_fmts, .num_postproc_fmts = ARRAY_SIZE(imx8m_vpu_postproc_fmts), - .postproc_regs = &hantro_g1_postproc_regs, + .postproc_ops = &hantro_g1_postproc_ops, .codec = HANTRO_MPEG2_DECODER | HANTRO_VP8_DECODER | HANTRO_H264_DECODER, .codec_ops = imx8mq_vpu_codec_ops, @@ -280,7 +291,10 @@ const struct hantro_variant imx8mq_vpu_g2_variant = { .dec_offset = 0x0, .dec_fmts = imx8m_vpu_g2_dec_fmts, .num_dec_fmts = ARRAY_SIZE(imx8m_vpu_g2_dec_fmts), - .codec = HANTRO_HEVC_DECODER, + .postproc_fmts = imx8m_vpu_g2_postproc_fmts, + .num_postproc_fmts = ARRAY_SIZE(imx8m_vpu_g2_postproc_fmts), + .postproc_ops = &hantro_g2_postproc_ops, + .codec = HANTRO_HEVC_DECODER | HANTRO_VP9_DECODER, .codec_ops = imx8mq_vpu_g2_codec_ops, .init = imx8mq_vpu_hw_init, .runtime_resume = imx8mq_runtime_resume, diff --git a/drivers/staging/media/hantro/rockchip_vpu2_hw_jpeg_enc.c b/drivers/staging/media/hantro/rockchip_vpu2_hw_jpeg_enc.c index 991213ce1610..4df16f59fb97 100644 --- a/drivers/staging/media/hantro/rockchip_vpu2_hw_jpeg_enc.c +++ b/drivers/staging/media/hantro/rockchip_vpu2_hw_jpeg_enc.c @@ -143,9 +143,8 @@ int rockchip_vpu2_jpeg_enc_run(struct hantro_ctx *ctx) rockchip_vpu2_set_src_img_ctrl(vpu, ctx); rockchip_vpu2_jpeg_enc_set_buffers(vpu, ctx, &src_buf->vb2_buf); - rockchip_vpu2_jpeg_enc_set_qtable(vpu, - hantro_jpeg_get_qtable(0), - hantro_jpeg_get_qtable(1)); + rockchip_vpu2_jpeg_enc_set_qtable(vpu, jpeg_ctx.hw_luma_qtable, + jpeg_ctx.hw_chroma_qtable); reg = VEPU_REG_OUTPUT_SWAP32 | VEPU_REG_OUTPUT_SWAP16 @@ -171,3 +170,20 @@ int rockchip_vpu2_jpeg_enc_run(struct hantro_ctx *ctx) return 0; } + +void rockchip_vpu2_jpeg_enc_done(struct hantro_ctx *ctx) +{ + struct hantro_dev *vpu = ctx->dev; + u32 bytesused = vepu_read(vpu, VEPU_REG_STR_BUF_LIMIT) / 8; + struct vb2_v4l2_buffer *dst_buf = hantro_get_dst_buf(ctx); + + /* + * TODO: Rework the JPEG encoder to eliminate the need + * for a bounce buffer. + */ + memcpy(vb2_plane_vaddr(&dst_buf->vb2_buf, 0) + + ctx->vpu_dst_fmt->header_size, + ctx->jpeg_enc.bounce_buffer.cpu, bytesused); + vb2_set_plane_payload(&dst_buf->vb2_buf, 0, + ctx->vpu_dst_fmt->header_size + bytesused); +} diff --git a/drivers/staging/media/hantro/rockchip_vpu_hw.c b/drivers/staging/media/hantro/rockchip_vpu_hw.c index d4f52957cc53..c203b606e6e7 100644 --- a/drivers/staging/media/hantro/rockchip_vpu_hw.c +++ b/drivers/staging/media/hantro/rockchip_vpu_hw.c @@ -62,6 +62,7 @@ static const struct hantro_fmt rockchip_vpu1_postproc_fmts[] = { { .fourcc = V4L2_PIX_FMT_YUYV, .codec_mode = HANTRO_MODE_NONE, + .postprocessed = true, }, }; @@ -343,7 +344,7 @@ static const struct hantro_codec_ops rk3066_vpu_codec_ops[] = { .run = hantro_h1_jpeg_enc_run, .reset = rockchip_vpu1_enc_reset, .init = hantro_jpeg_enc_init, - .done = hantro_jpeg_enc_done, + .done = hantro_h1_jpeg_enc_done, .exit = hantro_jpeg_enc_exit, }, [HANTRO_MODE_H264_DEC] = { @@ -371,7 +372,7 @@ static const struct hantro_codec_ops rk3288_vpu_codec_ops[] = { .run = hantro_h1_jpeg_enc_run, .reset = rockchip_vpu1_enc_reset, .init = hantro_jpeg_enc_init, - .done = hantro_jpeg_enc_done, + .done = hantro_h1_jpeg_enc_done, .exit = hantro_jpeg_enc_exit, }, [HANTRO_MODE_H264_DEC] = { @@ -399,6 +400,7 @@ static const struct hantro_codec_ops rk3399_vpu_codec_ops[] = { .run = rockchip_vpu2_jpeg_enc_run, .reset = rockchip_vpu2_enc_reset, .init = hantro_jpeg_enc_init, + .done = rockchip_vpu2_jpeg_enc_done, .exit = hantro_jpeg_enc_exit, }, [HANTRO_MODE_H264_DEC] = { @@ -460,7 +462,7 @@ const struct hantro_variant rk3036_vpu_variant = { .num_dec_fmts = ARRAY_SIZE(rk3066_vpu_dec_fmts), .postproc_fmts = rockchip_vpu1_postproc_fmts, .num_postproc_fmts = ARRAY_SIZE(rockchip_vpu1_postproc_fmts), - .postproc_regs = &hantro_g1_postproc_regs, + .postproc_ops = &hantro_g1_postproc_ops, .codec = HANTRO_MPEG2_DECODER | HANTRO_VP8_DECODER | HANTRO_H264_DECODER, .codec_ops = rk3036_vpu_codec_ops, @@ -485,7 +487,7 @@ const struct hantro_variant rk3066_vpu_variant = { .num_dec_fmts = ARRAY_SIZE(rk3066_vpu_dec_fmts), .postproc_fmts = rockchip_vpu1_postproc_fmts, .num_postproc_fmts = ARRAY_SIZE(rockchip_vpu1_postproc_fmts), - .postproc_regs = &hantro_g1_postproc_regs, + .postproc_ops = &hantro_g1_postproc_ops, .codec = HANTRO_JPEG_ENCODER | HANTRO_MPEG2_DECODER | HANTRO_VP8_DECODER | HANTRO_H264_DECODER, .codec_ops = rk3066_vpu_codec_ops, @@ -505,7 +507,7 @@ const struct hantro_variant rk3288_vpu_variant = { .num_dec_fmts = ARRAY_SIZE(rk3288_vpu_dec_fmts), .postproc_fmts = rockchip_vpu1_postproc_fmts, .num_postproc_fmts = ARRAY_SIZE(rockchip_vpu1_postproc_fmts), - .postproc_regs = &hantro_g1_postproc_regs, + .postproc_ops = &hantro_g1_postproc_ops, .codec = HANTRO_JPEG_ENCODER | HANTRO_MPEG2_DECODER | HANTRO_VP8_DECODER | HANTRO_H264_DECODER, .codec_ops = rk3288_vpu_codec_ops, diff --git a/drivers/staging/media/hantro/sama5d4_vdec_hw.c b/drivers/staging/media/hantro/sama5d4_vdec_hw.c index 9c3b8cd0b239..b2fc1c5613e1 100644 --- a/drivers/staging/media/hantro/sama5d4_vdec_hw.c +++ b/drivers/staging/media/hantro/sama5d4_vdec_hw.c @@ -15,6 +15,7 @@ static const struct hantro_fmt sama5d4_vdec_postproc_fmts[] = { { .fourcc = V4L2_PIX_FMT_YUYV, .codec_mode = HANTRO_MODE_NONE, + .postprocessed = true, }, }; @@ -100,7 +101,7 @@ const struct hantro_variant sama5d4_vdec_variant = { .num_dec_fmts = ARRAY_SIZE(sama5d4_vdec_fmts), .postproc_fmts = sama5d4_vdec_postproc_fmts, .num_postproc_fmts = ARRAY_SIZE(sama5d4_vdec_postproc_fmts), - .postproc_regs = &hantro_g1_postproc_regs, + .postproc_ops = &hantro_g1_postproc_ops, .codec = HANTRO_MPEG2_DECODER | HANTRO_VP8_DECODER | HANTRO_H264_DECODER, .codec_ops = sama5d4_vdec_codec_ops, diff --git a/drivers/staging/media/hantro/sunxi_vpu_hw.c b/drivers/staging/media/hantro/sunxi_vpu_hw.c new file mode 100644 index 000000000000..90633406c4eb --- /dev/null +++ b/drivers/staging/media/hantro/sunxi_vpu_hw.c @@ -0,0 +1,86 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Allwinner Hantro G2 VPU codec driver + * + * Copyright (C) 2021 Jernej Skrabec <jernej.skrabec@gmail.com> + */ + +#include <linux/clk.h> + +#include "hantro.h" + +static const struct hantro_fmt sunxi_vpu_postproc_fmts[] = { + { + .fourcc = V4L2_PIX_FMT_NV12, + .codec_mode = HANTRO_MODE_NONE, + .postprocessed = true, + }, +}; + +static const struct hantro_fmt sunxi_vpu_dec_fmts[] = { + { + .fourcc = V4L2_PIX_FMT_NV12_4L4, + .codec_mode = HANTRO_MODE_NONE, + }, + { + .fourcc = V4L2_PIX_FMT_VP9_FRAME, + .codec_mode = HANTRO_MODE_VP9_DEC, + .max_depth = 2, + .frmsize = { + .min_width = 48, + .max_width = 3840, + .step_width = MB_DIM, + .min_height = 48, + .max_height = 2160, + .step_height = MB_DIM, + }, + }, +}; + +static int sunxi_vpu_hw_init(struct hantro_dev *vpu) +{ + clk_set_rate(vpu->clocks[0].clk, 300000000); + + return 0; +} + +static void sunxi_vpu_reset(struct hantro_ctx *ctx) +{ + struct hantro_dev *vpu = ctx->dev; + + reset_control_reset(vpu->resets); +} + +static const struct hantro_codec_ops sunxi_vpu_codec_ops[] = { + [HANTRO_MODE_VP9_DEC] = { + .run = hantro_g2_vp9_dec_run, + .done = hantro_g2_vp9_dec_done, + .reset = sunxi_vpu_reset, + .init = hantro_vp9_dec_init, + .exit = hantro_vp9_dec_exit, + }, +}; + +static const struct hantro_irq sunxi_irqs[] = { + { NULL, hantro_g2_irq }, +}; + +static const char * const sunxi_clk_names[] = { "mod", "bus" }; + +const struct hantro_variant sunxi_vpu_variant = { + .dec_fmts = sunxi_vpu_dec_fmts, + .num_dec_fmts = ARRAY_SIZE(sunxi_vpu_dec_fmts), + .postproc_fmts = sunxi_vpu_postproc_fmts, + .num_postproc_fmts = ARRAY_SIZE(sunxi_vpu_postproc_fmts), + .postproc_ops = &hantro_g2_postproc_ops, + .codec = HANTRO_VP9_DECODER, + .codec_ops = sunxi_vpu_codec_ops, + .init = sunxi_vpu_hw_init, + .irqs = sunxi_irqs, + .num_irqs = ARRAY_SIZE(sunxi_irqs), + .clk_names = sunxi_clk_names, + .num_clocks = ARRAY_SIZE(sunxi_clk_names), + .double_buffer = 1, + .legacy_regs = 1, + .late_postproc = 1, +}; diff --git a/drivers/staging/media/imx/imx-media-csc-scaler.c b/drivers/staging/media/imx/imx-media-csc-scaler.c index eb6da9b9d8ba..1fd39a2fca98 100644 --- a/drivers/staging/media/imx/imx-media-csc-scaler.c +++ b/drivers/staging/media/imx/imx-media-csc-scaler.c @@ -820,7 +820,7 @@ static const struct v4l2_file_operations ipu_csc_scaler_fops = { .mmap = v4l2_m2m_fop_mmap, }; -static struct v4l2_m2m_ops m2m_ops = { +static const struct v4l2_m2m_ops m2m_ops = { .device_run = device_run, .job_abort = job_abort, }; diff --git a/drivers/staging/media/imx/imx-media-csi.c b/drivers/staging/media/imx/imx-media-csi.c index 1caa100be33d..bd7f156f2d52 100644 --- a/drivers/staging/media/imx/imx-media-csi.c +++ b/drivers/staging/media/imx/imx-media-csi.c @@ -150,7 +150,7 @@ static inline bool requires_passthrough(struct v4l2_fwnode_endpoint *ep, const struct imx_media_pixfmt *incc) { if (ep->bus_type == V4L2_MBUS_BT656) // including BT.1120 - return 0; + return false; return incc->bayer || is_parallel_16bit_bus(ep) || (is_parallel_bus(ep) && diff --git a/drivers/staging/media/imx/imx-media-utils.c b/drivers/staging/media/imx/imx-media-utils.c index 6f90acf9c725..94bc866ca28c 100644 --- a/drivers/staging/media/imx/imx-media-utils.c +++ b/drivers/staging/media/imx/imx-media-utils.c @@ -569,48 +569,6 @@ int imx_media_mbus_fmt_to_pix_fmt(struct v4l2_pix_format *pix, } EXPORT_SYMBOL_GPL(imx_media_mbus_fmt_to_pix_fmt); -int imx_media_mbus_fmt_to_ipu_image(struct ipu_image *image, - const struct v4l2_mbus_framefmt *mbus) -{ - int ret; - - memset(image, 0, sizeof(*image)); - - ret = imx_media_mbus_fmt_to_pix_fmt(&image->pix, mbus, NULL); - if (ret) - return ret; - - image->rect.width = mbus->width; - image->rect.height = mbus->height; - - return 0; -} -EXPORT_SYMBOL_GPL(imx_media_mbus_fmt_to_ipu_image); - -int imx_media_ipu_image_to_mbus_fmt(struct v4l2_mbus_framefmt *mbus, - const struct ipu_image *image) -{ - const struct imx_media_pixfmt *fmt; - - fmt = imx_media_find_pixel_format(image->pix.pixelformat, - PIXFMT_SEL_ANY); - if (!fmt || !fmt->codes || !fmt->codes[0]) - return -EINVAL; - - memset(mbus, 0, sizeof(*mbus)); - mbus->width = image->pix.width; - mbus->height = image->pix.height; - mbus->code = fmt->codes[0]; - mbus->field = image->pix.field; - mbus->colorspace = image->pix.colorspace; - mbus->xfer_func = image->pix.xfer_func; - mbus->ycbcr_enc = image->pix.ycbcr_enc; - mbus->quantization = image->pix.quantization; - - return 0; -} -EXPORT_SYMBOL_GPL(imx_media_ipu_image_to_mbus_fmt); - void imx_media_free_dma_buf(struct device *dev, struct imx_media_dma_buf *buf) { diff --git a/drivers/staging/media/imx/imx-media.h b/drivers/staging/media/imx/imx-media.h index 6740e7917458..f263fc3adbb9 100644 --- a/drivers/staging/media/imx/imx-media.h +++ b/drivers/staging/media/imx/imx-media.h @@ -199,10 +199,6 @@ void imx_media_try_colorimetry(struct v4l2_mbus_framefmt *tryfmt, int imx_media_mbus_fmt_to_pix_fmt(struct v4l2_pix_format *pix, const struct v4l2_mbus_framefmt *mbus, const struct imx_media_pixfmt *cc); -int imx_media_mbus_fmt_to_ipu_image(struct ipu_image *image, - const struct v4l2_mbus_framefmt *mbus); -int imx_media_ipu_image_to_mbus_fmt(struct v4l2_mbus_framefmt *mbus, - const struct ipu_image *image); void imx_media_grp_id_to_sd_name(char *sd_name, int sz, u32 grp_id, int ipu_id); struct v4l2_subdev * diff --git a/drivers/staging/media/imx/imx6-mipi-csi2.c b/drivers/staging/media/imx/imx6-mipi-csi2.c index a0941fc2907b..558b256ac935 100644 --- a/drivers/staging/media/imx/imx6-mipi-csi2.c +++ b/drivers/staging/media/imx/imx6-mipi-csi2.c @@ -382,13 +382,17 @@ static int csi2_start(struct csi2_dev *csi2) csi2_enable(csi2, true); /* Step 5 */ + ret = v4l2_subdev_call(csi2->src_sd, video, pre_streamon, + V4L2_SUBDEV_PRE_STREAMON_FL_MANUAL_LP); + if (ret && ret != -ENOIOCTLCMD) + goto err_assert_reset; csi2_dphy_wait_stopstate(csi2, lanes); /* Step 6 */ ret = v4l2_subdev_call(csi2->src_sd, video, s_stream, 1); ret = (ret && ret != -ENOIOCTLCMD) ? ret : 0; if (ret) - goto err_assert_reset; + goto err_stop_lp11; /* Step 7 */ ret = csi2_dphy_wait_clock_lane(csi2); @@ -399,6 +403,8 @@ static int csi2_start(struct csi2_dev *csi2) err_stop_upstream: v4l2_subdev_call(csi2->src_sd, video, s_stream, 0); +err_stop_lp11: + v4l2_subdev_call(csi2->src_sd, video, post_streamoff); err_assert_reset: csi2_enable(csi2, false); err_disable_clk: @@ -410,6 +416,7 @@ static void csi2_stop(struct csi2_dev *csi2) { /* stop upstream */ v4l2_subdev_call(csi2->src_sd, video, s_stream, 0); + v4l2_subdev_call(csi2->src_sd, video, post_streamoff); csi2_enable(csi2, false); clk_disable_unprepare(csi2->pix_clk); diff --git a/drivers/staging/media/ipu3/include/uapi/intel-ipu3.h b/drivers/staging/media/ipu3/include/uapi/intel-ipu3.h index 585f55981c86..dbdd015ce220 100644 --- a/drivers/staging/media/ipu3/include/uapi/intel-ipu3.h +++ b/drivers/staging/media/ipu3/include/uapi/intel-ipu3.h @@ -34,11 +34,17 @@ * struct ipu3_uapi_grid_config - Grid plane config * * @width: Grid horizontal dimensions, in number of grid blocks(cells). + * For AWB, the range is (16, 80). + * For AF/AE, the range is (16, 32). * @height: Grid vertical dimensions, in number of grid cells. + * For AWB, the range is (16, 60). + * For AF/AE, the range is (16, 24). * @block_width_log2: Log2 of the width of each cell in pixels. - * for (2^3, 2^4, 2^5, 2^6, 2^7), values [3, 7]. + * For AWB, the range is [3, 6]. + * For AF/AE, the range is [3, 7]. * @block_height_log2: Log2 of the height of each cell in pixels. - * for (2^3, 2^4, 2^5, 2^6, 2^7), values [3, 7]. + * For AWB, the range is [3, 6]. + * For AF/AE, the range is [3, 7]. * @height_per_slice: The number of blocks in vertical axis per slice. * Default 2. * @x_start: X value of top left corner of Region of Interest(ROI). @@ -61,17 +67,39 @@ struct ipu3_uapi_grid_config { __u16 y_end; } __packed; +/** + * struct ipu3_uapi_awb_set_item - Memory layout for each cell in AWB + * + * @Gr_avg: Green average for red lines in the cell. + * @R_avg: Red average in the cell. + * @B_avg: Blue average in the cell. + * @Gb_avg: Green average for blue lines in the cell. + * @sat_ratio: Percentage of pixels over the thresholds specified in + * ipu3_uapi_awb_config_s, coded from 0 to 255. + * @padding0: Unused byte for padding. + * @padding1: Unused byte for padding. + * @padding2: Unused byte for padding. + */ +struct ipu3_uapi_awb_set_item { + __u8 Gr_avg; + __u8 R_avg; + __u8 B_avg; + __u8 Gb_avg; + __u8 sat_ratio; + __u8 padding0; + __u8 padding1; + __u8 padding2; +} __attribute__((packed)); + /* * The grid based data is divided into "slices" called set, each slice of setX * refers to ipu3_uapi_grid_config width * height_per_slice. */ #define IPU3_UAPI_AWB_MAX_SETS 60 /* Based on grid size 80 * 60 and cell size 16 x 16 */ -#define IPU3_UAPI_AWB_SET_SIZE 1280 -#define IPU3_UAPI_AWB_MD_ITEM_SIZE 8 +#define IPU3_UAPI_AWB_SET_SIZE 160 #define IPU3_UAPI_AWB_SPARE_FOR_BUBBLES \ - (IPU3_UAPI_MAX_BUBBLE_SIZE * IPU3_UAPI_MAX_STRIPES * \ - IPU3_UAPI_AWB_MD_ITEM_SIZE) + (IPU3_UAPI_MAX_BUBBLE_SIZE * IPU3_UAPI_MAX_STRIPES) #define IPU3_UAPI_AWB_MAX_BUFFER_SIZE \ (IPU3_UAPI_AWB_MAX_SETS * \ (IPU3_UAPI_AWB_SET_SIZE + IPU3_UAPI_AWB_SPARE_FOR_BUBBLES)) @@ -83,7 +111,7 @@ struct ipu3_uapi_grid_config { * the average values for each color channel. */ struct ipu3_uapi_awb_raw_buffer { - __u8 meta_data[IPU3_UAPI_AWB_MAX_BUFFER_SIZE] + struct ipu3_uapi_awb_set_item meta_data[IPU3_UAPI_AWB_MAX_BUFFER_SIZE] __attribute__((aligned(32))); } __packed; diff --git a/drivers/staging/media/ipu3/ipu3-css-params.c b/drivers/staging/media/ipu3/ipu3-css-params.c index e9d6bd9e9332..d9e3c3785075 100644 --- a/drivers/staging/media/ipu3/ipu3-css-params.c +++ b/drivers/staging/media/ipu3/ipu3-css-params.c @@ -771,7 +771,6 @@ static int imgu_css_osys_calc_frame_and_stripe_params( */ { unsigned int i; - int pin_scale = 0; /*Input resolution */ stripe_params[s].input_width = stripe_input_width_y; @@ -791,8 +790,6 @@ static int imgu_css_osys_calc_frame_and_stripe_params( reso.pin_height[i]; stripe_params[s].output_offset[i] = stripe_offset_out_y; - - pin_scale += frame_params[i].scaled; } else { /* Unscaled pin */ stripe_params[s].output_width[i] = diff --git a/drivers/staging/media/max96712/Kconfig b/drivers/staging/media/max96712/Kconfig new file mode 100644 index 000000000000..acde14fd5c4d --- /dev/null +++ b/drivers/staging/media/max96712/Kconfig @@ -0,0 +1,14 @@ +# SPDX-License-Identifier: GPL-2.0 +config VIDEO_MAX96712 + tristate "Maxim MAX96712 Quad GMSL2 Deserializer support" + depends on I2C + depends on OF_GPIO + depends on VIDEO_V4L2 + select V4L2_FWNODE + select VIDEO_V4L2_SUBDEV_API + select MEDIA_CONTROLLER + help + This driver supports the Maxim MAX96712 Quad GMSL2 Deserializer. + + To compile this driver as a module, choose M here: the + module will be called max96712. diff --git a/drivers/staging/media/max96712/Makefile b/drivers/staging/media/max96712/Makefile new file mode 100644 index 000000000000..70c1974ce3f0 --- /dev/null +++ b/drivers/staging/media/max96712/Makefile @@ -0,0 +1,2 @@ +# SPDX-License-Identifier: GPL-2.0 +obj-$(CONFIG_VIDEO_MAX96712) += max96712.o diff --git a/drivers/staging/media/max96712/max96712.c b/drivers/staging/media/max96712/max96712.c new file mode 100644 index 000000000000..9bc72d9a858b --- /dev/null +++ b/drivers/staging/media/max96712/max96712.c @@ -0,0 +1,440 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Maxim MAX9286 Quad GMSL2 Deserializer Driver + * + * Copyright (C) 2021 Renesas Electronics Corporation + * Copyright (C) 2021 Niklas Söderlund + */ + +#include <linux/delay.h> +#include <linux/i2c.h> +#include <linux/module.h> +#include <linux/of_graph.h> +#include <linux/regmap.h> + +#include <media/v4l2-ctrls.h> +#include <media/v4l2-fwnode.h> +#include <media/v4l2-subdev.h> + +#define MAX96712_ID 0x20 + +#define MAX96712_DPLL_FREQ 1000 + +enum max96712_pattern { + MAX96712_PATTERN_CHECKERBOARD = 0, + MAX96712_PATTERN_GRADIENT, +}; + +struct max96712_priv { + struct i2c_client *client; + struct regmap *regmap; + struct gpio_desc *gpiod_pwdn; + + struct v4l2_fwnode_bus_mipi_csi2 mipi; + + struct v4l2_subdev sd; + struct v4l2_ctrl_handler ctrl_handler; + struct media_pad pads[1]; + + enum max96712_pattern pattern; +}; + +static int max96712_read(struct max96712_priv *priv, int reg) +{ + int ret, val; + + ret = regmap_read(priv->regmap, reg, &val); + if (ret) { + dev_err(&priv->client->dev, "read 0x%04x failed\n", reg); + return ret; + } + + return val; +} + +static int max96712_write(struct max96712_priv *priv, unsigned int reg, u8 val) +{ + int ret; + + ret = regmap_write(priv->regmap, reg, val); + if (ret) + dev_err(&priv->client->dev, "write 0x%04x failed\n", reg); + + return ret; +} + +static int max96712_update_bits(struct max96712_priv *priv, unsigned int reg, + u8 mask, u8 val) +{ + int ret; + + ret = regmap_update_bits(priv->regmap, reg, mask, val); + if (ret) + dev_err(&priv->client->dev, "update 0x%04x failed\n", reg); + + return ret; +} + +static int max96712_write_bulk(struct max96712_priv *priv, unsigned int reg, + const void *val, size_t val_count) +{ + int ret; + + ret = regmap_bulk_write(priv->regmap, reg, val, val_count); + if (ret) + dev_err(&priv->client->dev, "bulk write 0x%04x failed\n", reg); + + return ret; +} + +static int max96712_write_bulk_value(struct max96712_priv *priv, + unsigned int reg, unsigned int val, + size_t val_count) +{ + unsigned int i; + u8 values[4]; + + for (i = 1; i <= val_count; i++) + values[i - 1] = (val >> ((val_count - i) * 8)) & 0xff; + + return max96712_write_bulk(priv, reg, &values, val_count); +} + +static void max96712_reset(struct max96712_priv *priv) +{ + max96712_update_bits(priv, 0x13, 0x40, 0x40); + msleep(20); +} + +static void max96712_mipi_enable(struct max96712_priv *priv, bool enable) +{ + if (enable) { + max96712_update_bits(priv, 0x40b, 0x02, 0x02); + max96712_update_bits(priv, 0x8a0, 0x80, 0x80); + } else { + max96712_update_bits(priv, 0x8a0, 0x80, 0x00); + max96712_update_bits(priv, 0x40b, 0x02, 0x00); + } +} + +static void max96712_mipi_configure(struct max96712_priv *priv) +{ + unsigned int i; + u8 phy5 = 0; + + max96712_mipi_enable(priv, false); + + /* Select 2x4 mode. */ + max96712_write(priv, 0x8a0, 0x04); + + /* Configure a 4-lane DPHY using PHY0 and PHY1. */ + /* TODO: Add support for 2-lane and 1-lane configurations. */ + /* TODO: Add support CPHY mode. */ + max96712_write(priv, 0x94a, 0xc0); + + /* Configure lane mapping for PHY0 and PHY1. */ + /* TODO: Add support for lane swapping. */ + max96712_write(priv, 0x8a3, 0xe4); + + /* Configure lane polarity for PHY0 and PHY1. */ + for (i = 0; i < priv->mipi.num_data_lanes + 1; i++) + if (priv->mipi.lane_polarities[i]) + phy5 |= BIT(i == 0 ? 5 : i < 3 ? i - 1 : i); + max96712_write(priv, 0x8a5, phy5); + + /* Set link frequency for PHY0 and PHY1. */ + max96712_update_bits(priv, 0x415, 0x3f, + ((MAX96712_DPLL_FREQ / 100) & 0x1f) | BIT(5)); + max96712_update_bits(priv, 0x418, 0x3f, + ((MAX96712_DPLL_FREQ / 100) & 0x1f) | BIT(5)); + + /* Enable PHY0 and PHY1 */ + max96712_update_bits(priv, 0x8a2, 0xf0, 0x30); +} + +static void max96712_pattern_enable(struct max96712_priv *priv, bool enable) +{ + const u32 h_active = 1920; + const u32 h_fp = 88; + const u32 h_sw = 44; + const u32 h_bp = 148; + const u32 h_tot = h_active + h_fp + h_sw + h_bp; + + const u32 v_active = 1080; + const u32 v_fp = 4; + const u32 v_sw = 5; + const u32 v_bp = 36; + const u32 v_tot = v_active + v_fp + v_sw + v_bp; + + if (!enable) { + max96712_write(priv, 0x1051, 0x00); + return; + } + + /* PCLK 75MHz. */ + max96712_write(priv, 0x0009, 0x01); + + /* Configure Video Timing Generator for 1920x1080 @ 30 fps. */ + max96712_write_bulk_value(priv, 0x1052, 0, 3); + max96712_write_bulk_value(priv, 0x1055, v_sw * h_tot, 3); + max96712_write_bulk_value(priv, 0x1058, + (v_active + v_fp + + v_bp) * h_tot, 3); + max96712_write_bulk_value(priv, 0x105b, 0, 3); + max96712_write_bulk_value(priv, 0x105e, h_sw, 2); + max96712_write_bulk_value(priv, 0x1060, h_active + h_fp + h_bp, 2); + max96712_write_bulk_value(priv, 0x1062, v_tot, 2); + max96712_write_bulk_value(priv, 0x1064, + h_tot * (v_sw + v_bp) + (h_sw + h_bp), 3); + max96712_write_bulk_value(priv, 0x1067, h_active, 2); + max96712_write_bulk_value(priv, 0x1069, h_fp + h_sw + h_bp, 2); + max96712_write_bulk_value(priv, 0x106b, v_active, 2); + + /* Generate VS, HS and DE in free-running mode. */ + max96712_write(priv, 0x1050, 0xfb); + + /* Configure Video Pattern Generator. */ + if (priv->pattern == MAX96712_PATTERN_CHECKERBOARD) { + /* Set checkerboard pattern size. */ + max96712_write(priv, 0x1074, 0x3c); + max96712_write(priv, 0x1075, 0x3c); + max96712_write(priv, 0x1076, 0x3c); + + /* Set checkerboard pattern colors. */ + max96712_write_bulk_value(priv, 0x106e, 0xfecc00, 3); + max96712_write_bulk_value(priv, 0x1071, 0x006aa7, 3); + + /* Generate checkerboard pattern. */ + max96712_write(priv, 0x1051, 0x10); + } else { + /* Set gradient increment. */ + max96712_write(priv, 0x106d, 0x10); + + /* Generate gradient pattern. */ + max96712_write(priv, 0x1051, 0x20); + } +} + +static int max96712_s_stream(struct v4l2_subdev *sd, int enable) +{ + struct max96712_priv *priv = v4l2_get_subdevdata(sd); + + if (enable) { + max96712_pattern_enable(priv, true); + max96712_mipi_enable(priv, true); + } else { + max96712_mipi_enable(priv, false); + max96712_pattern_enable(priv, false); + } + + return 0; +} + +static const struct v4l2_subdev_video_ops max96712_video_ops = { + .s_stream = max96712_s_stream, +}; + +static int max96712_get_pad_format(struct v4l2_subdev *sd, + struct v4l2_subdev_state *sd_state, + struct v4l2_subdev_format *format) +{ + format->format.width = 1920; + format->format.height = 1080; + format->format.code = MEDIA_BUS_FMT_RGB888_1X24; + format->format.field = V4L2_FIELD_NONE; + + return 0; +} + +static const struct v4l2_subdev_pad_ops max96712_pad_ops = { + .get_fmt = max96712_get_pad_format, + .set_fmt = max96712_get_pad_format, +}; + +static const struct v4l2_subdev_ops max96712_subdev_ops = { + .video = &max96712_video_ops, + .pad = &max96712_pad_ops, +}; + +static const char * const max96712_test_pattern[] = { + "Checkerboard", + "Gradient", +}; + +static int max96712_s_ctrl(struct v4l2_ctrl *ctrl) +{ + struct max96712_priv *priv = + container_of(ctrl->handler, struct max96712_priv, ctrl_handler); + + switch (ctrl->id) { + case V4L2_CID_TEST_PATTERN: + priv->pattern = ctrl->val ? + MAX96712_PATTERN_GRADIENT : + MAX96712_PATTERN_CHECKERBOARD; + break; + } + return 0; +} + +static const struct v4l2_ctrl_ops max96712_ctrl_ops = { + .s_ctrl = max96712_s_ctrl, +}; + +static int max96712_v4l2_register(struct max96712_priv *priv) +{ + long pixel_rate; + int ret; + + v4l2_i2c_subdev_init(&priv->sd, priv->client, &max96712_subdev_ops); + priv->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; + priv->sd.entity.function = MEDIA_ENT_F_VID_IF_BRIDGE; + + v4l2_ctrl_handler_init(&priv->ctrl_handler, 2); + + /* + * TODO: Once V4L2_CID_LINK_FREQ is changed from a menu control to an + * INT64 control it should be used here instead of V4L2_CID_PIXEL_RATE. + */ + pixel_rate = MAX96712_DPLL_FREQ / priv->mipi.num_data_lanes * 1000000; + v4l2_ctrl_new_std(&priv->ctrl_handler, NULL, V4L2_CID_PIXEL_RATE, + pixel_rate, pixel_rate, 1, pixel_rate); + + v4l2_ctrl_new_std_menu_items(&priv->ctrl_handler, &max96712_ctrl_ops, + V4L2_CID_TEST_PATTERN, + ARRAY_SIZE(max96712_test_pattern) - 1, + 0, 0, max96712_test_pattern); + + priv->sd.ctrl_handler = &priv->ctrl_handler; + ret = priv->ctrl_handler.error; + if (ret) + goto error; + + priv->pads[0].flags = MEDIA_PAD_FL_SOURCE; + ret = media_entity_pads_init(&priv->sd.entity, 1, priv->pads); + if (ret) + goto error; + + v4l2_set_subdevdata(&priv->sd, priv); + + ret = v4l2_async_register_subdev(&priv->sd); + if (ret < 0) { + dev_err(&priv->client->dev, "Unable to register subdevice\n"); + goto error; + } + + return 0; +error: + v4l2_ctrl_handler_free(&priv->ctrl_handler); + + return ret; +} + +static int max96712_parse_dt(struct max96712_priv *priv) +{ + struct fwnode_handle *ep; + struct v4l2_fwnode_endpoint v4l2_ep = { + .bus_type = V4L2_MBUS_CSI2_DPHY + }; + int ret; + + ep = fwnode_graph_get_endpoint_by_id(dev_fwnode(&priv->client->dev), 4, + 0, 0); + if (!ep) { + dev_err(&priv->client->dev, "Not connected to subdevice\n"); + return -EINVAL; + } + + ret = v4l2_fwnode_endpoint_parse(ep, &v4l2_ep); + fwnode_handle_put(ep); + if (ret) { + dev_err(&priv->client->dev, "Could not parse v4l2 endpoint\n"); + return -EINVAL; + } + + if (v4l2_ep.bus.mipi_csi2.num_data_lanes != 4) { + dev_err(&priv->client->dev, "Only 4 data lanes supported\n"); + return -EINVAL; + } + + priv->mipi = v4l2_ep.bus.mipi_csi2; + + return 0; +} + +static const struct regmap_config max96712_i2c_regmap = { + .reg_bits = 16, + .val_bits = 8, + .max_register = 0x1f00, +}; + +static int max96712_probe(struct i2c_client *client) +{ + struct max96712_priv *priv; + int ret; + + priv = devm_kzalloc(&client->dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + priv->client = client; + i2c_set_clientdata(client, priv); + + priv->regmap = devm_regmap_init_i2c(client, &max96712_i2c_regmap); + if (IS_ERR(priv->regmap)) + return PTR_ERR(priv->regmap); + + priv->gpiod_pwdn = devm_gpiod_get_optional(&client->dev, "enable", + GPIOD_OUT_HIGH); + if (IS_ERR(priv->gpiod_pwdn)) + return PTR_ERR(priv->gpiod_pwdn); + + gpiod_set_consumer_name(priv->gpiod_pwdn, "max96712-pwdn"); + gpiod_set_value_cansleep(priv->gpiod_pwdn, 1); + + if (priv->gpiod_pwdn) + usleep_range(4000, 5000); + + if (max96712_read(priv, 0x4a) != MAX96712_ID) + return -ENODEV; + + max96712_reset(priv); + + ret = max96712_parse_dt(priv); + if (ret) + return ret; + + max96712_mipi_configure(priv); + + return max96712_v4l2_register(priv); +} + +static int max96712_remove(struct i2c_client *client) +{ + struct max96712_priv *priv = i2c_get_clientdata(client); + + v4l2_async_unregister_subdev(&priv->sd); + + gpiod_set_value_cansleep(priv->gpiod_pwdn, 0); + + return 0; +} + +static const struct of_device_id max96712_of_table[] = { + { .compatible = "maxim,max96712" }, + { /* sentinel */ }, +}; +MODULE_DEVICE_TABLE(of, max96712_of_table); + +static struct i2c_driver max96712_i2c_driver = { + .driver = { + .name = "max96712", + .of_match_table = of_match_ptr(max96712_of_table), + }, + .probe_new = max96712_probe, + .remove = max96712_remove, +}; + +module_i2c_driver(max96712_i2c_driver); + +MODULE_DESCRIPTION("Maxim MAX96712 Quad GMSL2 Deserializer Driver"); +MODULE_AUTHOR("Niklas Söderlund <niklas.soderlund@ragnatech.se>"); +MODULE_LICENSE("GPL"); diff --git a/drivers/staging/media/meson/vdec/vdec_helpers.c b/drivers/staging/media/meson/vdec/vdec_helpers.c index b9125c295d1d..203d7afa085d 100644 --- a/drivers/staging/media/meson/vdec/vdec_helpers.c +++ b/drivers/staging/media/meson/vdec/vdec_helpers.c @@ -276,13 +276,13 @@ static void dst_buf_done(struct amvdec_session *sess, switch (sess->pixfmt_cap) { case V4L2_PIX_FMT_NV12M: - vbuf->vb2_buf.planes[0].bytesused = output_size; - vbuf->vb2_buf.planes[1].bytesused = output_size / 2; + vb2_set_plane_payload(&vbuf->vb2_buf, 0, output_size); + vb2_set_plane_payload(&vbuf->vb2_buf, 1, output_size / 2); break; case V4L2_PIX_FMT_YUV420M: - vbuf->vb2_buf.planes[0].bytesused = output_size; - vbuf->vb2_buf.planes[1].bytesused = output_size / 4; - vbuf->vb2_buf.planes[2].bytesused = output_size / 4; + vb2_set_plane_payload(&vbuf->vb2_buf, 0, output_size); + vb2_set_plane_payload(&vbuf->vb2_buf, 1, output_size / 4); + vb2_set_plane_payload(&vbuf->vb2_buf, 2, output_size / 4); break; } diff --git a/drivers/staging/media/rkvdec/Kconfig b/drivers/staging/media/rkvdec/Kconfig index c02199b5e0fd..dc7292f346fa 100644 --- a/drivers/staging/media/rkvdec/Kconfig +++ b/drivers/staging/media/rkvdec/Kconfig @@ -9,6 +9,7 @@ config VIDEO_ROCKCHIP_VDEC select VIDEOBUF2_VMALLOC select V4L2_MEM2MEM_DEV select V4L2_H264 + select V4L2_VP9 help Support for the Rockchip Video Decoder IP present on Rockchip SoCs, which accelerates video decoding. diff --git a/drivers/staging/media/rkvdec/Makefile b/drivers/staging/media/rkvdec/Makefile index c08fed0a39f9..cb86b429cfaa 100644 --- a/drivers/staging/media/rkvdec/Makefile +++ b/drivers/staging/media/rkvdec/Makefile @@ -1,3 +1,3 @@ obj-$(CONFIG_VIDEO_ROCKCHIP_VDEC) += rockchip-vdec.o -rockchip-vdec-y += rkvdec.o rkvdec-h264.o +rockchip-vdec-y += rkvdec.o rkvdec-h264.o rkvdec-vp9.o diff --git a/drivers/staging/media/rkvdec/rkvdec-vp9.c b/drivers/staging/media/rkvdec/rkvdec-vp9.c new file mode 100644 index 000000000000..311a12656072 --- /dev/null +++ b/drivers/staging/media/rkvdec/rkvdec-vp9.c @@ -0,0 +1,1072 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Rockchip Video Decoder VP9 backend + * + * Copyright (C) 2019 Collabora, Ltd. + * Boris Brezillon <boris.brezillon@collabora.com> + * Copyright (C) 2021 Collabora, Ltd. + * Andrzej Pietrasiewicz <andrzej.p@collabora.com> + * + * Copyright (C) 2016 Rockchip Electronics Co., Ltd. + * Alpha Lin <Alpha.Lin@rock-chips.com> + */ + +/* + * For following the vp9 spec please start reading this driver + * code from rkvdec_vp9_run() followed by rkvdec_vp9_done(). + */ + +#include <linux/kernel.h> +#include <linux/vmalloc.h> +#include <media/v4l2-mem2mem.h> +#include <media/v4l2-vp9.h> + +#include "rkvdec.h" +#include "rkvdec-regs.h" + +#define RKVDEC_VP9_PROBE_SIZE 4864 +#define RKVDEC_VP9_COUNT_SIZE 13232 +#define RKVDEC_VP9_MAX_SEGMAP_SIZE 73728 + +struct rkvdec_vp9_intra_mode_probs { + u8 y_mode[105]; + u8 uv_mode[23]; +}; + +struct rkvdec_vp9_intra_only_frame_probs { + u8 coef_intra[4][2][128]; + struct rkvdec_vp9_intra_mode_probs intra_mode[10]; +}; + +struct rkvdec_vp9_inter_frame_probs { + u8 y_mode[4][9]; + u8 comp_mode[5]; + u8 comp_ref[5]; + u8 single_ref[5][2]; + u8 inter_mode[7][3]; + u8 interp_filter[4][2]; + u8 padding0[11]; + u8 coef[2][4][2][128]; + u8 uv_mode_0_2[3][9]; + u8 padding1[5]; + u8 uv_mode_3_5[3][9]; + u8 padding2[5]; + u8 uv_mode_6_8[3][9]; + u8 padding3[5]; + u8 uv_mode_9[9]; + u8 padding4[7]; + u8 padding5[16]; + struct { + u8 joint[3]; + u8 sign[2]; + u8 classes[2][10]; + u8 class0_bit[2]; + u8 bits[2][10]; + u8 class0_fr[2][2][3]; + u8 fr[2][3]; + u8 class0_hp[2]; + u8 hp[2]; + } mv; +}; + +struct rkvdec_vp9_probs { + u8 partition[16][3]; + u8 pred[3]; + u8 tree[7]; + u8 skip[3]; + u8 tx32[2][3]; + u8 tx16[2][2]; + u8 tx8[2][1]; + u8 is_inter[4]; + /* 128 bit alignment */ + u8 padding0[3]; + union { + struct rkvdec_vp9_inter_frame_probs inter; + struct rkvdec_vp9_intra_only_frame_probs intra_only; + }; +}; + +/* Data structure describing auxiliary buffer format. */ +struct rkvdec_vp9_priv_tbl { + struct rkvdec_vp9_probs probs; + u8 segmap[2][RKVDEC_VP9_MAX_SEGMAP_SIZE]; +}; + +struct rkvdec_vp9_refs_counts { + u32 eob[2]; + u32 coeff[3]; +}; + +struct rkvdec_vp9_inter_frame_symbol_counts { + u32 partition[16][4]; + u32 skip[3][2]; + u32 inter[4][2]; + u32 tx32p[2][4]; + u32 tx16p[2][4]; + u32 tx8p[2][2]; + u32 y_mode[4][10]; + u32 uv_mode[10][10]; + u32 comp[5][2]; + u32 comp_ref[5][2]; + u32 single_ref[5][2][2]; + u32 mv_mode[7][4]; + u32 filter[4][3]; + u32 mv_joint[4]; + u32 sign[2][2]; + /* add 1 element for align */ + u32 classes[2][11 + 1]; + u32 class0[2][2]; + u32 bits[2][10][2]; + u32 class0_fp[2][2][4]; + u32 fp[2][4]; + u32 class0_hp[2][2]; + u32 hp[2][2]; + struct rkvdec_vp9_refs_counts ref_cnt[2][4][2][6][6]; +}; + +struct rkvdec_vp9_intra_frame_symbol_counts { + u32 partition[4][4][4]; + u32 skip[3][2]; + u32 intra[4][2]; + u32 tx32p[2][4]; + u32 tx16p[2][4]; + u32 tx8p[2][2]; + struct rkvdec_vp9_refs_counts ref_cnt[2][4][2][6][6]; +}; + +struct rkvdec_vp9_run { + struct rkvdec_run base; + const struct v4l2_ctrl_vp9_frame *decode_params; +}; + +struct rkvdec_vp9_frame_info { + u32 valid : 1; + u32 segmapid : 1; + u32 frame_context_idx : 2; + u32 reference_mode : 2; + u32 tx_mode : 3; + u32 interpolation_filter : 3; + u32 flags; + u64 timestamp; + struct v4l2_vp9_segmentation seg; + struct v4l2_vp9_loop_filter lf; +}; + +struct rkvdec_vp9_ctx { + struct rkvdec_aux_buf priv_tbl; + struct rkvdec_aux_buf count_tbl; + struct v4l2_vp9_frame_symbol_counts inter_cnts; + struct v4l2_vp9_frame_symbol_counts intra_cnts; + struct v4l2_vp9_frame_context probability_tables; + struct v4l2_vp9_frame_context frame_context[4]; + struct rkvdec_vp9_frame_info cur; + struct rkvdec_vp9_frame_info last; +}; + +static void write_coeff_plane(const u8 coef[6][6][3], u8 *coeff_plane) +{ + unsigned int idx = 0, byte_count = 0; + int k, m, n; + u8 p; + + for (k = 0; k < 6; k++) { + for (m = 0; m < 6; m++) { + for (n = 0; n < 3; n++) { + p = coef[k][m][n]; + coeff_plane[idx++] = p; + byte_count++; + if (byte_count == 27) { + idx += 5; + byte_count = 0; + } + } + } + } +} + +static void init_intra_only_probs(struct rkvdec_ctx *ctx, + const struct rkvdec_vp9_run *run) +{ + struct rkvdec_vp9_ctx *vp9_ctx = ctx->priv; + struct rkvdec_vp9_priv_tbl *tbl = vp9_ctx->priv_tbl.cpu; + struct rkvdec_vp9_intra_only_frame_probs *rkprobs; + const struct v4l2_vp9_frame_context *probs; + unsigned int i, j, k; + + rkprobs = &tbl->probs.intra_only; + probs = &vp9_ctx->probability_tables; + + /* + * intra only 149 x 128 bits ,aligned to 152 x 128 bits coeff related + * prob 64 x 128 bits + */ + for (i = 0; i < ARRAY_SIZE(probs->coef); i++) { + for (j = 0; j < ARRAY_SIZE(probs->coef[0]); j++) + write_coeff_plane(probs->coef[i][j][0], + rkprobs->coef_intra[i][j]); + } + + /* intra mode prob 80 x 128 bits */ + for (i = 0; i < ARRAY_SIZE(v4l2_vp9_kf_y_mode_prob); i++) { + unsigned int byte_count = 0; + int idx = 0; + + /* vp9_kf_y_mode_prob */ + for (j = 0; j < ARRAY_SIZE(v4l2_vp9_kf_y_mode_prob[0]); j++) { + for (k = 0; k < ARRAY_SIZE(v4l2_vp9_kf_y_mode_prob[0][0]); + k++) { + u8 val = v4l2_vp9_kf_y_mode_prob[i][j][k]; + + rkprobs->intra_mode[i].y_mode[idx++] = val; + byte_count++; + if (byte_count == 27) { + byte_count = 0; + idx += 5; + } + } + } + + } + + for (i = 0; i < sizeof(v4l2_vp9_kf_uv_mode_prob); ++i) { + const u8 *ptr = (const u8 *)v4l2_vp9_kf_uv_mode_prob; + + rkprobs->intra_mode[i / 23].uv_mode[i % 23] = ptr[i]; + } +} + +static void init_inter_probs(struct rkvdec_ctx *ctx, + const struct rkvdec_vp9_run *run) +{ + struct rkvdec_vp9_ctx *vp9_ctx = ctx->priv; + struct rkvdec_vp9_priv_tbl *tbl = vp9_ctx->priv_tbl.cpu; + struct rkvdec_vp9_inter_frame_probs *rkprobs; + const struct v4l2_vp9_frame_context *probs; + unsigned int i, j, k; + + rkprobs = &tbl->probs.inter; + probs = &vp9_ctx->probability_tables; + + /* + * inter probs + * 151 x 128 bits, aligned to 152 x 128 bits + * inter only + * intra_y_mode & inter_block info 6 x 128 bits + */ + + memcpy(rkprobs->y_mode, probs->y_mode, sizeof(rkprobs->y_mode)); + memcpy(rkprobs->comp_mode, probs->comp_mode, + sizeof(rkprobs->comp_mode)); + memcpy(rkprobs->comp_ref, probs->comp_ref, + sizeof(rkprobs->comp_ref)); + memcpy(rkprobs->single_ref, probs->single_ref, + sizeof(rkprobs->single_ref)); + memcpy(rkprobs->inter_mode, probs->inter_mode, + sizeof(rkprobs->inter_mode)); + memcpy(rkprobs->interp_filter, probs->interp_filter, + sizeof(rkprobs->interp_filter)); + + /* 128 x 128 bits coeff related */ + for (i = 0; i < ARRAY_SIZE(probs->coef); i++) { + for (j = 0; j < ARRAY_SIZE(probs->coef[0]); j++) { + for (k = 0; k < ARRAY_SIZE(probs->coef[0][0]); k++) + write_coeff_plane(probs->coef[i][j][k], + rkprobs->coef[k][i][j]); + } + } + + /* intra uv mode 6 x 128 */ + memcpy(rkprobs->uv_mode_0_2, &probs->uv_mode[0], + sizeof(rkprobs->uv_mode_0_2)); + memcpy(rkprobs->uv_mode_3_5, &probs->uv_mode[3], + sizeof(rkprobs->uv_mode_3_5)); + memcpy(rkprobs->uv_mode_6_8, &probs->uv_mode[6], + sizeof(rkprobs->uv_mode_6_8)); + memcpy(rkprobs->uv_mode_9, &probs->uv_mode[9], + sizeof(rkprobs->uv_mode_9)); + + /* mv related 6 x 128 */ + memcpy(rkprobs->mv.joint, probs->mv.joint, + sizeof(rkprobs->mv.joint)); + memcpy(rkprobs->mv.sign, probs->mv.sign, + sizeof(rkprobs->mv.sign)); + memcpy(rkprobs->mv.classes, probs->mv.classes, + sizeof(rkprobs->mv.classes)); + memcpy(rkprobs->mv.class0_bit, probs->mv.class0_bit, + sizeof(rkprobs->mv.class0_bit)); + memcpy(rkprobs->mv.bits, probs->mv.bits, + sizeof(rkprobs->mv.bits)); + memcpy(rkprobs->mv.class0_fr, probs->mv.class0_fr, + sizeof(rkprobs->mv.class0_fr)); + memcpy(rkprobs->mv.fr, probs->mv.fr, + sizeof(rkprobs->mv.fr)); + memcpy(rkprobs->mv.class0_hp, probs->mv.class0_hp, + sizeof(rkprobs->mv.class0_hp)); + memcpy(rkprobs->mv.hp, probs->mv.hp, + sizeof(rkprobs->mv.hp)); +} + +static void init_probs(struct rkvdec_ctx *ctx, + const struct rkvdec_vp9_run *run) +{ + const struct v4l2_ctrl_vp9_frame *dec_params; + struct rkvdec_vp9_ctx *vp9_ctx = ctx->priv; + struct rkvdec_vp9_priv_tbl *tbl = vp9_ctx->priv_tbl.cpu; + struct rkvdec_vp9_probs *rkprobs = &tbl->probs; + const struct v4l2_vp9_segmentation *seg; + const struct v4l2_vp9_frame_context *probs; + bool intra_only; + + dec_params = run->decode_params; + probs = &vp9_ctx->probability_tables; + seg = &dec_params->seg; + + memset(rkprobs, 0, sizeof(*rkprobs)); + + intra_only = !!(dec_params->flags & + (V4L2_VP9_FRAME_FLAG_KEY_FRAME | + V4L2_VP9_FRAME_FLAG_INTRA_ONLY)); + + /* sb info 5 x 128 bit */ + memcpy(rkprobs->partition, + intra_only ? v4l2_vp9_kf_partition_probs : probs->partition, + sizeof(rkprobs->partition)); + + memcpy(rkprobs->pred, seg->pred_probs, sizeof(rkprobs->pred)); + memcpy(rkprobs->tree, seg->tree_probs, sizeof(rkprobs->tree)); + memcpy(rkprobs->skip, probs->skip, sizeof(rkprobs->skip)); + memcpy(rkprobs->tx32, probs->tx32, sizeof(rkprobs->tx32)); + memcpy(rkprobs->tx16, probs->tx16, sizeof(rkprobs->tx16)); + memcpy(rkprobs->tx8, probs->tx8, sizeof(rkprobs->tx8)); + memcpy(rkprobs->is_inter, probs->is_inter, sizeof(rkprobs->is_inter)); + + if (intra_only) + init_intra_only_probs(ctx, run); + else + init_inter_probs(ctx, run); +} + +struct rkvdec_vp9_ref_reg { + u32 reg_frm_size; + u32 reg_hor_stride; + u32 reg_y_stride; + u32 reg_yuv_stride; + u32 reg_ref_base; +}; + +static struct rkvdec_vp9_ref_reg ref_regs[] = { + { + .reg_frm_size = RKVDEC_REG_VP9_FRAME_SIZE(0), + .reg_hor_stride = RKVDEC_VP9_HOR_VIRSTRIDE(0), + .reg_y_stride = RKVDEC_VP9_LAST_FRAME_YSTRIDE, + .reg_yuv_stride = RKVDEC_VP9_LAST_FRAME_YUVSTRIDE, + .reg_ref_base = RKVDEC_REG_VP9_LAST_FRAME_BASE, + }, + { + .reg_frm_size = RKVDEC_REG_VP9_FRAME_SIZE(1), + .reg_hor_stride = RKVDEC_VP9_HOR_VIRSTRIDE(1), + .reg_y_stride = RKVDEC_VP9_GOLDEN_FRAME_YSTRIDE, + .reg_yuv_stride = 0, + .reg_ref_base = RKVDEC_REG_VP9_GOLDEN_FRAME_BASE, + }, + { + .reg_frm_size = RKVDEC_REG_VP9_FRAME_SIZE(2), + .reg_hor_stride = RKVDEC_VP9_HOR_VIRSTRIDE(2), + .reg_y_stride = RKVDEC_VP9_ALTREF_FRAME_YSTRIDE, + .reg_yuv_stride = 0, + .reg_ref_base = RKVDEC_REG_VP9_ALTREF_FRAME_BASE, + } +}; + +static struct rkvdec_decoded_buffer * +get_ref_buf(struct rkvdec_ctx *ctx, struct vb2_v4l2_buffer *dst, u64 timestamp) +{ + struct v4l2_m2m_ctx *m2m_ctx = ctx->fh.m2m_ctx; + struct vb2_queue *cap_q = &m2m_ctx->cap_q_ctx.q; + int buf_idx; + + /* + * If a ref is unused or invalid, address of current destination + * buffer is returned. + */ + buf_idx = vb2_find_timestamp(cap_q, timestamp, 0); + if (buf_idx < 0) + return vb2_to_rkvdec_decoded_buf(&dst->vb2_buf); + + return vb2_to_rkvdec_decoded_buf(vb2_get_buffer(cap_q, buf_idx)); +} + +static dma_addr_t get_mv_base_addr(struct rkvdec_decoded_buffer *buf) +{ + unsigned int aligned_pitch, aligned_height, yuv_len; + + aligned_height = round_up(buf->vp9.height, 64); + aligned_pitch = round_up(buf->vp9.width * buf->vp9.bit_depth, 512) / 8; + yuv_len = (aligned_height * aligned_pitch * 3) / 2; + + return vb2_dma_contig_plane_dma_addr(&buf->base.vb.vb2_buf, 0) + + yuv_len; +} + +static void config_ref_registers(struct rkvdec_ctx *ctx, + const struct rkvdec_vp9_run *run, + struct rkvdec_decoded_buffer *ref_buf, + struct rkvdec_vp9_ref_reg *ref_reg) +{ + unsigned int aligned_pitch, aligned_height, y_len, yuv_len; + struct rkvdec_dev *rkvdec = ctx->dev; + + aligned_height = round_up(ref_buf->vp9.height, 64); + writel_relaxed(RKVDEC_VP9_FRAMEWIDTH(ref_buf->vp9.width) | + RKVDEC_VP9_FRAMEHEIGHT(ref_buf->vp9.height), + rkvdec->regs + ref_reg->reg_frm_size); + + writel_relaxed(vb2_dma_contig_plane_dma_addr(&ref_buf->base.vb.vb2_buf, 0), + rkvdec->regs + ref_reg->reg_ref_base); + + if (&ref_buf->base.vb == run->base.bufs.dst) + return; + + aligned_pitch = round_up(ref_buf->vp9.width * ref_buf->vp9.bit_depth, 512) / 8; + y_len = aligned_height * aligned_pitch; + yuv_len = (y_len * 3) / 2; + + writel_relaxed(RKVDEC_HOR_Y_VIRSTRIDE(aligned_pitch / 16) | + RKVDEC_HOR_UV_VIRSTRIDE(aligned_pitch / 16), + rkvdec->regs + ref_reg->reg_hor_stride); + writel_relaxed(RKVDEC_VP9_REF_YSTRIDE(y_len / 16), + rkvdec->regs + ref_reg->reg_y_stride); + + if (!ref_reg->reg_yuv_stride) + return; + + writel_relaxed(RKVDEC_VP9_REF_YUVSTRIDE(yuv_len / 16), + rkvdec->regs + ref_reg->reg_yuv_stride); +} + +static void config_seg_registers(struct rkvdec_ctx *ctx, unsigned int segid) +{ + struct rkvdec_vp9_ctx *vp9_ctx = ctx->priv; + const struct v4l2_vp9_segmentation *seg; + struct rkvdec_dev *rkvdec = ctx->dev; + s16 feature_val; + int feature_id; + u32 val = 0; + + seg = vp9_ctx->last.valid ? &vp9_ctx->last.seg : &vp9_ctx->cur.seg; + feature_id = V4L2_VP9_SEG_LVL_ALT_Q; + if (v4l2_vp9_seg_feat_enabled(seg->feature_enabled, feature_id, segid)) { + feature_val = seg->feature_data[segid][feature_id]; + val |= RKVDEC_SEGID_FRAME_QP_DELTA_EN(1) | + RKVDEC_SEGID_FRAME_QP_DELTA(feature_val); + } + + feature_id = V4L2_VP9_SEG_LVL_ALT_L; + if (v4l2_vp9_seg_feat_enabled(seg->feature_enabled, feature_id, segid)) { + feature_val = seg->feature_data[segid][feature_id]; + val |= RKVDEC_SEGID_FRAME_LOOPFILTER_VALUE_EN(1) | + RKVDEC_SEGID_FRAME_LOOPFILTER_VALUE(feature_val); + } + + feature_id = V4L2_VP9_SEG_LVL_REF_FRAME; + if (v4l2_vp9_seg_feat_enabled(seg->feature_enabled, feature_id, segid)) { + feature_val = seg->feature_data[segid][feature_id]; + val |= RKVDEC_SEGID_REFERINFO_EN(1) | + RKVDEC_SEGID_REFERINFO(feature_val); + } + + feature_id = V4L2_VP9_SEG_LVL_SKIP; + if (v4l2_vp9_seg_feat_enabled(seg->feature_enabled, feature_id, segid)) + val |= RKVDEC_SEGID_FRAME_SKIP_EN(1); + + if (!segid && + (seg->flags & V4L2_VP9_SEGMENTATION_FLAG_ABS_OR_DELTA_UPDATE)) + val |= RKVDEC_SEGID_ABS_DELTA(1); + + writel_relaxed(val, rkvdec->regs + RKVDEC_VP9_SEGID_GRP(segid)); +} + +static void update_dec_buf_info(struct rkvdec_decoded_buffer *buf, + const struct v4l2_ctrl_vp9_frame *dec_params) +{ + buf->vp9.width = dec_params->frame_width_minus_1 + 1; + buf->vp9.height = dec_params->frame_height_minus_1 + 1; + buf->vp9.bit_depth = dec_params->bit_depth; +} + +static void update_ctx_cur_info(struct rkvdec_vp9_ctx *vp9_ctx, + struct rkvdec_decoded_buffer *buf, + const struct v4l2_ctrl_vp9_frame *dec_params) +{ + vp9_ctx->cur.valid = true; + vp9_ctx->cur.reference_mode = dec_params->reference_mode; + vp9_ctx->cur.interpolation_filter = dec_params->interpolation_filter; + vp9_ctx->cur.flags = dec_params->flags; + vp9_ctx->cur.timestamp = buf->base.vb.vb2_buf.timestamp; + vp9_ctx->cur.seg = dec_params->seg; + vp9_ctx->cur.lf = dec_params->lf; +} + +static void update_ctx_last_info(struct rkvdec_vp9_ctx *vp9_ctx) +{ + vp9_ctx->last = vp9_ctx->cur; +} + +static void config_registers(struct rkvdec_ctx *ctx, + const struct rkvdec_vp9_run *run) +{ + unsigned int y_len, uv_len, yuv_len, bit_depth, aligned_height, aligned_pitch, stream_len; + const struct v4l2_ctrl_vp9_frame *dec_params; + struct rkvdec_decoded_buffer *ref_bufs[3]; + struct rkvdec_decoded_buffer *dst, *last, *mv_ref; + struct rkvdec_vp9_ctx *vp9_ctx = ctx->priv; + u32 val, last_frame_info = 0; + const struct v4l2_vp9_segmentation *seg; + struct rkvdec_dev *rkvdec = ctx->dev; + dma_addr_t addr; + bool intra_only; + unsigned int i; + + dec_params = run->decode_params; + dst = vb2_to_rkvdec_decoded_buf(&run->base.bufs.dst->vb2_buf); + ref_bufs[0] = get_ref_buf(ctx, &dst->base.vb, dec_params->last_frame_ts); + ref_bufs[1] = get_ref_buf(ctx, &dst->base.vb, dec_params->golden_frame_ts); + ref_bufs[2] = get_ref_buf(ctx, &dst->base.vb, dec_params->alt_frame_ts); + + if (vp9_ctx->last.valid) + last = get_ref_buf(ctx, &dst->base.vb, vp9_ctx->last.timestamp); + else + last = dst; + + update_dec_buf_info(dst, dec_params); + update_ctx_cur_info(vp9_ctx, dst, dec_params); + seg = &dec_params->seg; + + intra_only = !!(dec_params->flags & + (V4L2_VP9_FRAME_FLAG_KEY_FRAME | + V4L2_VP9_FRAME_FLAG_INTRA_ONLY)); + + writel_relaxed(RKVDEC_MODE(RKVDEC_MODE_VP9), + rkvdec->regs + RKVDEC_REG_SYSCTRL); + + bit_depth = dec_params->bit_depth; + aligned_height = round_up(ctx->decoded_fmt.fmt.pix_mp.height, 64); + + aligned_pitch = round_up(ctx->decoded_fmt.fmt.pix_mp.width * + bit_depth, + 512) / 8; + y_len = aligned_height * aligned_pitch; + uv_len = y_len / 2; + yuv_len = y_len + uv_len; + + writel_relaxed(RKVDEC_Y_HOR_VIRSTRIDE(aligned_pitch / 16) | + RKVDEC_UV_HOR_VIRSTRIDE(aligned_pitch / 16), + rkvdec->regs + RKVDEC_REG_PICPAR); + writel_relaxed(RKVDEC_Y_VIRSTRIDE(y_len / 16), + rkvdec->regs + RKVDEC_REG_Y_VIRSTRIDE); + writel_relaxed(RKVDEC_YUV_VIRSTRIDE(yuv_len / 16), + rkvdec->regs + RKVDEC_REG_YUV_VIRSTRIDE); + + stream_len = vb2_get_plane_payload(&run->base.bufs.src->vb2_buf, 0); + writel_relaxed(RKVDEC_STRM_LEN(stream_len), + rkvdec->regs + RKVDEC_REG_STRM_LEN); + + /* + * Reset count buffer, because decoder only output intra related syntax + * counts when decoding intra frame, but update entropy need to update + * all the probabilities. + */ + if (intra_only) + memset(vp9_ctx->count_tbl.cpu, 0, vp9_ctx->count_tbl.size); + + vp9_ctx->cur.segmapid = vp9_ctx->last.segmapid; + if (!intra_only && + !(dec_params->flags & V4L2_VP9_FRAME_FLAG_ERROR_RESILIENT) && + (!(seg->flags & V4L2_VP9_SEGMENTATION_FLAG_ENABLED) || + (seg->flags & V4L2_VP9_SEGMENTATION_FLAG_UPDATE_MAP))) + vp9_ctx->cur.segmapid++; + + for (i = 0; i < ARRAY_SIZE(ref_bufs); i++) + config_ref_registers(ctx, run, ref_bufs[i], &ref_regs[i]); + + for (i = 0; i < 8; i++) + config_seg_registers(ctx, i); + + writel_relaxed(RKVDEC_VP9_TX_MODE(vp9_ctx->cur.tx_mode) | + RKVDEC_VP9_FRAME_REF_MODE(dec_params->reference_mode), + rkvdec->regs + RKVDEC_VP9_CPRHEADER_CONFIG); + + if (!intra_only) { + const struct v4l2_vp9_loop_filter *lf; + s8 delta; + + if (vp9_ctx->last.valid) + lf = &vp9_ctx->last.lf; + else + lf = &vp9_ctx->cur.lf; + + val = 0; + for (i = 0; i < ARRAY_SIZE(lf->ref_deltas); i++) { + delta = lf->ref_deltas[i]; + val |= RKVDEC_REF_DELTAS_LASTFRAME(i, delta); + } + + writel_relaxed(val, + rkvdec->regs + RKVDEC_VP9_REF_DELTAS_LASTFRAME); + + for (i = 0; i < ARRAY_SIZE(lf->mode_deltas); i++) { + delta = lf->mode_deltas[i]; + last_frame_info |= RKVDEC_MODE_DELTAS_LASTFRAME(i, + delta); + } + } + + if (vp9_ctx->last.valid && !intra_only && + vp9_ctx->last.seg.flags & V4L2_VP9_SEGMENTATION_FLAG_ENABLED) + last_frame_info |= RKVDEC_SEG_EN_LASTFRAME; + + if (vp9_ctx->last.valid && + vp9_ctx->last.flags & V4L2_VP9_FRAME_FLAG_SHOW_FRAME) + last_frame_info |= RKVDEC_LAST_SHOW_FRAME; + + if (vp9_ctx->last.valid && + vp9_ctx->last.flags & + (V4L2_VP9_FRAME_FLAG_KEY_FRAME | V4L2_VP9_FRAME_FLAG_INTRA_ONLY)) + last_frame_info |= RKVDEC_LAST_INTRA_ONLY; + + if (vp9_ctx->last.valid && + last->vp9.width == dst->vp9.width && + last->vp9.height == dst->vp9.height) + last_frame_info |= RKVDEC_LAST_WIDHHEIGHT_EQCUR; + + writel_relaxed(last_frame_info, + rkvdec->regs + RKVDEC_VP9_INFO_LASTFRAME); + + writel_relaxed(stream_len - dec_params->compressed_header_size - + dec_params->uncompressed_header_size, + rkvdec->regs + RKVDEC_VP9_LASTTILE_SIZE); + + for (i = 0; !intra_only && i < ARRAY_SIZE(ref_bufs); i++) { + unsigned int refw = ref_bufs[i]->vp9.width; + unsigned int refh = ref_bufs[i]->vp9.height; + u32 hscale, vscale; + + hscale = (refw << 14) / dst->vp9.width; + vscale = (refh << 14) / dst->vp9.height; + writel_relaxed(RKVDEC_VP9_REF_HOR_SCALE(hscale) | + RKVDEC_VP9_REF_VER_SCALE(vscale), + rkvdec->regs + RKVDEC_VP9_REF_SCALE(i)); + } + + addr = vb2_dma_contig_plane_dma_addr(&dst->base.vb.vb2_buf, 0); + writel_relaxed(addr, rkvdec->regs + RKVDEC_REG_DECOUT_BASE); + addr = vb2_dma_contig_plane_dma_addr(&run->base.bufs.src->vb2_buf, 0); + writel_relaxed(addr, rkvdec->regs + RKVDEC_REG_STRM_RLC_BASE); + writel_relaxed(vp9_ctx->priv_tbl.dma + + offsetof(struct rkvdec_vp9_priv_tbl, probs), + rkvdec->regs + RKVDEC_REG_CABACTBL_PROB_BASE); + writel_relaxed(vp9_ctx->count_tbl.dma, + rkvdec->regs + RKVDEC_REG_VP9COUNT_BASE); + + writel_relaxed(vp9_ctx->priv_tbl.dma + + offsetof(struct rkvdec_vp9_priv_tbl, segmap) + + (RKVDEC_VP9_MAX_SEGMAP_SIZE * vp9_ctx->cur.segmapid), + rkvdec->regs + RKVDEC_REG_VP9_SEGIDCUR_BASE); + writel_relaxed(vp9_ctx->priv_tbl.dma + + offsetof(struct rkvdec_vp9_priv_tbl, segmap) + + (RKVDEC_VP9_MAX_SEGMAP_SIZE * (!vp9_ctx->cur.segmapid)), + rkvdec->regs + RKVDEC_REG_VP9_SEGIDLAST_BASE); + + if (!intra_only && + !(dec_params->flags & V4L2_VP9_FRAME_FLAG_ERROR_RESILIENT) && + vp9_ctx->last.valid) + mv_ref = last; + else + mv_ref = dst; + + writel_relaxed(get_mv_base_addr(mv_ref), + rkvdec->regs + RKVDEC_VP9_REF_COLMV_BASE); + + writel_relaxed(ctx->decoded_fmt.fmt.pix_mp.width | + (ctx->decoded_fmt.fmt.pix_mp.height << 16), + rkvdec->regs + RKVDEC_REG_PERFORMANCE_CYCLE); +} + +static int validate_dec_params(struct rkvdec_ctx *ctx, + const struct v4l2_ctrl_vp9_frame *dec_params) +{ + unsigned int aligned_width, aligned_height; + + /* We only support profile 0. */ + if (dec_params->profile != 0) { + dev_err(ctx->dev->dev, "unsupported profile %d\n", + dec_params->profile); + return -EINVAL; + } + + aligned_width = round_up(dec_params->frame_width_minus_1 + 1, 64); + aligned_height = round_up(dec_params->frame_height_minus_1 + 1, 64); + + /* + * Userspace should update the capture/decoded format when the + * resolution changes. + */ + if (aligned_width != ctx->decoded_fmt.fmt.pix_mp.width || + aligned_height != ctx->decoded_fmt.fmt.pix_mp.height) { + dev_err(ctx->dev->dev, + "unexpected bitstream resolution %dx%d\n", + dec_params->frame_width_minus_1 + 1, + dec_params->frame_height_minus_1 + 1); + return -EINVAL; + } + + return 0; +} + +static int rkvdec_vp9_run_preamble(struct rkvdec_ctx *ctx, + struct rkvdec_vp9_run *run) +{ + const struct v4l2_ctrl_vp9_frame *dec_params; + const struct v4l2_ctrl_vp9_compressed_hdr *prob_updates; + struct rkvdec_vp9_ctx *vp9_ctx = ctx->priv; + struct v4l2_ctrl *ctrl; + unsigned int fctx_idx; + int ret; + + /* v4l2-specific stuff */ + rkvdec_run_preamble(ctx, &run->base); + + ctrl = v4l2_ctrl_find(&ctx->ctrl_hdl, + V4L2_CID_STATELESS_VP9_FRAME); + if (WARN_ON(!ctrl)) + return -EINVAL; + dec_params = ctrl->p_cur.p; + + ret = validate_dec_params(ctx, dec_params); + if (ret) + return ret; + + run->decode_params = dec_params; + + ctrl = v4l2_ctrl_find(&ctx->ctrl_hdl, V4L2_CID_STATELESS_VP9_COMPRESSED_HDR); + if (WARN_ON(!ctrl)) + return -EINVAL; + prob_updates = ctrl->p_cur.p; + vp9_ctx->cur.tx_mode = prob_updates->tx_mode; + + /* + * vp9 stuff + * + * by this point the userspace has done all parts of 6.2 uncompressed_header() + * except this fragment: + * if ( FrameIsIntra || error_resilient_mode ) { + * setup_past_independence ( ) + * if ( frame_type == KEY_FRAME || error_resilient_mode == 1 || + * reset_frame_context == 3 ) { + * for ( i = 0; i < 4; i ++ ) { + * save_probs( i ) + * } + * } else if ( reset_frame_context == 2 ) { + * save_probs( frame_context_idx ) + * } + * frame_context_idx = 0 + * } + */ + fctx_idx = v4l2_vp9_reset_frame_ctx(dec_params, vp9_ctx->frame_context); + vp9_ctx->cur.frame_context_idx = fctx_idx; + + /* 6.1 frame(sz): load_probs() and load_probs2() */ + vp9_ctx->probability_tables = vp9_ctx->frame_context[fctx_idx]; + + /* + * The userspace has also performed 6.3 compressed_header(), but handling the + * probs in a special way. All probs which need updating, except MV-related, + * have been read from the bitstream and translated through inv_map_table[], + * but no 6.3.6 inv_recenter_nonneg(v, m) has been performed. The values passed + * by userspace are either translated values (there are no 0 values in + * inv_map_table[]), or zero to indicate no update. All MV-related probs which need + * updating have been read from the bitstream and (mv_prob << 1) | 1 has been + * performed. The values passed by userspace are either new values + * to replace old ones (the above mentioned shift and bitwise or never result in + * a zero) or zero to indicate no update. + * fw_update_probs() performs actual probs updates or leaves probs as-is + * for values for which a zero was passed from userspace. + */ + v4l2_vp9_fw_update_probs(&vp9_ctx->probability_tables, prob_updates, dec_params); + + return 0; +} + +static int rkvdec_vp9_run(struct rkvdec_ctx *ctx) +{ + struct rkvdec_dev *rkvdec = ctx->dev; + struct rkvdec_vp9_run run = { }; + int ret; + + ret = rkvdec_vp9_run_preamble(ctx, &run); + if (ret) { + rkvdec_run_postamble(ctx, &run.base); + return ret; + } + + /* Prepare probs. */ + init_probs(ctx, &run); + + /* Configure hardware registers. */ + config_registers(ctx, &run); + + rkvdec_run_postamble(ctx, &run.base); + + schedule_delayed_work(&rkvdec->watchdog_work, msecs_to_jiffies(2000)); + + writel(1, rkvdec->regs + RKVDEC_REG_PREF_LUMA_CACHE_COMMAND); + writel(1, rkvdec->regs + RKVDEC_REG_PREF_CHR_CACHE_COMMAND); + + writel(0xe, rkvdec->regs + RKVDEC_REG_STRMD_ERR_EN); + /* Start decoding! */ + writel(RKVDEC_INTERRUPT_DEC_E | RKVDEC_CONFIG_DEC_CLK_GATE_E | + RKVDEC_TIMEOUT_E | RKVDEC_BUF_EMPTY_E, + rkvdec->regs + RKVDEC_REG_INTERRUPT); + + return 0; +} + +#define copy_tx_and_skip(p1, p2) \ +do { \ + memcpy((p1)->tx8, (p2)->tx8, sizeof((p1)->tx8)); \ + memcpy((p1)->tx16, (p2)->tx16, sizeof((p1)->tx16)); \ + memcpy((p1)->tx32, (p2)->tx32, sizeof((p1)->tx32)); \ + memcpy((p1)->skip, (p2)->skip, sizeof((p1)->skip)); \ +} while (0) + +static void rkvdec_vp9_done(struct rkvdec_ctx *ctx, + struct vb2_v4l2_buffer *src_buf, + struct vb2_v4l2_buffer *dst_buf, + enum vb2_buffer_state result) +{ + struct rkvdec_vp9_ctx *vp9_ctx = ctx->priv; + unsigned int fctx_idx; + + /* v4l2-specific stuff */ + if (result == VB2_BUF_STATE_ERROR) + goto out_update_last; + + /* + * vp9 stuff + * + * 6.1.2 refresh_probs() + * + * In the spec a complementary condition goes last in 6.1.2 refresh_probs(), + * but it makes no sense to perform all the activities from the first "if" + * there if we actually are not refreshing the frame context. On top of that, + * because of 6.2 uncompressed_header() whenever error_resilient_mode == 1, + * refresh_frame_context == 0. Consequently, if we don't jump to out_update_last + * it means error_resilient_mode must be 0. + */ + if (!(vp9_ctx->cur.flags & V4L2_VP9_FRAME_FLAG_REFRESH_FRAME_CTX)) + goto out_update_last; + + fctx_idx = vp9_ctx->cur.frame_context_idx; + + if (!(vp9_ctx->cur.flags & V4L2_VP9_FRAME_FLAG_PARALLEL_DEC_MODE)) { + /* error_resilient_mode == 0 && frame_parallel_decoding_mode == 0 */ + struct v4l2_vp9_frame_context *probs = &vp9_ctx->probability_tables; + bool frame_is_intra = vp9_ctx->cur.flags & + (V4L2_VP9_FRAME_FLAG_KEY_FRAME | V4L2_VP9_FRAME_FLAG_INTRA_ONLY); + struct tx_and_skip { + u8 tx8[2][1]; + u8 tx16[2][2]; + u8 tx32[2][3]; + u8 skip[3]; + } _tx_skip, *tx_skip = &_tx_skip; + struct v4l2_vp9_frame_symbol_counts *counts; + + /* buffer the forward-updated TX and skip probs */ + if (frame_is_intra) + copy_tx_and_skip(tx_skip, probs); + + /* 6.1.2 refresh_probs(): load_probs() and load_probs2() */ + *probs = vp9_ctx->frame_context[fctx_idx]; + + /* if FrameIsIntra then undo the effect of load_probs2() */ + if (frame_is_intra) + copy_tx_and_skip(probs, tx_skip); + + counts = frame_is_intra ? &vp9_ctx->intra_cnts : &vp9_ctx->inter_cnts; + v4l2_vp9_adapt_coef_probs(probs, counts, + !vp9_ctx->last.valid || + vp9_ctx->last.flags & V4L2_VP9_FRAME_FLAG_KEY_FRAME, + frame_is_intra); + if (!frame_is_intra) { + const struct rkvdec_vp9_inter_frame_symbol_counts *inter_cnts; + u32 classes[2][11]; + int i; + + inter_cnts = vp9_ctx->count_tbl.cpu; + for (i = 0; i < ARRAY_SIZE(classes); ++i) + memcpy(classes[i], inter_cnts->classes[i], sizeof(classes[0])); + counts->classes = &classes; + + /* load_probs2() already done */ + v4l2_vp9_adapt_noncoef_probs(&vp9_ctx->probability_tables, counts, + vp9_ctx->cur.reference_mode, + vp9_ctx->cur.interpolation_filter, + vp9_ctx->cur.tx_mode, vp9_ctx->cur.flags); + } + } + + /* 6.1.2 refresh_probs(): save_probs(fctx_idx) */ + vp9_ctx->frame_context[fctx_idx] = vp9_ctx->probability_tables; + +out_update_last: + update_ctx_last_info(vp9_ctx); +} + +static void rkvdec_init_v4l2_vp9_count_tbl(struct rkvdec_ctx *ctx) +{ + struct rkvdec_vp9_ctx *vp9_ctx = ctx->priv; + struct rkvdec_vp9_intra_frame_symbol_counts *intra_cnts = vp9_ctx->count_tbl.cpu; + struct rkvdec_vp9_inter_frame_symbol_counts *inter_cnts = vp9_ctx->count_tbl.cpu; + int i, j, k, l, m; + + vp9_ctx->inter_cnts.partition = &inter_cnts->partition; + vp9_ctx->inter_cnts.skip = &inter_cnts->skip; + vp9_ctx->inter_cnts.intra_inter = &inter_cnts->inter; + vp9_ctx->inter_cnts.tx32p = &inter_cnts->tx32p; + vp9_ctx->inter_cnts.tx16p = &inter_cnts->tx16p; + vp9_ctx->inter_cnts.tx8p = &inter_cnts->tx8p; + + vp9_ctx->intra_cnts.partition = (u32 (*)[16][4])(&intra_cnts->partition); + vp9_ctx->intra_cnts.skip = &intra_cnts->skip; + vp9_ctx->intra_cnts.intra_inter = &intra_cnts->intra; + vp9_ctx->intra_cnts.tx32p = &intra_cnts->tx32p; + vp9_ctx->intra_cnts.tx16p = &intra_cnts->tx16p; + vp9_ctx->intra_cnts.tx8p = &intra_cnts->tx8p; + + vp9_ctx->inter_cnts.y_mode = &inter_cnts->y_mode; + vp9_ctx->inter_cnts.uv_mode = &inter_cnts->uv_mode; + vp9_ctx->inter_cnts.comp = &inter_cnts->comp; + vp9_ctx->inter_cnts.comp_ref = &inter_cnts->comp_ref; + vp9_ctx->inter_cnts.single_ref = &inter_cnts->single_ref; + vp9_ctx->inter_cnts.mv_mode = &inter_cnts->mv_mode; + vp9_ctx->inter_cnts.filter = &inter_cnts->filter; + vp9_ctx->inter_cnts.mv_joint = &inter_cnts->mv_joint; + vp9_ctx->inter_cnts.sign = &inter_cnts->sign; + /* + * rk hardware actually uses "u32 classes[2][11 + 1];" + * instead of "u32 classes[2][11];", so this must be explicitly + * copied into vp9_ctx->classes when passing the data to the + * vp9 library function + */ + vp9_ctx->inter_cnts.class0 = &inter_cnts->class0; + vp9_ctx->inter_cnts.bits = &inter_cnts->bits; + vp9_ctx->inter_cnts.class0_fp = &inter_cnts->class0_fp; + vp9_ctx->inter_cnts.fp = &inter_cnts->fp; + vp9_ctx->inter_cnts.class0_hp = &inter_cnts->class0_hp; + vp9_ctx->inter_cnts.hp = &inter_cnts->hp; + +#define INNERMOST_LOOP \ + do { \ + for (m = 0; m < ARRAY_SIZE(vp9_ctx->inter_cnts.coeff[0][0][0][0]); ++m) {\ + vp9_ctx->inter_cnts.coeff[i][j][k][l][m] = \ + &inter_cnts->ref_cnt[k][i][j][l][m].coeff; \ + vp9_ctx->inter_cnts.eob[i][j][k][l][m][0] = \ + &inter_cnts->ref_cnt[k][i][j][l][m].eob[0]; \ + vp9_ctx->inter_cnts.eob[i][j][k][l][m][1] = \ + &inter_cnts->ref_cnt[k][i][j][l][m].eob[1]; \ + \ + vp9_ctx->intra_cnts.coeff[i][j][k][l][m] = \ + &intra_cnts->ref_cnt[k][i][j][l][m].coeff; \ + vp9_ctx->intra_cnts.eob[i][j][k][l][m][0] = \ + &intra_cnts->ref_cnt[k][i][j][l][m].eob[0]; \ + vp9_ctx->intra_cnts.eob[i][j][k][l][m][1] = \ + &intra_cnts->ref_cnt[k][i][j][l][m].eob[1]; \ + } \ + } while (0) + + for (i = 0; i < ARRAY_SIZE(vp9_ctx->inter_cnts.coeff); ++i) + for (j = 0; j < ARRAY_SIZE(vp9_ctx->inter_cnts.coeff[0]); ++j) + for (k = 0; k < ARRAY_SIZE(vp9_ctx->inter_cnts.coeff[0][0]); ++k) + for (l = 0; l < ARRAY_SIZE(vp9_ctx->inter_cnts.coeff[0][0][0]); ++l) + INNERMOST_LOOP; +#undef INNERMOST_LOOP +} + +static int rkvdec_vp9_start(struct rkvdec_ctx *ctx) +{ + struct rkvdec_dev *rkvdec = ctx->dev; + struct rkvdec_vp9_priv_tbl *priv_tbl; + struct rkvdec_vp9_ctx *vp9_ctx; + unsigned char *count_tbl; + int ret; + + vp9_ctx = kzalloc(sizeof(*vp9_ctx), GFP_KERNEL); + if (!vp9_ctx) + return -ENOMEM; + + ctx->priv = vp9_ctx; + + priv_tbl = dma_alloc_coherent(rkvdec->dev, sizeof(*priv_tbl), + &vp9_ctx->priv_tbl.dma, GFP_KERNEL); + if (!priv_tbl) { + ret = -ENOMEM; + goto err_free_ctx; + } + + vp9_ctx->priv_tbl.size = sizeof(*priv_tbl); + vp9_ctx->priv_tbl.cpu = priv_tbl; + memset(priv_tbl, 0, sizeof(*priv_tbl)); + + count_tbl = dma_alloc_coherent(rkvdec->dev, RKVDEC_VP9_COUNT_SIZE, + &vp9_ctx->count_tbl.dma, GFP_KERNEL); + if (!count_tbl) { + ret = -ENOMEM; + goto err_free_priv_tbl; + } + + vp9_ctx->count_tbl.size = RKVDEC_VP9_COUNT_SIZE; + vp9_ctx->count_tbl.cpu = count_tbl; + memset(count_tbl, 0, sizeof(*count_tbl)); + rkvdec_init_v4l2_vp9_count_tbl(ctx); + + return 0; + +err_free_priv_tbl: + dma_free_coherent(rkvdec->dev, vp9_ctx->priv_tbl.size, + vp9_ctx->priv_tbl.cpu, vp9_ctx->priv_tbl.dma); + +err_free_ctx: + kfree(vp9_ctx); + return ret; +} + +static void rkvdec_vp9_stop(struct rkvdec_ctx *ctx) +{ + struct rkvdec_vp9_ctx *vp9_ctx = ctx->priv; + struct rkvdec_dev *rkvdec = ctx->dev; + + dma_free_coherent(rkvdec->dev, vp9_ctx->count_tbl.size, + vp9_ctx->count_tbl.cpu, vp9_ctx->count_tbl.dma); + dma_free_coherent(rkvdec->dev, vp9_ctx->priv_tbl.size, + vp9_ctx->priv_tbl.cpu, vp9_ctx->priv_tbl.dma); + kfree(vp9_ctx); +} + +static int rkvdec_vp9_adjust_fmt(struct rkvdec_ctx *ctx, + struct v4l2_format *f) +{ + struct v4l2_pix_format_mplane *fmt = &f->fmt.pix_mp; + + fmt->num_planes = 1; + if (!fmt->plane_fmt[0].sizeimage) + fmt->plane_fmt[0].sizeimage = fmt->width * fmt->height * 2; + return 0; +} + +const struct rkvdec_coded_fmt_ops rkvdec_vp9_fmt_ops = { + .adjust_fmt = rkvdec_vp9_adjust_fmt, + .start = rkvdec_vp9_start, + .stop = rkvdec_vp9_stop, + .run = rkvdec_vp9_run, + .done = rkvdec_vp9_done, +}; diff --git a/drivers/staging/media/rkvdec/rkvdec.c b/drivers/staging/media/rkvdec/rkvdec.c index 4fd4a2907da7..c0cf3488f970 100644 --- a/drivers/staging/media/rkvdec/rkvdec.c +++ b/drivers/staging/media/rkvdec/rkvdec.c @@ -99,10 +99,30 @@ static const struct rkvdec_ctrls rkvdec_h264_ctrls = { .num_ctrls = ARRAY_SIZE(rkvdec_h264_ctrl_descs), }; -static const u32 rkvdec_h264_decoded_fmts[] = { +static const u32 rkvdec_h264_vp9_decoded_fmts[] = { V4L2_PIX_FMT_NV12, }; +static const struct rkvdec_ctrl_desc rkvdec_vp9_ctrl_descs[] = { + { + .cfg.id = V4L2_CID_STATELESS_VP9_FRAME, + }, + { + .cfg.id = V4L2_CID_STATELESS_VP9_COMPRESSED_HDR, + }, + { + .cfg.id = V4L2_CID_MPEG_VIDEO_VP9_PROFILE, + .cfg.min = V4L2_MPEG_VIDEO_VP9_PROFILE_0, + .cfg.max = V4L2_MPEG_VIDEO_VP9_PROFILE_0, + .cfg.def = V4L2_MPEG_VIDEO_VP9_PROFILE_0, + }, +}; + +static const struct rkvdec_ctrls rkvdec_vp9_ctrls = { + .ctrls = rkvdec_vp9_ctrl_descs, + .num_ctrls = ARRAY_SIZE(rkvdec_vp9_ctrl_descs), +}; + static const struct rkvdec_coded_fmt_desc rkvdec_coded_fmts[] = { { .fourcc = V4L2_PIX_FMT_H264_SLICE, @@ -116,8 +136,23 @@ static const struct rkvdec_coded_fmt_desc rkvdec_coded_fmts[] = { }, .ctrls = &rkvdec_h264_ctrls, .ops = &rkvdec_h264_fmt_ops, - .num_decoded_fmts = ARRAY_SIZE(rkvdec_h264_decoded_fmts), - .decoded_fmts = rkvdec_h264_decoded_fmts, + .num_decoded_fmts = ARRAY_SIZE(rkvdec_h264_vp9_decoded_fmts), + .decoded_fmts = rkvdec_h264_vp9_decoded_fmts, + }, + { + .fourcc = V4L2_PIX_FMT_VP9_FRAME, + .frmsize = { + .min_width = 64, + .max_width = 4096, + .step_width = 64, + .min_height = 64, + .max_height = 2304, + .step_height = 64, + }, + .ctrls = &rkvdec_vp9_ctrls, + .ops = &rkvdec_vp9_fmt_ops, + .num_decoded_fmts = ARRAY_SIZE(rkvdec_h264_vp9_decoded_fmts), + .decoded_fmts = rkvdec_h264_vp9_decoded_fmts, } }; @@ -677,7 +712,7 @@ static void rkvdec_device_run(void *priv) rkvdec_job_finish(ctx, VB2_BUF_STATE_ERROR); } -static struct v4l2_m2m_ops rkvdec_m2m_ops = { +static const struct v4l2_m2m_ops rkvdec_m2m_ops = { .device_run = rkvdec_device_run, }; diff --git a/drivers/staging/media/rkvdec/rkvdec.h b/drivers/staging/media/rkvdec/rkvdec.h index 52ac3874c5e5..2f4ea1786b93 100644 --- a/drivers/staging/media/rkvdec/rkvdec.h +++ b/drivers/staging/media/rkvdec/rkvdec.h @@ -42,14 +42,18 @@ struct rkvdec_run { struct rkvdec_vp9_decoded_buffer_info { /* Info needed when the decoded frame serves as a reference frame. */ - u16 width; - u16 height; - u32 bit_depth : 4; + unsigned short width; + unsigned short height; + unsigned int bit_depth : 4; }; struct rkvdec_decoded_buffer { /* Must be the first field in this struct. */ struct v4l2_m2m_buffer base; + + union { + struct rkvdec_vp9_decoded_buffer_info vp9; + }; }; static inline struct rkvdec_decoded_buffer * @@ -116,4 +120,6 @@ void rkvdec_run_preamble(struct rkvdec_ctx *ctx, struct rkvdec_run *run); void rkvdec_run_postamble(struct rkvdec_ctx *ctx, struct rkvdec_run *run); extern const struct rkvdec_coded_fmt_ops rkvdec_h264_fmt_ops; +extern const struct rkvdec_coded_fmt_ops rkvdec_vp9_fmt_ops; + #endif /* RKVDEC_H_ */ diff --git a/drivers/staging/media/sunxi/cedrus/cedrus.c b/drivers/staging/media/sunxi/cedrus/cedrus.c index c76fc97d97a0..4a4b714b0f26 100644 --- a/drivers/staging/media/sunxi/cedrus/cedrus.c +++ b/drivers/staging/media/sunxi/cedrus/cedrus.c @@ -580,6 +580,14 @@ static const struct cedrus_variant sun8i_r40_cedrus_variant = { .mod_rate = 297000000, }; +static const struct cedrus_variant sun20i_d1_cedrus_variant = { + .capabilities = CEDRUS_CAPABILITY_UNTILED | + CEDRUS_CAPABILITY_MPEG2_DEC | + CEDRUS_CAPABILITY_H264_DEC | + CEDRUS_CAPABILITY_H265_DEC, + .mod_rate = 432000000, +}; + static const struct cedrus_variant sun50i_a64_cedrus_variant = { .capabilities = CEDRUS_CAPABILITY_UNTILED | CEDRUS_CAPABILITY_MPEG2_DEC | @@ -638,6 +646,10 @@ static const struct of_device_id cedrus_dt_match[] = { .data = &sun8i_r40_cedrus_variant, }, { + .compatible = "allwinner,sun20i-d1-video-engine", + .data = &sun20i_d1_cedrus_variant, + }, + { .compatible = "allwinner,sun50i-a64-video-engine", .data = &sun50i_a64_cedrus_variant, }, diff --git a/drivers/staging/media/tegra-vde/vde.c b/drivers/staging/media/tegra-vde/vde.c index ed4c1250b303..a8f1a024c343 100644 --- a/drivers/staging/media/tegra-vde/vde.c +++ b/drivers/staging/media/tegra-vde/vde.c @@ -20,6 +20,7 @@ #include <linux/slab.h> #include <linux/uaccess.h> +#include <soc/tegra/common.h> #include <soc/tegra/pmc.h> #include "uapi.h" @@ -84,6 +85,96 @@ static int tegra_vde_wait_mbe(struct tegra_vde *vde) (tmp >= 0x10), 1, 100); } +static int tegra_vde_alloc_bo(struct tegra_vde *vde, + struct tegra_vde_bo **ret_bo, + enum dma_data_direction dma_dir, + size_t size) +{ + struct device *dev = vde->miscdev.parent; + struct tegra_vde_bo *bo; + int err; + + bo = kzalloc(sizeof(*bo), GFP_KERNEL); + if (!bo) + return -ENOMEM; + + bo->vde = vde; + bo->size = size; + bo->dma_dir = dma_dir; + bo->dma_attrs = DMA_ATTR_WRITE_COMBINE | + DMA_ATTR_NO_KERNEL_MAPPING; + + if (!vde->domain) + bo->dma_attrs |= DMA_ATTR_FORCE_CONTIGUOUS; + + bo->dma_cookie = dma_alloc_attrs(dev, bo->size, &bo->dma_handle, + GFP_KERNEL, bo->dma_attrs); + if (!bo->dma_cookie) { + dev_err(dev, "Failed to allocate DMA buffer of size: %zu\n", + bo->size); + err = -ENOMEM; + goto free_bo; + } + + err = dma_get_sgtable_attrs(dev, &bo->sgt, bo->dma_cookie, + bo->dma_handle, bo->size, bo->dma_attrs); + if (err) { + dev_err(dev, "Failed to get DMA buffer SG table: %d\n", err); + goto free_attrs; + } + + err = dma_map_sgtable(dev, &bo->sgt, bo->dma_dir, bo->dma_attrs); + if (err) { + dev_err(dev, "Failed to map DMA buffer SG table: %d\n", err); + goto free_table; + } + + if (vde->domain) { + err = tegra_vde_iommu_map(vde, &bo->sgt, &bo->iova, bo->size); + if (err) { + dev_err(dev, "Failed to map DMA buffer IOVA: %d\n", err); + goto unmap_sgtable; + } + + bo->dma_addr = iova_dma_addr(&vde->iova, bo->iova); + } else { + bo->dma_addr = sg_dma_address(bo->sgt.sgl); + } + + *ret_bo = bo; + + return 0; + +unmap_sgtable: + dma_unmap_sgtable(dev, &bo->sgt, bo->dma_dir, bo->dma_attrs); +free_table: + sg_free_table(&bo->sgt); +free_attrs: + dma_free_attrs(dev, bo->size, bo->dma_cookie, bo->dma_handle, + bo->dma_attrs); +free_bo: + kfree(bo); + + return err; +} + +static void tegra_vde_free_bo(struct tegra_vde_bo *bo) +{ + struct tegra_vde *vde = bo->vde; + struct device *dev = vde->miscdev.parent; + + if (vde->domain) + tegra_vde_iommu_unmap(vde, bo->iova); + + dma_unmap_sgtable(dev, &bo->sgt, bo->dma_dir, bo->dma_attrs); + + sg_free_table(&bo->sgt); + + dma_free_attrs(dev, bo->size, bo->dma_cookie, bo->dma_handle, + bo->dma_attrs); + kfree(bo); +} + static int tegra_vde_setup_mbe_frame_idx(struct tegra_vde *vde, unsigned int refs_nb, bool setup_refs) @@ -249,7 +340,7 @@ static void tegra_vde_setup_iram_tables(struct tegra_vde *vde, value |= frame->frame_num; } else { aux_addr = 0x6ADEAD00; - value = 0; + value = 0x3f; } tegra_vde_setup_iram_entry(vde, 0, i, value, aux_addr); @@ -424,6 +515,9 @@ static int tegra_vde_setup_hw_context(struct tegra_vde *vde, tegra_vde_writel(vde, bitstream_data_addr, vde->sxe, 0x6C); + if (vde->soc->supports_ref_pic_marking) + tegra_vde_writel(vde, vde->secure_bo->dma_addr, vde->sxe, 0x7c); + value = 0x10000005; value |= ctx->pic_width_in_mbs << 11; value |= ctx->pic_height_in_mbs << 3; @@ -920,13 +1014,17 @@ static __maybe_unused int tegra_vde_runtime_suspend(struct device *dev) struct tegra_vde *vde = dev_get_drvdata(dev); int err; - err = tegra_powergate_power_off(TEGRA_POWERGATE_VDEC); - if (err) { - dev_err(dev, "Failed to power down HW: %d\n", err); - return err; + if (!dev->pm_domain) { + err = tegra_powergate_power_off(TEGRA_POWERGATE_VDEC); + if (err) { + dev_err(dev, "Failed to power down HW: %d\n", err); + return err; + } } clk_disable_unprepare(vde->clk); + reset_control_release(vde->rst); + reset_control_release(vde->rst_mc); return 0; } @@ -936,14 +1034,45 @@ static __maybe_unused int tegra_vde_runtime_resume(struct device *dev) struct tegra_vde *vde = dev_get_drvdata(dev); int err; - err = tegra_powergate_sequence_power_up(TEGRA_POWERGATE_VDEC, - vde->clk, vde->rst); + err = reset_control_acquire(vde->rst_mc); if (err) { - dev_err(dev, "Failed to power up HW : %d\n", err); + dev_err(dev, "Failed to acquire mc reset: %d\n", err); return err; } + err = reset_control_acquire(vde->rst); + if (err) { + dev_err(dev, "Failed to acquire reset: %d\n", err); + goto release_mc_reset; + } + + if (!dev->pm_domain) { + err = tegra_powergate_sequence_power_up(TEGRA_POWERGATE_VDEC, + vde->clk, vde->rst); + if (err) { + dev_err(dev, "Failed to power up HW : %d\n", err); + goto release_reset; + } + } else { + /* + * tegra_powergate_sequence_power_up() leaves clocks enabled, + * while GENPD not. + */ + err = clk_prepare_enable(vde->clk); + if (err) { + dev_err(dev, "Failed to enable clock: %d\n", err); + goto release_reset; + } + } + return 0; + +release_reset: + reset_control_release(vde->rst); +release_mc_reset: + reset_control_release(vde->rst_mc); + + return err; } static int tegra_vde_probe(struct platform_device *pdev) @@ -958,6 +1087,8 @@ static int tegra_vde_probe(struct platform_device *pdev) platform_set_drvdata(pdev, vde); + vde->soc = of_device_get_match_data(&pdev->dev); + vde->sxe = devm_platform_ioremap_resource_byname(pdev, "sxe"); if (IS_ERR(vde->sxe)) return PTR_ERR(vde->sxe); @@ -1001,14 +1132,14 @@ static int tegra_vde_probe(struct platform_device *pdev) return err; } - vde->rst = devm_reset_control_get(dev, NULL); + vde->rst = devm_reset_control_get_exclusive_released(dev, NULL); if (IS_ERR(vde->rst)) { err = PTR_ERR(vde->rst); dev_err(dev, "Could not get VDE reset %d\n", err); return err; } - vde->rst_mc = devm_reset_control_get_optional(dev, "mc"); + vde->rst_mc = devm_reset_control_get_optional_exclusive_released(dev, "mc"); if (IS_ERR(vde->rst_mc)) { err = PTR_ERR(vde->rst_mc); dev_err(dev, "Could not get MC reset %d\n", err); @@ -1026,6 +1157,12 @@ static int tegra_vde_probe(struct platform_device *pdev) return err; } + err = devm_tegra_core_dev_init_opp_table_common(dev); + if (err) { + dev_err(dev, "Could initialize OPP table %d\n", err); + return err; + } + vde->iram_pool = of_gen_pool_get(dev->of_node, "iram", 0); if (!vde->iram_pool) { dev_err(dev, "Could not get IRAM pool\n"); @@ -1056,12 +1193,6 @@ static int tegra_vde_probe(struct platform_device *pdev) goto err_gen_free; } - err = misc_register(&vde->miscdev); - if (err) { - dev_err(dev, "Failed to register misc device: %d\n", err); - goto err_deinit_iommu; - } - pm_runtime_enable(dev); pm_runtime_use_autosuspend(dev); pm_runtime_set_autosuspend_delay(dev, 300); @@ -1077,15 +1208,26 @@ static int tegra_vde_probe(struct platform_device *pdev) pm_runtime_put(dev); + err = tegra_vde_alloc_bo(vde, &vde->secure_bo, DMA_FROM_DEVICE, 4096); + if (err) { + dev_err(dev, "Failed to allocate secure BO: %d\n", err); + goto err_pm_runtime; + } + + err = misc_register(&vde->miscdev); + if (err) { + dev_err(dev, "Failed to register misc device: %d\n", err); + goto err_free_secure_bo; + } + return 0; +err_free_secure_bo: + tegra_vde_free_bo(vde->secure_bo); err_pm_runtime: - misc_deregister(&vde->miscdev); - pm_runtime_dont_use_autosuspend(dev); pm_runtime_disable(dev); -err_deinit_iommu: tegra_vde_iommu_deinit(vde); err_gen_free: @@ -1100,6 +1242,10 @@ static int tegra_vde_remove(struct platform_device *pdev) struct tegra_vde *vde = platform_get_drvdata(pdev); struct device *dev = &pdev->dev; + misc_deregister(&vde->miscdev); + + tegra_vde_free_bo(vde->secure_bo); + /* * As it increments RPM usage_count even on errors, we don't need to * check the returned code here. @@ -1116,8 +1262,6 @@ static int tegra_vde_remove(struct platform_device *pdev) pm_runtime_put_noidle(dev); clk_disable_unprepare(vde->clk); - misc_deregister(&vde->miscdev); - tegra_vde_dmabuf_cache_unmap_all(vde); tegra_vde_iommu_deinit(vde); @@ -1133,8 +1277,7 @@ static void tegra_vde_shutdown(struct platform_device *pdev) * On some devices bootloader isn't ready to a power-gated VDE on * a warm-reboot, machine will hang in that case. */ - if (pm_runtime_status_suspended(&pdev->dev)) - tegra_vde_runtime_resume(&pdev->dev); + pm_runtime_get_sync(&pdev->dev); } static __maybe_unused int tegra_vde_pm_suspend(struct device *dev) @@ -1173,8 +1316,27 @@ static const struct dev_pm_ops tegra_vde_pm_ops = { tegra_vde_pm_resume) }; +static const struct tegra_vde_soc tegra124_vde_soc = { + .supports_ref_pic_marking = true, +}; + +static const struct tegra_vde_soc tegra114_vde_soc = { + .supports_ref_pic_marking = true, +}; + +static const struct tegra_vde_soc tegra30_vde_soc = { + .supports_ref_pic_marking = false, +}; + +static const struct tegra_vde_soc tegra20_vde_soc = { + .supports_ref_pic_marking = false, +}; + static const struct of_device_id tegra_vde_of_match[] = { - { .compatible = "nvidia,tegra20-vde", }, + { .compatible = "nvidia,tegra124-vde", .data = &tegra124_vde_soc }, + { .compatible = "nvidia,tegra114-vde", .data = &tegra114_vde_soc }, + { .compatible = "nvidia,tegra30-vde", .data = &tegra30_vde_soc }, + { .compatible = "nvidia,tegra20-vde", .data = &tegra20_vde_soc }, { }, }; MODULE_DEVICE_TABLE(of, tegra_vde_of_match); diff --git a/drivers/staging/media/tegra-vde/vde.h b/drivers/staging/media/tegra-vde/vde.h index 5561291b0c88..bbd42b8d9991 100644 --- a/drivers/staging/media/tegra-vde/vde.h +++ b/drivers/staging/media/tegra-vde/vde.h @@ -24,6 +24,22 @@ struct iommu_domain; struct reset_control; struct dma_buf_attachment; +struct tegra_vde_soc { + bool supports_ref_pic_marking; +}; + +struct tegra_vde_bo { + struct iova *iova; + struct sg_table sgt; + struct tegra_vde *vde; + enum dma_data_direction dma_dir; + unsigned long dma_attrs; + dma_addr_t dma_handle; + dma_addr_t dma_addr; + void *dma_cookie; + size_t size; +}; + struct tegra_vde { void __iomem *sxe; void __iomem *bsev; @@ -48,6 +64,8 @@ struct tegra_vde { struct iova_domain iova; struct iova *iova_resv_static_addresses; struct iova *iova_resv_last_page; + const struct tegra_vde_soc *soc; + struct tegra_vde_bo *secure_bo; dma_addr_t iram_lists_addr; u32 *iram; }; diff --git a/drivers/staging/media/tegra-video/vi.c b/drivers/staging/media/tegra-video/vi.c index 69d9787d5338..d1f43f465c22 100644 --- a/drivers/staging/media/tegra-video/vi.c +++ b/drivers/staging/media/tegra-video/vi.c @@ -1845,7 +1845,6 @@ static int tegra_vi_graph_init(struct tegra_vi *vi) struct tegra_vi_channel *chan; struct fwnode_handle *fwnode = dev_fwnode(vi->dev); int ret; - struct fwnode_handle *remote = NULL; /* * Walk the links to parse the full graph. Each channel will have @@ -1857,11 +1856,16 @@ static int tegra_vi_graph_init(struct tegra_vi *vi) * next channels. */ list_for_each_entry(chan, &vi->vi_chans, list) { - remote = fwnode_graph_get_remote_node(fwnode, chan->portnos[0], - 0); - if (!remote) + struct fwnode_handle *ep, *remote; + + ep = fwnode_graph_get_endpoint_by_id(fwnode, + chan->portnos[0], 0, 0); + if (!ep) continue; + remote = fwnode_graph_get_remote_port_parent(ep); + fwnode_handle_put(ep); + ret = tegra_vi_graph_parse_one(chan, remote); fwnode_handle_put(remote); if (ret < 0 || list_empty(&chan->notifier.asd_list)) diff --git a/drivers/staging/netlogic/Kconfig b/drivers/staging/netlogic/Kconfig deleted file mode 100644 index e1712606ee3c..000000000000 --- a/drivers/staging/netlogic/Kconfig +++ /dev/null @@ -1,9 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0 -config NETLOGIC_XLR_NET - tristate "Netlogic XLR/XLS network device" - depends on CPU_XLR - depends on NETDEVICES - select PHYLIB - help - This driver support Netlogic XLR/XLS on chip gigabit - Ethernet. diff --git a/drivers/staging/netlogic/Makefile b/drivers/staging/netlogic/Makefile deleted file mode 100644 index 7e2902af26a3..000000000000 --- a/drivers/staging/netlogic/Makefile +++ /dev/null @@ -1,2 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0 -obj-$(CONFIG_NETLOGIC_XLR_NET) += xlr_net.o platform_net.o diff --git a/drivers/staging/netlogic/TODO b/drivers/staging/netlogic/TODO deleted file mode 100644 index 20e22ecb9903..000000000000 --- a/drivers/staging/netlogic/TODO +++ /dev/null @@ -1,11 +0,0 @@ -* Implementing 64bit stat counter in software -* All memory allocation should be changed to DMA allocations -* Changing comments into linux standard format - -Please send patches -To: -Ganesan Ramalingam <ganesanr@broadcom.com> -Greg Kroah-Hartman <gregkh@linuxfoundation.org> -Cc: -Jayachandran Chandrashekaran Nair <jchandra@broadcom.com> - diff --git a/drivers/staging/netlogic/platform_net.c b/drivers/staging/netlogic/platform_net.c deleted file mode 100644 index 8be9d0b0c22c..000000000000 --- a/drivers/staging/netlogic/platform_net.c +++ /dev/null @@ -1,219 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) -/* - * Copyright (c) 2003-2012 Broadcom Corporation - * All Rights Reserved - */ - -#include <linux/device.h> -#include <linux/platform_device.h> -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/io.h> -#include <linux/delay.h> -#include <linux/ioport.h> -#include <linux/resource.h> -#include <linux/phy.h> - -#include <asm/netlogic/haldefs.h> -#include <asm/netlogic/common.h> -#include <asm/netlogic/xlr/fmn.h> -#include <asm/netlogic/xlr/xlr.h> -#include <asm/netlogic/psb-bootinfo.h> -#include <asm/netlogic/xlr/pic.h> -#include <asm/netlogic/xlr/iomap.h> - -#include "platform_net.h" - -/* Linux Net */ -#define MAX_NUM_GMAC 8 -#define MAX_NUM_XLS_GMAC 8 -#define MAX_NUM_XLR_GMAC 4 - -static u32 xlr_gmac_offsets[] = { - NETLOGIC_IO_GMAC_0_OFFSET, NETLOGIC_IO_GMAC_1_OFFSET, - NETLOGIC_IO_GMAC_2_OFFSET, NETLOGIC_IO_GMAC_3_OFFSET, - NETLOGIC_IO_GMAC_4_OFFSET, NETLOGIC_IO_GMAC_5_OFFSET, - NETLOGIC_IO_GMAC_6_OFFSET, NETLOGIC_IO_GMAC_7_OFFSET -}; - -static u32 xlr_gmac_irqs[] = { PIC_GMAC_0_IRQ, PIC_GMAC_1_IRQ, - PIC_GMAC_2_IRQ, PIC_GMAC_3_IRQ, - PIC_GMAC_4_IRQ, PIC_GMAC_5_IRQ, - PIC_GMAC_6_IRQ, PIC_GMAC_7_IRQ -}; - -static struct resource xlr_net0_res[8]; -static struct resource xlr_net1_res[8]; -static u32 __iomem *gmac4_addr; -static u32 __iomem *gpio_addr; - -static void xlr_resource_init(struct resource *res, int offset, int irq) -{ - res->name = "gmac"; - - res->start = CPHYSADDR(nlm_mmio_base(offset)); - res->end = res->start + 0xfff; - res->flags = IORESOURCE_MEM; - - res++; - res->name = "gmac"; - res->start = irq; - res->end = irq; - res->flags = IORESOURCE_IRQ; -} - -static struct platform_device *gmac_controller2_init(void *gmac0_addr) -{ - int mac; - static struct xlr_net_data ndata1 = { - .phy_interface = PHY_INTERFACE_MODE_SGMII, - .rfr_station = FMN_STNID_GMAC1_FR_0, - .bucket_size = xlr_board_fmn_config.bucket_size, - .gmac_fmn_info = &xlr_board_fmn_config.gmac[1], - }; - - static struct platform_device xlr_net_dev1 = { - .name = "xlr-net", - .id = 1, - .dev.platform_data = &ndata1, - }; - - gmac4_addr = - ioremap(CPHYSADDR(nlm_mmio_base(NETLOGIC_IO_GMAC_4_OFFSET)), - 0xfff); - ndata1.serdes_addr = gmac4_addr; - ndata1.pcs_addr = gmac4_addr; - ndata1.mii_addr = gmac0_addr; - ndata1.gpio_addr = gpio_addr; - ndata1.cpu_mask = nlm_current_node()->coremask; - - xlr_net_dev1.resource = xlr_net1_res; - - for (mac = 0; mac < 4; mac++) { - ndata1.tx_stnid[mac] = FMN_STNID_GMAC1_TX0 + mac; - ndata1.phy_addr[mac] = mac + 4 + 0x10; - - xlr_resource_init(&xlr_net1_res[mac * 2], - xlr_gmac_offsets[mac + 4], - xlr_gmac_irqs[mac + 4]); - } - xlr_net_dev1.num_resources = 8; - - return &xlr_net_dev1; -} - -static void xls_gmac_init(void) -{ - int mac; - struct platform_device *xlr_net_dev1; - void __iomem *gmac0_addr = - ioremap(CPHYSADDR(nlm_mmio_base(NETLOGIC_IO_GMAC_0_OFFSET)), - 0xfff); - - static struct xlr_net_data ndata0 = { - .rfr_station = FMN_STNID_GMACRFR_0, - .bucket_size = xlr_board_fmn_config.bucket_size, - .gmac_fmn_info = &xlr_board_fmn_config.gmac[0], - }; - - static struct platform_device xlr_net_dev0 = { - .name = "xlr-net", - .id = 0, - }; - xlr_net_dev0.dev.platform_data = &ndata0; - ndata0.serdes_addr = gmac0_addr; - ndata0.pcs_addr = gmac0_addr; - ndata0.mii_addr = gmac0_addr; - - /* Passing GPIO base for serdes init. Only needed on sgmii ports */ - gpio_addr = - ioremap(CPHYSADDR(nlm_mmio_base(NETLOGIC_IO_GPIO_OFFSET)), - 0xfff); - ndata0.gpio_addr = gpio_addr; - ndata0.cpu_mask = nlm_current_node()->coremask; - - xlr_net_dev0.resource = xlr_net0_res; - - switch (nlm_prom_info.board_major_version) { - case 12: - /* first block RGMII or XAUI, use RGMII */ - ndata0.phy_interface = PHY_INTERFACE_MODE_RGMII; - ndata0.tx_stnid[0] = FMN_STNID_GMAC0_TX0; - ndata0.phy_addr[0] = 0; - - xlr_net_dev0.num_resources = 2; - - xlr_resource_init(&xlr_net0_res[0], xlr_gmac_offsets[0], - xlr_gmac_irqs[0]); - platform_device_register(&xlr_net_dev0); - - /* second block is XAUI, not supported yet */ - break; - default: - /* default XLS config, all ports SGMII */ - ndata0.phy_interface = PHY_INTERFACE_MODE_SGMII; - for (mac = 0; mac < 4; mac++) { - ndata0.tx_stnid[mac] = FMN_STNID_GMAC0_TX0 + mac; - ndata0.phy_addr[mac] = mac + 0x10; - - xlr_resource_init(&xlr_net0_res[mac * 2], - xlr_gmac_offsets[mac], - xlr_gmac_irqs[mac]); - } - xlr_net_dev0.num_resources = 8; - platform_device_register(&xlr_net_dev0); - - xlr_net_dev1 = gmac_controller2_init(gmac0_addr); - platform_device_register(xlr_net_dev1); - } -} - -static void xlr_gmac_init(void) -{ - int mac; - - /* assume all GMACs for now */ - static struct xlr_net_data ndata0 = { - .phy_interface = PHY_INTERFACE_MODE_RGMII, - .serdes_addr = NULL, - .pcs_addr = NULL, - .rfr_station = FMN_STNID_GMACRFR_0, - .bucket_size = xlr_board_fmn_config.bucket_size, - .gmac_fmn_info = &xlr_board_fmn_config.gmac[0], - .gpio_addr = NULL, - }; - - static struct platform_device xlr_net_dev0 = { - .name = "xlr-net", - .id = 0, - .dev.platform_data = &ndata0, - }; - ndata0.mii_addr = - ioremap(CPHYSADDR(nlm_mmio_base(NETLOGIC_IO_GMAC_0_OFFSET)), - 0xfff); - - ndata0.cpu_mask = nlm_current_node()->coremask; - - for (mac = 0; mac < MAX_NUM_XLR_GMAC; mac++) { - ndata0.tx_stnid[mac] = FMN_STNID_GMAC0_TX0 + mac; - ndata0.phy_addr[mac] = mac; - xlr_resource_init(&xlr_net0_res[mac * 2], xlr_gmac_offsets[mac], - xlr_gmac_irqs[mac]); - } - xlr_net_dev0.num_resources = 8; - xlr_net_dev0.resource = xlr_net0_res; - - platform_device_register(&xlr_net_dev0); -} - -static int __init xlr_net_init(void) -{ - if (nlm_chip_is_xls()) - xls_gmac_init(); - else - xlr_gmac_init(); - - return 0; -} - -arch_initcall(xlr_net_init); diff --git a/drivers/staging/netlogic/platform_net.h b/drivers/staging/netlogic/platform_net.h deleted file mode 100644 index c8d4c13424c6..000000000000 --- a/drivers/staging/netlogic/platform_net.h +++ /dev/null @@ -1,21 +0,0 @@ -/* SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) */ -/* - * Copyright (c) 2003-2012 Broadcom Corporation - * All Rights Reserved - */ - -#define PORTS_PER_CONTROLLER 4 - -struct xlr_net_data { - int cpu_mask; - u32 __iomem *mii_addr; - u32 __iomem *serdes_addr; - u32 __iomem *pcs_addr; - u32 __iomem *gpio_addr; - int phy_interface; - int rfr_station; - int tx_stnid[PORTS_PER_CONTROLLER]; - int *bucket_size; - int phy_addr[PORTS_PER_CONTROLLER]; - struct xlr_fmn_info *gmac_fmn_info; -}; diff --git a/drivers/staging/netlogic/xlr_net.c b/drivers/staging/netlogic/xlr_net.c deleted file mode 100644 index 69ea61faf8fa..000000000000 --- a/drivers/staging/netlogic/xlr_net.c +++ /dev/null @@ -1,1080 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) -/* - * Copyright (c) 2003-2012 Broadcom Corporation - * All Rights Reserved - */ - -#include <linux/phy.h> -#include <linux/delay.h> -#include <linux/netdevice.h> -#include <linux/smp.h> -#include <linux/ethtool.h> -#include <linux/module.h> -#include <linux/etherdevice.h> -#include <linux/skbuff.h> -#include <linux/jiffies.h> -#include <linux/interrupt.h> -#include <linux/platform_device.h> - -#include <asm/mipsregs.h> -/* - * fmn.h - For FMN credit configuration and registering fmn_handler. - * FMN is communication mechanism that allows processing agents within - * XLR/XLS to communicate each other. - */ -#include <asm/netlogic/xlr/fmn.h> - -#include "platform_net.h" -#include "xlr_net.h" - -/* - * The readl/writel implementation byteswaps on XLR/XLS, so - * we need to use __raw_ IO to read the NAE registers - * because they are in the big-endian MMIO area on the SoC. - */ -static inline void xlr_nae_wreg(u32 __iomem *base, unsigned int reg, u32 val) -{ - __raw_writel(val, base + reg); -} - -static inline u32 xlr_nae_rdreg(u32 __iomem *base, unsigned int reg) -{ - return __raw_readl(base + reg); -} - -static inline void xlr_reg_update(u32 *base_addr, u32 off, u32 val, u32 mask) -{ - u32 tmp; - - tmp = xlr_nae_rdreg(base_addr, off); - xlr_nae_wreg(base_addr, off, (tmp & ~mask) | (val & mask)); -} - -#define MAC_SKB_BACK_PTR_SIZE SMP_CACHE_BYTES - -static int send_to_rfr_fifo(struct xlr_net_priv *priv, void *addr) -{ - struct nlm_fmn_msg msg; - int ret = 0, num_try = 0, stnid; - unsigned long paddr, mflags; - - paddr = virt_to_bus(addr); - msg.msg0 = (u64)paddr & 0xffffffffe0ULL; - msg.msg1 = 0; - msg.msg2 = 0; - msg.msg3 = 0; - stnid = priv->nd->rfr_station; - do { - mflags = nlm_cop2_enable_irqsave(); - ret = nlm_fmn_send(1, 0, stnid, &msg); - nlm_cop2_disable_irqrestore(mflags); - if (ret == 0) - return 0; - } while (++num_try < 10000); - - netdev_err(priv->ndev, "Send to RFR failed in RX path\n"); - return ret; -} - -static inline unsigned char *xlr_alloc_skb(void) -{ - struct sk_buff *skb; - int buf_len = sizeof(struct sk_buff *); - unsigned char *skb_data; - - /* skb->data is cache aligned */ - skb = alloc_skb(XLR_RX_BUF_SIZE, GFP_ATOMIC); - if (!skb) - return NULL; - skb_data = skb->data; - skb_reserve(skb, MAC_SKB_BACK_PTR_SIZE); - memcpy(skb_data, &skb, buf_len); - - return skb->data; -} - -static void xlr_net_fmn_handler(int bkt, int src_stnid, int size, int code, - struct nlm_fmn_msg *msg, void *arg) -{ - struct sk_buff *skb; - void *skb_data = NULL; - struct net_device *ndev; - struct xlr_net_priv *priv; - u32 port, length; - unsigned char *addr; - struct xlr_adapter *adapter = arg; - - length = (msg->msg0 >> 40) & 0x3fff; - if (length == 0) { - addr = bus_to_virt(msg->msg0 & 0xffffffffffULL); - addr = addr - MAC_SKB_BACK_PTR_SIZE; - skb = (struct sk_buff *)(*(unsigned long *)addr); - dev_kfree_skb_any((struct sk_buff *)addr); - } else { - addr = (unsigned char *) - bus_to_virt(msg->msg0 & 0xffffffffe0ULL); - length = length - BYTE_OFFSET - MAC_CRC_LEN; - port = ((int)msg->msg0) & 0x0f; - addr = addr - MAC_SKB_BACK_PTR_SIZE; - skb = (struct sk_buff *)(*(unsigned long *)addr); - skb->dev = adapter->netdev[port]; - if (!skb->dev) - return; - ndev = skb->dev; - priv = netdev_priv(ndev); - - /* 16 byte IP header align */ - skb_reserve(skb, BYTE_OFFSET); - skb_put(skb, length); - skb->protocol = eth_type_trans(skb, skb->dev); - netif_rx(skb); - /* Fill rx ring */ - skb_data = xlr_alloc_skb(); - if (skb_data) - send_to_rfr_fifo(priv, skb_data); - } -} - -static struct phy_device *xlr_get_phydev(struct xlr_net_priv *priv) -{ - return mdiobus_get_phy(priv->mii_bus, priv->phy_addr); -} - -/* - * Ethtool operation - */ -static int xlr_get_link_ksettings(struct net_device *ndev, - struct ethtool_link_ksettings *ecmd) -{ - struct xlr_net_priv *priv = netdev_priv(ndev); - struct phy_device *phydev = xlr_get_phydev(priv); - - if (!phydev) - return -ENODEV; - - phy_ethtool_ksettings_get(phydev, ecmd); - - return 0; -} - -static int xlr_set_link_ksettings(struct net_device *ndev, - const struct ethtool_link_ksettings *ecmd) -{ - struct xlr_net_priv *priv = netdev_priv(ndev); - struct phy_device *phydev = xlr_get_phydev(priv); - - if (!phydev) - return -ENODEV; - return phy_ethtool_ksettings_set(phydev, ecmd); -} - -static const struct ethtool_ops xlr_ethtool_ops = { - .get_link_ksettings = xlr_get_link_ksettings, - .set_link_ksettings = xlr_set_link_ksettings, -}; - -/* - * Net operations - */ -static int xlr_net_fill_rx_ring(struct net_device *ndev) -{ - void *skb_data; - struct xlr_net_priv *priv = netdev_priv(ndev); - int i; - - for (i = 0; i < MAX_FRIN_SPILL / 4; i++) { - skb_data = xlr_alloc_skb(); - if (!skb_data) - return -ENOMEM; - send_to_rfr_fifo(priv, skb_data); - } - netdev_info(ndev, "Rx ring setup done\n"); - return 0; -} - -static int xlr_net_open(struct net_device *ndev) -{ - u32 err; - struct xlr_net_priv *priv = netdev_priv(ndev); - struct phy_device *phydev = xlr_get_phydev(priv); - - /* schedule a link state check */ - phy_start(phydev); - - err = phy_start_aneg(phydev); - if (err) { - pr_err("Autoneg failed\n"); - return err; - } - /* Setup the speed from PHY to internal reg*/ - xlr_set_gmac_speed(priv); - - netif_tx_start_all_queues(ndev); - - return 0; -} - -static int xlr_net_stop(struct net_device *ndev) -{ - struct xlr_net_priv *priv = netdev_priv(ndev); - struct phy_device *phydev = xlr_get_phydev(priv); - - phy_stop(phydev); - netif_tx_stop_all_queues(ndev); - return 0; -} - -static void xlr_make_tx_desc(struct nlm_fmn_msg *msg, unsigned long addr, - struct sk_buff *skb) -{ - unsigned long physkb = virt_to_phys(skb); - int cpu_core = nlm_core_id(); - int fr_stn_id = cpu_core * 8 + XLR_FB_STN; /* FB to 6th bucket */ - - msg->msg0 = (((u64)1 << 63) | /* End of packet descriptor */ - ((u64)127 << 54) | /* No Free back */ - (u64)skb->len << 40 | /* Length of data */ - ((u64)addr)); - msg->msg1 = (((u64)1 << 63) | - ((u64)fr_stn_id << 54) | /* Free back id */ - (u64)0 << 40 | /* Set len to 0 */ - ((u64)physkb & 0xffffffff)); /* 32bit address */ - msg->msg2 = 0; - msg->msg3 = 0; -} - -static netdev_tx_t xlr_net_start_xmit(struct sk_buff *skb, - struct net_device *ndev) -{ - struct nlm_fmn_msg msg; - struct xlr_net_priv *priv = netdev_priv(ndev); - int ret; - u32 flags; - - xlr_make_tx_desc(&msg, virt_to_phys(skb->data), skb); - flags = nlm_cop2_enable_irqsave(); - ret = nlm_fmn_send(2, 0, priv->tx_stnid, &msg); - nlm_cop2_disable_irqrestore(flags); - if (ret) - dev_kfree_skb_any(skb); - return NETDEV_TX_OK; -} - -static void xlr_hw_set_mac_addr(struct net_device *ndev) -{ - struct xlr_net_priv *priv = netdev_priv(ndev); - - /* set mac station address */ - xlr_nae_wreg(priv->base_addr, R_MAC_ADDR0, - ((ndev->dev_addr[5] << 24) | (ndev->dev_addr[4] << 16) | - (ndev->dev_addr[3] << 8) | (ndev->dev_addr[2]))); - xlr_nae_wreg(priv->base_addr, R_MAC_ADDR0 + 1, - ((ndev->dev_addr[1] << 24) | (ndev->dev_addr[0] << 16))); - - xlr_nae_wreg(priv->base_addr, R_MAC_ADDR_MASK2, 0xffffffff); - xlr_nae_wreg(priv->base_addr, R_MAC_ADDR_MASK2 + 1, 0xffffffff); - xlr_nae_wreg(priv->base_addr, R_MAC_ADDR_MASK3, 0xffffffff); - xlr_nae_wreg(priv->base_addr, R_MAC_ADDR_MASK3 + 1, 0xffffffff); - - xlr_nae_wreg(priv->base_addr, R_MAC_FILTER_CONFIG, - (1 << O_MAC_FILTER_CONFIG__BROADCAST_EN) | - (1 << O_MAC_FILTER_CONFIG__ALL_MCAST_EN) | - (1 << O_MAC_FILTER_CONFIG__MAC_ADDR0_VALID)); - - if (priv->nd->phy_interface == PHY_INTERFACE_MODE_RGMII || - priv->nd->phy_interface == PHY_INTERFACE_MODE_SGMII) - xlr_reg_update(priv->base_addr, R_IPG_IFG, MAC_B2B_IPG, 0x7f); -} - -static int xlr_net_set_mac_addr(struct net_device *ndev, void *data) -{ - int err; - - err = eth_mac_addr(ndev, data); - if (err) - return err; - xlr_hw_set_mac_addr(ndev); - return 0; -} - -static void xlr_set_rx_mode(struct net_device *ndev) -{ - struct xlr_net_priv *priv = netdev_priv(ndev); - u32 regval; - - regval = xlr_nae_rdreg(priv->base_addr, R_MAC_FILTER_CONFIG); - - if (ndev->flags & IFF_PROMISC) { - regval |= (1 << O_MAC_FILTER_CONFIG__BROADCAST_EN) | - (1 << O_MAC_FILTER_CONFIG__PAUSE_FRAME_EN) | - (1 << O_MAC_FILTER_CONFIG__ALL_MCAST_EN) | - (1 << O_MAC_FILTER_CONFIG__ALL_UCAST_EN); - } else { - regval &= ~((1 << O_MAC_FILTER_CONFIG__PAUSE_FRAME_EN) | - (1 << O_MAC_FILTER_CONFIG__ALL_UCAST_EN)); - } - - xlr_nae_wreg(priv->base_addr, R_MAC_FILTER_CONFIG, regval); -} - -static void xlr_stats(struct net_device *ndev, struct rtnl_link_stats64 *stats) -{ - struct xlr_net_priv *priv = netdev_priv(ndev); - - stats->rx_packets = xlr_nae_rdreg(priv->base_addr, RX_PACKET_COUNTER); - stats->tx_packets = xlr_nae_rdreg(priv->base_addr, TX_PACKET_COUNTER); - stats->rx_bytes = xlr_nae_rdreg(priv->base_addr, RX_BYTE_COUNTER); - stats->tx_bytes = xlr_nae_rdreg(priv->base_addr, TX_BYTE_COUNTER); - stats->tx_errors = xlr_nae_rdreg(priv->base_addr, TX_FCS_ERROR_COUNTER); - stats->rx_dropped = xlr_nae_rdreg(priv->base_addr, - RX_DROP_PACKET_COUNTER); - stats->tx_dropped = xlr_nae_rdreg(priv->base_addr, - TX_DROP_FRAME_COUNTER); - - stats->multicast = xlr_nae_rdreg(priv->base_addr, - RX_MULTICAST_PACKET_COUNTER); - stats->collisions = xlr_nae_rdreg(priv->base_addr, - TX_TOTAL_COLLISION_COUNTER); - - stats->rx_length_errors = xlr_nae_rdreg(priv->base_addr, - RX_FRAME_LENGTH_ERROR_COUNTER); - stats->rx_over_errors = xlr_nae_rdreg(priv->base_addr, - RX_DROP_PACKET_COUNTER); - stats->rx_crc_errors = xlr_nae_rdreg(priv->base_addr, - RX_FCS_ERROR_COUNTER); - stats->rx_frame_errors = xlr_nae_rdreg(priv->base_addr, - RX_ALIGNMENT_ERROR_COUNTER); - - stats->rx_fifo_errors = xlr_nae_rdreg(priv->base_addr, - RX_DROP_PACKET_COUNTER); - stats->rx_missed_errors = xlr_nae_rdreg(priv->base_addr, - RX_CARRIER_SENSE_ERROR_COUNTER); - - stats->rx_errors = (stats->rx_over_errors + stats->rx_crc_errors + - stats->rx_frame_errors + stats->rx_fifo_errors + - stats->rx_missed_errors); - - stats->tx_aborted_errors = xlr_nae_rdreg(priv->base_addr, - TX_EXCESSIVE_COLLISION_PACKET_COUNTER); - stats->tx_carrier_errors = xlr_nae_rdreg(priv->base_addr, - TX_DROP_FRAME_COUNTER); - stats->tx_fifo_errors = xlr_nae_rdreg(priv->base_addr, - TX_DROP_FRAME_COUNTER); -} - -static const struct net_device_ops xlr_netdev_ops = { - .ndo_open = xlr_net_open, - .ndo_stop = xlr_net_stop, - .ndo_start_xmit = xlr_net_start_xmit, - .ndo_select_queue = dev_pick_tx_cpu_id, - .ndo_set_mac_address = xlr_net_set_mac_addr, - .ndo_set_rx_mode = xlr_set_rx_mode, - .ndo_get_stats64 = xlr_stats, -}; - -/* - * Gmac init - */ -static void *xlr_config_spill(struct xlr_net_priv *priv, int reg_start_0, - int reg_start_1, int reg_size, int size) -{ - void *spill; - u32 *base; - unsigned long phys_addr; - u32 spill_size; - - base = priv->base_addr; - spill_size = size; - spill = kmalloc(spill_size + SMP_CACHE_BYTES, GFP_KERNEL); - if (!spill) - return ZERO_SIZE_PTR; - - spill = PTR_ALIGN(spill, SMP_CACHE_BYTES); - phys_addr = virt_to_phys(spill); - dev_dbg(&priv->ndev->dev, "Allocated spill %d bytes at %lx\n", - size, phys_addr); - xlr_nae_wreg(base, reg_start_0, (phys_addr >> 5) & 0xffffffff); - xlr_nae_wreg(base, reg_start_1, ((u64)phys_addr >> 37) & 0x07); - xlr_nae_wreg(base, reg_size, spill_size); - - return spill; -} - -/* - * Configure the 6 FIFO's that are used by the network accelarator to - * communicate with the rest of the XLx device. 4 of the FIFO's are for - * packets from NA --> cpu (called Class FIFO's) and 2 are for feeding - * the NA with free descriptors. - */ -static void xlr_config_fifo_spill_area(struct xlr_net_priv *priv) -{ - priv->frin_spill = xlr_config_spill(priv, - R_REG_FRIN_SPILL_MEM_START_0, - R_REG_FRIN_SPILL_MEM_START_1, - R_REG_FRIN_SPILL_MEM_SIZE, - MAX_FRIN_SPILL * sizeof(u64)); - priv->frout_spill = xlr_config_spill(priv, - R_FROUT_SPILL_MEM_START_0, - R_FROUT_SPILL_MEM_START_1, - R_FROUT_SPILL_MEM_SIZE, - MAX_FROUT_SPILL * sizeof(u64)); - priv->class_0_spill = xlr_config_spill(priv, - R_CLASS0_SPILL_MEM_START_0, - R_CLASS0_SPILL_MEM_START_1, - R_CLASS0_SPILL_MEM_SIZE, - MAX_CLASS_0_SPILL * sizeof(u64)); - priv->class_1_spill = xlr_config_spill(priv, - R_CLASS1_SPILL_MEM_START_0, - R_CLASS1_SPILL_MEM_START_1, - R_CLASS1_SPILL_MEM_SIZE, - MAX_CLASS_1_SPILL * sizeof(u64)); - priv->class_2_spill = xlr_config_spill(priv, - R_CLASS2_SPILL_MEM_START_0, - R_CLASS2_SPILL_MEM_START_1, - R_CLASS2_SPILL_MEM_SIZE, - MAX_CLASS_2_SPILL * sizeof(u64)); - priv->class_3_spill = xlr_config_spill(priv, - R_CLASS3_SPILL_MEM_START_0, - R_CLASS3_SPILL_MEM_START_1, - R_CLASS3_SPILL_MEM_SIZE, - MAX_CLASS_3_SPILL * sizeof(u64)); -} - -/* - * Configure PDE to Round-Robin distribution of packets to the - * available cpu - */ -static void xlr_config_pde(struct xlr_net_priv *priv) -{ - int i = 0; - u64 bkt_map = 0; - - /* Each core has 8 buckets(station) */ - for (i = 0; i < hweight32(priv->nd->cpu_mask); i++) - bkt_map |= (0xff << (i * 8)); - - xlr_nae_wreg(priv->base_addr, R_PDE_CLASS_0, (bkt_map & 0xffffffff)); - xlr_nae_wreg(priv->base_addr, R_PDE_CLASS_0 + 1, - ((bkt_map >> 32) & 0xffffffff)); - - xlr_nae_wreg(priv->base_addr, R_PDE_CLASS_1, (bkt_map & 0xffffffff)); - xlr_nae_wreg(priv->base_addr, R_PDE_CLASS_1 + 1, - ((bkt_map >> 32) & 0xffffffff)); - - xlr_nae_wreg(priv->base_addr, R_PDE_CLASS_2, (bkt_map & 0xffffffff)); - xlr_nae_wreg(priv->base_addr, R_PDE_CLASS_2 + 1, - ((bkt_map >> 32) & 0xffffffff)); - - xlr_nae_wreg(priv->base_addr, R_PDE_CLASS_3, (bkt_map & 0xffffffff)); - xlr_nae_wreg(priv->base_addr, R_PDE_CLASS_3 + 1, - ((bkt_map >> 32) & 0xffffffff)); -} - -/* - * Setup the Message ring credits, bucket size and other - * common configuration - */ -static int xlr_config_common(struct xlr_net_priv *priv) -{ - struct xlr_fmn_info *gmac = priv->nd->gmac_fmn_info; - int start_stn_id = gmac->start_stn_id; - int end_stn_id = gmac->end_stn_id; - int *bucket_size = priv->nd->bucket_size; - int i, j, err; - - /* Setting non-core MsgBktSize(0x321 - 0x325) */ - for (i = start_stn_id; i <= end_stn_id; i++) { - xlr_nae_wreg(priv->base_addr, - R_GMAC_RFR0_BUCKET_SIZE + i - start_stn_id, - bucket_size[i]); - } - - /* - * Setting non-core Credit counter register - * Distributing Gmac's credit to CPU's - */ - for (i = 0; i < 8; i++) { - for (j = 0; j < 8; j++) - xlr_nae_wreg(priv->base_addr, - (R_CC_CPU0_0 + (i * 8)) + j, - gmac->credit_config[(i * 8) + j]); - } - - xlr_nae_wreg(priv->base_addr, R_MSG_TX_THRESHOLD, 3); - xlr_nae_wreg(priv->base_addr, R_DMACR0, 0xffffffff); - xlr_nae_wreg(priv->base_addr, R_DMACR1, 0xffffffff); - xlr_nae_wreg(priv->base_addr, R_DMACR2, 0xffffffff); - xlr_nae_wreg(priv->base_addr, R_DMACR3, 0xffffffff); - xlr_nae_wreg(priv->base_addr, R_FREEQCARVE, 0); - - err = xlr_net_fill_rx_ring(priv->ndev); - if (err) - return err; - nlm_register_fmn_handler(start_stn_id, end_stn_id, xlr_net_fmn_handler, - priv->adapter); - return 0; -} - -static void xlr_config_translate_table(struct xlr_net_priv *priv) -{ - u32 cpu_mask; - u32 val; - int bkts[32]; /* one bucket is assumed for each cpu */ - int b1, b2, c1, c2, i, j, k; - int use_bkt; - - use_bkt = 0; - cpu_mask = priv->nd->cpu_mask; - - pr_info("Using %s-based distribution\n", - (use_bkt) ? "bucket" : "class"); - j = 0; - for (i = 0; i < 32; i++) { - if ((1 << i) & cpu_mask) { - /* for each cpu, mark the 4+threadid bucket */ - bkts[j] = ((i / 4) * 8) + (i % 4); - j++; - } - } - - /*configure the 128 * 9 Translation table to send to available buckets*/ - k = 0; - c1 = 3; - c2 = 0; - for (i = 0; i < 64; i++) { - /* - * On use_bkt set the b0, b1 are used, else - * the 4 classes are used, here implemented - * a logic to distribute the packets to the - * buckets equally or based on the class - */ - c1 = (c1 + 1) & 3; - c2 = (c1 + 1) & 3; - b1 = bkts[k]; - k = (k + 1) % j; - b2 = bkts[k]; - k = (k + 1) % j; - - val = ((c1 << 23) | (b1 << 17) | (use_bkt << 16) | - (c2 << 7) | (b2 << 1) | (use_bkt << 0)); - dev_dbg(&priv->ndev->dev, "Table[%d] b1=%d b2=%d c1=%d c2=%d\n", - i, b1, b2, c1, c2); - xlr_nae_wreg(priv->base_addr, R_TRANSLATETABLE + i, val); - c1 = c2; - } -} - -static void xlr_config_parser(struct xlr_net_priv *priv) -{ - u32 val; - - /* Mark it as ETHERNET type */ - xlr_nae_wreg(priv->base_addr, R_L2TYPE_0, 0x01); - - /* Use 7bit CRChash for flow classification with 127 as CRC polynomial*/ - xlr_nae_wreg(priv->base_addr, R_PARSERCONFIGREG, - ((0x7f << 8) | (1 << 1))); - - /* configure the parser : L2 Type is configured in the bootloader */ - /* extract IP: src, dest protocol */ - xlr_nae_wreg(priv->base_addr, R_L3CTABLE, - (9 << 20) | (1 << 19) | (1 << 18) | (0x01 << 16) | - (0x0800 << 0)); - xlr_nae_wreg(priv->base_addr, R_L3CTABLE + 1, - (9 << 25) | (1 << 21) | (12 << 14) | (4 << 10) | - (16 << 4) | 4); - - /* Configure to extract SRC port and Dest port for TCP and UDP pkts */ - xlr_nae_wreg(priv->base_addr, R_L4CTABLE, 6); - xlr_nae_wreg(priv->base_addr, R_L4CTABLE + 2, 17); - val = ((0 << 21) | (2 << 17) | (2 << 11) | (2 << 7)); - xlr_nae_wreg(priv->base_addr, R_L4CTABLE + 1, val); - xlr_nae_wreg(priv->base_addr, R_L4CTABLE + 3, val); - - xlr_config_translate_table(priv); -} - -static int xlr_phy_write(u32 *base_addr, int phy_addr, int regnum, u16 val) -{ - unsigned long timeout, stoptime, checktime; - int timedout; - - /* 100ms timeout*/ - timeout = msecs_to_jiffies(100); - stoptime = jiffies + timeout; - timedout = 0; - - xlr_nae_wreg(base_addr, R_MII_MGMT_ADDRESS, (phy_addr << 8) | regnum); - - /* Write the data which starts the write cycle */ - xlr_nae_wreg(base_addr, R_MII_MGMT_WRITE_DATA, (u32)val); - - /* poll for the read cycle to complete */ - while (!timedout) { - checktime = jiffies; - if (xlr_nae_rdreg(base_addr, R_MII_MGMT_INDICATORS) == 0) - break; - timedout = time_after(checktime, stoptime); - } - if (timedout) { - pr_info("Phy device write err: device busy"); - return -EBUSY; - } - - return 0; -} - -static int xlr_phy_read(u32 *base_addr, int phy_addr, int regnum) -{ - unsigned long timeout, stoptime, checktime; - int timedout; - - /* 100ms timeout*/ - timeout = msecs_to_jiffies(100); - stoptime = jiffies + timeout; - timedout = 0; - - /* setup the phy reg to be used */ - xlr_nae_wreg(base_addr, R_MII_MGMT_ADDRESS, - (phy_addr << 8) | (regnum << 0)); - - /* Issue the read command */ - xlr_nae_wreg(base_addr, R_MII_MGMT_COMMAND, - (1 << O_MII_MGMT_COMMAND__rstat)); - - /* poll for the read cycle to complete */ - while (!timedout) { - checktime = jiffies; - if (xlr_nae_rdreg(base_addr, R_MII_MGMT_INDICATORS) == 0) - break; - timedout = time_after(checktime, stoptime); - } - if (timedout) { - pr_info("Phy device read err: device busy"); - return -EBUSY; - } - - /* clear the read cycle */ - xlr_nae_wreg(base_addr, R_MII_MGMT_COMMAND, 0); - - /* Read the data */ - return xlr_nae_rdreg(base_addr, R_MII_MGMT_STATUS); -} - -static int xlr_mii_write(struct mii_bus *bus, int phy_addr, int regnum, u16 val) -{ - struct xlr_net_priv *priv = bus->priv; - int ret; - - ret = xlr_phy_write(priv->mii_addr, phy_addr, regnum, val); - dev_dbg(&priv->ndev->dev, "mii_write phy %d : %d <- %x [%x]\n", - phy_addr, regnum, val, ret); - return ret; -} - -static int xlr_mii_read(struct mii_bus *bus, int phy_addr, int regnum) -{ - struct xlr_net_priv *priv = bus->priv; - int ret; - - ret = xlr_phy_read(priv->mii_addr, phy_addr, regnum); - dev_dbg(&priv->ndev->dev, "mii_read phy %d : %d [%x]\n", - phy_addr, regnum, ret); - return ret; -} - -/* - * XLR ports are RGMII. XLS ports are SGMII mostly except the port0, - * which can be configured either SGMII or RGMII, considered SGMII - * by default, if board setup to RGMII the port_type need to set - * accordingly.Serdes and PCS layer need to configured for SGMII - */ -static void xlr_sgmii_init(struct xlr_net_priv *priv) -{ - int phy; - - xlr_phy_write(priv->serdes_addr, 26, 0, 0x6DB0); - xlr_phy_write(priv->serdes_addr, 26, 1, 0xFFFF); - xlr_phy_write(priv->serdes_addr, 26, 2, 0xB6D0); - xlr_phy_write(priv->serdes_addr, 26, 3, 0x00FF); - xlr_phy_write(priv->serdes_addr, 26, 4, 0x0000); - xlr_phy_write(priv->serdes_addr, 26, 5, 0x0000); - xlr_phy_write(priv->serdes_addr, 26, 6, 0x0005); - xlr_phy_write(priv->serdes_addr, 26, 7, 0x0001); - xlr_phy_write(priv->serdes_addr, 26, 8, 0x0000); - xlr_phy_write(priv->serdes_addr, 26, 9, 0x0000); - xlr_phy_write(priv->serdes_addr, 26, 10, 0x0000); - - /* program GPIO values for serdes init parameters */ - xlr_nae_wreg(priv->gpio_addr, 0x20, 0x7e6802); - xlr_nae_wreg(priv->gpio_addr, 0x10, 0x7104); - - xlr_nae_wreg(priv->gpio_addr, 0x22, 0x7e6802); - xlr_nae_wreg(priv->gpio_addr, 0x21, 0x7104); - - /* enable autoneg - more magic */ - phy = priv->phy_addr % 4 + 27; - xlr_phy_write(priv->pcs_addr, phy, 0, 0x1000); - xlr_phy_write(priv->pcs_addr, phy, 0, 0x0200); -} - -void xlr_set_gmac_speed(struct xlr_net_priv *priv) -{ - struct phy_device *phydev = xlr_get_phydev(priv); - int speed; - - if (phydev->interface == PHY_INTERFACE_MODE_SGMII) - xlr_sgmii_init(priv); - - if (phydev->speed != priv->phy_speed) { - speed = phydev->speed; - if (speed == SPEED_1000) { - /* Set interface to Byte mode */ - xlr_nae_wreg(priv->base_addr, R_MAC_CONFIG_2, 0x7217); - priv->phy_speed = speed; - } else if (speed == SPEED_100 || speed == SPEED_10) { - /* Set interface to Nibble mode */ - xlr_nae_wreg(priv->base_addr, R_MAC_CONFIG_2, 0x7117); - priv->phy_speed = speed; - } - /* Set SGMII speed in Interface control reg */ - if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { - if (speed == SPEED_10) - xlr_nae_wreg(priv->base_addr, - R_INTERFACE_CONTROL, - SGMII_SPEED_10); - if (speed == SPEED_100) - xlr_nae_wreg(priv->base_addr, - R_INTERFACE_CONTROL, - SGMII_SPEED_100); - if (speed == SPEED_1000) - xlr_nae_wreg(priv->base_addr, - R_INTERFACE_CONTROL, - SGMII_SPEED_1000); - } - if (speed == SPEED_10) - xlr_nae_wreg(priv->base_addr, R_CORECONTROL, 0x2); - if (speed == SPEED_100) - xlr_nae_wreg(priv->base_addr, R_CORECONTROL, 0x1); - if (speed == SPEED_1000) - xlr_nae_wreg(priv->base_addr, R_CORECONTROL, 0x0); - } - pr_info("gmac%d : %dMbps\n", priv->port_id, priv->phy_speed); -} - -static void xlr_gmac_link_adjust(struct net_device *ndev) -{ - struct xlr_net_priv *priv = netdev_priv(ndev); - struct phy_device *phydev = xlr_get_phydev(priv); - u32 intreg; - - intreg = xlr_nae_rdreg(priv->base_addr, R_INTREG); - if (phydev->link) { - if (phydev->speed != priv->phy_speed) { - xlr_set_gmac_speed(priv); - pr_info("gmac%d : Link up\n", priv->port_id); - } - } else { - xlr_set_gmac_speed(priv); - pr_info("gmac%d : Link down\n", priv->port_id); - } -} - -static int xlr_mii_probe(struct xlr_net_priv *priv) -{ - struct phy_device *phydev = xlr_get_phydev(priv); - - if (!phydev) { - pr_err("no PHY found on phy_addr %d\n", priv->phy_addr); - return -ENODEV; - } - - /* Attach MAC to PHY */ - phydev = phy_connect(priv->ndev, phydev_name(phydev), - xlr_gmac_link_adjust, priv->nd->phy_interface); - - if (IS_ERR(phydev)) { - pr_err("could not attach PHY\n"); - return PTR_ERR(phydev); - } - phydev->supported &= (ADVERTISED_10baseT_Full - | ADVERTISED_10baseT_Half - | ADVERTISED_100baseT_Full - | ADVERTISED_100baseT_Half - | ADVERTISED_1000baseT_Full - | ADVERTISED_Autoneg - | ADVERTISED_MII); - - phydev->advertising = phydev->supported; - phy_attached_info(phydev); - return 0; -} - -static int xlr_setup_mdio(struct xlr_net_priv *priv, - struct platform_device *pdev) -{ - int err; - - priv->mii_bus = mdiobus_alloc(); - if (!priv->mii_bus) { - pr_err("mdiobus alloc failed\n"); - return -ENOMEM; - } - - priv->mii_bus->priv = priv; - priv->mii_bus->name = "xlr-mdio"; - snprintf(priv->mii_bus->id, MII_BUS_ID_SIZE, "%s-%d", - priv->mii_bus->name, priv->port_id); - priv->mii_bus->read = xlr_mii_read; - priv->mii_bus->write = xlr_mii_write; - priv->mii_bus->parent = &pdev->dev; - - /* Scan only the enabled address */ - priv->mii_bus->phy_mask = ~(1 << priv->phy_addr); - - /* setting clock divisor to 54 */ - xlr_nae_wreg(priv->base_addr, R_MII_MGMT_CONFIG, 0x7); - - err = mdiobus_register(priv->mii_bus); - if (err) { - mdiobus_free(priv->mii_bus); - pr_err("mdio bus registration failed\n"); - return err; - } - - pr_info("Registered mdio bus id : %s\n", priv->mii_bus->id); - err = xlr_mii_probe(priv); - if (err) { - mdiobus_free(priv->mii_bus); - return err; - } - return 0; -} - -static void xlr_port_enable(struct xlr_net_priv *priv) -{ - u32 prid = (read_c0_prid() & 0xf000); - - /* Setup MAC_CONFIG reg if (xls & rgmii) */ - if ((prid == 0x8000 || prid == 0x4000 || prid == 0xc000) && - priv->nd->phy_interface == PHY_INTERFACE_MODE_RGMII) - xlr_reg_update(priv->base_addr, R_RX_CONTROL, - (1 << O_RX_CONTROL__RGMII), - (1 << O_RX_CONTROL__RGMII)); - - /* Rx Tx enable */ - xlr_reg_update(priv->base_addr, R_MAC_CONFIG_1, - ((1 << O_MAC_CONFIG_1__rxen) | - (1 << O_MAC_CONFIG_1__txen) | - (1 << O_MAC_CONFIG_1__rxfc) | - (1 << O_MAC_CONFIG_1__txfc)), - ((1 << O_MAC_CONFIG_1__rxen) | - (1 << O_MAC_CONFIG_1__txen) | - (1 << O_MAC_CONFIG_1__rxfc) | - (1 << O_MAC_CONFIG_1__txfc))); - - /* Setup tx control reg */ - xlr_reg_update(priv->base_addr, R_TX_CONTROL, - ((1 << O_TX_CONTROL__TXENABLE) | - (512 << O_TX_CONTROL__TXTHRESHOLD)), 0x3fff); - - /* Setup rx control reg */ - xlr_reg_update(priv->base_addr, R_RX_CONTROL, - 1 << O_RX_CONTROL__RXENABLE, - 1 << O_RX_CONTROL__RXENABLE); -} - -static void xlr_port_disable(struct xlr_net_priv *priv) -{ - /* Setup MAC_CONFIG reg */ - /* Rx Tx disable*/ - xlr_reg_update(priv->base_addr, R_MAC_CONFIG_1, - ((1 << O_MAC_CONFIG_1__rxen) | - (1 << O_MAC_CONFIG_1__txen) | - (1 << O_MAC_CONFIG_1__rxfc) | - (1 << O_MAC_CONFIG_1__txfc)), 0x0); - - /* Setup tx control reg */ - xlr_reg_update(priv->base_addr, R_TX_CONTROL, - ((1 << O_TX_CONTROL__TXENABLE) | - (512 << O_TX_CONTROL__TXTHRESHOLD)), 0); - - /* Setup rx control reg */ - xlr_reg_update(priv->base_addr, R_RX_CONTROL, - 1 << O_RX_CONTROL__RXENABLE, 0); -} - -/* - * Initialization of gmac - */ -static int xlr_gmac_init(struct xlr_net_priv *priv, - struct platform_device *pdev) -{ - int ret; - - pr_info("Initializing the gmac%d\n", priv->port_id); - - xlr_port_disable(priv); - - xlr_nae_wreg(priv->base_addr, R_DESC_PACK_CTRL, - (1 << O_DESC_PACK_CTRL__MAXENTRY) | - (BYTE_OFFSET << O_DESC_PACK_CTRL__BYTEOFFSET) | - (1600 << O_DESC_PACK_CTRL__REGULARSIZE)); - - ret = xlr_setup_mdio(priv, pdev); - if (ret) - return ret; - xlr_port_enable(priv); - - /* Enable Full-duplex/1000Mbps/CRC */ - xlr_nae_wreg(priv->base_addr, R_MAC_CONFIG_2, 0x7217); - /* speed 2.5Mhz */ - xlr_nae_wreg(priv->base_addr, R_CORECONTROL, 0x02); - /* Setup Interrupt mask reg */ - xlr_nae_wreg(priv->base_addr, R_INTMASK, (1 << O_INTMASK__TXILLEGAL) | - (1 << O_INTMASK__MDINT) | (1 << O_INTMASK__TXFETCHERROR) | - (1 << O_INTMASK__P2PSPILLECC) | (1 << O_INTMASK__TAGFULL) | - (1 << O_INTMASK__UNDERRUN) | (1 << O_INTMASK__ABORT)); - - /* Clear all stats */ - xlr_reg_update(priv->base_addr, R_STATCTRL, 0, 1 << O_STATCTRL__CLRCNT); - xlr_reg_update(priv->base_addr, R_STATCTRL, 1 << 2, 1 << 2); - return 0; -} - -static int xlr_net_probe(struct platform_device *pdev) -{ - struct xlr_net_priv *priv = NULL; - struct net_device *ndev; - struct resource *res; - struct xlr_adapter *adapter; - int err, port; - - pr_info("XLR/XLS Ethernet Driver controller %d\n", pdev->id); - /* - * Allocate our adapter data structure and attach it to the device. - */ - adapter = devm_kzalloc(&pdev->dev, sizeof(*adapter), GFP_KERNEL); - if (!adapter) - return -ENOMEM; - - /* - * XLR and XLS have 1 and 2 NAE controller respectively - * Each controller has 4 gmac ports, mapping each controller - * under one parent device, 4 gmac ports under one device. - */ - for (port = 0; port < pdev->num_resources / 2; port++) { - ndev = alloc_etherdev_mq(sizeof(struct xlr_net_priv), 32); - if (!ndev) { - dev_err(&pdev->dev, - "Allocation of Ethernet device failed\n"); - return -ENOMEM; - } - - priv = netdev_priv(ndev); - priv->pdev = pdev; - priv->ndev = ndev; - priv->port_id = (pdev->id * 4) + port; - priv->nd = (struct xlr_net_data *)pdev->dev.platform_data; - priv->base_addr = devm_platform_ioremap_resource(pdev, port); - if (IS_ERR(priv->base_addr)) { - err = PTR_ERR(priv->base_addr); - goto err_gmac; - } - priv->adapter = adapter; - adapter->netdev[port] = ndev; - - res = platform_get_resource(pdev, IORESOURCE_IRQ, port); - if (!res) { - dev_err(&pdev->dev, "No irq resource for MAC %d\n", - priv->port_id); - err = -ENODEV; - goto err_gmac; - } - - ndev->irq = res->start; - - priv->phy_addr = priv->nd->phy_addr[port]; - priv->tx_stnid = priv->nd->tx_stnid[port]; - priv->mii_addr = priv->nd->mii_addr; - priv->serdes_addr = priv->nd->serdes_addr; - priv->pcs_addr = priv->nd->pcs_addr; - priv->gpio_addr = priv->nd->gpio_addr; - - ndev->netdev_ops = &xlr_netdev_ops; - ndev->watchdog_timeo = HZ; - - /* Setup Mac address and Rx mode */ - eth_hw_addr_random(ndev); - xlr_hw_set_mac_addr(ndev); - xlr_set_rx_mode(ndev); - - priv->num_rx_desc += MAX_NUM_DESC_SPILL; - ndev->ethtool_ops = &xlr_ethtool_ops; - SET_NETDEV_DEV(ndev, &pdev->dev); - - xlr_config_fifo_spill_area(priv); - /* Configure PDE to Round-Robin pkt distribution */ - xlr_config_pde(priv); - xlr_config_parser(priv); - - /* Call init with respect to port */ - if (strcmp(res->name, "gmac") == 0) { - err = xlr_gmac_init(priv, pdev); - if (err) { - dev_err(&pdev->dev, "gmac%d init failed\n", - priv->port_id); - goto err_gmac; - } - } - - if (priv->port_id == 0 || priv->port_id == 4) { - err = xlr_config_common(priv); - if (err) - goto err_netdev; - } - - err = register_netdev(ndev); - if (err) { - dev_err(&pdev->dev, - "Registering netdev failed for gmac%d\n", - priv->port_id); - goto err_netdev; - } - platform_set_drvdata(pdev, priv); - } - - return 0; - -err_netdev: - mdiobus_free(priv->mii_bus); -err_gmac: - free_netdev(ndev); - return err; -} - -static int xlr_net_remove(struct platform_device *pdev) -{ - struct xlr_net_priv *priv = platform_get_drvdata(pdev); - - unregister_netdev(priv->ndev); - mdiobus_unregister(priv->mii_bus); - mdiobus_free(priv->mii_bus); - free_netdev(priv->ndev); - return 0; -} - -static struct platform_driver xlr_net_driver = { - .probe = xlr_net_probe, - .remove = xlr_net_remove, - .driver = { - .name = "xlr-net", - }, -}; - -module_platform_driver(xlr_net_driver); - -MODULE_AUTHOR("Ganesan Ramalingam <ganesanr@broadcom.com>"); -MODULE_DESCRIPTION("Ethernet driver for Netlogic XLR/XLS"); -MODULE_LICENSE("Dual BSD/GPL"); -MODULE_ALIAS("platform:xlr-net"); diff --git a/drivers/staging/netlogic/xlr_net.h b/drivers/staging/netlogic/xlr_net.h deleted file mode 100644 index 8365b744f9b3..000000000000 --- a/drivers/staging/netlogic/xlr_net.h +++ /dev/null @@ -1,1079 +0,0 @@ -/* SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) */ -/* - * Copyright (c) 2003-2012 Broadcom Corporation - * All Rights Reserved - */ - -/* #define MAC_SPLIT_MODE */ - -#define MAC_SPACING 0x400 -#define XGMAC_SPACING 0x400 - -/* PE-MCXMAC register and bit field definitions */ -#define R_MAC_CONFIG_1 0x00 -#define O_MAC_CONFIG_1__srst 31 -#define O_MAC_CONFIG_1__simr 30 -#define O_MAC_CONFIG_1__hrrmc 18 -#define W_MAC_CONFIG_1__hrtmc 2 -#define O_MAC_CONFIG_1__hrrfn 16 -#define W_MAC_CONFIG_1__hrtfn 2 -#define O_MAC_CONFIG_1__intlb 8 -#define O_MAC_CONFIG_1__rxfc 5 -#define O_MAC_CONFIG_1__txfc 4 -#define O_MAC_CONFIG_1__srxen 3 -#define O_MAC_CONFIG_1__rxen 2 -#define O_MAC_CONFIG_1__stxen 1 -#define O_MAC_CONFIG_1__txen 0 -#define R_MAC_CONFIG_2 0x01 -#define O_MAC_CONFIG_2__prlen 12 -#define W_MAC_CONFIG_2__prlen 4 -#define O_MAC_CONFIG_2__speed 8 -#define W_MAC_CONFIG_2__speed 2 -#define O_MAC_CONFIG_2__hugen 5 -#define O_MAC_CONFIG_2__flchk 4 -#define O_MAC_CONFIG_2__crce 1 -#define O_MAC_CONFIG_2__fulld 0 -#define R_IPG_IFG 0x02 -#define O_IPG_IFG__ipgr1 24 -#define W_IPG_IFG__ipgr1 7 -#define O_IPG_IFG__ipgr2 16 -#define W_IPG_IFG__ipgr2 7 -#define O_IPG_IFG__mifg 8 -#define W_IPG_IFG__mifg 8 -#define O_IPG_IFG__ipgt 0 -#define W_IPG_IFG__ipgt 7 -#define R_HALF_DUPLEX 0x03 -#define O_HALF_DUPLEX__abebt 24 -#define W_HALF_DUPLEX__abebt 4 -#define O_HALF_DUPLEX__abebe 19 -#define O_HALF_DUPLEX__bpnb 18 -#define O_HALF_DUPLEX__nobo 17 -#define O_HALF_DUPLEX__edxsdfr 16 -#define O_HALF_DUPLEX__retry 12 -#define W_HALF_DUPLEX__retry 4 -#define O_HALF_DUPLEX__lcol 0 -#define W_HALF_DUPLEX__lcol 10 -#define R_MAXIMUM_FRAME_LENGTH 0x04 -#define O_MAXIMUM_FRAME_LENGTH__maxf 0 -#define W_MAXIMUM_FRAME_LENGTH__maxf 16 -#define R_TEST 0x07 -#define O_TEST__mbof 3 -#define O_TEST__rthdf 2 -#define O_TEST__tpause 1 -#define O_TEST__sstct 0 -#define R_MII_MGMT_CONFIG 0x08 -#define O_MII_MGMT_CONFIG__scinc 5 -#define O_MII_MGMT_CONFIG__spre 4 -#define O_MII_MGMT_CONFIG__clks 3 -#define W_MII_MGMT_CONFIG__clks 3 -#define R_MII_MGMT_COMMAND 0x09 -#define O_MII_MGMT_COMMAND__scan 1 -#define O_MII_MGMT_COMMAND__rstat 0 -#define R_MII_MGMT_ADDRESS 0x0A -#define O_MII_MGMT_ADDRESS__fiad 8 -#define W_MII_MGMT_ADDRESS__fiad 5 -#define O_MII_MGMT_ADDRESS__fgad 5 -#define W_MII_MGMT_ADDRESS__fgad 0 -#define R_MII_MGMT_WRITE_DATA 0x0B -#define O_MII_MGMT_WRITE_DATA__ctld 0 -#define W_MII_MGMT_WRITE_DATA__ctld 16 -#define R_MII_MGMT_STATUS 0x0C -#define R_MII_MGMT_INDICATORS 0x0D -#define O_MII_MGMT_INDICATORS__nvalid 2 -#define O_MII_MGMT_INDICATORS__scan 1 -#define O_MII_MGMT_INDICATORS__busy 0 -#define R_INTERFACE_CONTROL 0x0E -#define O_INTERFACE_CONTROL__hrstint 31 -#define O_INTERFACE_CONTROL__tbimode 27 -#define O_INTERFACE_CONTROL__ghdmode 26 -#define O_INTERFACE_CONTROL__lhdmode 25 -#define O_INTERFACE_CONTROL__phymod 24 -#define O_INTERFACE_CONTROL__hrrmi 23 -#define O_INTERFACE_CONTROL__rspd 16 -#define O_INTERFACE_CONTROL__hr100 15 -#define O_INTERFACE_CONTROL__frcq 10 -#define O_INTERFACE_CONTROL__nocfr 9 -#define O_INTERFACE_CONTROL__dlfct 8 -#define O_INTERFACE_CONTROL__enjab 0 -#define R_INTERFACE_STATUS 0x0F -#define O_INTERFACE_STATUS__xsdfr 9 -#define O_INTERFACE_STATUS__ssrr 8 -#define W_INTERFACE_STATUS__ssrr 5 -#define O_INTERFACE_STATUS__miilf 3 -#define O_INTERFACE_STATUS__locar 2 -#define O_INTERFACE_STATUS__sqerr 1 -#define O_INTERFACE_STATUS__jabber 0 -#define R_STATION_ADDRESS_LS 0x10 -#define R_STATION_ADDRESS_MS 0x11 - -/* A-XGMAC register and bit field definitions */ -#define R_XGMAC_CONFIG_0 0x00 -#define O_XGMAC_CONFIG_0__hstmacrst 31 -#define O_XGMAC_CONFIG_0__hstrstrctl 23 -#define O_XGMAC_CONFIG_0__hstrstrfn 22 -#define O_XGMAC_CONFIG_0__hstrsttctl 18 -#define O_XGMAC_CONFIG_0__hstrsttfn 17 -#define O_XGMAC_CONFIG_0__hstrstmiim 16 -#define O_XGMAC_CONFIG_0__hstloopback 8 -#define R_XGMAC_CONFIG_1 0x01 -#define O_XGMAC_CONFIG_1__hsttctlen 31 -#define O_XGMAC_CONFIG_1__hsttfen 30 -#define O_XGMAC_CONFIG_1__hstrctlen 29 -#define O_XGMAC_CONFIG_1__hstrfen 28 -#define O_XGMAC_CONFIG_1__tfen 26 -#define O_XGMAC_CONFIG_1__rfen 24 -#define O_XGMAC_CONFIG_1__hstrctlshrtp 12 -#define O_XGMAC_CONFIG_1__hstdlyfcstx 10 -#define W_XGMAC_CONFIG_1__hstdlyfcstx 2 -#define O_XGMAC_CONFIG_1__hstdlyfcsrx 8 -#define W_XGMAC_CONFIG_1__hstdlyfcsrx 2 -#define O_XGMAC_CONFIG_1__hstppen 7 -#define O_XGMAC_CONFIG_1__hstbytswp 6 -#define O_XGMAC_CONFIG_1__hstdrplt64 5 -#define O_XGMAC_CONFIG_1__hstprmscrx 4 -#define O_XGMAC_CONFIG_1__hstlenchk 3 -#define O_XGMAC_CONFIG_1__hstgenfcs 2 -#define O_XGMAC_CONFIG_1__hstpadmode 0 -#define W_XGMAC_CONFIG_1__hstpadmode 2 -#define R_XGMAC_CONFIG_2 0x02 -#define O_XGMAC_CONFIG_2__hsttctlfrcp 31 -#define O_XGMAC_CONFIG_2__hstmlnkflth 27 -#define O_XGMAC_CONFIG_2__hstalnkflth 26 -#define O_XGMAC_CONFIG_2__rflnkflt 24 -#define W_XGMAC_CONFIG_2__rflnkflt 2 -#define O_XGMAC_CONFIG_2__hstipgextmod 16 -#define W_XGMAC_CONFIG_2__hstipgextmod 5 -#define O_XGMAC_CONFIG_2__hstrctlfrcp 15 -#define O_XGMAC_CONFIG_2__hstipgexten 5 -#define O_XGMAC_CONFIG_2__hstmipgext 0 -#define W_XGMAC_CONFIG_2__hstmipgext 5 -#define R_XGMAC_CONFIG_3 0x03 -#define O_XGMAC_CONFIG_3__hstfltrfrm 31 -#define W_XGMAC_CONFIG_3__hstfltrfrm 16 -#define O_XGMAC_CONFIG_3__hstfltrfrmdc 15 -#define W_XGMAC_CONFIG_3__hstfltrfrmdc 16 -#define R_XGMAC_STATION_ADDRESS_LS 0x04 -#define O_XGMAC_STATION_ADDRESS_LS__hstmacadr0 0 -#define W_XGMAC_STATION_ADDRESS_LS__hstmacadr0 32 -#define R_XGMAC_STATION_ADDRESS_MS 0x05 -#define R_XGMAC_MAX_FRAME_LEN 0x08 -#define O_XGMAC_MAX_FRAME_LEN__hstmxfrmwctx 16 -#define W_XGMAC_MAX_FRAME_LEN__hstmxfrmwctx 14 -#define O_XGMAC_MAX_FRAME_LEN__hstmxfrmbcrx 0 -#define W_XGMAC_MAX_FRAME_LEN__hstmxfrmbcrx 16 -#define R_XGMAC_REV_LEVEL 0x0B -#define O_XGMAC_REV_LEVEL__revlvl 0 -#define W_XGMAC_REV_LEVEL__revlvl 15 -#define R_XGMAC_MIIM_COMMAND 0x10 -#define O_XGMAC_MIIM_COMMAND__hstldcmd 3 -#define O_XGMAC_MIIM_COMMAND__hstmiimcmd 0 -#define W_XGMAC_MIIM_COMMAND__hstmiimcmd 3 -#define R_XGMAC_MIIM_FILED 0x11 -#define O_XGMAC_MIIM_FILED__hststfield 30 -#define W_XGMAC_MIIM_FILED__hststfield 2 -#define O_XGMAC_MIIM_FILED__hstopfield 28 -#define W_XGMAC_MIIM_FILED__hstopfield 2 -#define O_XGMAC_MIIM_FILED__hstphyadx 23 -#define W_XGMAC_MIIM_FILED__hstphyadx 5 -#define O_XGMAC_MIIM_FILED__hstregadx 18 -#define W_XGMAC_MIIM_FILED__hstregadx 5 -#define O_XGMAC_MIIM_FILED__hsttafield 16 -#define W_XGMAC_MIIM_FILED__hsttafield 2 -#define O_XGMAC_MIIM_FILED__miimrddat 0 -#define W_XGMAC_MIIM_FILED__miimrddat 16 -#define R_XGMAC_MIIM_CONFIG 0x12 -#define O_XGMAC_MIIM_CONFIG__hstnopram 7 -#define O_XGMAC_MIIM_CONFIG__hstclkdiv 0 -#define W_XGMAC_MIIM_CONFIG__hstclkdiv 7 -#define R_XGMAC_MIIM_LINK_FAIL_VECTOR 0x13 -#define O_XGMAC_MIIM_LINK_FAIL_VECTOR__miimlfvec 0 -#define W_XGMAC_MIIM_LINK_FAIL_VECTOR__miimlfvec 32 -#define R_XGMAC_MIIM_INDICATOR 0x14 -#define O_XGMAC_MIIM_INDICATOR__miimphylf 4 -#define O_XGMAC_MIIM_INDICATOR__miimmoncplt 3 -#define O_XGMAC_MIIM_INDICATOR__miimmonvld 2 -#define O_XGMAC_MIIM_INDICATOR__miimmon 1 -#define O_XGMAC_MIIM_INDICATOR__miimbusy 0 - -/* GMAC stats registers */ -#define R_RBYT 0x27 -#define R_RPKT 0x28 -#define R_RFCS 0x29 -#define R_RMCA 0x2A -#define R_RBCA 0x2B -#define R_RXCF 0x2C -#define R_RXPF 0x2D -#define R_RXUO 0x2E -#define R_RALN 0x2F -#define R_RFLR 0x30 -#define R_RCDE 0x31 -#define R_RCSE 0x32 -#define R_RUND 0x33 -#define R_ROVR 0x34 -#define R_TBYT 0x38 -#define R_TPKT 0x39 -#define R_TMCA 0x3A -#define R_TBCA 0x3B -#define R_TXPF 0x3C -#define R_TDFR 0x3D -#define R_TEDF 0x3E -#define R_TSCL 0x3F -#define R_TMCL 0x40 -#define R_TLCL 0x41 -#define R_TXCL 0x42 -#define R_TNCL 0x43 -#define R_TJBR 0x46 -#define R_TFCS 0x47 -#define R_TXCF 0x48 -#define R_TOVR 0x49 -#define R_TUND 0x4A -#define R_TFRG 0x4B - -/* Glue logic register and bit field definitions */ -#define R_MAC_ADDR0 0x50 -#define R_MAC_ADDR1 0x52 -#define R_MAC_ADDR2 0x54 -#define R_MAC_ADDR3 0x56 -#define R_MAC_ADDR_MASK2 0x58 -#define R_MAC_ADDR_MASK3 0x5A -#define R_MAC_FILTER_CONFIG 0x5C -#define O_MAC_FILTER_CONFIG__BROADCAST_EN 10 -#define O_MAC_FILTER_CONFIG__PAUSE_FRAME_EN 9 -#define O_MAC_FILTER_CONFIG__ALL_MCAST_EN 8 -#define O_MAC_FILTER_CONFIG__ALL_UCAST_EN 7 -#define O_MAC_FILTER_CONFIG__HASH_MCAST_EN 6 -#define O_MAC_FILTER_CONFIG__HASH_UCAST_EN 5 -#define O_MAC_FILTER_CONFIG__ADDR_MATCH_DISC 4 -#define O_MAC_FILTER_CONFIG__MAC_ADDR3_VALID 3 -#define O_MAC_FILTER_CONFIG__MAC_ADDR2_VALID 2 -#define O_MAC_FILTER_CONFIG__MAC_ADDR1_VALID 1 -#define O_MAC_FILTER_CONFIG__MAC_ADDR0_VALID 0 -#define R_HASH_TABLE_VECTOR 0x30 -#define R_TX_CONTROL 0x0A0 -#define O_TX_CONTROL__TX15HALT 31 -#define O_TX_CONTROL__TX14HALT 30 -#define O_TX_CONTROL__TX13HALT 29 -#define O_TX_CONTROL__TX12HALT 28 -#define O_TX_CONTROL__TX11HALT 27 -#define O_TX_CONTROL__TX10HALT 26 -#define O_TX_CONTROL__TX9HALT 25 -#define O_TX_CONTROL__TX8HALT 24 -#define O_TX_CONTROL__TX7HALT 23 -#define O_TX_CONTROL__TX6HALT 22 -#define O_TX_CONTROL__TX5HALT 21 -#define O_TX_CONTROL__TX4HALT 20 -#define O_TX_CONTROL__TX3HALT 19 -#define O_TX_CONTROL__TX2HALT 18 -#define O_TX_CONTROL__TX1HALT 17 -#define O_TX_CONTROL__TX0HALT 16 -#define O_TX_CONTROL__TXIDLE 15 -#define O_TX_CONTROL__TXENABLE 14 -#define O_TX_CONTROL__TXTHRESHOLD 0 -#define W_TX_CONTROL__TXTHRESHOLD 14 -#define R_RX_CONTROL 0x0A1 -#define O_RX_CONTROL__RGMII 10 -#define O_RX_CONTROL__SOFTRESET 2 -#define O_RX_CONTROL__RXHALT 1 -#define O_RX_CONTROL__RXENABLE 0 -#define R_DESC_PACK_CTRL 0x0A2 -#define O_DESC_PACK_CTRL__BYTEOFFSET 17 -#define W_DESC_PACK_CTRL__BYTEOFFSET 3 -#define O_DESC_PACK_CTRL__PREPADENABLE 16 -#define O_DESC_PACK_CTRL__MAXENTRY 14 -#define W_DESC_PACK_CTRL__MAXENTRY 2 -#define O_DESC_PACK_CTRL__REGULARSIZE 0 -#define W_DESC_PACK_CTRL__REGULARSIZE 14 -#define R_STATCTRL 0x0A3 -#define O_STATCTRL__OVERFLOWEN 4 -#define O_STATCTRL__GIG 3 -#define O_STATCTRL__STEN 2 -#define O_STATCTRL__CLRCNT 1 -#define O_STATCTRL__AUTOZ 0 -#define R_L2ALLOCCTRL 0x0A4 -#define O_L2ALLOCCTRL__TXL2ALLOCATE 9 -#define W_L2ALLOCCTRL__TXL2ALLOCATE 9 -#define O_L2ALLOCCTRL__RXL2ALLOCATE 0 -#define W_L2ALLOCCTRL__RXL2ALLOCATE 9 -#define R_INTMASK 0x0A5 -#define O_INTMASK__SPI4TXERROR 28 -#define O_INTMASK__SPI4RXERROR 27 -#define O_INTMASK__RGMIIHALFDUPCOLLISION 27 -#define O_INTMASK__ABORT 26 -#define O_INTMASK__UNDERRUN 25 -#define O_INTMASK__DISCARDPACKET 24 -#define O_INTMASK__ASYNCFIFOFULL 23 -#define O_INTMASK__TAGFULL 22 -#define O_INTMASK__CLASS3FULL 21 -#define O_INTMASK__C3EARLYFULL 20 -#define O_INTMASK__CLASS2FULL 19 -#define O_INTMASK__C2EARLYFULL 18 -#define O_INTMASK__CLASS1FULL 17 -#define O_INTMASK__C1EARLYFULL 16 -#define O_INTMASK__CLASS0FULL 15 -#define O_INTMASK__C0EARLYFULL 14 -#define O_INTMASK__RXDATAFULL 13 -#define O_INTMASK__RXEARLYFULL 12 -#define O_INTMASK__RFREEEMPTY 9 -#define O_INTMASK__RFEARLYEMPTY 8 -#define O_INTMASK__P2PSPILLECC 7 -#define O_INTMASK__FREEDESCFULL 5 -#define O_INTMASK__FREEEARLYFULL 4 -#define O_INTMASK__TXFETCHERROR 3 -#define O_INTMASK__STATCARRY 2 -#define O_INTMASK__MDINT 1 -#define O_INTMASK__TXILLEGAL 0 -#define R_INTREG 0x0A6 -#define O_INTREG__SPI4TXERROR 28 -#define O_INTREG__SPI4RXERROR 27 -#define O_INTREG__RGMIIHALFDUPCOLLISION 27 -#define O_INTREG__ABORT 26 -#define O_INTREG__UNDERRUN 25 -#define O_INTREG__DISCARDPACKET 24 -#define O_INTREG__ASYNCFIFOFULL 23 -#define O_INTREG__TAGFULL 22 -#define O_INTREG__CLASS3FULL 21 -#define O_INTREG__C3EARLYFULL 20 -#define O_INTREG__CLASS2FULL 19 -#define O_INTREG__C2EARLYFULL 18 -#define O_INTREG__CLASS1FULL 17 -#define O_INTREG__C1EARLYFULL 16 -#define O_INTREG__CLASS0FULL 15 -#define O_INTREG__C0EARLYFULL 14 -#define O_INTREG__RXDATAFULL 13 -#define O_INTREG__RXEARLYFULL 12 -#define O_INTREG__RFREEEMPTY 9 -#define O_INTREG__RFEARLYEMPTY 8 -#define O_INTREG__P2PSPILLECC 7 -#define O_INTREG__FREEDESCFULL 5 -#define O_INTREG__FREEEARLYFULL 4 -#define O_INTREG__TXFETCHERROR 3 -#define O_INTREG__STATCARRY 2 -#define O_INTREG__MDINT 1 -#define O_INTREG__TXILLEGAL 0 -#define R_TXRETRY 0x0A7 -#define O_TXRETRY__COLLISIONRETRY 6 -#define O_TXRETRY__BUSERRORRETRY 5 -#define O_TXRETRY__UNDERRUNRETRY 4 -#define O_TXRETRY__RETRIES 0 -#define W_TXRETRY__RETRIES 4 -#define R_CORECONTROL 0x0A8 -#define O_CORECONTROL__ERRORTHREAD 4 -#define W_CORECONTROL__ERRORTHREAD 7 -#define O_CORECONTROL__SHUTDOWN 2 -#define O_CORECONTROL__SPEED 0 -#define W_CORECONTROL__SPEED 2 -#define R_BYTEOFFSET0 0x0A9 -#define R_BYTEOFFSET1 0x0AA -#define R_L2TYPE_0 0x0F0 -#define O_L2TYPE__EXTRAHDRPROTOSIZE 26 -#define W_L2TYPE__EXTRAHDRPROTOSIZE 5 -#define O_L2TYPE__EXTRAHDRPROTOOFFSET 20 -#define W_L2TYPE__EXTRAHDRPROTOOFFSET 6 -#define O_L2TYPE__EXTRAHEADERSIZE 14 -#define W_L2TYPE__EXTRAHEADERSIZE 6 -#define O_L2TYPE__PROTOOFFSET 8 -#define W_L2TYPE__PROTOOFFSET 6 -#define O_L2TYPE__L2HDROFFSET 2 -#define W_L2TYPE__L2HDROFFSET 6 -#define O_L2TYPE__L2PROTO 0 -#define W_L2TYPE__L2PROTO 2 -#define R_L2TYPE_1 0xF0 -#define R_L2TYPE_2 0xF0 -#define R_L2TYPE_3 0xF0 -#define R_PARSERCONFIGREG 0x100 -#define O_PARSERCONFIGREG__CRCHASHPOLY 8 -#define W_PARSERCONFIGREG__CRCHASHPOLY 7 -#define O_PARSERCONFIGREG__PREPADOFFSET 4 -#define W_PARSERCONFIGREG__PREPADOFFSET 4 -#define O_PARSERCONFIGREG__USECAM 2 -#define O_PARSERCONFIGREG__USEHASH 1 -#define O_PARSERCONFIGREG__USEPROTO 0 -#define R_L3CTABLE 0x140 -#define O_L3CTABLE__OFFSET0 25 -#define W_L3CTABLE__OFFSET0 7 -#define O_L3CTABLE__LEN0 21 -#define W_L3CTABLE__LEN0 4 -#define O_L3CTABLE__OFFSET1 14 -#define W_L3CTABLE__OFFSET1 7 -#define O_L3CTABLE__LEN1 10 -#define W_L3CTABLE__LEN1 4 -#define O_L3CTABLE__OFFSET2 4 -#define W_L3CTABLE__OFFSET2 6 -#define O_L3CTABLE__LEN2 0 -#define W_L3CTABLE__LEN2 4 -#define O_L3CTABLE__L3HDROFFSET 26 -#define W_L3CTABLE__L3HDROFFSET 6 -#define O_L3CTABLE__L4PROTOOFFSET 20 -#define W_L3CTABLE__L4PROTOOFFSET 6 -#define O_L3CTABLE__IPCHKSUMCOMPUTE 19 -#define O_L3CTABLE__L4CLASSIFY 18 -#define O_L3CTABLE__L2PROTO 16 -#define W_L3CTABLE__L2PROTO 2 -#define O_L3CTABLE__L3PROTOKEY 0 -#define W_L3CTABLE__L3PROTOKEY 16 -#define R_L4CTABLE 0x160 -#define O_L4CTABLE__OFFSET0 21 -#define W_L4CTABLE__OFFSET0 6 -#define O_L4CTABLE__LEN0 17 -#define W_L4CTABLE__LEN0 4 -#define O_L4CTABLE__OFFSET1 11 -#define W_L4CTABLE__OFFSET1 6 -#define O_L4CTABLE__LEN1 7 -#define W_L4CTABLE__LEN1 4 -#define O_L4CTABLE__TCPCHKSUMENABLE 0 -#define R_CAM4X128TABLE 0x172 -#define O_CAM4X128TABLE__CLASSID 7 -#define W_CAM4X128TABLE__CLASSID 2 -#define O_CAM4X128TABLE__BUCKETID 1 -#define W_CAM4X128TABLE__BUCKETID 6 -#define O_CAM4X128TABLE__USEBUCKET 0 -#define R_CAM4X128KEY 0x180 -#define R_TRANSLATETABLE 0x1A0 -#define R_DMACR0 0x200 -#define O_DMACR0__DATA0WRMAXCR 27 -#define W_DMACR0__DATA0WRMAXCR 3 -#define O_DMACR0__DATA0RDMAXCR 24 -#define W_DMACR0__DATA0RDMAXCR 3 -#define O_DMACR0__DATA1WRMAXCR 21 -#define W_DMACR0__DATA1WRMAXCR 3 -#define O_DMACR0__DATA1RDMAXCR 18 -#define W_DMACR0__DATA1RDMAXCR 3 -#define O_DMACR0__DATA2WRMAXCR 15 -#define W_DMACR0__DATA2WRMAXCR 3 -#define O_DMACR0__DATA2RDMAXCR 12 -#define W_DMACR0__DATA2RDMAXCR 3 -#define O_DMACR0__DATA3WRMAXCR 9 -#define W_DMACR0__DATA3WRMAXCR 3 -#define O_DMACR0__DATA3RDMAXCR 6 -#define W_DMACR0__DATA3RDMAXCR 3 -#define O_DMACR0__DATA4WRMAXCR 3 -#define W_DMACR0__DATA4WRMAXCR 3 -#define O_DMACR0__DATA4RDMAXCR 0 -#define W_DMACR0__DATA4RDMAXCR 3 -#define R_DMACR1 0x201 -#define O_DMACR1__DATA5WRMAXCR 27 -#define W_DMACR1__DATA5WRMAXCR 3 -#define O_DMACR1__DATA5RDMAXCR 24 -#define W_DMACR1__DATA5RDMAXCR 3 -#define O_DMACR1__DATA6WRMAXCR 21 -#define W_DMACR1__DATA6WRMAXCR 3 -#define O_DMACR1__DATA6RDMAXCR 18 -#define W_DMACR1__DATA6RDMAXCR 3 -#define O_DMACR1__DATA7WRMAXCR 15 -#define W_DMACR1__DATA7WRMAXCR 3 -#define O_DMACR1__DATA7RDMAXCR 12 -#define W_DMACR1__DATA7RDMAXCR 3 -#define O_DMACR1__DATA8WRMAXCR 9 -#define W_DMACR1__DATA8WRMAXCR 3 -#define O_DMACR1__DATA8RDMAXCR 6 -#define W_DMACR1__DATA8RDMAXCR 3 -#define O_DMACR1__DATA9WRMAXCR 3 -#define W_DMACR1__DATA9WRMAXCR 3 -#define O_DMACR1__DATA9RDMAXCR 0 -#define W_DMACR1__DATA9RDMAXCR 3 -#define R_DMACR2 0x202 -#define O_DMACR2__DATA10WRMAXCR 27 -#define W_DMACR2__DATA10WRMAXCR 3 -#define O_DMACR2__DATA10RDMAXCR 24 -#define W_DMACR2__DATA10RDMAXCR 3 -#define O_DMACR2__DATA11WRMAXCR 21 -#define W_DMACR2__DATA11WRMAXCR 3 -#define O_DMACR2__DATA11RDMAXCR 18 -#define W_DMACR2__DATA11RDMAXCR 3 -#define O_DMACR2__DATA12WRMAXCR 15 -#define W_DMACR2__DATA12WRMAXCR 3 -#define O_DMACR2__DATA12RDMAXCR 12 -#define W_DMACR2__DATA12RDMAXCR 3 -#define O_DMACR2__DATA13WRMAXCR 9 -#define W_DMACR2__DATA13WRMAXCR 3 -#define O_DMACR2__DATA13RDMAXCR 6 -#define W_DMACR2__DATA13RDMAXCR 3 -#define O_DMACR2__DATA14WRMAXCR 3 -#define W_DMACR2__DATA14WRMAXCR 3 -#define O_DMACR2__DATA14RDMAXCR 0 -#define W_DMACR2__DATA14RDMAXCR 3 -#define R_DMACR3 0x203 -#define O_DMACR3__DATA15WRMAXCR 27 -#define W_DMACR3__DATA15WRMAXCR 3 -#define O_DMACR3__DATA15RDMAXCR 24 -#define W_DMACR3__DATA15RDMAXCR 3 -#define O_DMACR3__SPCLASSWRMAXCR 21 -#define W_DMACR3__SPCLASSWRMAXCR 3 -#define O_DMACR3__SPCLASSRDMAXCR 18 -#define W_DMACR3__SPCLASSRDMAXCR 3 -#define O_DMACR3__JUMFRINWRMAXCR 15 -#define W_DMACR3__JUMFRINWRMAXCR 3 -#define O_DMACR3__JUMFRINRDMAXCR 12 -#define W_DMACR3__JUMFRINRDMAXCR 3 -#define O_DMACR3__REGFRINWRMAXCR 9 -#define W_DMACR3__REGFRINWRMAXCR 3 -#define O_DMACR3__REGFRINRDMAXCR 6 -#define W_DMACR3__REGFRINRDMAXCR 3 -#define O_DMACR3__FROUTWRMAXCR 3 -#define W_DMACR3__FROUTWRMAXCR 3 -#define O_DMACR3__FROUTRDMAXCR 0 -#define W_DMACR3__FROUTRDMAXCR 3 -#define R_REG_FRIN_SPILL_MEM_START_0 0x204 -#define O_REG_FRIN_SPILL_MEM_START_0__REGFRINSPILLMEMSTART0 0 -#define W_REG_FRIN_SPILL_MEM_START_0__REGFRINSPILLMEMSTART0 32 -#define R_REG_FRIN_SPILL_MEM_START_1 0x205 -#define O_REG_FRIN_SPILL_MEM_START_1__REGFRINSPILLMEMSTART1 0 -#define W_REG_FRIN_SPILL_MEM_START_1__REGFRINSPILLMEMSTART1 3 -#define R_REG_FRIN_SPILL_MEM_SIZE 0x206 -#define O_REG_FRIN_SPILL_MEM_SIZE__REGFRINSPILLMEMSIZE 0 -#define W_REG_FRIN_SPILL_MEM_SIZE__REGFRINSPILLMEMSIZE 32 -#define R_FROUT_SPILL_MEM_START_0 0x207 -#define O_FROUT_SPILL_MEM_START_0__FROUTSPILLMEMSTART0 0 -#define W_FROUT_SPILL_MEM_START_0__FROUTSPILLMEMSTART0 32 -#define R_FROUT_SPILL_MEM_START_1 0x208 -#define O_FROUT_SPILL_MEM_START_1__FROUTSPILLMEMSTART1 0 -#define W_FROUT_SPILL_MEM_START_1__FROUTSPILLMEMSTART1 3 -#define R_FROUT_SPILL_MEM_SIZE 0x209 -#define O_FROUT_SPILL_MEM_SIZE__FROUTSPILLMEMSIZE 0 -#define W_FROUT_SPILL_MEM_SIZE__FROUTSPILLMEMSIZE 32 -#define R_CLASS0_SPILL_MEM_START_0 0x20A -#define O_CLASS0_SPILL_MEM_START_0__CLASS0SPILLMEMSTART0 0 -#define W_CLASS0_SPILL_MEM_START_0__CLASS0SPILLMEMSTART0 32 -#define R_CLASS0_SPILL_MEM_START_1 0x20B -#define O_CLASS0_SPILL_MEM_START_1__CLASS0SPILLMEMSTART1 0 -#define W_CLASS0_SPILL_MEM_START_1__CLASS0SPILLMEMSTART1 3 -#define R_CLASS0_SPILL_MEM_SIZE 0x20C -#define O_CLASS0_SPILL_MEM_SIZE__CLASS0SPILLMEMSIZE 0 -#define W_CLASS0_SPILL_MEM_SIZE__CLASS0SPILLMEMSIZE 32 -#define R_JUMFRIN_SPILL_MEM_START_0 0x20D -#define O_JUMFRIN_SPILL_MEM_START_0__JUMFRINSPILLMEMSTART0 0 -#define W_JUMFRIN_SPILL_MEM_START_0__JUMFRINSPILLMEMSTART0 32 -#define R_JUMFRIN_SPILL_MEM_START_1 0x20E -#define O_JUMFRIN_SPILL_MEM_START_1__JUMFRINSPILLMEMSTART1 0 -#define W_JUMFRIN_SPILL_MEM_START_1__JUMFRINSPILLMEMSTART1 3 -#define R_JUMFRIN_SPILL_MEM_SIZE 0x20F -#define O_JUMFRIN_SPILL_MEM_SIZE__JUMFRINSPILLMEMSIZE 0 -#define W_JUMFRIN_SPILL_MEM_SIZE__JUMFRINSPILLMEMSIZE 32 -#define R_CLASS1_SPILL_MEM_START_0 0x210 -#define O_CLASS1_SPILL_MEM_START_0__CLASS1SPILLMEMSTART0 0 -#define W_CLASS1_SPILL_MEM_START_0__CLASS1SPILLMEMSTART0 32 -#define R_CLASS1_SPILL_MEM_START_1 0x211 -#define O_CLASS1_SPILL_MEM_START_1__CLASS1SPILLMEMSTART1 0 -#define W_CLASS1_SPILL_MEM_START_1__CLASS1SPILLMEMSTART1 3 -#define R_CLASS1_SPILL_MEM_SIZE 0x212 -#define O_CLASS1_SPILL_MEM_SIZE__CLASS1SPILLMEMSIZE 0 -#define W_CLASS1_SPILL_MEM_SIZE__CLASS1SPILLMEMSIZE 32 -#define R_CLASS2_SPILL_MEM_START_0 0x213 -#define O_CLASS2_SPILL_MEM_START_0__CLASS2SPILLMEMSTART0 0 -#define W_CLASS2_SPILL_MEM_START_0__CLASS2SPILLMEMSTART0 32 -#define R_CLASS2_SPILL_MEM_START_1 0x214 -#define O_CLASS2_SPILL_MEM_START_1__CLASS2SPILLMEMSTART1 0 -#define W_CLASS2_SPILL_MEM_START_1__CLASS2SPILLMEMSTART1 3 -#define R_CLASS2_SPILL_MEM_SIZE 0x215 -#define O_CLASS2_SPILL_MEM_SIZE__CLASS2SPILLMEMSIZE 0 -#define W_CLASS2_SPILL_MEM_SIZE__CLASS2SPILLMEMSIZE 32 -#define R_CLASS3_SPILL_MEM_START_0 0x216 -#define O_CLASS3_SPILL_MEM_START_0__CLASS3SPILLMEMSTART0 0 -#define W_CLASS3_SPILL_MEM_START_0__CLASS3SPILLMEMSTART0 32 -#define R_CLASS3_SPILL_MEM_START_1 0x217 -#define O_CLASS3_SPILL_MEM_START_1__CLASS3SPILLMEMSTART1 0 -#define W_CLASS3_SPILL_MEM_START_1__CLASS3SPILLMEMSTART1 3 -#define R_CLASS3_SPILL_MEM_SIZE 0x218 -#define O_CLASS3_SPILL_MEM_SIZE__CLASS3SPILLMEMSIZE 0 -#define W_CLASS3_SPILL_MEM_SIZE__CLASS3SPILLMEMSIZE 32 -#define R_REG_FRIN1_SPILL_MEM_START_0 0x219 -#define R_REG_FRIN1_SPILL_MEM_START_1 0x21a -#define R_REG_FRIN1_SPILL_MEM_SIZE 0x21b -#define R_SPIHNGY0 0x219 -#define O_SPIHNGY0__EG_HNGY_THRESH_0 24 -#define W_SPIHNGY0__EG_HNGY_THRESH_0 7 -#define O_SPIHNGY0__EG_HNGY_THRESH_1 16 -#define W_SPIHNGY0__EG_HNGY_THRESH_1 7 -#define O_SPIHNGY0__EG_HNGY_THRESH_2 8 -#define W_SPIHNGY0__EG_HNGY_THRESH_2 7 -#define O_SPIHNGY0__EG_HNGY_THRESH_3 0 -#define W_SPIHNGY0__EG_HNGY_THRESH_3 7 -#define R_SPIHNGY1 0x21A -#define O_SPIHNGY1__EG_HNGY_THRESH_4 24 -#define W_SPIHNGY1__EG_HNGY_THRESH_4 7 -#define O_SPIHNGY1__EG_HNGY_THRESH_5 16 -#define W_SPIHNGY1__EG_HNGY_THRESH_5 7 -#define O_SPIHNGY1__EG_HNGY_THRESH_6 8 -#define W_SPIHNGY1__EG_HNGY_THRESH_6 7 -#define O_SPIHNGY1__EG_HNGY_THRESH_7 0 -#define W_SPIHNGY1__EG_HNGY_THRESH_7 7 -#define R_SPIHNGY2 0x21B -#define O_SPIHNGY2__EG_HNGY_THRESH_8 24 -#define W_SPIHNGY2__EG_HNGY_THRESH_8 7 -#define O_SPIHNGY2__EG_HNGY_THRESH_9 16 -#define W_SPIHNGY2__EG_HNGY_THRESH_9 7 -#define O_SPIHNGY2__EG_HNGY_THRESH_10 8 -#define W_SPIHNGY2__EG_HNGY_THRESH_10 7 -#define O_SPIHNGY2__EG_HNGY_THRESH_11 0 -#define W_SPIHNGY2__EG_HNGY_THRESH_11 7 -#define R_SPIHNGY3 0x21C -#define O_SPIHNGY3__EG_HNGY_THRESH_12 24 -#define W_SPIHNGY3__EG_HNGY_THRESH_12 7 -#define O_SPIHNGY3__EG_HNGY_THRESH_13 16 -#define W_SPIHNGY3__EG_HNGY_THRESH_13 7 -#define O_SPIHNGY3__EG_HNGY_THRESH_14 8 -#define W_SPIHNGY3__EG_HNGY_THRESH_14 7 -#define O_SPIHNGY3__EG_HNGY_THRESH_15 0 -#define W_SPIHNGY3__EG_HNGY_THRESH_15 7 -#define R_SPISTRV0 0x21D -#define O_SPISTRV0__EG_STRV_THRESH_0 24 -#define W_SPISTRV0__EG_STRV_THRESH_0 7 -#define O_SPISTRV0__EG_STRV_THRESH_1 16 -#define W_SPISTRV0__EG_STRV_THRESH_1 7 -#define O_SPISTRV0__EG_STRV_THRESH_2 8 -#define W_SPISTRV0__EG_STRV_THRESH_2 7 -#define O_SPISTRV0__EG_STRV_THRESH_3 0 -#define W_SPISTRV0__EG_STRV_THRESH_3 7 -#define R_SPISTRV1 0x21E -#define O_SPISTRV1__EG_STRV_THRESH_4 24 -#define W_SPISTRV1__EG_STRV_THRESH_4 7 -#define O_SPISTRV1__EG_STRV_THRESH_5 16 -#define W_SPISTRV1__EG_STRV_THRESH_5 7 -#define O_SPISTRV1__EG_STRV_THRESH_6 8 -#define W_SPISTRV1__EG_STRV_THRESH_6 7 -#define O_SPISTRV1__EG_STRV_THRESH_7 0 -#define W_SPISTRV1__EG_STRV_THRESH_7 7 -#define R_SPISTRV2 0x21F -#define O_SPISTRV2__EG_STRV_THRESH_8 24 -#define W_SPISTRV2__EG_STRV_THRESH_8 7 -#define O_SPISTRV2__EG_STRV_THRESH_9 16 -#define W_SPISTRV2__EG_STRV_THRESH_9 7 -#define O_SPISTRV2__EG_STRV_THRESH_10 8 -#define W_SPISTRV2__EG_STRV_THRESH_10 7 -#define O_SPISTRV2__EG_STRV_THRESH_11 0 -#define W_SPISTRV2__EG_STRV_THRESH_11 7 -#define R_SPISTRV3 0x220 -#define O_SPISTRV3__EG_STRV_THRESH_12 24 -#define W_SPISTRV3__EG_STRV_THRESH_12 7 -#define O_SPISTRV3__EG_STRV_THRESH_13 16 -#define W_SPISTRV3__EG_STRV_THRESH_13 7 -#define O_SPISTRV3__EG_STRV_THRESH_14 8 -#define W_SPISTRV3__EG_STRV_THRESH_14 7 -#define O_SPISTRV3__EG_STRV_THRESH_15 0 -#define W_SPISTRV3__EG_STRV_THRESH_15 7 -#define R_TXDATAFIFO0 0x221 -#define O_TXDATAFIFO0__TX0DATAFIFOSTART 24 -#define W_TXDATAFIFO0__TX0DATAFIFOSTART 7 -#define O_TXDATAFIFO0__TX0DATAFIFOSIZE 16 -#define W_TXDATAFIFO0__TX0DATAFIFOSIZE 7 -#define O_TXDATAFIFO0__TX1DATAFIFOSTART 8 -#define W_TXDATAFIFO0__TX1DATAFIFOSTART 7 -#define O_TXDATAFIFO0__TX1DATAFIFOSIZE 0 -#define W_TXDATAFIFO0__TX1DATAFIFOSIZE 7 -#define R_TXDATAFIFO1 0x222 -#define O_TXDATAFIFO1__TX2DATAFIFOSTART 24 -#define W_TXDATAFIFO1__TX2DATAFIFOSTART 7 -#define O_TXDATAFIFO1__TX2DATAFIFOSIZE 16 -#define W_TXDATAFIFO1__TX2DATAFIFOSIZE 7 -#define O_TXDATAFIFO1__TX3DATAFIFOSTART 8 -#define W_TXDATAFIFO1__TX3DATAFIFOSTART 7 -#define O_TXDATAFIFO1__TX3DATAFIFOSIZE 0 -#define W_TXDATAFIFO1__TX3DATAFIFOSIZE 7 -#define R_TXDATAFIFO2 0x223 -#define O_TXDATAFIFO2__TX4DATAFIFOSTART 24 -#define W_TXDATAFIFO2__TX4DATAFIFOSTART 7 -#define O_TXDATAFIFO2__TX4DATAFIFOSIZE 16 -#define W_TXDATAFIFO2__TX4DATAFIFOSIZE 7 -#define O_TXDATAFIFO2__TX5DATAFIFOSTART 8 -#define W_TXDATAFIFO2__TX5DATAFIFOSTART 7 -#define O_TXDATAFIFO2__TX5DATAFIFOSIZE 0 -#define W_TXDATAFIFO2__TX5DATAFIFOSIZE 7 -#define R_TXDATAFIFO3 0x224 -#define O_TXDATAFIFO3__TX6DATAFIFOSTART 24 -#define W_TXDATAFIFO3__TX6DATAFIFOSTART 7 -#define O_TXDATAFIFO3__TX6DATAFIFOSIZE 16 -#define W_TXDATAFIFO3__TX6DATAFIFOSIZE 7 -#define O_TXDATAFIFO3__TX7DATAFIFOSTART 8 -#define W_TXDATAFIFO3__TX7DATAFIFOSTART 7 -#define O_TXDATAFIFO3__TX7DATAFIFOSIZE 0 -#define W_TXDATAFIFO3__TX7DATAFIFOSIZE 7 -#define R_TXDATAFIFO4 0x225 -#define O_TXDATAFIFO4__TX8DATAFIFOSTART 24 -#define W_TXDATAFIFO4__TX8DATAFIFOSTART 7 -#define O_TXDATAFIFO4__TX8DATAFIFOSIZE 16 -#define W_TXDATAFIFO4__TX8DATAFIFOSIZE 7 -#define O_TXDATAFIFO4__TX9DATAFIFOSTART 8 -#define W_TXDATAFIFO4__TX9DATAFIFOSTART 7 -#define O_TXDATAFIFO4__TX9DATAFIFOSIZE 0 -#define W_TXDATAFIFO4__TX9DATAFIFOSIZE 7 -#define R_TXDATAFIFO5 0x226 -#define O_TXDATAFIFO5__TX10DATAFIFOSTART 24 -#define W_TXDATAFIFO5__TX10DATAFIFOSTART 7 -#define O_TXDATAFIFO5__TX10DATAFIFOSIZE 16 -#define W_TXDATAFIFO5__TX10DATAFIFOSIZE 7 -#define O_TXDATAFIFO5__TX11DATAFIFOSTART 8 -#define W_TXDATAFIFO5__TX11DATAFIFOSTART 7 -#define O_TXDATAFIFO5__TX11DATAFIFOSIZE 0 -#define W_TXDATAFIFO5__TX11DATAFIFOSIZE 7 -#define R_TXDATAFIFO6 0x227 -#define O_TXDATAFIFO6__TX12DATAFIFOSTART 24 -#define W_TXDATAFIFO6__TX12DATAFIFOSTART 7 -#define O_TXDATAFIFO6__TX12DATAFIFOSIZE 16 -#define W_TXDATAFIFO6__TX12DATAFIFOSIZE 7 -#define O_TXDATAFIFO6__TX13DATAFIFOSTART 8 -#define W_TXDATAFIFO6__TX13DATAFIFOSTART 7 -#define O_TXDATAFIFO6__TX13DATAFIFOSIZE 0 -#define W_TXDATAFIFO6__TX13DATAFIFOSIZE 7 -#define R_TXDATAFIFO7 0x228 -#define O_TXDATAFIFO7__TX14DATAFIFOSTART 24 -#define W_TXDATAFIFO7__TX14DATAFIFOSTART 7 -#define O_TXDATAFIFO7__TX14DATAFIFOSIZE 16 -#define W_TXDATAFIFO7__TX14DATAFIFOSIZE 7 -#define O_TXDATAFIFO7__TX15DATAFIFOSTART 8 -#define W_TXDATAFIFO7__TX15DATAFIFOSTART 7 -#define O_TXDATAFIFO7__TX15DATAFIFOSIZE 0 -#define W_TXDATAFIFO7__TX15DATAFIFOSIZE 7 -#define R_RXDATAFIFO0 0x229 -#define O_RXDATAFIFO0__RX0DATAFIFOSTART 24 -#define W_RXDATAFIFO0__RX0DATAFIFOSTART 7 -#define O_RXDATAFIFO0__RX0DATAFIFOSIZE 16 -#define W_RXDATAFIFO0__RX0DATAFIFOSIZE 7 -#define O_RXDATAFIFO0__RX1DATAFIFOSTART 8 -#define W_RXDATAFIFO0__RX1DATAFIFOSTART 7 -#define O_RXDATAFIFO0__RX1DATAFIFOSIZE 0 -#define W_RXDATAFIFO0__RX1DATAFIFOSIZE 7 -#define R_RXDATAFIFO1 0x22A -#define O_RXDATAFIFO1__RX2DATAFIFOSTART 24 -#define W_RXDATAFIFO1__RX2DATAFIFOSTART 7 -#define O_RXDATAFIFO1__RX2DATAFIFOSIZE 16 -#define W_RXDATAFIFO1__RX2DATAFIFOSIZE 7 -#define O_RXDATAFIFO1__RX3DATAFIFOSTART 8 -#define W_RXDATAFIFO1__RX3DATAFIFOSTART 7 -#define O_RXDATAFIFO1__RX3DATAFIFOSIZE 0 -#define W_RXDATAFIFO1__RX3DATAFIFOSIZE 7 -#define R_RXDATAFIFO2 0x22B -#define O_RXDATAFIFO2__RX4DATAFIFOSTART 24 -#define W_RXDATAFIFO2__RX4DATAFIFOSTART 7 -#define O_RXDATAFIFO2__RX4DATAFIFOSIZE 16 -#define W_RXDATAFIFO2__RX4DATAFIFOSIZE 7 -#define O_RXDATAFIFO2__RX5DATAFIFOSTART 8 -#define W_RXDATAFIFO2__RX5DATAFIFOSTART 7 -#define O_RXDATAFIFO2__RX5DATAFIFOSIZE 0 -#define W_RXDATAFIFO2__RX5DATAFIFOSIZE 7 -#define R_RXDATAFIFO3 0x22C -#define O_RXDATAFIFO3__RX6DATAFIFOSTART 24 -#define W_RXDATAFIFO3__RX6DATAFIFOSTART 7 -#define O_RXDATAFIFO3__RX6DATAFIFOSIZE 16 -#define W_RXDATAFIFO3__RX6DATAFIFOSIZE 7 -#define O_RXDATAFIFO3__RX7DATAFIFOSTART 8 -#define W_RXDATAFIFO3__RX7DATAFIFOSTART 7 -#define O_RXDATAFIFO3__RX7DATAFIFOSIZE 0 -#define W_RXDATAFIFO3__RX7DATAFIFOSIZE 7 -#define R_RXDATAFIFO4 0x22D -#define O_RXDATAFIFO4__RX8DATAFIFOSTART 24 -#define W_RXDATAFIFO4__RX8DATAFIFOSTART 7 -#define O_RXDATAFIFO4__RX8DATAFIFOSIZE 16 -#define W_RXDATAFIFO4__RX8DATAFIFOSIZE 7 -#define O_RXDATAFIFO4__RX9DATAFIFOSTART 8 -#define W_RXDATAFIFO4__RX9DATAFIFOSTART 7 -#define O_RXDATAFIFO4__RX9DATAFIFOSIZE 0 -#define W_RXDATAFIFO4__RX9DATAFIFOSIZE 7 -#define R_RXDATAFIFO5 0x22E -#define O_RXDATAFIFO5__RX10DATAFIFOSTART 24 -#define W_RXDATAFIFO5__RX10DATAFIFOSTART 7 -#define O_RXDATAFIFO5__RX10DATAFIFOSIZE 16 -#define W_RXDATAFIFO5__RX10DATAFIFOSIZE 7 -#define O_RXDATAFIFO5__RX11DATAFIFOSTART 8 -#define W_RXDATAFIFO5__RX11DATAFIFOSTART 7 -#define O_RXDATAFIFO5__RX11DATAFIFOSIZE 0 -#define W_RXDATAFIFO5__RX11DATAFIFOSIZE 7 -#define R_RXDATAFIFO6 0x22F -#define O_RXDATAFIFO6__RX12DATAFIFOSTART 24 -#define W_RXDATAFIFO6__RX12DATAFIFOSTART 7 -#define O_RXDATAFIFO6__RX12DATAFIFOSIZE 16 -#define W_RXDATAFIFO6__RX12DATAFIFOSIZE 7 -#define O_RXDATAFIFO6__RX13DATAFIFOSTART 8 -#define W_RXDATAFIFO6__RX13DATAFIFOSTART 7 -#define O_RXDATAFIFO6__RX13DATAFIFOSIZE 0 -#define W_RXDATAFIFO6__RX13DATAFIFOSIZE 7 -#define R_RXDATAFIFO7 0x230 -#define O_RXDATAFIFO7__RX14DATAFIFOSTART 24 -#define W_RXDATAFIFO7__RX14DATAFIFOSTART 7 -#define O_RXDATAFIFO7__RX14DATAFIFOSIZE 16 -#define W_RXDATAFIFO7__RX14DATAFIFOSIZE 7 -#define O_RXDATAFIFO7__RX15DATAFIFOSTART 8 -#define W_RXDATAFIFO7__RX15DATAFIFOSTART 7 -#define O_RXDATAFIFO7__RX15DATAFIFOSIZE 0 -#define W_RXDATAFIFO7__RX15DATAFIFOSIZE 7 -#define R_XGMACPADCALIBRATION 0x231 -#define R_FREEQCARVE 0x233 -#define R_SPI4STATICDELAY0 0x240 -#define O_SPI4STATICDELAY0__DATALINE7 28 -#define W_SPI4STATICDELAY0__DATALINE7 4 -#define O_SPI4STATICDELAY0__DATALINE6 24 -#define W_SPI4STATICDELAY0__DATALINE6 4 -#define O_SPI4STATICDELAY0__DATALINE5 20 -#define W_SPI4STATICDELAY0__DATALINE5 4 -#define O_SPI4STATICDELAY0__DATALINE4 16 -#define W_SPI4STATICDELAY0__DATALINE4 4 -#define O_SPI4STATICDELAY0__DATALINE3 12 -#define W_SPI4STATICDELAY0__DATALINE3 4 -#define O_SPI4STATICDELAY0__DATALINE2 8 -#define W_SPI4STATICDELAY0__DATALINE2 4 -#define O_SPI4STATICDELAY0__DATALINE1 4 -#define W_SPI4STATICDELAY0__DATALINE1 4 -#define O_SPI4STATICDELAY0__DATALINE0 0 -#define W_SPI4STATICDELAY0__DATALINE0 4 -#define R_SPI4STATICDELAY1 0x241 -#define O_SPI4STATICDELAY1__DATALINE15 28 -#define W_SPI4STATICDELAY1__DATALINE15 4 -#define O_SPI4STATICDELAY1__DATALINE14 24 -#define W_SPI4STATICDELAY1__DATALINE14 4 -#define O_SPI4STATICDELAY1__DATALINE13 20 -#define W_SPI4STATICDELAY1__DATALINE13 4 -#define O_SPI4STATICDELAY1__DATALINE12 16 -#define W_SPI4STATICDELAY1__DATALINE12 4 -#define O_SPI4STATICDELAY1__DATALINE11 12 -#define W_SPI4STATICDELAY1__DATALINE11 4 -#define O_SPI4STATICDELAY1__DATALINE10 8 -#define W_SPI4STATICDELAY1__DATALINE10 4 -#define O_SPI4STATICDELAY1__DATALINE9 4 -#define W_SPI4STATICDELAY1__DATALINE9 4 -#define O_SPI4STATICDELAY1__DATALINE8 0 -#define W_SPI4STATICDELAY1__DATALINE8 4 -#define R_SPI4STATICDELAY2 0x242 -#define O_SPI4STATICDELAY0__TXSTAT1 8 -#define W_SPI4STATICDELAY0__TXSTAT1 4 -#define O_SPI4STATICDELAY0__TXSTAT0 4 -#define W_SPI4STATICDELAY0__TXSTAT0 4 -#define O_SPI4STATICDELAY0__RXCONTROL 0 -#define W_SPI4STATICDELAY0__RXCONTROL 4 -#define R_SPI4CONTROL 0x243 -#define O_SPI4CONTROL__STATICDELAY 2 -#define O_SPI4CONTROL__LVDS_LVTTL 1 -#define O_SPI4CONTROL__SPI4ENABLE 0 -#define R_CLASSWATERMARKS 0x244 -#define O_CLASSWATERMARKS__CLASS0WATERMARK 24 -#define W_CLASSWATERMARKS__CLASS0WATERMARK 5 -#define O_CLASSWATERMARKS__CLASS1WATERMARK 16 -#define W_CLASSWATERMARKS__CLASS1WATERMARK 5 -#define O_CLASSWATERMARKS__CLASS3WATERMARK 0 -#define W_CLASSWATERMARKS__CLASS3WATERMARK 5 -#define R_RXWATERMARKS1 0x245 -#define O_RXWATERMARKS__RX0DATAWATERMARK 24 -#define W_RXWATERMARKS__RX0DATAWATERMARK 7 -#define O_RXWATERMARKS__RX1DATAWATERMARK 16 -#define W_RXWATERMARKS__RX1DATAWATERMARK 7 -#define O_RXWATERMARKS__RX3DATAWATERMARK 0 -#define W_RXWATERMARKS__RX3DATAWATERMARK 7 -#define R_RXWATERMARKS2 0x246 -#define O_RXWATERMARKS__RX4DATAWATERMARK 24 -#define W_RXWATERMARKS__RX4DATAWATERMARK 7 -#define O_RXWATERMARKS__RX5DATAWATERMARK 16 -#define W_RXWATERMARKS__RX5DATAWATERMARK 7 -#define O_RXWATERMARKS__RX6DATAWATERMARK 8 -#define W_RXWATERMARKS__RX6DATAWATERMARK 7 -#define O_RXWATERMARKS__RX7DATAWATERMARK 0 -#define W_RXWATERMARKS__RX7DATAWATERMARK 7 -#define R_RXWATERMARKS3 0x247 -#define O_RXWATERMARKS__RX8DATAWATERMARK 24 -#define W_RXWATERMARKS__RX8DATAWATERMARK 7 -#define O_RXWATERMARKS__RX9DATAWATERMARK 16 -#define W_RXWATERMARKS__RX9DATAWATERMARK 7 -#define O_RXWATERMARKS__RX10DATAWATERMARK 8 -#define W_RXWATERMARKS__RX10DATAWATERMARK 7 -#define O_RXWATERMARKS__RX11DATAWATERMARK 0 -#define W_RXWATERMARKS__RX11DATAWATERMARK 7 -#define R_RXWATERMARKS4 0x248 -#define O_RXWATERMARKS__RX12DATAWATERMARK 24 -#define W_RXWATERMARKS__RX12DATAWATERMARK 7 -#define O_RXWATERMARKS__RX13DATAWATERMARK 16 -#define W_RXWATERMARKS__RX13DATAWATERMARK 7 -#define O_RXWATERMARKS__RX14DATAWATERMARK 8 -#define W_RXWATERMARKS__RX14DATAWATERMARK 7 -#define O_RXWATERMARKS__RX15DATAWATERMARK 0 -#define W_RXWATERMARKS__RX15DATAWATERMARK 7 -#define R_FREEWATERMARKS 0x249 -#define O_FREEWATERMARKS__FREEOUTWATERMARK 16 -#define W_FREEWATERMARKS__FREEOUTWATERMARK 16 -#define O_FREEWATERMARKS__JUMFRWATERMARK 8 -#define W_FREEWATERMARKS__JUMFRWATERMARK 7 -#define O_FREEWATERMARKS__REGFRWATERMARK 0 -#define W_FREEWATERMARKS__REGFRWATERMARK 7 -#define R_EGRESSFIFOCARVINGSLOTS 0x24a - -#define CTRL_RES0 0 -#define CTRL_RES1 1 -#define CTRL_REG_FREE 2 -#define CTRL_JUMBO_FREE 3 -#define CTRL_CONT 4 -#define CTRL_EOP 5 -#define CTRL_START 6 -#define CTRL_SNGL 7 - -#define CTRL_B0_NOT_EOP 0 -#define CTRL_B0_EOP 1 - -#define R_ROUND_ROBIN_TABLE 0 -#define R_PDE_CLASS_0 0x300 -#define R_PDE_CLASS_1 0x302 -#define R_PDE_CLASS_2 0x304 -#define R_PDE_CLASS_3 0x306 - -#define R_MSG_TX_THRESHOLD 0x308 - -#define R_GMAC_JFR0_BUCKET_SIZE 0x320 -#define R_GMAC_RFR0_BUCKET_SIZE 0x321 -#define R_GMAC_TX0_BUCKET_SIZE 0x322 -#define R_GMAC_TX1_BUCKET_SIZE 0x323 -#define R_GMAC_TX2_BUCKET_SIZE 0x324 -#define R_GMAC_TX3_BUCKET_SIZE 0x325 -#define R_GMAC_JFR1_BUCKET_SIZE 0x326 -#define R_GMAC_RFR1_BUCKET_SIZE 0x327 - -#define R_XGS_TX0_BUCKET_SIZE 0x320 -#define R_XGS_TX1_BUCKET_SIZE 0x321 -#define R_XGS_TX2_BUCKET_SIZE 0x322 -#define R_XGS_TX3_BUCKET_SIZE 0x323 -#define R_XGS_TX4_BUCKET_SIZE 0x324 -#define R_XGS_TX5_BUCKET_SIZE 0x325 -#define R_XGS_TX6_BUCKET_SIZE 0x326 -#define R_XGS_TX7_BUCKET_SIZE 0x327 -#define R_XGS_TX8_BUCKET_SIZE 0x328 -#define R_XGS_TX9_BUCKET_SIZE 0x329 -#define R_XGS_TX10_BUCKET_SIZE 0x32A -#define R_XGS_TX11_BUCKET_SIZE 0x32B -#define R_XGS_TX12_BUCKET_SIZE 0x32C -#define R_XGS_TX13_BUCKET_SIZE 0x32D -#define R_XGS_TX14_BUCKET_SIZE 0x32E -#define R_XGS_TX15_BUCKET_SIZE 0x32F -#define R_XGS_JFR_BUCKET_SIZE 0x330 -#define R_XGS_RFR_BUCKET_SIZE 0x331 - -#define R_CC_CPU0_0 0x380 -#define R_CC_CPU1_0 0x388 -#define R_CC_CPU2_0 0x390 -#define R_CC_CPU3_0 0x398 -#define R_CC_CPU4_0 0x3a0 -#define R_CC_CPU5_0 0x3a8 -#define R_CC_CPU6_0 0x3b0 -#define R_CC_CPU7_0 0x3b8 - -#define XLR_GMAC_BLK_SZ (XLR_IO_GMAC_1_OFFSET - \ - XLR_IO_GMAC_0_OFFSET) - -/* Constants used for configuring the devices */ - -#define XLR_FB_STN 6 /* Bucket used for Tx freeback */ - -#define MAC_B2B_IPG 88 - -#define XLR_NET_PREPAD_LEN 32 - -/* frame sizes need to be cacheline aligned */ -#define MAX_FRAME_SIZE (1536 + XLR_NET_PREPAD_LEN) -#define MAX_FRAME_SIZE_JUMBO 9216 - -#define MAC_SKB_BACK_PTR_SIZE SMP_CACHE_BYTES -#define MAC_PREPAD 0 -#define BYTE_OFFSET 2 -#define XLR_RX_BUF_SIZE (MAX_FRAME_SIZE + BYTE_OFFSET + \ - MAC_PREPAD + MAC_SKB_BACK_PTR_SIZE + SMP_CACHE_BYTES) -#define MAC_CRC_LEN 4 -#define MAX_NUM_MSGRNG_STN_CC 128 -#define MAX_MSG_SND_ATTEMPTS 100 /* 13 stns x 4 entry msg/stn + - * headroom - */ - -#define MAC_FRIN_TO_BE_SENT_THRESHOLD 16 - -#define MAX_NUM_DESC_SPILL 1024 -#define MAX_FRIN_SPILL (MAX_NUM_DESC_SPILL << 2) -#define MAX_FROUT_SPILL (MAX_NUM_DESC_SPILL << 2) -#define MAX_CLASS_0_SPILL (MAX_NUM_DESC_SPILL << 2) -#define MAX_CLASS_1_SPILL (MAX_NUM_DESC_SPILL << 2) -#define MAX_CLASS_2_SPILL (MAX_NUM_DESC_SPILL << 2) -#define MAX_CLASS_3_SPILL (MAX_NUM_DESC_SPILL << 2) - -enum { - SGMII_SPEED_10 = 0x00000000, - SGMII_SPEED_100 = 0x02000000, - SGMII_SPEED_1000 = 0x04000000, -}; - -enum tsv_rsv_reg { - TX_RX_64_BYTE_FRAME = 0x20, - TX_RX_64_127_BYTE_FRAME, - TX_RX_128_255_BYTE_FRAME, - TX_RX_256_511_BYTE_FRAME, - TX_RX_512_1023_BYTE_FRAME, - TX_RX_1024_1518_BYTE_FRAME, - TX_RX_1519_1522_VLAN_BYTE_FRAME, - - RX_BYTE_COUNTER = 0x27, - RX_PACKET_COUNTER, - RX_FCS_ERROR_COUNTER, - RX_MULTICAST_PACKET_COUNTER, - RX_BROADCAST_PACKET_COUNTER, - RX_CONTROL_FRAME_PACKET_COUNTER, - RX_PAUSE_FRAME_PACKET_COUNTER, - RX_UNKNOWN_OP_CODE_COUNTER, - RX_ALIGNMENT_ERROR_COUNTER, - RX_FRAME_LENGTH_ERROR_COUNTER, - RX_CODE_ERROR_COUNTER, - RX_CARRIER_SENSE_ERROR_COUNTER, - RX_UNDERSIZE_PACKET_COUNTER, - RX_OVERSIZE_PACKET_COUNTER, - RX_FRAGMENTS_COUNTER, - RX_JABBER_COUNTER, - RX_DROP_PACKET_COUNTER, - - TX_BYTE_COUNTER = 0x38, - TX_PACKET_COUNTER, - TX_MULTICAST_PACKET_COUNTER, - TX_BROADCAST_PACKET_COUNTER, - TX_PAUSE_CONTROL_FRAME_COUNTER, - TX_DEFERRAL_PACKET_COUNTER, - TX_EXCESSIVE_DEFERRAL_PACKET_COUNTER, - TX_SINGLE_COLLISION_PACKET_COUNTER, - TX_MULTI_COLLISION_PACKET_COUNTER, - TX_LATE_COLLISION_PACKET_COUNTER, - TX_EXCESSIVE_COLLISION_PACKET_COUNTER, - TX_TOTAL_COLLISION_COUNTER, - TX_PAUSE_FRAME_HONERED_COUNTER, - TX_DROP_FRAME_COUNTER, - TX_JABBER_FRAME_COUNTER, - TX_FCS_ERROR_COUNTER, - TX_CONTROL_FRAME_COUNTER, - TX_OVERSIZE_FRAME_COUNTER, - TX_UNDERSIZE_FRAME_COUNTER, - TX_FRAGMENT_FRAME_COUNTER, - - CARRY_REG_1 = 0x4c, - CARRY_REG_2 = 0x4d, -}; - -struct xlr_adapter { - struct net_device *netdev[4]; -}; - -struct xlr_net_priv { - u32 __iomem *base_addr; - struct net_device *ndev; - struct xlr_adapter *adapter; - struct mii_bus *mii_bus; - int num_rx_desc; - int phy_addr; /* PHY addr on MDIO bus */ - int pcs_id; /* PCS id on MDIO bus */ - int port_id; /* Port(gmac/xgmac) number, i.e 0-7 */ - int tx_stnid; - u32 __iomem *mii_addr; - u32 __iomem *serdes_addr; - u32 __iomem *pcs_addr; - u32 __iomem *gpio_addr; - int phy_speed; - int port_type; - struct timer_list queue_timer; - int wakeup_q; - struct platform_device *pdev; - struct xlr_net_data *nd; - - u64 *frin_spill; - u64 *frout_spill; - u64 *class_0_spill; - u64 *class_1_spill; - u64 *class_2_spill; - u64 *class_3_spill; -}; - -void xlr_set_gmac_speed(struct xlr_net_priv *priv); diff --git a/drivers/staging/r8188eu/core/rtw_mlme_ext.c b/drivers/staging/r8188eu/core/rtw_mlme_ext.c index 55c3d4a6faeb..b4820ad2cee7 100644 --- a/drivers/staging/r8188eu/core/rtw_mlme_ext.c +++ b/drivers/staging/r8188eu/core/rtw_mlme_ext.c @@ -107,6 +107,7 @@ static struct rt_channel_plan_map RTW_ChannelPlanMap[RT_CHANNEL_DOMAIN_MAX] = { {0x01}, /* 0x10, RT_CHANNEL_DOMAIN_JAPAN */ {0x02}, /* 0x11, RT_CHANNEL_DOMAIN_FCC_NO_DFS */ {0x01}, /* 0x12, RT_CHANNEL_DOMAIN_JAPAN_NO_DFS */ + {0x00}, /* 0x13 */ {0x02}, /* 0x14, RT_CHANNEL_DOMAIN_TAIWAN_NO_DFS */ {0x00}, /* 0x15, RT_CHANNEL_DOMAIN_ETSI_NO_DFS */ {0x00}, /* 0x16, RT_CHANNEL_DOMAIN_KOREA_NO_DFS */ @@ -118,6 +119,7 @@ static struct rt_channel_plan_map RTW_ChannelPlanMap[RT_CHANNEL_DOMAIN_MAX] = { {0x00}, /* 0x1C, */ {0x00}, /* 0x1D, */ {0x00}, /* 0x1E, */ + {0x00}, /* 0x1F, */ /* 0x20 ~ 0x7F , New Define ===== */ {0x00}, /* 0x20, RT_CHANNEL_DOMAIN_WORLD_NULL */ {0x01}, /* 0x21, RT_CHANNEL_DOMAIN_ETSI1_NULL */ @@ -6845,12 +6847,12 @@ void report_del_sta_event(struct adapter *padapter, unsigned char *MacAddr, unsi struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct cmd_priv *pcmdpriv = &padapter->cmdpriv; - pcmd_obj = kzalloc(sizeof(struct cmd_obj), GFP_KERNEL); + pcmd_obj = kzalloc(sizeof(*pcmd_obj), GFP_ATOMIC); if (!pcmd_obj) return; cmdsz = (sizeof(struct stadel_event) + sizeof(struct C2HEvent_Header)); - pevtcmd = kzalloc(cmdsz, GFP_KERNEL); + pevtcmd = kzalloc(cmdsz, GFP_ATOMIC); if (!pevtcmd) { kfree(pcmd_obj); return; diff --git a/drivers/staging/r8188eu/os_dep/ioctl_linux.c b/drivers/staging/r8188eu/os_dep/ioctl_linux.c index 52d42e576443..9404355726d0 100644 --- a/drivers/staging/r8188eu/os_dep/ioctl_linux.c +++ b/drivers/staging/r8188eu/os_dep/ioctl_linux.c @@ -1980,6 +1980,7 @@ static int rtw_wx_read32(struct net_device *dev, u32 data32; u32 bytes; u8 *ptmp; + int ret; padapter = (struct adapter *)rtw_netdev_priv(dev); p = &wrqu->data; @@ -2007,12 +2008,17 @@ static int rtw_wx_read32(struct net_device *dev, break; default: DBG_88E(KERN_INFO "%s: usage> read [bytes],[address(hex)]\n", __func__); - return -EINVAL; + ret = -EINVAL; + goto err_free_ptmp; } DBG_88E(KERN_INFO "%s: addr = 0x%08X data =%s\n", __func__, addr, extra); kfree(ptmp); return 0; + +err_free_ptmp: + kfree(ptmp); + return ret; } static int rtw_wx_write32(struct net_device *dev, diff --git a/drivers/staging/r8188eu/os_dep/mlme_linux.c b/drivers/staging/r8188eu/os_dep/mlme_linux.c index a9b6ffdbf31a..f7ce724ebf87 100644 --- a/drivers/staging/r8188eu/os_dep/mlme_linux.c +++ b/drivers/staging/r8188eu/os_dep/mlme_linux.c @@ -112,7 +112,7 @@ void rtw_report_sec_ie(struct adapter *adapter, u8 authmode, u8 *sec_ie) buff = NULL; if (authmode == _WPA_IE_ID_) { - buff = kzalloc(IW_CUSTOM_MAX, GFP_KERNEL); + buff = kzalloc(IW_CUSTOM_MAX, GFP_ATOMIC); if (!buff) return; p = buff; diff --git a/drivers/staging/rtl8192e/rtl8192e/rtl_core.c b/drivers/staging/rtl8192e/rtl8192e/rtl_core.c index d2e9df60e9ba..b9ce71848023 100644 --- a/drivers/staging/rtl8192e/rtl8192e/rtl_core.c +++ b/drivers/staging/rtl8192e/rtl8192e/rtl_core.c @@ -2549,13 +2549,14 @@ static void _rtl92e_pci_disconnect(struct pci_dev *pdev) free_irq(dev->irq, dev); priv->irq = 0; } - free_rtllib(dev); if (dev->mem_start != 0) { iounmap((void __iomem *)dev->mem_start); release_mem_region(pci_resource_start(pdev, 1), pci_resource_len(pdev, 1)); } + + free_rtllib(dev); } pci_disable_device(pdev); diff --git a/drivers/staging/rtl8192e/rtllib_softmac.c b/drivers/staging/rtl8192e/rtllib_softmac.c index d2726d01c757..aabbea48223d 100644 --- a/drivers/staging/rtl8192e/rtllib_softmac.c +++ b/drivers/staging/rtl8192e/rtllib_softmac.c @@ -2515,7 +2515,7 @@ void rtllib_stop_all_queues(struct rtllib_device *ieee) unsigned int i; for (i = 0; i < ieee->dev->num_tx_queues; i++) - netdev_get_tx_queue(ieee->dev, i)->trans_start = jiffies; + txq_trans_cond_update(netdev_get_tx_queue(ieee->dev, i)); netif_tx_stop_all_queues(ieee->dev); } |