diff options
Diffstat (limited to 'drivers/usb/host/xhci-mtk.c')
| -rw-r--r-- | drivers/usb/host/xhci-mtk.c | 79 |
1 files changed, 76 insertions, 3 deletions
diff --git a/drivers/usb/host/xhci-mtk.c b/drivers/usb/host/xhci-mtk.c index 2548976bcf05..c53f6f276d5c 100644 --- a/drivers/usb/host/xhci-mtk.c +++ b/drivers/usb/host/xhci-mtk.c @@ -56,6 +56,27 @@ /* u2_phy_pll register */ #define CTRL_U2_FORCE_PLL_STB BIT(28) +/* xHCI CSR */ +#define LS_EOF_CFG 0x930 +#define LSEOF_OFFSET 0x89 + +#define FS_EOF_CFG 0x934 +#define FSEOF_OFFSET 0x2e + +#define SS_GEN1_EOF_CFG 0x93c +#define SSG1EOF_OFFSET 0x78 + +#define HFCNTR_CFG 0x944 +#define ITP_DELTA_CLK (0xa << 1) +#define ITP_DELTA_CLK_MASK GENMASK(5, 1) +#define FRMCNT_LEV1_RANG (0x12b << 8) +#define FRMCNT_LEV1_RANG_MASK GENMASK(19, 8) + +#define SS_GEN2_EOF_CFG 0x990 +#define SSG2EOF_OFFSET 0x3c + +#define XSEOF_OFFSET_MASK GENMASK(11, 0) + /* usb remote wakeup registers in syscon */ /* mt8173 etc */ @@ -86,6 +107,46 @@ enum ssusb_uwk_vers { SSUSB_UWK_V1_2, /* specific revision 1.2 */ }; +/* + * MT8195 has 4 controllers, the controller1~3's default SOF/ITP interval + * is calculated from the frame counter clock 24M, but in fact, the clock + * is 48M, add workaround for it. + */ +static void xhci_mtk_set_frame_interval(struct xhci_hcd_mtk *mtk) +{ + struct device *dev = mtk->dev; + struct usb_hcd *hcd = mtk->hcd; + u32 value; + + if (!of_device_is_compatible(dev->of_node, "mediatek,mt8195-xhci")) + return; + + value = readl(hcd->regs + HFCNTR_CFG); + value &= ~(ITP_DELTA_CLK_MASK | FRMCNT_LEV1_RANG_MASK); + value |= (ITP_DELTA_CLK | FRMCNT_LEV1_RANG); + writel(value, hcd->regs + HFCNTR_CFG); + + value = readl(hcd->regs + LS_EOF_CFG); + value &= ~XSEOF_OFFSET_MASK; + value |= LSEOF_OFFSET; + writel(value, hcd->regs + LS_EOF_CFG); + + value = readl(hcd->regs + FS_EOF_CFG); + value &= ~XSEOF_OFFSET_MASK; + value |= FSEOF_OFFSET; + writel(value, hcd->regs + FS_EOF_CFG); + + value = readl(hcd->regs + SS_GEN1_EOF_CFG); + value &= ~XSEOF_OFFSET_MASK; + value |= SSG1EOF_OFFSET; + writel(value, hcd->regs + SS_GEN1_EOF_CFG); + + value = readl(hcd->regs + SS_GEN2_EOF_CFG); + value &= ~XSEOF_OFFSET_MASK; + value |= SSG2EOF_OFFSET; + writel(value, hcd->regs + SS_GEN2_EOF_CFG); +} + static int xhci_mtk_host_enable(struct xhci_hcd_mtk *mtk) { struct mu3c_ippc_regs __iomem *ippc = mtk->ippc_regs; @@ -115,8 +176,11 @@ static int xhci_mtk_host_enable(struct xhci_hcd_mtk *mtk) writel(value, &ippc->u3_ctrl_p[i]); } - /* power on and enable all u2 ports */ + /* power on and enable all u2 ports except skipped ones */ for (i = 0; i < mtk->num_u2_ports; i++) { + if (BIT(i) & mtk->u2p_dis_msk) + continue; + value = readl(&ippc->u2_ctrl_p[i]); value &= ~(CTRL_U2_PORT_PDN | CTRL_U2_PORT_DIS); value |= CTRL_U2_PORT_HOST_SEL; @@ -163,8 +227,11 @@ static int xhci_mtk_host_disable(struct xhci_hcd_mtk *mtk) writel(value, &ippc->u3_ctrl_p[i]); } - /* power down all u2 ports */ + /* power down all u2 ports except skipped ones */ for (i = 0; i < mtk->num_u2_ports; i++) { + if (BIT(i) & mtk->u2p_dis_msk) + continue; + value = readl(&ippc->u2_ctrl_p[i]); value |= CTRL_U2_PORT_PDN; writel(value, &ippc->u2_ctrl_p[i]); @@ -361,6 +428,9 @@ static int xhci_mtk_setup(struct usb_hcd *hcd) ret = xhci_mtk_ssusb_config(mtk); if (ret) return ret; + + /* workaround only for mt8195 */ + xhci_mtk_set_frame_interval(mtk); } ret = xhci_gen_setup(hcd, xhci_mtk_quirks); @@ -444,6 +514,8 @@ static int xhci_mtk_probe(struct platform_device *pdev) /* optional property, ignore the error if it does not exist */ of_property_read_u32(node, "mediatek,u3p-dis-msk", &mtk->u3p_dis_msk); + of_property_read_u32(node, "mediatek,u2p-dis-msk", + &mtk->u2p_dis_msk); ret = usb_wakeup_of_property_parse(mtk, node); if (ret) { @@ -569,7 +641,7 @@ disable_ldos: xhci_mtk_ldos_disable(mtk); disable_pm: - pm_runtime_put_sync_autosuspend(dev); + pm_runtime_put_noidle(dev); pm_runtime_disable(dev); return ret; } @@ -704,6 +776,7 @@ static const struct dev_pm_ops xhci_mtk_pm_ops = { static const struct of_device_id mtk_xhci_of_match[] = { { .compatible = "mediatek,mt8173-xhci"}, + { .compatible = "mediatek,mt8195-xhci"}, { .compatible = "mediatek,mtk-xhci"}, { }, }; |